FAIRCHILD 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs Outputs handbook
Contents
1. GND zA 50 Vo gt Voc lo DC Output Source Sink Current mA Recommended Operating Conditions Note 6 Vec Supply Voltage Operating 2 0 V Data Retention 1 5 V Input Voltage V Vo Output Voltage HIGH or LOW State V lon lo Output Current Voc 3 0V 3 6V Voc 2 7V 3 0V mA Voc 2 3V 2 7V Ta Free Air Operating Temperature 40 0 85 0 G At AV Input Edge Rate Vin 0 8V 2 0V Vcc 3 0V 0 f 100 ns V Note 4 The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings The Recom mended Operating Conditions table will define the conditions for actual device operation Note 5 l Absolute Maximum Rating must be observed Note 6 Unused inputs or I Os must be held HIGH or LOW They may not float DC Electrical Characteristics ymbo arameter onditions nits ly Mi Mee V HIGH Level Input Voltage 2 3 2 7 1 7 H pur vollag Ee ee ae re y Vib LOW Level Input Voltage cae ae a ae ara VoH HIGH Level Output Voltage VoL LOW Level Output Voltage wam fa o 3 STATE Output Leakage 0 lt Vo lt 5 5V RE p j P 23 3 6 5 0 uA Vi Vin oF Vit lorr Power Off Leakage Current Vi or Vo 5 5V o f f 100 uA 3 www fairchildsemi com SCLXOIbZ 74LCX125 DC Electrical Characteristics Con2. 2mm tapes 5 Ao and Bo measured on a plane 0 120 0 30 above the bottom of the pocket 6 Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier 7 Pocket position relative to sprocket hole measured as true position of pocket Not pocket hole 8 Controlling dimension is millimeter Diemension in inches rounded REEL DIMENSIONS inches millimeters W1 Measured at Hub W2 max Measured at Hub gt lt See detail AA DETAIL AA Tape Size ae a ee ee ee 13 0 0 059 0 512 0 795 7 008 0 488 330 1 50 13 00 20 20 178 12 4 7 www fairchildsemi com GSCLXOIbZ 74LCX125 Physical Dimensions inches millimeters unless otherwise noted 0 335 0 344 8 509 8 738 0 228 0 244 5 791 6 198 LEAD NO 1 IDENT 0 150 0 157 3 810 3 988 0 010 0 020 9 053 0 069 0 254 0 508 lt 1 346 1 753 B MAX TYP Y 0 004 0 010 ALL LEADS paa 102 0 254 ee ee ee eee Ah j SEATING Y LEHELE E y OF PLANE A A A 0 008 0 010 KAIA f 0 203 0 254 q 205 0050 0 356 E7 TE S Ea EEE ie TYP ALL LEADS 0 004 0 406 1 270 TYP 0 008 0 102 TYP ALL LEADS i 19 203 TYP ALL LEAD TIPS M14A REU hi 14 Lead Small Outline Integrated Circuit SOIC JEDEC MS 012 0 150 Narrow Package Number M14A www fairchildsSemi com 8 Physical Dimensions inches millimeter
3. O O 7ACXDS5BQX0O O L E FAIRCHILD E SEMICONDUCTOR 74LCX125 Low Voltage Quad Buffer March 1995 Revised February 2005 with 5V Tolerant Inputs and Outputs General Description The LCX125 contains four independent non inverting buff ers with 3 STATE outputs The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems The 74LCX125 is fabricated with an advanced CMOS tech nology to achieve high speed operation while maintaining CMOS low power dissipation Features E 5V tolerant inputs and outputs E 2 3V 3 6V Vcc specifications provided E 6 0 ns tpp max Vcc 3 3V 10 uA Icc max E Power down high impedance inputs and outputs E Supports live insertion withdrawal Note 1 E 24 mA output drive Voc 3 0V E Implements patented noise EMI reduction circuitry E Latch up performance exceeds JEDEC 78 conditions E ESD performance Human body model gt 2000V Machine model gt 100V E Leadiess Pb Free DQFN package Note 1 To ensure the high impedance state during power up or down OE should be tied to Vcc through a pull up resistor the minimum value of the resistor is determined by the current sourcing capability of the driver Ordering Code Package Order Number Number 74LCX125M 74LCX125MX_NL Note 3 74LCX125SJ 74LCX125BQX Note 2 74LCX125MTC Package Description M14A 14 Lead Small Outline Integrated Circuit SOIC JEDEC MS 012 0 150 Narrow M14A Pb Free 14 L
4. ead Small Outline Integrated Circuit SOIC JEDEC MS 012 0 150 Narrow M14D Pb Free 14 Lead Small Outline Package SOP EIAJ TYPE II 5 3mm Wide MLP014A Pb Free 14 Terminal Depopulated Quad Very Thin Flat Pack No Leads DQFN JEDEC MO 241 2 5 x 3 0mm MTC14 14 Lead Thin Shrink Small Outline Package TSSOP JEDEC MO 153 4 4mm Wide 74LCX125MTCX_NL MTC14 Pb Free 14 Lead Thin Shrink Small Outline Package TSSOP JEDEC MO 153 4 4mm Note 3 Wide Device also available in Tape and Reel Specify by appending suffix letter X to the ordering code Pb Free package per JEDEC J STD 020B Note 2 DQFN package available in Tape and Reel only Note 3 _NL indicates Pb Free package per JEDED J STD 020B Device available in Tape and Reel only 2005 Fairchild Semiconductor Corporation DS012416 www fairchildsemi com S ndjnoO pue s nduy yueIIjOL AG YLM J9JyJNg peno abe oA moq GZLXO TPZ 74LCX125 Logic Symbol IEEE IEC Inputs Output Enable Inputs Outputs H HIGH Voltage Level Z High Impedance L LOW Voltage Level X Immaterial www fairchildsemi com Connection Diagrams Pin Assignments for SOIC SOP and TSSOP Top View Absolute Maximum RatingSs note 4 Symba Unis Voo Supay Votage A CSC Vo DC Output Voltage 0 5 to 7 0 Output in 3 STATE V 0 5 to Vcc 0 5 Output in HIGH or LOW State Note 5 V lik DC Input Diode Current Vi lt GND mA lok DC Output Diode Current 50 Vo lt
5. orms OUTPUT T Yee CONTROL mi GND tPZH toyz v DATA 7 oo OUT mo i 3 STATE Output High Enable and Disable Times for Logic OUTPUT vee CONTROL ui GND ZL tp DATA 3 STATE Output Low Enable and Disable Times for Logic CONTROL INPUT t MR rec OR Vmi CLEAR Setup Time Hold Time and Recovery Time for Logic ANY OUTPUT trise and tfall FIGURE 2 Waveforms Input Pulse Characteristics f 1MHz t t 3ns Vec meok eee E o 3 3V 0 3V 1 5V o V Voi 0 3V VoL 0 3V Vy Von 0 3V Von 0 3V Von 0 15V VoL 0 15V www fairchildsemi com SCLXOIbZ 74LCX125 Schematic Diagram Generic for LCX Family input stage Data Ly www fairchildsSemi com Tape and Reel Specification Tape Format for DQFN Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader Start End 125 typ Sealed BQX Carrier 2500 3000 Sealed Trailer Hub End 75 typ Sealed TAPE DIMENSIONS inches millimeters 2 00 0 05 1 55 0 05 1 55 0 05 SECTION B B PKG SIZE DIM Ao DIM Bo DIM Ko SECTION A A 28 01 DIMENSIONS ARE IN MILLIMETERS NOTES unless otherwise specified 1 Cummulative pitch for feeding holes and cavities chip pockets not to exceed 0 008 0 20 over 10 pitch span 2 Smallest allowable bending radius 3 Thru hole inside cavity is centered within cavity 4 Tolerance is 0 002 0 05 for these dimensions on all 1
6. post 8i2 C i _ 0 1040 05 0 65 019 8 30 0 13 A KS oS NOTES A CONFORMS TO JEDEC REGISTRATION MO 153 VARIATION AB REF NOTE 6 DATED 7 93 R DIMENSIONS ARE IN MILLIMETERS C DIMENSIONS ARE EXCLUSIVE OF BURRS MOLD FLASH AND TIE BAR EXTRUSIONS D DIMENSIONING AND TOLERANCES PER ANSI Y14 5M 1982 MT C14revD 4 15 E 0 09 0 20 oe A 2 00 FOP amp BOTTOM SEATING PLANE 0 09mIn oo DETAIL A 14 Lead Thin Shrink Small Outline Package TSSOP JEDEC MO 153 4 4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be rea sonably expected to result in a significant injury to the user 2 A critical component in any component of a life support device or s
7. s unless otherwise noted Continued 10 2 0 1 1 1 TYP o2 c e a ALL LEAD TIPS PIN 1 IDENT ALL LEAD TIPS 2 1 MAX 1 8 0 1 RERA HRESROG CL DIMENSIONS ARE IN MILLIMETERS 0 15 0 05 0 35 0 51 NOTES A CONFORMS TO EIAJ EDR 7320 REGISTRATION ESTABLISHED IN DECEMBER 1998 B DIMENSIONS ARE IN MILLIMETERS C DIMENSIONS ARE EXCLUSIVE OF BURRS MOLD FLASH AND TIE BAR EXTRUSIONS M14DRevB1 v0 UU 9 27 TYP F sS ek took eae LAND PATTERN RECOMMENDATION 5 01 TYP we SEE DETAIL A al N 0 25 0 8 TYP 0 60 0 15 SEATING PLANE 1 25 m DETAIL A Pb Free 14 Lead Small Outline Package SOP EIAJ TYPE Il 5 3mm Wide Package Number M14D www fairchildsemi com SCLXOIbZ 74LCX125 Physical Dimensions inches millimeters unless otherwise noted Continued 3 00 B 2 50 2X 0 15 C TOP VIEW ELLA ose Le HP 0 18 0 30 0 100 C AB 2 00 BOTTOM VIEW NOTES A CONFORMS TO JEDEC REGISTRATION MO 241 VARIATION AA B DIMENSIONS ARE IN MILLIMETERS C DIMENSIONS AND TOLERANCES PER ASME Y14 5M 1994 MLPO14ArevA Pb Free 14 Terminal Depopulated Quad Very Thin Flat Pack No Leads DQFN JEDEC MO 241 2 5 x 3 0mm Package Number MLP014A www fairchildsemi com 10 Physical Dimensions inches millimeters unless otherwise noted Continued ALL LEAD TIPS PIN 1 IDENT au Afoa le
8. tinued Symbol Paramet Conditi Se alll Gat ymbo arameter onaitions nits v B loc Quiescent Supply Current Vi Vec or GND 2 3 3 6 Pf 100 3 6V lt Vi Vo lt 5 5V Note 7 2 3 3 6 PT H00 Alce Increase in Icc per Input Vin Voc 0 6V 2 3 3 6 500 J uA Note 7 Outputs disabled or 3 STATE only uA AC Electrical Characteristics Ta 40 C to 85 C R 5000 Vec 3 3V 0 3V Vec 2 7V Vec 2 5V 0 2V Symbol Parameter Units C 50 pF C 50 pF C 30 pF tPHL Propagation Delay ns PLH tpz Output Enable Time ns tpZH tpHz losLH 1 0 Note 8 Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device The specification applies to any outputs switching in the same direction either HIGH to LOW tos or LOW to HIGH tog y Dynamic Switching Characteristics a Typical CL 30 pF Vig 2 5V Vi OV 2 5 0 6 CL 30 pF Viy 2 5V Vi OV 2 5 0 6 Capacitance www fairchildsemi com 4 AC Loading and Waveforms Generic for LCx Family Voc TEST Q SIGNAL O GND tezh tz Vi tpz teLz FIGURE 1 AC Test Circuit C includes probe and jig capacitance 6V at Voc 3 3 0 3V Vec x2at Voc 2 5 0 2V DATA a IN GND foxx lt _ tpxx DATA 7 OUT mo Waveform for Inverting and Non Inverting Functions ty CONTROL IN CLOCK OUTPUT Propagation Delay Pulse Width and t ec Wavef
9. ystem whose failure to perform can be rea sonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness www fairchildsemi com www fairchildsemi com s nd n pue s ndu j ue1ajoL AG YUM 1ng peno abeyYoA MoT SZLXOTHL Copyright Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 100 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
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FAIRCHILD 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs Outputs handbook