PHILIPS 74HC/HCT109 handbook
Contents
1. onl a ra tm Propagation delay sa ne 45 Fig e n eT sler trHL trun output transition time set or reset pulse width HIGH or LOW removal time nSp nRp to nCP set up time 9 nd nK to nCP me 27 24 24 hold time maximum clock F Gi pulse frequency fmax 1997 Nov 25 6 Philips Semiconductors Product specification Dual JK flip flop with set and reset 74HC HCT109 positive edge trigger AC WAVEFORMS aJ nK INPUT ACP INPUT nQ OUTPUT n OUTPUT lee tL gt tTH The shaded areas indicate when the 444361 A tite tpu input is permitted to change for predictable output performance Fig 6 Waveforms showing the clock nCP to output nQ nQ propagation delays the clock pulse width the nJ nK to nCP set up the nCP to nJ nK hold times the output transition times and the maximum clock pulse frequency nCP INPUT Vu gt trem lt nSp INPUT Vu ia tw paii trem S lt tw nRp INPUT Vit nQ OUTPUT nQ OUTPUT MBK216 1 HC Vu 50 VI GND to Vec HCT Vm 1 3 V Vi GND to 3 V Fig 7 Waveforms showing the set nSp and reset nRp input to output nQ nQ propagation delays the set and reset pulse widths and the nRp nSp to nCP removal time 1997 Nov 25 7 Philips Semiconductors Dual JK flip flop with set and reset positive edge trigger SOLDERING Introduct2. 300 and 400 C contact may be up to 5 seconds SO SSOP and TSSOP REFLOW SOLDERING Reflow soldering techniques are suitable for all SO SSOP and TSSOP packages Reflow soldering requires solder paste a suspension of fine solder particles flux and binding agent to be applied to the printed circuit board by screen printing stencilling or pressure syringe dispensing before package placement Several techniques exist for reflowing for example thermal conduction by heated belt Dwell times vary between 50 and 300 seconds depending on heating method 1997 Nov 25 Product specification 74HC HCT 109 Typical reflow temperatures range from 215 to 250 C Preheating is necessary to dry the paste and evaporate the binding agent Preheating duration 45 minutes at 45 C WAVE SOLDERING Wave soldering can be used for all SO packages Wave soldering is not recommended for SSOP and TSSOP packages because of the likelihood of solder bridging due to closely spaced leads and the possibility of incomplete solder penetration in multi lead devices If wave soldering is used and cannot be avoided for SSOP and TSSOP packages the following conditions must be observed e A double wave a turbulent wave with high upward pressure followed by a smooth laminar wave soldering technique should be used e The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the down
3. The J and K inputs must be stable one set up time prior to the LOW to HIGH clock transition for predictable operation The JK design allows operation as a D type flip flop by tying the J and K inputs together Schmitt trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times CONDITIONS propagation delay nCP to nQ nQ nSp to nQ nQ nRp to nQ nQ maximum clock frequency input capacitance Cpp power dissipation capacitance per flip flop notes 1 and 2 20 22 pF Notes 1 Cpp is used to determine the dynamic power dissipation Pp in uW Pp Cpp X Voc x fi CL x Voc x fo where fi input frequency in MHz fo output frequency in MHz CL x Vec x fo sum of outputs C output load capacitance in pF Voc supply voltage in V 2 For HC the condition is Vj GND to Vcc For HCT the condition is Vj GND to Vcc 1 5 V ORDERING INFORMATION See 74HC HCT HCU HCMOS Logic Package Information 1997 Nov 25 Philips Semiconductors Dual JK flip flop with set and reset positive edge trigger PIN DESCRIPTION Product specification 74HC HCT 109 NAME AND FUNCTION PIN NO SYMBOL 1 15 1Rp 2Rp 2 14 3 13 1J 2J 1K 2K 4 12 1CP 2CP 5 11 1Sp 2Sp 6 10 1Q 2Q 7 9 10 2Q 8 GND asynchronous reset direct input active LOW synchronous inputs flip flops 1 and 2 clock input LOW to HIGH edge triggered
4. OO 74HC HCT109 0 0 INTEGRATED CIRCUITS DATA SHEET For a complete data sheet please also download e The IC06 74HC HCT HCU HCMOS Logic Family Specifications e The IC06 74HC HCT HCU HCMOS Logic Package Information e The IC06 74HC HCT HCU HCMOS Logic Package Outlines 74HC HCT109 Dual JK flip flop with set and reset positive edge trigger Product specification 1997 Nov 25 Supersedes data of December 1990 File under Integrated Circuits IC06 Philips PHILIP sS Semiconductors DH LI p Philips Semiconductors Product specification Dual JK flip flop with set and reset positive edge trigger FEATURES J K inputs for easy D type flip flop Toggle flip flop or do nothing mode e Output capability standard e Icc category flip flops GENERAL DESCRIPTION The 74HC HCT109 are high speed Si gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL They are specified in compliance with JEDEC standard no 7A The 74HC HCT109 are dual positive edge triggered JK flip flops with individual J K inputs clock CP inputs set QUICK REFERENCE DATA GND 0 V Tamb 25 C t ty 6 ns SYMBOL PARAMETER 74HC HCT109 Sp and reset Rp inputs also complementary Q and Q outputs The set and reset are asynchronous active LOW inputs and operate independently of the clock input The J and K inputs control the state changes of the flip flops as described in the mode select function table
5. aracteristics see 74HC HCT HCU HCMOS Logic Family Specifications Output capability standard Icc category flip flops AC CHARACTERISTICS FOR 74HC GND 0 V tr t 6 ns C1 50 pF Tamb C TEST CONDITIONS 74HC SYMBOL PARAMETER UNIT Voc WAVEFORMS 40 to 85 40 to 125 V min min max propagation delay PHU PLH ACP to nQ nO Fig 6 propagation delay nSp to nQ Pig propagation delay nSp to nQ pig propagation delay nRp to nQ Pig propagation delay nRp to nQ Pg output transition im Fig 6 clock pulse width HIGH or LOW Fig 6 set or reset pulse width HIGH or LOW ae removal time nSp nRp to nCP Fig 7 set up time nJ nK to nCP Fig 6 hold time th nJ nK to nCP nae maximum clock pulse frequency Fig 6 fmax 1997 Nov 25 5 Philips Semiconductors Dual JK flip flop with set and reset positive edge trigger DC CHARACTERISTICS FOR 74HCT For the DC characteristics see 74HC HCT HCU HCMOS Logic Family Specifications Output capability standard Icc category flip flops AC CHARACTERISTICS FOR 74HCT GND 0 V tr t 6 ns C_ 50 pF Product specification 74HC HCT 109 Tamb C TEST CONDITIONS e 40 to 85 40 to 125 max SYMBOL PARAMETER WAVEFORMS clock pulse width HIGH or LOW Ve min min
6. asynchronous set direct input active LOW true flip flop outputs complement flip flop outputs ground 0 V positive supply voltage 7293131 Fig 1 Pin configuration 1997 Nov 25 13 2K 7293132 Fig 2 Logic symbol 7Z93133 3 Fig 3 IEC logic symbol Philips Semiconductors Product specification Dual JK flip flop with set and reset positive edge trigger 74HC HCT109 FUNCTION TABLE MODE ol 0 D o asynchronous set asynchronous reset undetermined toggle load 0 reset load 1 set hold no change I I I I Ir I E I TIT I Q Trea jrrer I Notes 1 H HIGH voltage level h HIGH voltage level one set up time prior to the LOW to HIGH CP transition L LOW voltage level LOW voltage level one set up time prior to the LOW to HIGH CP transition q lower case letters indicate the state of the referenced output one set up time prior to the LOW to HIGH CP transition X don t care T LOW to HIGH CP transition 7293134 Fig 4 Functional diagram De De lt h po feo Ol MBK217 Fig 5 Logic diagram one flip flop PACKAGE OUTLINES See 74HC HCT HCU HCMOS Logic Package Outlines 1997 Nov 25 4 Philips Semiconductors Product specification Dual JK flip flop with set and reset ys 74HC HCT109 positive edge trigger DC CHARACTERISTICS FOR 74HC For the DC ch
7. ifications for product development Preliminary specification This data sheet contains preliminary data supplementary data may be published later Product specification This data sheet contains final product specifications Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given it is advisory and does not form part of the specification LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale 1997 Nov 25 9
8. ion There is no soldering method that is ideal for all IC packages Wave soldering is often preferred when through hole and surface mounted components are mixed on one printed circuit board However wave soldering is not always suitable for surface mounted ICs or for printed circuits with high population densities In these situations reflow soldering is often used This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found in our IC Package Databook order code 9398 652 90011 DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C solder at this temperature must not be in contact with the joint for more than 5 seconds The total contact time of successive solder waves must not exceed 5 seconds The device may be mounted up to the seating plane but the temperature of the plastic body must not exceed the specified maximum storage temperature T stg max If the printed circuit board has been pre heated forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron less than 24 V to the lead s of the package below the seating plane or not more than 2 mm above it If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds If the bit temperature is between
9. stream end Even with these conditions e Only consider wave soldering SSOP packages that have a body width of 4 4 mm that is SSOP16 SOT369 1 or SSOP20 SOT266 1 e Do not consider wave soldering TSSOP packages with 48 leads or more that is TSSOP48 SOT362 1 and TSSOP56 SOT364 1 During placement and before soldering the package must be fixed with a droplet of adhesive The adhesive can be applied by screen printing pin transfer or syringe dispensing The package can be soldered after the adhesive is cured Maximum permissible solder temperature is 260 C and maximum duration of package immersion in solder is 10 seconds if cooled to less than 150 C within 6 seconds Typical dwell time is 4 seconds at 250 C A mildly activated flux will eliminate the need for removal of corrosive residues in most applications REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonally opposite end leads Use only a low voltage soldering iron less than 24 V applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C Philips Semiconductors Product specification Dual JK flip flop with set and reset mn 74HC HCT109 positive edge trigger DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal spec
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