Home

TEXAS INSTRUMENTS CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Octal D Flip-Flop with Reset handbook

image

Contents

1. IMPORTANT NOTICE Texas Instruments and its subsidiaries Tl reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability Tl warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements Customers are responsible for their applications using Tl components In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI coverin
2. E Ea E i MR FA o a wj A oj o a o o o el o2lojoljo RI RPS ops D al im 6 7 ee 6 7 Input Leakage Current Vcc or GND Quiescent Supply Current loc Vec or MSI GND ACT TYPES High Level Input Voltage saz Low Level Input Voltage pete High Level Output Voltage Vi or ViL 0 05 z e 1 Aa al ay gt A al al a alu a a a 3 85 75 Note 6 7 al IE EE ORO EC ESA ME Es o ary Low Level Output Voltage Vin or Vit 0 36 1 65 D Input Leakage Current Vcc or GND Quiescent Supply Current loc Vec or MSI GND Additional Supply Current per Alec Voc 4 5 to 2 4 3 Input Pin TTL Inputs High 2 1 1 Unit Load NOTES 6 Test one output at a time for a 1 second maximum duration Measurement is made by forcing current and measuring voltage to minimize power dissipation o o E JES DE 3 94 AEM JE 7 Test verifies a minimum 50Q transmission line drive capability at 85 C 750 at 125 C ACT Input Load Table INPUT UNIT LOAD ph A NOTE Unit load is Alcg limit specified in DC Electrical Specifications Table e g 2 4mA max at 25 C CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Prerequisite For Switching Function 40 C TO 85 C 55 C TO 125 C AC TYPES Data to CP Set Up Time Hold Time Removal Time MR to CP MR Pulse Width CP Pulse Width CP Frequency ACT TYPES Data to CP Set Up Time 10
3. Hold Time Time Ea lc O a E CECI INS S CS CI SALTO Mu E 0 NOA E A E E OS Eee A A E Switching Specifications Input ty t 3ns CL 50pF Worst Case 40 C TO 85 C 55 C TO 125 C AC TYPES Propagation Delay PLH PHL E ae a E ee EA O CP to Qn CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Switching Specifications Input t t 3ns C1 50pF Worst Case Continued 40 C TO 85 C 55 C TO 125 C le eee ere pes a gt A Power Dissipation Capacitance Cpp Note 11 ACT TYPES Propagation Delay PLH PHL 5 3 5 12 3 3 4 13 5 ns CP to Qn Note 10 Propagation Delay PLH PHL MR to Qn Input Input Capacitance Power Dissipation SS HC Note 11 NOTES Limits tested 100 3 3V Min is at 3 6V Max is at 3V 5V Min is at 5 5V Max is at 4 5V Cpp is used to determing the aynamie power consumption per flip flop AC Pp Cpp Voc je E CL Vec fp ACT Pp Cpp Vec fi Y CL Vec fo Vcc Alca where fi input frequency f output frequency C output load capacitance Vcc supply voltage Vs FIGURE 1 PROPAGATION DELAY TIMES AND CLOCK FIGURE 2 PREREQUISITE AND PROPAGATION DELAY PULSE WIDTH TIMES FOR MASTER RESET CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 OUTPUT LEVEL FIGURE 3 PREREQUISITE FOR CLOCK OUTPUT RL NOTE 5000 OUTPUT CL LOAD T 50pF NOTE For AC Series Only When Vcc 1 5V RL 1kQ TARA FIGURE 4 PROPAGATION DELAY TIMES
4. 0 CD5AC273 0 O Lo TEXAS INSTRUMENTS Data sheet acquired from Harris Semiconductor SCHS249A August 1998 Revised April 2000 Features Buffered Inputs Typical Propagation Delay 6 5ns at Voc 5V Ta 25 C C 50pF Exceeds 2kV ESD Protection MIL STD 883 Method 3015 SCR Latchup Resistant CMOS Process and Circuit Design Speed of Bipolar FAST AS S with Significantly Reduced Power Consumption Balanced Propagation Delays AC Types Feature 1 5V to 5 5V Operation and Balanced Noise Immunity at 30 of the Supply 24mA Output Drive Current Fanout to 15 FAST ICs Drives 500 Transmission Lines Pinout CD54AC273 CD54ACT273 CDIP CD74AC273 CD74ACT273 PDIP SOIC TOP VIEW CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Octal D Flip Flop with Reset Description The AC273 and ACT273 devices are octal D type flip flops with reset that utilize advanced CMOS logic technology Information at the D input is transferred to the Q output on the positive going edge of the clock pulse All eight flip flops are controlled by a common clock CP and a common reset MR Resetting is accomplished by a low voltage level independent of the clock Ordering Information momen Ranee acia NUMBER RANGE PACKAGE NOTES 1 When ordering use the entire part number Add the suffix 96 to obtain the variant in the tape and reel 2 Wafer and die for this part number is available which meets all electrical specific
5. Supply Voltage Range Vcc Note 4 ATP ra oe aan hs Seth a heehee 1 5V to 5 5V AGT TYPOS e wt wae ues 4 5V to 5 5V DC Input or Output Voltage Vi Vo Input Rise and Fall Slew Rate dt dv AC Types 1 5V to 3V 50ns Max AC Types 3 6V to 5 5V 20ns Max ACT Types 4 5V to 5 5V 10ns Max CAUTION Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied NOTES 3 For up to 4 outputs per device add 25mA for each additional output 4 Unless otherwise specified all voltages are referenced to ground 5 The package thermal impedance is calculated in accordance with JESD 51 DC Electrical Specifications TEST 40 C TO 55 C TO CONDITIONS Vec 25 C 85 C 125 C PARAMETER SYMBOL V EUN EAE ENNA MASC fiA AC TYPES High Level Input Voltage w 00 a o w rp N a o w Low Level Input Voltage High Level Output Voltage Vin or ViL 0 05 05 ES 05 05 MC Note 6 7 A A 6 7 o al o al o N aj y gt E ol Ss a ola oj nj a Nj E NP ARP a OF RR a 0 a CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 DC Electrical Specifications Continued TEST 40 C TO 55 C TO e PARAMETER SYMBOL V L a EE UNITS Low Level Output Voltage Vin or VIL E Eee ES TA ILL E
6. ations Please contact your local sales office for ordering information CAUTION These devices are sensitive to electrostatic discharge Users should follow proper IC Handling Procedures FAST is a Trademark of Fairchild Semiconductor Copyright 2000 Texas Instruments Incorporated CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Functional Diagram DATA DATA INPUTS OUTPUTS RESET MR TRUTH TABLE INPUTS OUTPUTS RESET CLOCK DATA MR cP Dn H High level steady state L Low level steady state X Irrel evant T Transition from Low to High level QO The level of Q before the indicated steady state input conditions were estab lished CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Absolute Maximum Ratings Thermal Information DC Supply Voltage Vcc 0 5V to 6V Thermal Resistance 8 ya Typical Note 5 DC Input Diode Current lik E Package For Vi lt 0 5V or Vj gt Veg 0 5V cece eee 20mA M Package DC Output Diode Current lox Maximum Junction Temperature Plastic Package For Vo lt 0 5V or Vo gt Voc FOSI oe eo ees 50mA Maximum Storage Temperature Range DC Output Source or Sink Current per Output Pin Io Maximum Lead Temperature Soldering 10s For Vo gt 0 5V or Vo lt Veg 0 5V coccion 50mA DC Vcc or Ground Current Icc or lanp Note 3 100mA Operating Conditions Temperature Range Ta CD54AC273 CD54ACT273 55 C to 125 C CD74AC273 CD74ACT273 40 C to 85 C
7. g or relating to any combination machine or process in which such semiconductor products or services might be or are used Tl s publication of information regarding any third party s products or services does not constitute Tl s approval warranty or endorsement thereof Copyright 2000 Texas Instruments Incorporated

Download Pdf Manuals

image

Related Search

TEXAS INSTRUMENTS CD54AC273 CD74AC273 CD54ACT273 CD74ACT273 Octal D Flip Flop with Reset handbook

Related Contents

PDP 300CJ PDP 350CJ PDP 100J                    

Copyright © All rights reserved.
DMCA: DMCA_mwitty#outlook.com.