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TEXAS INSTRUMENTS CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 Manual

1. Vec fi Cpp CL Vcc Alcc where f input frequency C output load capacitance Vcc supply voltage 105 TI o f T OUTPUT Ri NOTE 5002 OUTPUT L LOAD 50pF OUTPUT NOTE For AC Series Only When Vcc 1 5V Ry 1kQ L a FIGURE 2 WAVEFORMS Input Switching Voltage Vs 0 5 Voc Output Switching Voltage Vs 0 5 Vee 0 5 Vee FIGURE 1 PROPAGATION DELAY TIMES CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 INPUT LEVEL e tpzL Vs OUTPUT OUTPUT OUTPUT Low OFF gt lt Low 5009 FIGURE 3 PROPAGATION DELAY TIMES AND TEST CIRCUIT IMPORTANT NOTICE Texas Instruments and its subsidiaries Tl reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement including those pertaining to warranty patent infringement and limitation of liability Tl warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not neces
2. discharge Users should follow proper IC Handling Procedures File Number 1945 1 FAST is a Trademark of Fairchild Semiconductor 1 Copyright Harris Corporation 1998 CD74AC04 CD74ACT04 Absolute Maximum Ratings DC Supply Voltage Vcc DC Input Diode Current lik For Vi lt 0 5V or Vi gt Vec HO SV L 20mA DC Output Diode Current lok For Vo lt 0 5V or Vo gt Veg 0 5V L 50mA DC Output Source or Sink Current per Output Pin Io For Vo gt 0 5V or Vo lt Vee 0 5V LL 50mA DC Vec or Ground Current Icc or lanp Note 3 100mA 0 5V to 6V Operating Conditions Temperature Range TA Supply Voltage Range Vcc Note 4 AG TYPOS ii iss e tet l e heck SI ee Oh 1 5V to 5 5V AGT TYPES 1 a A 4 5V to 5 5V DC Input or Output Voltage Vi Vo Input Rise and Fall Slew Rate dt dv AC Types 1 5V to 3V AC Types 3 6V to 5 5V ACT Types 4 5V to 5 5V 55 C to 125 C 50ns Max 20ns Max 10ns Max CD74AC05 CD74ACT05 Thermal Information Thermal Resistance Typical Note 5 PDIP Package SOIC Package Maximum Junction Temperature Plastic Package Maximum Storage Temperature Range Maximum Lead Temperature Soldering 10s 65 C to 150 C CAUTION Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this sp
3. ACD 74A COM HE Xi Texas CD74AC04 CD74ACT04 INSTRUMENTS CD74AC05 CD74ACT05 Data sheet acquired from Harris Semiconductor SCHS225 September 1998 Hex Inverters Features Description CD74AC04 CD74ACT04 Active Outputs The CD74AC04 CD74ACT04 CD74AC05 and CD74ACT05 A are hex inverters that utilize the Harris Advanced CMOS CD74AC05 CD74ACT05 Open Drain Outputs Logic technology Buffered Inputs l r j Ordering Information Typical Propagation Delay lii Vec 5V Ta 25 C CL 50pF PART TEMP 3 5ns at Vcc 5V Ta 25 C C 50p RANGE C PACKAGE TaT ii 2kV ESD Protection MIL STD 883 Method Do R Resistant CMOS Process and Circuit Reducedi Power oriuniption l Balanced Propagation Delavs AC Tvpes Feature 1 5V to 5 5V Operation and Balanced Noise Immunity at 30 of the Supply NOTES 24mA Output Drive Current 1 When ordering use the entire part number Add the suffix 96 to Fanout to 15 FAST ICs obtain the variant in the tape and reel Drives 500 Transmission Lines 2 Wafer and die for this part number is available which meets all elec trical specifications Please contact vour local sales office or Harris customer service for ordering information Pinout Functional Diagram CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 PDIP SOIC TOP VIEW GND 7 Vcc 14 TRUTH TABLE CD74AC ACT04 CD74AC ACT05 INPUT OUTPUT INPUT OUTPUT Z High Impedance CAUTION These devices are sensitive to electrostatic
4. ecification is not implied NOTES 3 For up to 4 outputs per device add 25mA for each additional output 4 Unless otherwise specified all voltages are referenced to ground 5 6ja is measured with the component mounted on an evaluation PC board in free air DC Electrical Specifications TEST CONDITIONS PARAMETER SYMBOL AC TYPES High Level Input Voltage Low Level Input Voltage High Level Output Voltage 04 Vcc V 55 C TO 125 C 40 C TO 25 C 85 C o Q 2 ejj sjn sinj gt OI NPR BR Oy A al N A w co fez oa ai fez oa BINJ Fp a BINJ Fp a ao oo N a oe c N co B o foe gt o oa Q wo e CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 DC Electrical Specifications Continued TEST 40 C TO 55 C TO ena S far Tr Pos ps for for Por Tv e 45 joj fort for v 2e 3 os ee v pa 4s Jos oaf josf v 75 5 5 1 65 V Note 6 7 50 5 5 1 65 V Note 6 7 Input Leakage Current Vec or 5 5 0 1 1 1 uA GND Quiescent Supply Current Icc Vcc or 5 5 4 40 uA SSI GND ACT TYPES High Level Input Voltage Vin 4 5 to 2 2 2 V 5 5 5 5 04 Low Level Output Voltage Vin or gaca Abie 6 7 m 6 7 a Leakage Current KA or KA eee Supply Current Vcc or SSI GND Additional Supply Current per Alcc Vcc 4 5 to Input Pin TTL Inputs High 2 1 5 5 1 Unit Load NOTES 6 Test one output at a time for a 1 second ma
5. sarily performed except those mandated by government requirements CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH PERSONAL INJURY OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE CRITICAL APPLICATIONS TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used TI s publication of information regarding any third party s products or services does not constitute TI s approval warranty or endorsement thereof Copyright 1999 Texas Instruments Incorporated
6. ximum duration Measurement is made by forcing current and measuring voltage to minimize power dissipation 3 85 bel me Mk 7 Test verifies a minimum 50Q transmission line drive capability at 85 C 750 at 125 C ACT Input Load Table INPUT UNIT LOAD NOTE Unit load is Alcc limit specified in DC Electrical Specifications Table e g 2 4mA max at 25 C CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 Switching Specifications Input ty t 3ns CL 50pF Worst Case AC TYPES BS AM Propagation Delay Input to PLH tPHL ei 1 5 Output CD74AC ACT04 3 3 Note 9 o ou D oa n TREE 10 Propagation Delav High Z to Output Low CD74AC ACT05 n 2 1 1 Propagation Delav Output Low to High Z CD74AC ACTO5 3 6 3 6 9 1 2 3 2 7 2 3 2 2 ae ER Ea es a e MIEG I EE ae wj gt wj gt ee acae f 4 ffe TT Power Dissipation Capacitance Cpp 105 Note 11 ACT TYPES Propagation Delay Input to tPLH tPHL Output CD74AC ACT04 ti 10 Propagation Delav Output Low tpLz 8 to High Z 10 oa T o Q Sa Sa n n oOo oo n Propagation Delay High Z to tPZL Output Low CD74AC ACT05 Input Input Capacitance Power Dissipation e _ _ i Note 11 NOTES Limits tested at 100 3 3V Min at 3 6V Max at 3V 5V Min at 5 5V Max at 4 5V Cpp is used ei determine the dynamic power consumption per gate AC Pp Voc fi Cpp CL ACT Pp

TEXAS INSTRUMENTS CD74AC04 CD74ACT04 CD74AC05 CD74ACT05 Manual

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