TEXAS INSTRUMENTS CC2530F32 CC2530F64 CC2530F128 CC2530F256 handbook
Contents
1. PIN NAME PIN PIN TYPE DESCRIPTION AVDD1 28 Power analog 2 V 3 6 V analog power supply connection AVDD2 27 Power analog 2 V 3 6 V analog power supply connection AVDD3 24 Power analog 2 V 3 6 V analog power supply connection AVDD4 29 Power analog 2 V 3 6 V analog power supply connection AVDD5 21 Power analog 2 V 3 6 V analog power supply connection AVDD6 31 Power analog 2 V 3 6 V analog power supply connection DCOUPL 40 Power digital 1 8 V digital power supply decoupling Do not use for supplying external circuits DVDD1 39 Power digital 2 V 3 6 V digital power supply connection DVDD2 10 Power digital 2 V 3 6 V digital power supply connection GND Ground The ground pad must be connected to a solid ground plane GND 1 2 3 4 Unused pins Connect to GND PO_0 19 Digital lO Port 0 0 PO_1 18 Digital lO Port 0 1 PO_2 17 Digital lO Port 0 2 P0_3 16 Digital lO Port 0 3 PO_4 15 Digital lO Port 0 4 PO_5 14 Digital lO Port 0 5 PO_6 13 Digital lO Port 0 6 PO_7 12 Digital I O Port 0 7 P1_0 11 Digital I O Port 1 0 20 mA drive capability P1_1 9 Digital 1 O Port 1 1 20 mA drive capability P1_2 8 Digital I O Port 1 2 P1_3 7 Digital I O Port 1 3 P1_4 6 Digital I O Port 1 4 P1_5 5 Digital I O Port 1 5 P1_6 38 Digital I O Port 1 6 P1_7 37 Digital I O Port 1 7 P2_0 36 Digital I O Port 2 0 P22. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Frequency U 16 MHz Uncalibrated frequency accuracy 18 Calibrated frequency accuracy 0 6 1 Start up time 10 US Initial calibration time 50 us 1 2 The calibrated 16 MHz RC oscillator frequency is the 32 MHz XTAL frequency divided by 2 When the 16 MHz RC oscillator is enabled it is calibrated when a switch from the 16 MHz RC oscillator to the 32 MHz crystal oscillator is performed while SLEEPCMD OSC _PD is set to 0 RSSI CCA CHARACTERISTICS Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RSSI range 100 dB Absolute uncalibrated RSSI CCA accuracy 4 dB RSSI CCA offset 73 dB Step size LSB value 1 dB 1 Real RSSI Register value offset FREQEST CHARACTERISTICS Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FREQEST range 250 kHz FREQEST accuracy 40 kHz FREQEST offset 20 kHz Step size LSB value 7 8 kHz 1 Real FREQEST Register value offset FREQUENCY SYNTHESIZER CHARACTERISTICS Measured on Texas Instruments CC2530 EM reference design with T 25 C VDD 3 V and f 2440 MHz
3. DC CHARACTERISTICS Ta 25 C VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX 1 UNIT Logic 0 input voltage 0 5 V Logic 1 input voltage 2 5 V Logic 0 input current Input equals 0 V 50 50 nA Logic 1 input current Input equals VDD 50 50 nA I O pin pullup and pulldown resistors 20 kQ Logic 0 output voltage 4 mA pins Output load 4 mA 0 5 V Logic 1 output voltage 4 mA pins Output load 4 mA 2 4 V Logic 0 output voltage 20 mA pins Output load 20 mA 0 5 V Logic 1 output voltage 20 mA pins Output load 20 mA 2 4 V PIN DESCRIPTIONS DEVICE INFORMATION The CC2530 pinout is shown in Figure 7 and a short description of the pins follows CC2530 RHA Package Top View N S wa N mM D a Q gt Q x gay yay amp O gt r NANANA A AAA ah aoa Ground Pad P2_4 XOSC32K_Q1 AVDD6 RBIAS AVDD4 AVDD1 AVDD2 RF_N RF_P AVDD3 XOSC_Q2 XOSC_Q1 AVDD5 gt n RESET_N P0076 02 NOTE The exposed ground pad must be connected to a solid ground plane as this is the ground connection for the chip 2009 2011 Texas Instruments Incorporated Figure 7 Pinout Top View Submit Documentation Feedback Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 17 CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 I TEXAS INSTRUMENTS www ti com Table 1 Pin Descriptions
4. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT l sae PER 1 as specified by 1 97 92 Receiver sensitivity 1 requires 85 dBm 88 dBm ifi Saturation maximum input level PER eee EDE HCH 10 dBm 1 requires 20 dBm Wanted signal 82 dBm adjacent modulated channel at Adjacent channel rejection 5 MHz 5 MHz PER 1 as specified by 1 49 dB channel spacing 1 requires 0 dB Adi tch frate 5 MH Wanted signal 82 dBm adjacent modulated channel esr nE NANNE ae a at 5 MHz PER 1 as specified by 1 49 dB channel spacing 1 requires 0 dB Alt ech rejection 10 MH Wanted signal 82 dBm adjacent modulated channel at See a 10 MHz PER 1 as specified by 1 57 dB channel spacing 1 requires 30 dB Wanted signal 82 dBm adjacent modulated channel Alternate channel rejection 10 MHz at 10 MHz PER 1 as specified by 1 57 dB parng 1 requires 30 dB Channel rejection Wanted signal at 82 dBm Undesired signal is an IEEE 2 20 MHz 802 15 4 modulated channel stepped through all channels 57 dB lt 20 MHz from 2405 to 2480 MHz Signal level for PER 1 57 Wanted signal at 82 dBm Undesired signal is 802 15 4 Co channel rejection modulated at the same frequency as the desired signal Signal 3 dB level for PER 1 Blocking desensitization 5 MHz from band edge Wanted signal 3 dB above the sensitivity level CW jammer 33 10 MHz from band
5. Oe ooo ood 1 10 UUUUUUUUUU_I 40 D t D THERMAL PAD g D q D q D APE q 5 SHOWN ON SEPARATE SHEET C D q D q 0 50 nAAAAANAAAN il Bottom View 0 20 Nomina rame 4204276 E 06 11 NOTES This drawing is subject to change without notice All linear dimensions are in millimeters Dimensioning and tolerancing per ASME Y14 5M 1994 The package thermal pad must be soldered to the board for thermal and mechanical performance See the additional figure in the Product Data Sheet for details regarding the exposed thermal pad features and dimensions Package complies to JEDEC MO 220 variation VJJD 2 A B C QFN Quad Flatpack No Lead Package configuration D E F A TEXAS INSTRUMENTS www ti com THERMAL PAD MECHANICAL DATA RHA S PVQFN N40 PLASTIC QUAD FLATPACK NO LEAD THERMAL INFORMATION This package incorporates an exposed thermal pad that is designed to be attached directly to an external heatsink The thermal pad must be soldered directly to the printed circuit board PCB After soldering the PCB can be used as a heatsink In addition through the use of thermal vias the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device or alternatively can be attached to a special heatsink structure designed into the PCB This design optimizes the heat trans
6. Pack Packages Texas Instruments Literature No SLUA271 and also the Product Data Sheets for specific thermal information via requirements and recommended board layout These documents are available at www ti com lt http www ticom gt E Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release Customers should contact their board assembly site for stencil design recommendations Refer to IPC 7525 for stencil design considerations F Customers should contact their board fabrication site for recommended solder mask tolerances and via tenting recommendations for vias placed in the thermal pad A Texas INSTRUMENTS www ti com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TTS standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this
7. C and VDD 3 V unless otherwise noted CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Digital regulator on 16 MHz RCOSC and 32 MHz crystal Powermode i acile oscillator off Start up of 16 MHz RCOSC 4 HS adii Digital regulator off 16 MHz RCOSC and 32 MHz crystal Roier mode 2 or 3 macie oscillator off Start up of regulator and 16 MHz RCOSC E mg Initially running on 16 MHz RCOSC with 32 MHz XOSC 0 5 l ms Active gt TX or RX OFF With 32 MHz XOSC initially on 192 US RX TX and TX RX turnaround 192 US RADIO PART Programmable in 1 MHz steps 5 MHz between channels RF frequency range for compliance with 1 2394 2507 MHz Radio baud rate As defined by 1 250 kbps Radio chip rate As defined by 1 2 MChip s Flash erase cycles 20 k cycles Flash page size 2 KB 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 4 NNE CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com RF RECEIVE SECTION Measured on Texas Instruments CC2530 EM reference design with T 25 C VDD 3 V and f 2440 MHz unless otherwise noted Boldface limits apply over the entire operating range Ta 40 C to 125 C VDD 2 V to 3 6 V and f 2394 MHz to 2507 MHz
8. Slave RX only 8 Slave RX and TX 4 SCK t _ lt L K SSN I dts Kia t5 K dfa _ pq typ T0478 01 Figure 2 SPI Master AC Characteristics 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 Pe E CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com T0479 01 Figure 3 SPI Slave AC Characteristics 14 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 I TEXAS INSTRUMENTS CC2530F32 3 CC2530F64 CC2530F128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 DEBUG INTERFACE AC CHARACTERISTICS Ta 40 C to 125 C VDD 2 V to 3 6 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT folk dbg Debug clock frequency see Figure 4 12 MHz ty Allowed high pulse on clock see Figure 4 35 ns to Allowed low pulse on clock see Figure 4 35 ns t EXT_RESET_N low to first falling edge on 167 ns 3 debug clock see Figure 5 Falling edge on clock to EXT_RESET_N high t see Figure 5 83 ns t EXT_RESET_N high to first debug command 83 Te 5 see Figure 5 te Debug data setup see Figure 6 2 ns t7 Debug data hold see Figure 6 4 ns tg Clock to data delay see Figure 6 Load 10 p
9. Ta 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage differential VDD is voltage on AVDD5 pin 0 VDD V Input resistance signal Using 4 MHz clock speed 197 KO Full scale signal Peak to peak defines 0 dBFS 2 97 V Single ended input 7 bit setting 5 7 Single ended input 9 bit setting 75 Single ended input 10 bit setting 9 3 ENOB Effective number of bits SEE we IEN sewing 10g bits Differential input 7 bit setting 6 5 Differential input 9 bit setting 8 3 Differential input 10 bit setting 10 0 Differential input 12 bit setting 11 5 Useful power bandwidth 7 bit setting both single and differential 0 20 kHz Single ended input 12 bit setting 6 dBFS 75 2 THD Total harmonic distortion dB Differential input 12 bit setting 6 dBFS 86 6 Single ended input 12 bit setting 70 2 Sighalita nonharmonieirano t Differential input 12 bit setting 79 3 dB Single ended input 12 bit setting 6 dBFS 78 8 Differential input 12 bit setting 6 dBFS 88 9 CMRR Common mode rejection ratio a ey 0 C a 1 kHz sine 0 dBFS gt 84 dB Crosstalk Wae Tar setting 1 kHz sine 0 dBFS gt 84 dB Offset Midscale 3 mV Gain err
10. 18 24 0x15 20 24 0x05 22 23 0x05 and TXCTRL 0x09 28 23 1 24 Measured on Texas Instruments CC2530 EM reference design with Ta 25 C VDD 3 V and f 2440 MHz unless otherwise noted See References Item 1 for recommended register settings Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 i Mes CC2530F32 CC2530F64 C2530F 128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 APPLICATION INFORMATION Few external components are required for the operation of the CC2530 A typical application circuit is shown in Figure 19 Typical values and description of external components are shown in Table 3 2 V to 3 6 V E Power Supply Optional 32 kHz Crystal Q C331 c401 t i 2 ae fl S lt np md z l gemy l bd C321 i J op N vr m M a o 2 l J 9 S 8 R301 Ae 2 2 RBIAS 30 IV ee x x AVDD4 29 R Antenna Is L252 50 Q e S S AVDD1 28 C251 C252 oe AVDD2 27 C253 E RF_N 26 CC2530 E RF_P 25 C261 L261 DIE ATTACH PAD AVDD3 24 ka WI XOSC_Q2 23 C262 XOSC_Q1 22 Z AVDD5 21 Power Supply Decoupling Capacitors are Not Shown a Digital I O Not Connected 7 1 0383 01 Figure 19 CC2530 Application Circuit Table 3 Overview of External Components Excluding Supply Dec
11. AES encryption decryption core allows the user to encrypt and decrypt data using the AES algorithm with 128 bit keys The core is able to support the AES operations required by IEEE 802 15 4 MAC security the ZigBee network layer and the application layer A built in watchdog timer allows the CC2530 to reset itself in case the firmware hangs When enabled by software the watchdog timer must be cleared periodically otherwise it resets the device when it times out It can alternatively be configured for use as a general 32 kHz timer USART 0 and USART 1 are each configurable as either a SPI master slave or a UART They provide double buffering on both RX and TX and hardware flow control and are thus well suited to high throughput full duplex applications Each has its own high precision baud rate generator thus leaving the ordinary timers free for other uses 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 Radio I TEXAS INSTRUMENTS www ti com The CC2530 features an IEEE 802 15 4 compliant radio transceiver The RF core controls the analog radio modules In addition it provides an interface between the MCU and the radio which makes it possible to issue commands read status and automate and sequence radio events The radio also includes a packet fil
12. Removed sentence that pseudorandom data can be used for security Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 z PACKAGE OPTION ADDENDUM 14 TEXAS INSTRUMENTS www ti com 6 Oct 2010 PACKAGING INFORMATION Orderable Device Status UI Package Type Package Pins Package Qty Eco Plan 2 Lead MSL Peak Temp Samples Drawing Ball Finish Requires Login CC2530F128RHAR ACTIVE VQFN RHA 40 2500 Green ROHS CU NIPDAU Level 3 260C 168 HR Purchase Samples amp no Sb Br CC2530F128RHAT ACTIVE VQFN RHA 40 250 Green RoHS CU NIPDAU Level 3 260C 168 HR Request Free Samples amp no Sb Br CC2530F256RHAR ACTIVE VQFN RHA 40 2500 Green RoHS CU NIPDAU Level 3 260C 168 HR Purchase Samples amp no Sb Br CC2530F256RHAT ACTIVE VQFN RHA 40 250 Green RoHS CU NIPDAU Level 3 260C 168 HR Request Free Samples amp no Sb Br CC2530F32RHAR ACTIVE VQFN RHA 40 2500 Green RoHS CU NIPDAU Level 3 260C 168 HR Purchase Samples amp no Sb Br CC2530F32RHAT ACTIVE VQFN RHA 40 250 Green ROHS CU NIPDAU Level 3 260C 168 HR Request Free Samples amp no Sb Br CC2530F64RHAR ACTIVE VQFN RHA 40 2500 Green RoHS CU NIPDAU Level 3 260C 168 HR Purchase Samples amp no Sb Br CC2530F64RHAT ACTIVE VQFN RHA 40 250 Green RoHS CU NIPDAU Level 3 260C 168 HR Request Free Samples amp no Sb Br The marketing status values are defined as follow
13. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions Failure to observe proper handling and installation procedures can cause damage Ata ESD damage can range from subtle performance degradation to complete device failure Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 Submit Documentation Feedback 3 CC2530F32 CC2530F64 4 NNE CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com ABSOLUTE MAXIMUM RATINGS MIN MAX UNIT Supply voltage All supply pins must have the same voltage 0 3 3 9 V Voltage on any digital pin soe VDD yee V Input RF level 10 dBm Storage temperature range 40 125 C Kansi All pads according to human body model JEDEC STD 22 method A114 2 kV According to charged device model JEDEC STD 22 method C101 500 V 1 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reli
14. s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 a CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com REVISION HISTORY Changes from Revision A November 2010 to Revision B Page e Changed recommendation for single crystal implementations to asynchronous networks sese ee eee eee eee ee ee e 1 e Added op amp and comparator to peripherals list sees eee eee eee eee 1 REVISE DIOCK GAGA 2 cis saa nne in pp E eee edicts omacetgudeeen patie e a ia a a apa E a araia ea i En 3 e Added number of erase cycles and page size for flash sees eee eee eee 5 Updated ESR for 32 kHz cryStall 1 send nite ela wea ALA SL RL eed 8 e Updated voltage coefficient for temperature Sensor sese eee eee eee ee eee eee ee eee 9 e Added tables for op amp and comparator to the Electrical Characteristics section see ee eee eee e ee eee 10 e Changed SPI AC characteristics SSN low from SCK negative edge to SCK positive edge and split into separate master and slave tables ieres a e a e aeaa aaa eaae a ie a EE raaa an i a iaaa a e aaaea aaaeei 13 Revised block lt Te rT spisie aaa aeai eea a aaa T a ai aaa aE 19 e Corrected description of Timer 2 MAC Timer esse eee eee ee ee ee eee 21 Improved readability of sleep timer description oo eee ee eee eee eee 21 28 Added the operational amplifier and the ultralow power analog comparator paragraphs from the SWRS084 after The ADC supports ChANNel S eT Te lT e T
15. unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT At 1 MHz offset from carrier 110 Phase noise unmodulated carrier At 2 MHz offset from carrier 117 dBc Hz At 5 MHz offset from carrier 122 ANALOG TEMPERATURE SENSOR Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output at 25 C 1480 12 bit ADC Temperature coefficient 4 5 1 C Voltage coefficient ae E 1 0 1 V a Measured using integrated ADC using Initial accuracy without calibration internal bandgap voltage reference and 10 C Accuracy using 1 point calibration entire maximum resolution 45 C temperature range Current consumption when enabled ADC current not included 0 3 mA 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 4 NNE CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com OP AMP CHARACTERISTICS T 25 C VDD 3 V All measurement results are obtained using the CC2530 reference designs post calibration PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Chopping Configuration Register APCFG 0x07 OPAMPMC 0x03 OPAMPC 0x01 Output maximum voltage VDD 0 07 V Output minimum voltage 0 07 V Open loop gain 108 d
16. 12 TEXAS INSTRUMENTS www ti com CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 A True System on Chip Solution for 2 4 GHz IEEE 802 15 4 and ZigBee Applications Check for Samples CC2530F32 CC2530F64 CC2530F128 CC2530F256 FEATURES RF Layout 2 4 GHz IEEE 802 15 4 Compliant RF Transceiver Excellent Receiver Sensitivity and Robustness to Interference Programmable Output Power Up to 4 5 dBm Very Few External Components Only a Single Crystal Needed for Asynchronous Networks 6 mm x 6 mm QFN40 Package Suitable for Systems Targeting Compliance With Worldwide Radio Frequency Regulations ETSI EN 300 328 and EN 300 440 Europe FCC CFR47 Part 15 US and ARIB STD T 66 Japan Low Power Active Mode RX CPU Idle 24 mA Active Mode TX at 1 dBm CPU Idle 29 mA Power Mode 1 4 us Wake Up 0 2 mA Power Mode 2 Sleep Timer Running 1 pA Power Mode 3 External Interrupts 0 4 pA Wide Supply Voltage Range 2 V 3 6 V Microcontroller High Performance and Low Power 8051 Microcontroller Core With Code Prefetch 32 64 128 or 256 KB In System Programmable Flash 8 KB RAM With Retention in All Power Modes Hardware Debug Support Peripherals Powerful Five Channel DMA Integrated High Performance Op Amp and Ultralow Power Comparator IEEE 802 15 4 MAC Timer General Purpose Timers One 16 Bi
17. 4 2006 pdf 2 CC253x User s Guide CC253x System on Chip Solution for 2 4 GHz IEEE 802 15 4 and ZigBee Applications SWRU191 Additional Information Texas Instruments offers a wide selection of cost effective low power RF solutions for proprietary and standard based wireless applications for use in industrial and consumer applications Our selection includes RF transceivers RF transmitters RF front ends and System on Chips as well as various software solutions for the sub 1 and 2 4 GHz frequency bands 26 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 Tee CC2530F32 CC2530F64 CC2530F128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 In addition Texas Instruments provides a large selection of support collateral such as development tools technical documentation reference designs application expertise customer support third party and university programs The Low Power RF E2E Online Community provides technical support forums videos and blogs and the chance to interact with fellow engineers from all over the world With a broad selection of product solutions end application possibilities and a range of technical support Texas Instruments offers the broadest low power RF portfolio We make RF easy The following subsections point to where to find more information Texas Instruments Low Power RF Web Site
18. 4 2474 2494 2400 2420 2440 2460 2480 f Frequency MHz Interferer Frequency MHz Go005 G006 Figure 13 Figure 14 SENSITIVITY OUTPUT POWER TXPOWER 0xF5 vs vs TEMPERATURE TEMPERATURE 92 8 93 A 6 94 amp me a L 4 k kd E 95 z D a 96 e 5 S 7 ka I 97 C 0 98 99 2 40 0 40 80 120 40 0 40 80 120 T Temperature C T Temperature C G007 G008 Figure 15 Figure 16 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS continued Po Output Power dBm I TEXAS INSTRUMENTS www ti com OUTPUT POWER TXPOWER OxF5 SENSITIVITY vs vs SUPPLY VOLTAGE SUPPLY VOLTAGE 5 0 94 4 8 95 96 4 6 0 D I 97 2 4 4 E oO o 98 4 2 99 4 0 100 2 0 2 4 2 8 3 2 3 6 2 0 28 3 2 3 6 Figure Voc Supply Voltage V G 009 17 Vcc Supply Voltage V G010 Figure 18 Table 2 Recommended Output Power Settings TXPOWER Register Setting Typical Output Power dBm Typical Current Consumption mA OxF5 4 5 34 OxE5 2 5 31 0xD5 1 29 OxC5 0 5 28 0xB5 1 5 27 0xA5 3 27 0x95 4 26 0x85 6 26 0x75 8 25 0x65 10 25 0x55 12 25 0x45 14 25 0x35 16 25 0x25
19. 6 32 MHz oscillator is used See item 1 Figure 1 This is the shortest pulse that is recognized as a complete reset pin request Note that shorter pulses may be RESET_N low duration recognized but might not lead to complete reset of all modules within US the chip See item 2 Figure 1 This is the shortest pulse that is recognized as Interrupt pulse duration an interrupt request 20 ns RESET N 12 Submit Documentation Feedback Figure 1 Control Input AC Characteristics Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 T0299 01 2009 2011 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com SPI AC CHARACTERISTICS Ta 40 C to 125 C VDD 2 V to 3 6 V CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t Master RX and TX 250 ty SCK period ns Slave RX and TX 250 SCK duty cycle Master 50 Master 63 te SSN low to SCK ns Slave 63 i Master 63 t3 SCK to SSN high ns Slave 63 t4 MOSI early out Master load 10 pF 7 ns ts MOSI late out Master load 10 pF 10 ns te MISO setup Master 90 ns t7 MISO hold Master 10 ns SCK duty cycle Slave 50 ns tio MOSI setup Slave 35 ns t41 MOSI hold Slave 10 ns tg MISO late out Slave load 10 pF 95 ns Master TX only 8 l Master RX and TX 4 Operating frequency MHz
20. A and CODE XDATA with single cycle access to SFR DATA and the main SRAM It also includes a debug interface and an 18 input extended interrupt unit The interrupt controller services a total of 18 interrupt sources divided into six interrupt groups each of which is associated with one of four interrupt priorities Any interrupt service request is serviced also when the device is in idle mode by going back to active mode Some interrupts can also wake up the device from sleep mode power modes 1 3 The memory arbiter is at the heart of the system as it connects the CPU and DMA controller with the physical memories and all peripherals through the SFR bus The memory arbiter has four memory access points access of which can map to one of three physical memories an 8 KB SRAM flash memory and XREG SFR registers It is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory The 8 KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces The 8 KB SRAM is an ultralow power SRAM that retains its contents even when the digital part is powered off power modes 2 and 3 This is an important feature for low power applications The 32 64 128 256 KB flash block provides in circuit programmable non volatile program memory for the device and maps into the CODE and XDATA memory spaces In addition to holding program code and constants the non volatile memory allows the app
21. APE AND REEL INFORMATION All dimensions are nominal Device Package Package Pins PACKAGE MATERIALS INFORMATION 16 Feb 2012 TAPE DIMENSIONS E Reel Diameter mm Dimension designed to accommodate the component width Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers CC2530F128RHAR 330 0 CC2530F128RHAT 330 0 CC2530F256RHAR 330 0 CC2530F256RHAT 330 0 CC2530F32RHAR 330 0 CC2530F32RHAT 330 0 CC2530F64RHAR CC2530F64RHAT 330 0 Pack Materials Page 1 ip TEXAS PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 16 Feb 2012 TAPE AND REEL BOX DIMENSIONS ar All dimensions are nominal Device Package Type Package Drawing Pins Length mm Width mm Height mm CC2530F128RHAR VQFN 336 6 336 6 28 6 CC2530F128RHAT VQFN 336 6 336 6 28 6 CC2530F256RHAR VQFN 336 6 336 6 28 6 CC2530F256RHAT VQFN 336 6 336 6 28 6 CC2530F32RHAR VQFN 336 6 336 6 28 6 CC2530F32RHAT VQFN 336 6 336 6 28 6 CC2530F64RHAR VQFN RHA 2500 336 6 336 6 28 6 CC2530F64RHAT VQFN RHA 40 250 336 6 336 6 28 6 Pack Materials Page 2 MECHANICAL DATA RHA S PVQFN N40 PLASTIC QUAD FLAT PACK NO LEAD
22. B Gain bandwidth product 2 MHz Slew rate 107 V us Input maximum voltage VDD 0 13 V Intput minimum voltage 55 mV Input offset voltage 40 uV CMRR Common mode rejection ratio 90 dB Supply current 0 4 mA f 0 01 Hz to 1 Hz 1 1 aa Input noise voltage nV V Hz f 0 1 Hz to 10 Hz 1 7 Non Chopping Configuration Register APCFG 0x07 OPAMPMC 0x00 OPAMPC 0x01 Output maximum voltage VDD 0 07 V Output minimum voltage 0 07 V Open loop gain 108 dB Gain bandwidth product 2 MHz Slew rate 107 V us Input maximum voltage VDD 0 13 V Intput minimum voltage 55 mV Input offset voltage 0 8 mV CMRR Common mode rejection ratio 90 dB Supply current 0 4 mA f 0 01 Hz to 1 Hz 60 m Input noise voltage nV V Hz f 0 1 Hz to 10 Hz 65 COMPARATOR CHARACTERISTICS Ta 25 C VDD 3 V All measurement results are obtained using the CC2530 reference designs post calibration PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Common mode maximum voltage VDD V Common mode minimum voltage 0 3 Input offset voltage 1 mV Offset vs temperature 16 uV C Offset vs operating voltage 4 mV V Supply current 230 nA Hysteresis 0 15 mV 10 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 Tes CC2530F32 CC2530F64 C2530F 128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 ADC CHARACTERISTICS
23. F 30 ns Time gt DEBUG CLK P2 2 me ti Pie to gt d TA dg gt gt T0436 01 Figure 4 Debug Clock Basic Timing Time DEBUG CLK P2 2 RESET N 4 ty gt 4 ty gt lt ts gt T0437 01 Figure 5 Data Setup and Hold Timing 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 Pee ee CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com Time gt l l l l l DEBUG CLK l P2 2 l l l l DEBUG DATA to CC253x P21 l l l DEBUG DATA from CC253x l P2_1 l T l l 4 te gt lt L gt it t gt T0438 01 Figure 6 Debug Enable Timing TIMER INPUTS AC CHARACTERISTICS Ta 40 C to 125 C VDD 2 V to 3 6 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Synchronizers determine the shortest input pulse that can be tsyscL_k Input capture pulse duration recognized The synchronizers operate at the current system 1 5 clock rate 16 or 32 MHz 16 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 I TEXAS INSTRUMENTS www ti com CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011
24. S 40 40 pom ESR Equivalent series resistance 40 130 kQ Co Crystal shunt capacitance 0 9 2 pF CL Crystal load capacitance 12 16 pF Start up time 0 4 s 1 Including aging and temperature dependency as specified by 1 32 kHz RC OSCILLATOR Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Calibrated frequency 32 753 kHz Frequency accuracy after calibration 0 2 Temperature coefficient 0 4 C Supply voltage coefficient 3 KU Calibration time 4 2 ms 1 The calibrated 32 kHz RC oscillator frequency is the 32 MHz XTAL frequency divided by 977 2 Frequency drift when temperature changes after calibration 3 Frequency drift when supply voltage changes after calibration 4 When the 32 kHz RC oscillator is enabled it is calibrated when a switch from the 16 MHz RC oscillator to the 32 MHz crystal oscillator is performed while SLEEPCMD OSC32K_CALDIS is 0 8 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 1 TEXAS INSTRUMENTS www ti com 16 MHz RC OSCILLATOR CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted
25. Texas Instruments Low Power RF Web site has all our latest products application and design notes FAQ section news and events updates and much more Just go to www ti com lIprf Low Power RF Online Community Forums videos and blogs e RF design help e E2E interaction Join us today at www ti com lprf forum Texas Instruments Low Power RF Developer Network Texas Instruments has launched an extensive network of low power RF development partners to help customers speed up their application development The network consists of recommended companies RF consultants and independent design houses that provide a series of hardware module products and design services including s RF circuit low power RF and ZigBee design services e Low power RF and ZigBee module solutions and development tools RF certification services and RF circuit manufacturing Need help with modules engineering services or development tools Search the Low Power RF Developer Network tool to find a suitable partner www ti com Iprfnetwork Low Power RF eNewsletter The Low Power RF eNewsletter keeps you up to date on new products news releases developers news and other news and events associated with low power RF products from TI The Low Power RF eNewsletter articles include links to get more online information Sign up today on www ti com Iprfnewsletter 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Link
26. Y ARBITER L KA CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 ON CHIP VOLTAGE REGULATOR POWER ON RESET BROWN OUT SLEEP TIMER el VDD 2 V 3 6 V DCOUPL POWER MANAGEMENT CONTROLLER KB SRAM E v 1 DEMODULATOR AND AGC Y A RECEIVE CHAIN AV SYNTH lt 4 FREQUENCY SYNTHESIZER 32 64 128 256 KB FLASH L FLASH CTRL RADIO REGISTERS RADIO DATA INTERFACE U MODULATOR lt v CSMA CA STROBE PROCESSOR D FIFO and FRAME CONTROL TRANSMIT CHAIN f RF_P RF_N Submit Documentation Feedback DIGITAL GB ANALOG E wixeo B0301 02 19 CC2530F32 CC2530F64 Pee ee CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com Figure 8 CC2530 Block Diagram A block diagram of the CC2530 is shown in Figure 8 The modules can be roughly divided into one of three categories CPU and memory related modules modules related to peripherals clocks and power management and radio related modules In the following subsections a short description of each module that appears in Figure 8 is given For more details about the modules and their usage see the corresponding chapters in the CC253x User s Guide SWRU191 CPU and Memory The 8051 CPU core used in the CC253x device family is a single cycle 8051 compatible core It has three different memory access buses SFR DAT
27. _1 35 Digital I O Port 2 1 P2_2 34 Digital I O Port 2 2 P2_3 33 Digital I O Port 2 3 32 768 kHz XOSC XOSC32K_Q2 Analog I O P2_4 32 Digital I O Port 2 4 32 768 kHz XOSC XOSC32K_Q1 Analog I O RBIAS 30 Analog I O External precision bias resistor for reference current RESET_N 20 Digital input Reset active low REN ara a a RFLP A e E a a PA cing XOSC_Q1 22 Analog I O 32 MHz crystal oscillator pin 1 or external clock input XOSC_Q2 23 Analog I O 32 MHz crystal oscillator pin 2 18 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 14 Texas INSTRUMENTS www ti com CIRCUIT DESCRIPTION RESET_N XOSC_Q2 XOSC_Q1 P24 P23 P22 P21 P20 P17 P16 P15 P14 P13 P12 P11 P10 PO_7 PO_6 PO_5 PO_4 PO_3 PO_2 PO_1 PO_0 x x x x x X gt x x x lt x x x x x x x x X x Xe gt lt I O CONTROLLER RESET S 32 MHz X CRYSTAL OSC CLOCK MUX 32 768 kHz pa CRYSTAL OSC DEBUG INTERFACE L L 8051 CPU CORE IRQ CTRL ANALOG COMPARATOR WATCHDOG TIMER and CALIBRATION AES ENCRYPTION AND DECRYPTION TIMER 2 IEEE 802 15 4 MAC TIMER 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 USART 0 USART 1 TIMER 1 16 Bit TIMER 3 8 Bit TIMER 4 8 Bit Joo oo oY MEMOR
28. a good RF ground 3 Margins for passing FCC requirements at 2483 5 MHz and above when transmitting at 2480 MHz can be improved by using a lower output power setting or having less than 100 duty cycle 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 I TEXAS CC2530F32 CC2530 F64 INSTRUMENTS CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com 32 MHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Crystal frequency 32 MHz Crystal frequency accuracy requirement 40 ppm ESR Equivalent series resistance 6 60 Q Co Crystal shunt capacitance 1 7 pF CL Crystal load capacitance 10 16 pF Start up time 0 3 ms The crystal oscillator must be in power down for a guard time before it is used again This Power down guard time requirement is valid for all modes of operation The 3 ms need for power down guard time can vary with crystal type and load 1 Including aging and temperature dependency as specified by 1 32 768 kKHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Crystal frequency 32 768 kHz
29. ability 2 CAUTION ESD sensitive device Precaution should be used when handling the device in order to prevent permanent damage RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT Operating ambient temperature range Ta 40 125 C Operating supply voltage 2 3 6 V ELECTRICAL CHARACTERISTICS Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted Boldface limits apply over the entire operating range Ta 40 C to 125 C VDD 2 V to 3 6 V and f 2394 MHz to 2507 MHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Digital regulator on 16 MHz RCOSC running No radio crystals or peripherals active Medium CPU activity normal flash access no RAM access 3 4 mA 32 MHz XOSC running No radio or peripherals active S i A Medium CPU activity normal flash access no RAM access 6 9 ee in 32 MHz XOSC running radio in RX mode 50 dBm input power no peripherals active CPU 20 5 mA idle j 32 MHz XOSC running radio in RX mode at 100 dBm input power waiting for signal no peripherals active CPU idle 24 3 29 6 mA Core current I R S consumption 32 MHz XOSC running radio in TX mode 1 dBm output power no peripherals active CPU idle 28 7 mA 32 MHz XOSC running radio in TX mode 4 5 dBm output power no peripherals active CPU idle Power mode 1 Digital regulator on 16 MHz RCOSC and 32 MHz crystal oscillator of
30. al XTAL1 with two loading capacitors C221 and C231 is used for the 32 MHz crystal oscillator See the 32 MHz Crystal Oscillator section for details The load capacitance seen by the 32 MHz crystal is given by 1 C TT T Coarasitic a Kaa C224 C231 1 XTAL2 is an optional 32 768 kHz crystal with two loading capacitors C321 and C331 used for the 32 768 kHz crystal oscillator The 32 768 kHz crystal oscillator is used in applications where both very low sleep current consumption and accurate wake up times are needed The load capacitance seen by the 32 768 kHz crystal is given by 1 C 7 T C parasitic C324 C331 2 A series resistor may be used to comply with the ESR requirement On Chip 1 8 V Voltage Regulator Decoupling The 1 8 V on chip voltage regulator supplies the 1 8 V digital logic This regulator requires a decoupling capacitor C401 for stable operation Power Supply Decoupling and Filtering Proper power supply decoupling must be used for optimum performance The placement and size of the decoupling capacitors and the power supply filtering are very important to achieve the best performance in an application TI provides a compact reference design that should be followed very closely References 1 IEEE Std 802 15 4 2006 Wireless Medium Access Control MAC and Physical Layer PHY Specifications for Low Rate Wireless Personal Area Networks LR WPANs http standards ieee org getieee802 download 802 15
31. as Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 I TEXAS INSTRUMENTS www ti com RESET_N XOSC_Q2 XOSC_Q1 P24 P23 P22 P21 P2_0 P17 P16 P15 P14 P13 P12 P11 P1_0 PO_7 P0_6 PO_5 P0_4 PO_3 pO 2 PO_1 P0_0 Pa CC2530F32 CC2530F64 CC2530F 128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 WATCHDOG ON CHIP VOLTAGE DX VoD 2 v 3 6 V m xX 32 MHz POWER ON RESET x CRYSTAL OSC ages iis BROWN OUT and lt J lt gt 7 CALIBRATION A GEG ODO SLEEP TIMER Ka BR cRYSTAL OSC l a gt DEBUG men lt SPEED KZ POWER MANAGEMENT CONTROLLER XI Ew CT x 8B SRAN xe 8051 CPU Kk S gt G X MEMORY xe gt x kK 32 64 128 256 KB 4 FLASH Xk veg DMA C gt x U R Bea i x IR9 CTRL lt 1 C tf X FLASH CTRL X gt ANALOG x g as RADIO REGISTERS Y d l Ba it gt Gaul CSMA CA STROBE PROCESSOR Xf Kee AES ad SE A RADIO DATA INTERFACE O 9 gt AND fe BEE DECRYPTION l 1 T l Tt Z gt ADC S w DEMODULATOR E gt K AND AGC S n n W z Y 4 v v 5 lt 7 E gt USART 0 Z gt y RECEIVE S TRANSMIT CHAIN ao CHAIN sw gt USART 1 Z BZ vS Lin gt TIMER 1 16 Bit TIMER 2 gt EEE 802154MACTIMER lt _ DIGITAL gt TIMER 3 8 Bit L ANALOG MIXED gt TIMER 4 8 Bit KE B0301 02 This integrated circuit can be damaged by ESD
32. crocontrollers microcontroller ti com Video and Imaging www ti com video RFID www ti rfid com OMAP Mobile Processors www ti com omap Wireless Connectivity www ti com wirelessconnectivity TI E2E Community Home Page e2e ti com Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2012 Texas Instruments Incorporated
33. date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters 2009 2011 Texas Instruments Incorporated CC2530F32 CC2530F64 Pe ee CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com DESCRIPTION The CC2530 is a true system on chip SoC solution for IEEE 802 15 4 Zigbee and RF4CE applications It enables robust network nodes to be built with very low total bill of material costs The CC2530 combines the excellent performance of a leading RF transceiver with an industry standard enhanced 8051 MCU in system programmable flash memory 8 KB RAM and many other powerful features The CC2530 comes in four different flash versions CC2530F32 64 1 28 256 with 32 64 128 256 KB of flash memory respectively The CC2530 has various operating modes making it highly suited for systems where ultralow power consumption is required Short transition times between operating modes further ensure low energy consumption Combined with the industry leading and golden unit status ZigBee protocol stack Z Stack from Texas Instruments the CC2530F256 provides a robust and complete ZigBee solution Combined with the golden unit status RemoTI stack from Texas Instruments the CC2530F64 and higher provide a robust and complete ZigBee RF4CE remote control solution 2 Submit Documentation Feedback 2009 2011 Tex
34. de 3 PM3 Typical applications of this timer are as a real time counter or as a wake up timer to come out of power mode 1 PM1 or 2 PM2 The ADC supports 7 to 12 bits of resolution in a 30 kHz to 4 kHz bandwidth respectively DC and audio conversions with up to eight input channels Port 0 are possible The inputs can be selected as single ended or differential The reference voltage can be internal AVDD or a single ended or differential external signal The ADC also has a temperature sensor input channel The ADC can automate the process of periodic sampling or conversion over a sequence of channels The operational amplifier is intended to provide front end buffering and gain for the ADC Both inputs as well as the output are available on pins so the feedback network is fully customizable A chopper stabilized mode is available for applications that need good accuracy with high gain The ultralow power analog comparator enables applications to wake up from PM2 or PM3 based on an analog signal Both inputs are brought out to pins the reference voltage must be provided externally The comparator output is connected to the I O controller interrupt detector and can be treated by the MCU as a regular I O pin interrupt The random number generator uses a 16 bit LFSR to generate pseudorandom numbers which can be read by the CPU or used directly by the command strobe processor It can be seeded with random data from noise in the radio ADC The
35. ed by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as military grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters dataconverter ti com Computers and Peripherals www ti com computers DLP Products www dlp com Consumer Electronics www ti com consumer apps DSP dsp ti com Energy and Lighting www ti com energy Clocks and Timers www ti com clocks Industrial www ti com industrial Interface interface ti com Medical www ti com medical Logic logic ti com Security www ti com security Power Mgmt power ti com Space Avionics and Defense www ti com space avionics defense Mi
36. edge PER 1 Measured according to EN 300 440 class 2 33 20 MHz from band edge 32 50 MHz from band edge 31 dBm 5 MHz from band edge 35 10 MHz from band edge 35 20 MHz from band edge 34 50 MHz from band edge 34 Spurious emission Only largest spurious emission stated within each band Conducted measurement with a 50 Q single ended load 30 MHz 1000 MHz Suitable for systems targeting compliance with EN 300 328 lt dBm 1 GHz 12 75 GHz EN 300 440 FCC CFR47 Part 15 and ARIB STD T 66 80 57 Frequency error tolerance 1 requires minimum 80 ppm 150 ppm Symbol rate error tolerance 1 requires minimum 80 ppm 1000 ppm 1 Difference between center frequency of the received RF signal and local oscillator frequency 2 Difference between incoming symbol rate and the internally generated symbol rate 6 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 Tes CC2530F32 CC2530F64 C2530F 128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 RF TRANSMIT SECTION Measured on Texas Instruments CC2530 EM reference design with T 25 C VDD 3 V and f 2440 MHz unless otherwise noted Boldface limits apply over the entire operating range Ta 40 C to 125 C VDD 2 V to 3 6 V and f 2394 MHz to 2507 MHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Delivered to a single ended 50 Q load throu
37. efines Green to mean Pb Free ROHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 1 by weight in homogeneous material 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications and peak solder temperature Addendum Page 1 H G PACKAGE OPTION ADDENDUM 14 TEXAS INSTRUMENTS www ti com 6 Oct 2010 Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided TI bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals TI and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis Addendum Page 2 1 TEXAS INSTRUMENTS www ti com TAPE AND REEL INFORMATION REEL DIMENSIONS L w1 T
38. f 32 768 kHz XOSC POR BOD and sleep timer active RAM and register retention Power mode 2 Digital regulator off 16 MHz RCOSC and 32 MHz crystal oscillator off 33 5 39 6 mA 0 2 0 3 mA 32 768 kHz XOSC POR and sleep timer active RAM and register retention e HA Power mode 3 Digital regulator off no clocks POR active RAM and register retention 0 4 1 UA Peripheral Current Consumption Adds to core current lcore for each peripheral unit activated Timer 1 Timer running 32 MHz XOSC used 90 UA Timer 2 Timer running 32 MHz XOSC used 90 UA Timer 2 Timer running 32 MHz XOSC used 60 UA loeri Timer 4 Timer running 32 MHz XOSC used 70 HA Sleep timer Including 32 753 kHz RCOSC 0 6 UA ADC When converting 1 2 mA Flash Erase 1 mA Burst write peak current 6 mA 1 Normal flash access means that the code used exceeds the cache storage so cache misses happen frequently GENERAL CHARACTERISTICS Measured on Texas Instruments CC2530 EM reference design with T 25 C and VDD 3 V unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT WAKE UP AND TIMING 4 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 1 TEXAS INSTRUMENTS www ti com GENERAL CHARACTERISTICS continued Measured on Texas Instruments CC2530 EM reference design with T 25
39. fer from the integrated circuit IC For information on the Quad Flatpack No Lead QFN package and its advantages refer to Application Report QFN SON PCB Attachment Texas Instruments Literature No SLUA271 This document is available at www ti com The exposed thermal pad dimensions for this package are shown in the following illustration PIN 1 INDICATOR CO 30 Exposed Thermal Pad 4 50 0 10 4 50 0 10 Bottom View Exposed Thermal Pad Dimensions 4206355 4 Q 05 12 NOTES A All linear dimensions are in millimeters A Texas INSTRUMENTS www ti com LAND PATTERN DATA RHA S PVQFN N40 PLASTIC QUAD FLATPACK NO LEAD Example Stencil Design Example Board Layout alee lle Senci Ini r 36x0 9 WG Cc Cc Cc Co Co mD mD mD UTC HHH Ipin d ll 5 _ _ 6 8 6 75 64 Printed Solder Coverage by Area Non Solder Mask Defined Pad Example Via Layout Design f Via layout may vary depending on layout constraints bS Note D F 16x00 3 AN 4 5 Example Solder Mask Opening Note F 4 9 Pad Geometry Note C 2x1 0 4207627 4 L 05 12 NOTES A All linear dimensions are in millimeters B This drawing is subject to change without notice C Publication IPC 7351 is recommended for alternate designs D This package is designed to be soldered to a thermal pad on the board Refer to Application Note Quad Flat
40. gh a balun using 0 45 8 Nominal output power maximum recommended output power setting 8 140 mM 1 requires minimum 3 dBm Programmable output power 32 dB range Spurious emissions Max recommended output power setting Measured conducted 25 MHz 1000 MHz outside restricted bands 60 according to stated 25 MHz 2400 MHz within FCC restricted bands 60 regulations Only largest 25 MHz 1000 MHz within ETSI restricted bands 60 ted SUL stated 1800 1900 MHz ETSI restricted band 57 within each band 5150 5300 MHz ETSI restricted band 55 dBm At 2 x f and 3 x f FCC restricted band 42 At 2 x f and 3 x f ETSI EN 300 440 and EN 300 328 31 1 GHz 12 75 GHz outside restricted bands 53 At 2483 5 MHz and above FCC restricted band f 2480 MHz 42 Measured as defined by 1 using maximum recommended Error vector magnitude EVM output power setting 2 1 requires maximum 35 Differential impedance as seen from the RF port RF_P and RF_N Optimum load impedance aads the antenna 69 j29 Q 1 Texas Instruments CC2530 EM reference design is suitable for systems targeting compliance with EN 300 328 EN 300 440 FCC CFR47 Part 15 and ARIB STD T 66 2 Margins for passing conducted requirements at the third harmonic can be improved by using a simple band pass filter connected between matching network and RF connector 1 8 pF in parallel with 1 6 nH this filter must be connected to
41. lication to save data that must be preserved such that it is available after restarting the device Using this feature one can e g use saved network specific data to avoid the need for a full start up and network find and join process Clocks and Power Management The digital core and peripherals are powered by a 1 8 V low dropout voltage regulator It provides power management functionality that enables low power operation for long battery life using different power modes Five different reset sources exist to reset the device Peripherals The CC2530 includes many different peripherals that allow the application designer to develop advanced applications The debug interface implements a proprietary two wire serial interface that is used for in circuit debugging Through this debug interface it is possible to perform an erasure of the entire flash memory control which oscillators are enabled stop and start execution of the user program execute supplied instructions on the 8051 core set code breakpoints and single step through instructions in the code Using these techniques it is possible to perform in circuit debugging and external flash programming elegantly The device contains flash memory for storage of program code The flash memory is programmable from the user software and through the debug interface The flash controller handles writing and erasing the embedded flash memory The flash controller allows page wise erasure and 4 by
42. ly programmable counter capture channels each with a 16 bit compare value Each of the counter capture channels can be used as a PWM output or to capture the timing of edges on input signals It can also be configured in IR Generation Mode where it counts Timer 3 periods and the output is ANDed with the output of Timer 3 to generate modulated consumer IR signals with minimal CPU interaction Timer 2 the MAC Timer is specially designed for supporting an IEEE 802 15 4 MAC or other time slotted protocol in software The timer has a configurable timer period and a 24 bit overflow counter that can be used to keep track of the number of periods that have transpired A 40 bit capture register is also used to record the exact time at which a start of frame delimiter is received transmitted or the exact time at which transmission ends as well as two 16 bit output compare registers and two 24 bit overflow compare registers that can send various command strobes start RX start TX etc at specific times to the radio modules Timer 3 and Timer 4 are 8 bit timers with timer counter PWM functionality They have a programmable prescaler an 8 bit period value and one programmable counter channel with an 8 bit compare value Each of the counter channels can be used as a PWM output The sleep timer is an ultralow power timer that counts 32 kHz crystal oscillator or 32 kHz RC oscillator periods The sleep timer runs continuously in all operating modes except power mo
43. of third parties may be subject to additional restrictions Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifically designated by TI as military grade or enhanced plastic Only products designat
44. or 0 68 DNL Differential nonlinearity o Stino ae LSB 12 bit setting maximum 0 9 12 bit setting mean 4 6 INL Integral nonlinearity LSB 12 bit setting maximum 13 3 Single ended input 7 bit setting 35 4 Single ended input 9 bit setting 46 8 Single ended input 10 bit setting 57 5 1 Single ended input 12 bit setting 66 6 Panza golil And aistaron Differential input 7 bit setting 40 7 Differential input 9 bit setting 51 6 Differential input 10 bit setting 61 8 Differential input 12 bit setting 70 8 7 bit setting 20 9 bit setting 36 Conversion time US 10 bit setting 68 12 bit setting 132 Power consumption 1 2 mA Internal reference voltage 1 15 V Internal reference VDD coefficient 4 mV V Internal reference temperature coefficient 0 4 mV 10 C 1 Measured with 300 Hz sine wave input and VDD as reference 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 CONTROL INPUT AC CHARACTERISTICS Ta 40 C to 125 C VDD 2 V to 3 6 V unless otherwise noted U TEXAS INSTRUMENTS www ti com PARAMETER TEST CONDITIONS MIN TYP MAX UNIT System clock fsyscLK The undivided system clock is 32 MHz when crystal oscillator is used tsysc_k 1 fsyscik The undivided system clock is 16 MHz when calibrated 16 MHz RC 1
45. oupling Capacitors Component Description Value C251 Part of the RF matching network 18 pF C261 Part of the RF matching network 18 pF L252 Part of the RF matching network 2nH L261 Part of the RF matching network 2nH C262 Part of the RF matching network 1 pF C252 Part of the RF matching network 1 pF C253 Part of the RF matching network 2 2 pF C331 32kHz xtal loading capacitor 15 pF C321 32kHz xtal loading capacitor 15 pF C231 32MHz xtal loading capacitor 27 pF C221 32MHz xtal loading capacitor 27 pF C401 Decoupling capacitor for the internal digital regulator 1 uF 2009 2011 Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 CC2530F32 CC2530F64 Pe ee CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 www ti com Table 3 Overview of External Components Excluding Supply Decoupling Capacitors continued Component Description Value R301 Resistor used for internal biasing 56 kO Input Output Matching When using an unbalanced antenna such as a monopole a balun should be used to optimize performance The balun can be implemented using low cost discrete inductors and capacitors The recommended balun shown consists of C262 L261 C252 and L252 If a balanced antenna such as a folded dipole is used the balun can be omitted Crystal An external 32 MHz cryst
46. s ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available OBSOLETE TI has discontinued the production of the device 2 Eco Plan The planned eco friendly classification Pb Free RoHS Pb Free ROHS Exempt or Green ROHS amp no Sb Br please check http www ti com productcontent for the latest availability information and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS TI s terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 1 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Pb Free ROHS Exempt This component has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free ROHS compatible as defined above Green RoHS amp no Sb Br TI d
47. t Two 8 Bit IR Generation Circuitry 32 kHz Sleep Timer With Capture CSMA CA Hardware Support Accurate Digital RSSI LQI Support Battery Monitor and Temperature Sensor 12 Bit ADC With Eight Channels and Configurable Resolution AES Security Coprocessor Two Powerful USARTs With Support for Several Serial Protocols 21 General Purpose I O Pins 19 x 4mA 2 x 20 mA Watchdog Timer Development Tools CC2530 Development Kit CC2530 ZigBee Development Kit CC2530 RemoTi Development Kit for RF4CE SmartRF Software Packet Sniffer IAR Embedded Workbench Available APPLICATIONS 2 4 GHz IEEE 802 15 4 Systems RF4CE Remote Control Systems 64 KB Flash and Higher ZigBee Systems 256 KB Flash Home Building Automation Lighting Systems Industrial Control and Monitoring Low Power Wireless Sensor Networks Consumer Electronics Health Care AN Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet RemoTl SmartRF Z Stack are trademarks of Texas Instruments IAR Embedded Workbench is a trademark of IAR Systems AB ZigBee is a registered trademark of the ZigBee Alliance All other trademarks are the property of their respective owners PRODUCTION DATA information is current as of publication
48. tering and address recognition module vs TEMPERATURE 28 27 z 26 25 5 O x E 24 23 22 40 40 80 120 T Temperature C Go01 Figure 9 RX CURRENT 100 dBm INPUT vs SUPPLY VOLTAGE 26 0 25 5 lt E 25 0 5 O x DC 24 5 24 0 2 0 2 4 2 8 3 2 3 6 Voc Supply Voltage V G003 Figure 11 22 Submit Documentation Feedback TX Current mA TX Current mA TYPICAL CHARACTERISTICS RX CURRENT 100 dBm INPUT TX CURRENT TXPOWER 0xF5 vs TEMPERATURE 36 35 34 33 32 40 0 40 80 120 T Temperature C Go002 Figure 10 TX CURRENT TXPOWER OxF5 vs SUPPLY VOLTAGE 34 4 34 2 34 0 33 8 33 6 2 0 2 4 2 8 3 2 3 6 Voc Supply Voltage V Go04 Figure 12 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 1 TEXAS INSTRUMENTS CC2530F32 CC2530F64 CC2530F128 CC2530F256 SWRS081B APRIL 2009 REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS continued www ti com OUTPUT POWER TXPOWER OxF5 INTERFERER REJECTION 802 15 4 INTERFERER vs vs INTERFERER FREQUENCY CARRIER AT 82 dBm 2440 FREQUENCY MHz 6 0 75 5 5 E 50 a S H I S 5 0 5 D a oS 25 5 re o a 4 5 5 O ES 0 4 0 3 5 25 2394 2414 2434 245
49. tewise programming The I O controller is responsible for all general purpose I O pins The CPU can configure whether peripheral modules control certain pins or whether they are under software control and if so whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected CPU interrupts can be enabled on each pin individually Each peripheral that connects to the I O pins can choose between two different I O pin locations to ensure flexibility in various applications 20 Submit Documentation Feedback 2009 2011 Texas Instruments Incorporated Product Folder Link s CC2530F32 CC2530F64 CC2530F128 CC2530F256 ies CC2530F32 CC2530F64 C2530F 128 CC2530F256 www ti com SWRS081B APRIL 2009 REVISED FEBRUARY 2011 A versatile five channel DMA controller is available in the system accesses memory using the XDATA memory space and thus has access to all physical memories Each channel trigger priority transfer mode addressing mode source and destination pointers and transfer count is configured with DMA descriptors anywhere in memory Many of the hardware peripherals AES core flash controller USARTs timers ADC interface achieve highly efficient operation by using the DMA controller for data transfers between SFR or XREG addresses and flash SRAM Timer 1 is a 16 bit timer with timer counter PWM functionality It has a programmable prescaler a 16 bit period value and five individual
50. warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Information
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