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IDT IDT2309A handbook

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1. OPERATING CONDITIONS INDUSTRIAL F symbol parameter Se veo Suppyvotage Ta ee Ambient Temperature 2 __ 2 ee pea Load Capacitance 100MHz 133MHz Input Capacitance IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS 2309A 1 INDUSTRIAL 10pF Load 10 30pF Load Measured at 1 4V Fout 66 66MHz 1 dB E N O Ik M s ee NINNIN alll E als 3lolol gt lolol gt Dojo jo Oo O NO ITN Outputto Output Skew Delay REF Rising Edge to CLKOUT Rising Edge Delay REF Rising Edge to CLKOUT Rising Edge 1 5 Measured at VoD 2 on the CLKOUT pins of devices Measured at 66 66MHz loaded outputs Stable power supply valid clock presented on REF pin gt NOTES 1 REF Input has a threshold voltage of Vop 2 2 All parameters specified with loaded outputs SWITCHING CHARACTERISTICS 2309A 1H INDUSTRIAL 2 10pFLoad 30pFLoad Delay REF Rising Edge to CLKOUT Rising Edge Device to Device Skew Delay REF Rising Edge to CLKOUT Rising Edge Measured at VoD 2 in PLL bypass mode IDT2309A only NOTES 1 REF Input has a threshold voltage of Voo 2 2 All parameters specified with loaded outputs IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES ZERO DELAY ANDSKEW CONTROL All outputs should be uniformly loaded in order to achieve Zero I O Delay Since the CLKOUT pin is the internal feedback for
2. Industrial and Commercial operation 18 CLKOUT 4 PLL 2 CLKA1 REF gt 3 CLKA2 14 CLKA3 i 16 CLKA4 Y 8 S2 9 Control S1 gt Logic CLKB1 y CLKB2 10 CLKB3 E CLKB4 The IDT logois a registered trademark of Integrated Device Technology Inc COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES J ULY 2004 2004 Integrated Device Technology Inc DSC 6588 4 IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS REF _ 1 ao 16 CLKOUT Input Voltage Range REF CLKA1 L 2 15 __ CLKA4 Input Voltage Range CLKA2 3 14 CLKA3 except REF VDD 0 5 o a Mm mug mew at vor Ow ve ano C 5 12 anD instill air a 10 gt CLKBS s2 _ 8 9 Jsi Commercial Temperature Oto 70 E Industrial Temperature 40 to 85 SOIC TSSOP Range TOP VIEW NOTES 1 Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause A P P L C AT O N S permanent damage to the device This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational SDRAM sections of this specification is not implied Exposure to absolute maximum rating Telecom conditions for extended periods may affect reliability 2 The input and output ne
3. the PLL its relative loading can affect and adjust the input output delay The Output Load Difference diagram illustrates the PLL s relative loading with respect to the other outputs that can adjust the Input Output I O Delay For designs utilizing zero I O Delay all outputs including CLKOUT must be equally loaded Even if the output is not used it must have a capacitive load equal to that on the other outputs in order to obtain true zero I O Delay For zero output to output skew all outputs must be loaded equally SWITCHING WAVEFORMS 1 4V a ae Output aie fia NL t5 gt _ Duty Cycle Timing Output to Output Skew All Outputs Rise Fall Time Input to Output Propagation Delay CLKQUT Kim No o Device 1 CLKoUT 4 A Device 2 t7 VDD 2 Device to Device Skew IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS a yop 1KQ CLKOUT 01u gt OUTPUTS os 10pF 1KQ VDD 0 1uF L GND GND Test Circuit 1 all Parameters Except t8 Test Circuit 2 t8 Output Slew Rate On 1H Devices IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES ORDERINGINFORMATION IDT _ XXXXX XX X Device Type Package Process Blank Commercial 0 C to 70 C Industrial 40 C to 85 C DC Small Outline IC DCG SOIC Green PG Thin Shrink Small Outline Package
4. 2518 1DT2309A ENV 3 34 ZERO DELAY IDT2309A l DT CLOCK BUFFER e FEATURES Phase Lock Loop Clock Distribution 10MHz to 133MHz operating frequency four outputs Separate output enable for each output bank Output Skew lt 250ps Low jitter lt 200 ps cycle to cycle IDT2309A 1 for Standard Drive IDT2309A 1H for High Drive No external RC network required Operates at 3 3V VDD Available in SOIC and TSSOP packages FUNCTIONAL BLOCK DIAGRAM Distributes one clock input to one bank of five and one bank of DESCRIPTION The IDT2309A is a high speed phase lock loop PLL clock buffer designed to address high speed clock distribution applications The zero delay is achieved by aligning the phase between the incoming clock and the output clock operable within the range of 10 to 133MHz The IDT2309A is a 16 pin version of the IDT2305A The IDT2309A accepts one reference input and drives two banks of four low skew clocks The 1H version of this device operates up to 133MHz frequency and has higher drive than the 1 device All parts have on chip PLLs which lock to an input clock on the REF pin The PLL feedback is on chip and is obtained from the CLKOUT pad In the absence of an input clock the IDT2309A enters power down In this mode the device will draw less than 121 Afor Commercial Temperature range and less than 251 A for Industrial temperature range and the outputs are tri stated The IDT2309A is characterized for both
5. IONS COMMERCIAL smo we O EAT EAT Supp Volage Operating Temperature Ambient Temperature po w M Load Capacitance 100MHz 133MHz fF 10 Le SWITCHING CHARACTERISTICS 2309A 1 COMMERCIAL 30pF Load Measured at 1 4V Fout 66 66MHz Measured between 0 8V and 2V Measured between 0 8V and 2V Alloutputs equally loaded Measured at Vop 2 NOTES 1 REF Input has a threshold voltage of Vop 2 2 All parameters specified with loaded outputs IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS 2309A 1H COMMERCIAL rre JO os ins Tym es June Oupa Frequence ECTS o ae Paopeload a0 yee STE Pose o pp buy ojeras roo OOO e aj pa Remme ueasrecienmenoniamar O gt pas e anme veasveavewenosvaa O pas e a opasemalyotes gt bey REF Rig Ege OCIKOUT AEREAS Weasuedanving O 0 os PDeiceiodencesten veasuedatvowr2 one cLKOUTpmsotdevces o mo FoupuSteurse Weasuedbetveen8VandaVusngTestcrout2 1 fvr CTTUTTA sede oases E PLL Lock Time Stable power supply valid clock presented on REF pin Pee oe ae ae NOTES 1 REF Input has a threshold voltage of Vop 2 2 All parameters specified with loaded outputs DC ELECTRICAL CHARACTERISTICS INDUSTRIAL symbol Parameir Cts O TI f MN TIC A A Sd A va ATLETA O dP O A MU TIC TE AI EN NT MC A A A A as ra arre OA CN RECTA CON A CIN Sa
6. PGG TSSOP Green 2309A 1 Zero Delay Clock Buffer with High Drive 2309A 1H Ordering Code Package Type Operating Range CORPORATE HEADQUARTERS for SALES for Tech Support DT 2975 Stender Way 800 345 7015 or 408 727 6116 logichelp idt com e Santa Clara CA 95054 fax 408 492 8674 408 654 6459 www idt com
7. gative voltage ratings may be exceeded if the input and output e Datacom clamp current ratings are observed e PC Motherboards Workstations 3 The maximum package power dissipation is calculated using a junction temperature e Critical Path Delay Designs of 150 C and a board trace length of 750 mils PIN DESCRIPTION Pinname Pin number Type Functional Description Inputreference clock 5 Voltolerantinput CLKA1 Output clock for bank A CLKA2 Output clock for bank A VoD 3 3V Supply GND Ground CLKB1 Output clock for bank B CLKB22 Output clock for bank B s10 Select input Bit 1 CLKB30 Output clock for bank B CLKB40 Output clock for bank B CLKA3 Output clock for bank A CLKA4 Output clock for bank A CLKOUT Output clock internal feedback on this pin NOTES 1 Weak pull down 2 Weak pull down on all outputs 3 Weak pull ups on these inputs IDT2309A 3 3V ZERO DELAY CLOCK BUFFER COMMERCIAL ANDINDUSTRIAL TEMPERATURE RANGES FUNCTION TABLE f s2 st CLKA CLKB CLKOUT Output Source PLL Shut Down Driven Driven Driven Driven Driven Driven NOTES 1 H HIGH Voltage Level L LOW Voltage Level 2 This output is driven and has an internal feedback for the PLL The load on this ouput can be adjusted to change the skew between the REF and the output DC ELECTRICAL CHARACTERISTICS COMMERCIAL liL IIH VoL Output LOW Voltage 0 4 V Vos OutputHIGH Votage o secan ocaso 2 OPERATING CONDIT

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