FAIRCHILD Single-Channel: 6N138 6N139 Dual-Channel: HCPL-2730 HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers handbook
Contents
1. HCPL 2731 lp 0 5 mA RL 4 7 ko hs HCPL 2730 HCPL 2731 lp 1 6 mA RL 2 2kQ TA 28 C 6N138 6N139 Only 100 100 o o Ss g z 6N139 8 o lp 2 0 5 mA a RL 4 7kQ o o G 9 o o 10 140 d e o gt z Es a d LU D a a z gt 6N138 8 6 lp 1 6mA E B RL 2 2kQ 3 Go A x 1 2 9 a a H 1 z H Ta 25 C 0 1 0 1 0 01 0 1 1 10 0 01 T INPUT PULSE PERIOD ms Di 1 T INPUT PULSE PERIOD ms 10 9 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com jauuey ajbuis Jauueu jeng 6 LN9 S LN9 siajdnosojdg uojfurieg Wide ueg U IH uang jndu MOT LEZZ 149H 0EZZ 149H 50 tp PROPAGATION DELAY us Fig 22 Propagation Delay vs Temperature 6N138 6N139 Only T T T HCPL 2730 lp 1 6 mA RL 2 2k HCPL 2731 Ip 0 5 mA RL 47k tpLH HCPL 2731 tpLH HCPL 2730 tpHL HCPL 2731 tpHL HCPL 27 10 20 30 40 50 60 70 Ta TEMPERATURE C 80 PROPAGATION DELAY us tp Fig 23 Propagation Delay vs Temperature HCPL 2730 HCPL 2731 Only HCPL 2730 HCPL 2731 1 6 mA RL 2 2k tpLH HCPL 2731 N tpLH HCPL 2730 ipii HCPL 2731 tpHL HCPL 272. Tea PROPAGATION DELAY TO LOGIC LOW us RBE BASE EMITTER RESISTANCE MQ TIME us FORWARD VOLTAGE Vr V CURRENT TRANSFER RATIO CTR 99 Fig 5 LED Forward Voltage vs Temperature 40 20 0 20 40 60 80 100 TEMPERATURE Ta C Fig 7 Non saturated Rise and Fall Times vs Load Resistance HCPL 2730 HCPL 2731 Only 0 1 1 10 RL LOAD RESISTANCE kQ Fig 9 Current Transfer Ratio vs Forward Current 6N138 6N139 Only Veco BM 1600 V02 94 V 1200 Ta 85 800 TA 70C TA 25 C 400 cn Ta 0 C TA 40 C 0 0 01 0 1 1 10 Ip FORWARD CURRENT mA 7 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com Jauueu a Buig Jauueu jeng 6 LN9 SELNI siajdnosojdg uojfureg Wide ueg U IH uang jndu 01 L672 1d9H 0EZZ 149H Fig 10 Current Transfer Ratio vs Base Emitter Resistance 6N138 6N139 Only 1600 1400 o E E 1200 fa tt i 1000 ra amp E oo E Fa Lu 600 Fe o e400 E 2 lp 1 6 mA 200 Vcc 5V Vo 04V 0 1
3. Characteristics Test Conditions Symbol Min Typ Max Unit Input output Relative humidity 45 l o 1 0 HA insulation leakage current TA 25 C t 5 s Vi o 3000 VDC Note 8 Withstand insulation test voltage RH lt 50 Ta 25 C Viso 2500 VRMS Note 4 t 1 min Resistance input to output Note 4 Vj o 500 VDC Rio 101 Q Capacitance input to output Note 4 5 f 1 MHz Co 0 6 pF Input Input RH lt 45 Vi 500 VDC Note 6 Ju 0 005 HA Insulation leakage current t 5s HCPL 2730 2731 only Input Input Resistance Vi j 500 VDC Note 6 Du 10 Q HCPL 2730 2731 only Input Input Capacitance f 1 MHz Note 6 Ci 0 03 pF HCPL 2730 2731 only All Typicals at TA 25 C Notes 1 Current Transfer Ratio is defined as a ratio of output collector current Io to the forward LED input current lp times 100 2 Pin 7 open 6N138 and 6N139 only 3 Common mode transient immunity in logic high level is the maximum tolerable positive dV dt on the leading edge of the com mon mode pulse signal Vcm to assure that the output will remain in a logic high state i e V9 2 0 V Common mode transient immunity in logic low level is the maximum tolerable negative dVew dt on the trailing edge of the common mode pulse signal VoM to assure that the output will remain in a logic low state e Vo lt 0 8 V Device is considered a two terminal device Pins 1 2 3 and
4. TA TEMPERATURE C Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 10 www fairchildsemi com Jauueu a Buig Jauueu jeng 6 LN9 SELNI siajdnosojdg uoybulpeg Hds ueg U IH uang jndu MOT LEZZ 149H 0EZZ 149H Test Circuit for 6N138 and 6N139 Noise Pulse Noise Shield Vec Generator 4E Shield Vee 1 5V tr 5ns TA 8 t 5V Pulse Zo 50V NA L Generator i Vo Y L RL 0 1 pF tr 5ns Vp P n ha Voi Zo 50V 2 Ri to DUTY CYCLE 2 p 7 T Vo 10 D C Ve H A ha il fa 100 ns T H voz CL 215 pF 3 e Vo 13 i 6 IF o 4 H ba kl EL 6 4 0 1 pF Vr2 A Ir Monitor MONITOR A GND Rm l Rm 4 GND T CL 15pF 4 i 5 Test Circuit for 6N138 6N139 Test Circuit for HCPL 2730 and HCPL 2731 lE Vo l 1 5V Ten 7 Fig 22 Switching Time Test Circuit Ir x Noise Noise Shield X le Vcc AAT 1 8 45V wo Zb 8 r AEN Ir ym y A RL A Vs R B a Vo1 2 i 7 L 2 7 Vo Ce A EE Y ha SAA v y T 0 1 pF i Vo Bo
5. Vo2 3 6 Vo 3H 6 Ver als 0 1 pF F Ve ki A GND GND 4 5 F 4p 5 Ve GI Pulse Gen H D E 4 Pulse Gen Test Circuit for HCPL 2730 and HCPL 2731 Switch at A I p 0 mA Vo Switch at B I p 1 6 mA Fig 23 Common Mode Immunity Test Circuit 11 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 jauuey ajbuis Jauueu jeng 6 LN9 S LN9 siajdnosojdg uojfurjieg Wide ueg U IH uang jndu MOT LEZZ 149H 0EZZ 149H Package Dimensions Through Hole 0 270 6 86 0 250 6 35 0 200 5 08 0 140 3 55 SEATING PLANE 0 154 3 90 0 120 3 05 0 008 0 20 0 022 0 56 6016 041 ke 0 016 0 40 100 2 54 TYP 0 270 6 86 0 250 6 35 0 390 9 91 0 370 9 40 0 070 1 78 0 045 1 14 0 200 5 08 0 140 3 55 0 004 0 10 MIN SEATING PLANE 0 154 3 90 1 0 120 3 05 0 022 0 56 IL 0 016 0 40 0 016 0 41 0 008 0 20 A l 0 100 2 54 TYP NOTE All dimensions are in inches millimeters 15 ieee 0 200 iu 62 ____0 400 10 16 TYP Package Dimensions Surface Mount 0 390 9 91 0 370 9 40 0 270 6 86 0 250 6 35 0 070 1 78 0 045 1 14 0 s i 7 62 d 0 020 0 51 0 016 0 41 MI N 0 008 a 20 MTS 0 56 0 045 1 14 Le 0 41 TE eg 0 Es i 2 54 0 405 10 30 Lead Coplanarity 0 004 0 10 MAX e Recommended
6. 270 9 Ip 12 mA 6N139 2 TA 25 C 0 2 1 RL 270 9 Ip 12 mA HCPL 2730 3 Each Channel Ta 25 C HCPL 2731 0 3 2 R 2 2 kO Ir 1 6 mA 6N138 15 Ta 25 C 1 5 10 Ry 2 2 KQ Ip 1 6 mA HCPL 2731 25 Each Channel Ta 25 C deen 1 20 Propagation delay Ry 4 7 KQ Ip 0 5 mA TPLH 6N139 90 us time to logic high Each Channel HCPL 2731 Note 2 Fig 22 Ri 4 7 KQ lp 0 5 mA TA 25 C 6N139 12 60 Each Channel HCPL 2731 22 RL 270 Q Ip 12 mA 6N139 10 TA 25 C 1 3 7 RL 270 Q Ir 12 mA Each Channel HCPL 2730 15 Ta 25 C HCPL 2731 5 10 R 2 2 kQ Ir 1 6 mA 6N138 50 Each Channel HCPL 2730 1 Ry 2 2 KQ Ip 1 6 mA TA 25 C 6N138 7 35 Each Channel HCPL 2730 1 16 Common mode Ip 0 mA IVeml 10 Vp p ICMyl 6N138 1 000 10 000 V us transient immunity TA 25 C R 2 2 KQ Note 3 Fig 23 6N139 at logic high Each Channel HCPL 2730 HCPL 2731 Common mode Ip 1 6 mA IVcml 10 Vp p Ry 2 2 KQ ICM 6N138 1 000 10 000 V us transient immunity Ta 25 C Note 3 Fig 23 6N139 ar logie low Each Channel HCPL 2730 HCPL 2731 All Typicals at TA 25 C 4 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com siajdnosojdo uojbureg yids uteg U IH Juang ynduy MO LEZZ 1A9H OELZ 1d9H Jeuueu jeng GELN9 BELN9 jeuueu ejBurs Isolation Characteristics T 0 to 70 C Unless otherwise specified
7. 0 4 V Vcc 4 5V CTR 6N139 400 1100 Current transfer ratio Each Channel HCPL 2731 3500 Note 1 2 lp 1 6 mA Vo 0 4 V Voc 4 5 V 6N139 500 1300 Each Channel HCPL 2731 2500 Ip 1 6 mA Vo 0 4 V Voc 4 5 V 6N138 300 1300 Each Channel HCPL 2730 2500 Logic low output voltage Ip 0 5 mA l 2 mA Voc 4 5 V VoL 6N139 0 08 0 4 V output voltage Note 2 lp 1 6 mA lg 8 mA Voc 4 5 V 6N139 001 04 Each Channel HCPL 2731 Ip 0 5 mA lo 15 MA Voc 4 5 V 6N139 0 13 0 4 Each Channel HCPL 2731 Ip 12 mA lo 24 mA Voc 4 5 V 6N139 0 20 0 4 Each Channel HCPL 2731 Ip 1 6 mA lo 4 8 mA Vcc 4 5 V 6N138 0 10 0 4 Each Channel HCPL 2730 All Typicals at TA 25 C 3 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 s1ajdnosojdo uojburieg yids wed U IH Wan indur MO LEZZ 1A9H 0EZZ 1AJH Jeuueu jeng GELN9 BELN9 Jeuueu ejburs Switching Characteristics T 0 to 70 C unless otherwise specified Vcc 5 V Parameter Test Conditions Symbol Device Min Typ Max Unit Propagation delay R1 4 7 KQ lg 0 5 mA Tou 6N139 30 us ra meme es RL 4 7 KQ Ip 0 5 mA HCPL 2731 120 Each Channel TA 25 C 3 100 RL
8. N 138S hv fS EH FAIRCHILD SEMICONDUCTOR Darlington Optocouplers Features W Low current 0 5 mA W Superior CTR 2000 W Superior CMR 10 kV us E CTR guaranteed 0 70 C E U L recognized File f E90700 E VDE recognized File f 120915 Ordering option V e g 6N138V W Dual Channel HCPL 2730 E HCPL 2731 Applications W Digital logic ground isolation W Telephone ring detector E EIA RS 232C line receiver E High common mode noise line receiver W uP bus isolation W Current loop receiver July 2005 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Low Input Current High Gain Split Description The 6N138 9 and HCPL 2730 HCPL 2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darling ton photodetector The split darlington configuration separating the input photo diode and the first stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocou pler In the dual channel devices HCPL 2730 HCPL2731 an integrated emitter base resistor provides superior stability over temperature The combination of a very low input current of 0 5 mA and a high current transfer ratio of 200090 makes this family particu larly useful for input interface to MOS CMOS LSTTL and EIA RS232C while output compatibility is ensured to CMOS as well as high fan out TTL
9. 10 100 1000 Ree BASE RESISTANCE kQ Fig 12 Output Current vs Output Voltage 6N138 6N139 Only lo OUTPUT CURRENT mA 0 1 Vo OUTPUT VOLTAGE V Fig 14 Output Current vs Input Diode Forward Current 6N138 6N139 Only 100 Vcc 25V 10 Vo 2 04 V T E ES ra LU be 5 a E el E 2 TA 85C o L A TA 70C TA 25 C SET rro Ta 0C H d Ta 40 C 0 0 01 0 1 1 10 IF INPUT DIODE FORWARD CURRENT mA CTR CURRENT TRANSFER RATIO 96 lo OUTPUT CURRENT mA lo OUTPUT CURRENT mA Fig 11 Current Transfer Ratio vs Forward Current HCPL 2730 HCPL 2731 Only 5000 4000 3000 2000 1000 0 1 10 100 F FORWARD CURRENT mA Fig 13 Output Current vs Output Voltage HCPL 2730 HCPL 2731 Only E E ph lp 5 0mA TA 25 C Voc 50 V lp 24 5 mA 100 IF 24 0 mA 1 IF 3 5mA 80 F 30m TF 2 5 mA IF 2 0 mA 60 IF 1 5 mA 40 IF 1 0 mA 20 i IF 0 5 mA 00 02 04 06 08 10 12 14 16 18 20 Vo OUTPUT VOLTAGE V Fig 15 Output Current vs Input Diode Forward Current HCPL 2730 HCPL 2731 Only 0 1 1 10 100 IF INPUT DIOD
10. 4 are shorted together and Pins 5 6 7 and 8 are shorted together 5 For dual channel devices Cj 9 is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted together 6 Measured between pins 1 and 2 shorted together and pins 3 and 4 shorted together A 5 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 Siajdnosoj dgQ uojburieg yids wey U IH Wan indur MO LEZZ 1A9H OELZ 1d9H Jeuueu jeng GELN9 BELN9 jeuueu ejburs Electrical Characteristics T4 25 C unless otherwise specified Current Limiting Resistor Calculations R4 Non Invert Vpp1 S VDF S Vo OUTPUT F R4 Invert Von Vout VDF INPUT R1 V CMOS CMOS esvlemov 74XX 74LXX 74SXX 74LSXX 74HXX l R2 v R2 V R2 V R2 V R2 V R2 V R2 V Re Vona Vox Ik la CMOS NON INV 2000 1000 2200 750 1000 1000 1000 560 E 95V mv 510 CMOS NON INV 5100 910V v 4700 Where 74XX NON INV 2200 Vpp1 Input Supply Voltage INV 180 Vppe Output Supply Voltage 74LXX NON INV 1800 Vor Diode Forward Voltage INV 100 Voi 4 Logic 0 Voltage of Driver 74SXX NON INV 2000 Vou Logic 1 Voltage of Driver INV 360 Diode Forward Current 74LSXX NON INV 2000 Voix Saturation Voltage of IN 190 Output Transistor
11. requirements An internal noise shield pro vides exceptional common mode rejection of 10 kV us Package Schematic 6N138 6N139 HCPL 2730 HCPL 2731 2005 Fairchild Semiconductor Corporation 1 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 s4 dn030 d0 uojbureg Wide ueg U IH uang ynduj MOT LEZZ 1AJH O LZ 1d9H I9uueu jeng GELN9 BELNO auUeYD a Huls Absolute Maximum Ratings T 25 C unless otherwise specified Parameter Symbol Value Units Storage Temperature Ter 55 to 125 C Operating Temperature Topr 40 to 85 C Lead Solder Temperature Wave solder only See recommended reflow profile graph for Teo 260 for 10 sec C SMD mounting EMITTER DC Average Forward Input Current Each Channel lp avg 20 mA Peak Forward Input Current 50 duty cycle 1 ms P W Each Channel lr pk 40 mA Peak Transient Input Current lt 1 us P W 300 pps Ir trans 1 0 A Reverse Input Voltage Each Channel VR 5 V Input Power Dissipation Each Channel Pp 35 mW DETECTOR Average Output Current Each Channel l avg 60 mA Emitter Base Reverse Voltage 6N138 and 6N139 VER 0 5 V Supply Voltage Output Voltage 6N138 HCPL 2730 Vec Vo 0 5 to 7 V 6N139 HCPL 2731 0 5 to 18 Output Power Dissipation Each Channel Po 100 mW E
12. 74HXX NON INV 2000 IL Load Current Through INV 180 Resistor R2 Fig 1 Resistor Values for Logic Interface l2 Input Current of Output Gate Mon Vpp2 Vpp2 1 8 D o 1 2 A 7 R2 IN o 2 R2 ij 3 67 3 OUT IN Ry CI as R4 CI Fig 2 Non Inverting Logic Interface Fig 3 Inverting Logic Interface 6 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 siajdnosojdo uojbureg yids uteg U IH Wan ynduy MO LEZZ 1AJH OELZ 1d9H Jeuueu jeng GELN9 BELN9 JSMUEU 9 BU1S Fig 4 LED Forward Current vs Forward Voltage 100 FORWARD CURRENT Ir mA TIME T us 0 001 10 14 12 1 3 1 4 15 1 6 FORWARD VOLTAGE Vr V Fig 6 Non saturated Rise and Fall Times vs Load Resistance 6N138 6N139 Only 100 Ta 25 C ftr 10 tr IF ADJUSTED FOR Vo 2 V 1 0 1 1 10 D LOAD RESISTANCE kQ Fig 8 Propagation Delay To Logic Low vs Base Emitter Resistance HCPL 2730 HCPL 2731 Only PT TTT TI lp 1 6 mA Voc BM RL 2 2 K TA 25 C Normalized to Rge None
13. E FORWARD CURRENT mA 8 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com Jauueu a Buig Jauueu jeng 6 LN9 SELNI siajdnosojdg uojfurieg Wide ueg U IH uang jndu MOT LEZZ 149H 0EZZ 149H Fig 16 Logic Low Supply Current vs Input Diode Forward Current 6N138 6N139 Only coL LOGIC LOW SUPPLY CURRENT mA 0 2 4 6 8 10 12 14 IF FORWARD CURRENT mA 16 Fig 18 Propagation Delay vs Input Diode Forward Current 6N138 6N139 Only HL Ry 2 2 KQ or 4 7 kQ tp PROPAGATION DELAY us 0 1 2 3 4 5 6 7 8 lf INPUT DIODE FORWARD CURRENT mA Fig 20 Propagation Delay to Logic Low vs Pulse Period 10 1 o 0 Fig 17 Logic Low Supply Current vs Input Diode Forward Current HCPL 2730 HCPL 2731 Only HCPL 2731 Voc 18V HCPL 2730 HCPL 2731 Voc 27V Icc LOGIC LOW SUPPLY CURRENT mA tp PROPAGATION DELAY us 0 1 0 1 1 10 100 IF INPUT DIODE FORWARD CURRENT mA Fig 19 Propagation Delay vs Input Diode Forward Current HCPL 2730 HCPL 2731 Only 2 KQ or 4 7 KQ 2 4 6 Ip INPUT DIODE FORWARD CURRENT mA 10 Fig 21 Propagation Delay to Logic Low vs Pulse Period HCPL 2730 HCPL 2731 Only
14. Pad Layout for Surface Mount Leadform 7 TT DJ 1 E 0 060 1 52 0 100 2 54 LI 0 295 7 49 0 415 10 54 L J p 0 030 0 76 LILILILI 12 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 s4 dn030 d0 uojburieg Wide wey U IH Juang ynduj MOT LEZZ 1AJH O LZ 1d9H I9uueu jeng GELN9 BELNO auUeYD a Huls Ordering Information Option Example Part Number Description S 6N138S Surface Mount Lead Bend SD 6N138SD Surface Mount Tape and reel Ww 6N138W 0 4 Lead Spacing V 6N138V VDE0884 TV 6N138TV VDE0884 0 4 lead spacing SV 6N138SV VDE0884 surface mount SDV 6N138SDV VDE0884 surface mount tape and reel Marking Information Fairchild logo NE 2 Device number 3 VDE mark Note Only appears on parts ordered with VDE option See order entry table 4 Two digit year code e g 03 5 Two digit work week ranging from 01 to 53 6 Assembly package code 13 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com s13 dno30 d0 uojburieg yids wed U IH Wan ynduy MO LEZ2 1d9H OELZ Td9H Jeuueu jeng GELN9 BELN9 jeuueu ejburs Tape Specifications 120401 m 4 90 0 20 4 0 0 1 0 30 0 05 Do 0 0 0 0 0 0 0 O 1 55 0 05 pa O 0 1 MAX 10 30 0 20 User Directio
15. ains the design specifications for In Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only Rev 116 15 www fairchildsemi com Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 siajdnosojdg uojburieg Wide wey U IH Juang ynduj MOT LEZZ 1AJH O LZ 1d9H JSUUEU JeNQ GELN9 BELN9 auUeYy a Huls Copyright Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 100 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
16. ies OPTOPLANAR SPM PACMAN Stealth Across the board Around the world POP SuperFET The Power Franchise Programmable Active Droop Geier steer PowerEdge SuperSOT 6 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which a are intended for surgical implant into support device or system whose failure to perform can the body or b support or sustain life or c whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can be effectiveness reasonably expected to result in significant injury to the user PRODUCT STATUS DEFINITIONS Definition of Terms Advance Information Formative or This datasheet cont
17. lectrical Characteristics T4 0 to 70 C Unless otherwise specified Individual Component Characteristics Parameter Test Conditions Symbol Device Min Typ Max Unit EMITTER TA 25 C Ve All 1 30 1 7 V Input Forward Voltage Each channel Ig 1 6 mA 1 75 Input Reverse Breakdown Voltage TA 25 C IR 10 HA BVR All 5 0 20 V Each Channel Temperature coefficient of forward voltage lg 1 6 mA AVp ATA All 1 8 mvV C DETECTOR Logic high output current Ip 0 mA Vo Voc 18 V lou 6N139 0 01 100 HA Each Channel HCPL 2731 Ip 0 mA Vo Vcc 7 V 6N138 0 01 250 Each Channel HCPL 2730 Logic low supply Ig 1 6 mA Vg Open loc 6N138 0 4 1 5 mA Vcc 18 V 6N139 leq lgo 1 6 MA Voc 18 V HCPL 2731 1 3 3 Vo1 Vo Open Vec 7 V HCPL 2730 Logic high supply Ur 0 mA Vo Open locH 6N135 0 05 10 HA Voc 18V 6N136 Ip lF2 0 mA Voc 18 V HCPL 2731 0 10 20 Dou Vo Open Veg 7 V HCPL 2730 All Typicals at TA 25 C 2 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com sjejdno2ojdg uojbureg yids uteg U IH Wan ndu MO LEZZ 1A9H OELZ 1d9H Jeuueu jeng GELN9 SerN9 jeuueu ejburs Transfer Characteristics T 0 to 70 C Unless otherwise specified Parameter Test Conditions Symbol Device Min Typ Max Unit COUPLED Ip 0 5 mA Vo
18. n of Feed Reflow Profile 225C peak Temperature C Ramp up 3C sec 215C 10 30 s Time above 183C 60 150 sec 15 2 25 3 Time Minute 10 30 0 20 91 6 0 1 Peak reflow temperature 225C package surface temperature Time of temperature higher than 183C for 60 150 seconds One time soldering reflow is recommended 16 0 0 3 14 Single Channel 6N138 6N139 Dual Channel HCPL 2730 HCPL 2731 Rev 1 0 0 www fairchildsemi com Siatdnpaod0 uojbureg Wide ueg U IH Juang ynduj MOT LEZZ 1AJH O LZ 1d9H JSUUEU JeENQ GELN9 BELN9 JSUUEU 9 bU1S TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx FAST ISOPLANAR PowerSaver SuperSOT 8 ActiveArray FASTr LittleFETTM PowerTrench SyncFET Bottomless Fpgrw MICROCOUPLER QFET TinyLogic Build it Now FRFET MicroFET Qs TINYOPTO CoolFET GlobalOptoisolator MicroPak QT Optoelectronics TruTranslation CROSSVOLT GTOTM MICROWIRE Quiet Series UHC DOME HiSeC MSX RapidConfigure UltraFET EcoSPARK CM MSXPro RapidConnect UniFET E CMOSTM i Lo OCX uSerDes VCX EnSigna ImpliedDisconnect OCXPro SILENT SWITCHER wiren FACT IntelliMAXTM OPTOLOGIC SMART START FACT Quiet Ser
Download Pdf Manuals
Related Search