ST TDA7563 handbook
Contents
1. Figure 8 Distortion vs Frequency 4Q Figure 11 Supply Voltage Rejection vs Freq THD SVR dB 10 90 80 STANDARD MODE 4 Vs 14 4 V 70 E RL 4 Ohm Po 4W 60 50 0 1 STD 8 HE MODE 40 Rg 600 Ohm Vripple 1 Vpk LL Lil 0 01 20 10 100 1000 10000 10 100 1000 10000 f Hz f Hz Figure 9 Distortion vs Frequency 2Q Figure 12 Power Dissipation amp Efficiency vs Output Power 40 STD SINE Ptot W n THD iy ARTE 10 n STANDARD MODE 30 Vs 14 4 V 39 RL 4x4 Ohm m STANDARD MODE 70 f 1 KHz SINE Vs 14 4 V 4 RL 2 Ohm 60 60 t Po dW L 50 50 40 40 Ptot 0 1 30 30 20 20 10 10 0 01 0 0 10 100 1000 10000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 f Hz Po W Figure 10 Crosstalk vs Frequency Figure 13 Power Dissipation amp2. MUTING OUT TURN OFF MUTING IN 20 ms DIAG DISABLE STAND BY IN 10ms PIN2 0 Car Radio Installation PIN2 gt 7V 10ms DIAG ENABLE write 200 ms I C read repeat until All faults disappear OFFSET TEST Device in Play no signal OFFSET ENABLE 30ms 1 C reading repeat IC reading until high offset message disappears IST 13 20 TDA7563 YC BUS INTERFACE Data transmission from microprocessor to the TDA7563 and viceversa takes place through the 2 wires 1 C BUS inter face consisting of the two lines SDA and SCL pull up resistors to positive supply voltage must be connected Data Validity As shown by fig 22 the data on the SDA line must be stable during the high period of the clock The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW Start and Stop Conditions As shown by fig 23 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH Byte Format Every byte transferred to the SDA line must contain 8 bits Each byte must be followed by an acknowledge bit The MSB is transferred first Acknowledge The transmitter puts a resistive HIGH level on the SDA line during the acknowledge clock pulse see fig 24 The receiver the acknowledges has to pull down LOW the SDA line during the acknowledge clock pulse so that the SDAline is stab
3. 35 30 Figure 4 Output Power vs Supply Voltage 20 Po W 100 90 80 70 60 50 40 30 20 10 Figure 5 Distortion vs Output Power 40 STD THD 10 STANDARD MODE _Vs 14 4V RL 4 Ohm 0 1 0 01 0 1 1 10 Po W Figure 6 Distortion vs Output Power 40 HI EFF THD HI EFF MODE vs 14 4V 1 RL 40hm 10 KHz 0 1 f 1KHz 0 01 0 001 0 1 1 10 Po W Figure 7 Distortion vs Output Power 20 STD THD 10 C HI EFF MODE Vs 14 4V RL 2 Ohm 1 f 10 KHz 0 1 f 1 KHz 0 01 0 1 1 10 Po W SI 6 20 TDA7563
4. 0 Short load D3 1 Channel RF Turn on diag No open load D2 0 Open load detection D2 1 Permanent diag No output offset D2 0 Output offset detection D2 1 Channel RF No short to Vec D1 0 Short to Vec D1 1 Channel RF No short to GND D1 0 Short to GND D1 1 Channel RR Turn on diagnostic D4 0 Permanent diagnostic D4 1 Channel R RNormal load D3 0 Short load D3 1 Channel RR Turn on diag No open load D2 0 Open load detection D2 1 Permanent diag No output offset D2 0 Output offset detection D2 1 Channel RR No short to Vec D1 0 Short to Vec D1 1 Channel RR No short to GND D1 0 Short to GND D1 1 XI 17 20 TDA7563 Examples of bytes sequence 1 Turn On diagnostic Write operation 2 Turn On diagnostic Read operation The delay from 1 to 2 can be selected by software starting from T B D ms 3a Turn On of the power amplifier with 30dB gain mute on diagnostic defeat CD 2 X0000000 XXX1XX11 3b Turn Off of the power amplifier XOXXXXXX XXXOXXXX 4 Offset detection procedure enable XX1XX11X XXX1XXXX 5 Offset detection procedure stop and reading operation the results are valid only for the offset detection bits D2 of the bytes DB1 DB2 DB3 DB4 m The purpose of this test is to check if a D C offset 2V typ is present on the outputs produced by input capacitor with anomal
5. Efficiency vs Output Power 4W HI EFF SINE Ptot W n CROSSTALK dB 90 90 TTTIM 90 HI EFF MODE 80 Vs 14 4V 80 s RL 4 x 4 Ohm n 70 f 1 KHz SINE 70 70 60 60 60 50 50 Ptot STANDARD MODE 50 RL 40hm 40 40 Po 4W 40 Rg 600 Ohm 30 30 20 20 30 10 10 20 10 100 1000 10000 0 0 f Hz 0 1 1 10 Po W IST 7 20 TDA7563 Figure 14 Power Dissipation vs Average Figure 15 Power Dissipation vs Average Ouput Power Audio Program Ouput Power Audio Program Simulation 4Q Simulation 2Q Ptot W Ptot W 45 90 40 80 Vs 14V STD MODE 35 RL 4x 4 Ohm GAUSSIAN NOISE Vs 14 V STD MODE 60 RL 4 x 2 Ohm GAUSSIAN NOISE EFF MODE 7 HI EFF MODE DIAGNOSTICS FUNCTIONAL DESCRIPTION a TURN ON DIAGNOSTIC It is activated at the turn on stand by out under IZCbus reguest Detectable output faults are SHORT TO GND SHORT TO Vs SHORT ACROSS THE SPEAKER OPEN SPEAKER To verify if any of the above misconnections are in place a subsonic inaudible current pulse fig 16 is inter nally generated sent through the speaker s and sunk back The Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested after a 12C reading If the stand by out and diag enable commands are both given through a single programming step
6. GL TDA7563 MULTIFUNCTION QUAD POWER AMPLIFIER WITH BUILT IN DIAGNOSTICS FEATURES m DMOS POWER OUTPUT m NON SWITCHING HI EFFICIENCY m HIGH OUTPUT POWER CAPABILITY 4x28W 49 14 4V 1KHZ 10 THD 4x40W EIAJ m MAX OUTPUT POWER 4x72W 2Q m FULL ISC BUS DRIVING ST BY INDEPENDENT FRONT REAR SOFT PLAY MUTE SELECTABLE GAIN 30dB 16dB FOR LOW NOISE LINE OUTPUT FUNCTION HIGH EFFICIENCY ENABLE DISABLE 1 C BUS DIGITAL DIAGNOSTICS m FULL FAULT PROTECTION m DC OFFSET DETECTION m FOUR INDEPENDENT SHORT CIRCUIT PROTECTION m CLIPPING DETECTOR PIN WITH SELECTABLE THRESHOLD 2 10 m ST BY MUTE PIN m LINEAR THERMAL SHUTDOWN m ESD PROTECTION BLOCK DIAGRAM CLK DATA VCC1 LI ST BY MUTE MULTIPOWER BCD TECHNOLOGY MOSFET OUTPUT POWER STAGE FLEXIWATT27 ORDERING NUMBER TDA7563 DESCRIPTION The TDA7563 is a new BCD technology Quad Bridge type of car radio amplifier in Flexiwatt27 package specially intended for car radio applica tions Thanks to the DMOS output stage the TDA7563 has a very low distortion allowing a clear powerful sound Among the features its superior efficiency performance coming from the internal ex clusive structure makes it the most suitable device to simplify the thermal management in high power sets The dissipated output power under average listening condition is in fact reduced up to 50 when compared to the level provided by conven tional class AB solutions This de
7. If another Ko reading operation occurs the bytes do not show the short In general to observe a change in Diagnostic bytes two 1 C reading operations are necessary THERMAL PROTECTION Thermal protection is implemented through thermal foldback fig 21 Thermal foldback begins limiting the audio input to the amplifier stage as the junction temperatures rise above the normal operating range This effectively limits the output power capability of the device thus reducing the temperature to acceptable levels without totally interrupting the operation of the device The output power will decrease to the point at which thermal equilibrium is reached Thermal equilibrium will be reached when the reduction in output power reduces the dissipated pow er such that the die temperature falls below the thermal foldback threshold Should the device cool the audio level will increase until a new thermal equilibrium is reached or the amplifier reaches full power Thermal fold back will reduce the audio output level in a linear manner 12 20 GU TDA7563 Figure 21 Thermal Foldback Diagram gt Tso with same input Tj C signal YC PROGRAMMING READING SEQUENCES A correct turn on off sequence respectful of the diagnostic timings and producing no audible noises could be as follows after battery connection TURN ON PIN2 gt 7V 10ms STAND BY OUT DIAG ENABLE 500 ms min
8. TDA7563 The information related to the outputs status is read and memorized at the end of the current pulse top The acquisition time is 100 ms typ No audible noise is generated in the process As for SHORT TO GND Vs the fault detection thresholds remain unchanged from 30 dB to 16 dB gain setting They are as follows S C to GND Normal Operation S C to Vs OV 1 2V 1 8V Vs 1 8V Vg 1 2V D01AU1253 Concerning SHORT ACROSS THE SPEAKER OPEN SPEAKER the threshold varies from 30 dB to 16 dB gain setting since different loads are expected either normal speaker s impedance or high impedance The values in case of 30 dB gain are as follows S C across Load Normal Operation Open Load OV 0 50 1 50 702 1309 Infinite D01AU1254 If the Line Driver mode Gv 16 dB and Line Driver Mode diagnostic 1 is selected the same thresholds will change as follows S C across Load Normal Operation Open Load 00 1 5Q 4 50 2002 4000 infinite D01AU1252 b PERMANENT DIAGNOSTICS Detectable conventional faults are SHORT TO GND SHORT TO Vs SHORT ACROSS THE SPEAKER The following additional features are provided OUTPUT OFFSET DETECTION The TDA7563 has 2 operating statuses 1 RESTART mode The diagnostic is not enabled Each audio channel operates independently from each other If any of the a m faults occurs only the channel s interested is shut down A check of the output status is made every 1 ms fig 19 Rest
9. art takes place when the overload is removed 2 DIAGNOSTIC mode It is enabled via 1 C bus and self activates if an output overload such to cause the intervention of the short circuit protection occurs to the speakers outputs Once activated the di agnostics procedure develops as follows fig 20 10 20 IST TDA7563 To avoid momentary re circulation spikes from giving erroneous diagnostics a check of the output sta tus is made after 1ms if normal situation no overloads is detected the diagnostic is not performed and the channel returns back active Instead if an overload is detected during the check after 1 ms then a diagnostic cycle having a duration of about 100 ms is started After a diagnostic cycle the audio channel interested by the fault is switched to RESTART mode The relevant data are stored inside the device and can be read by the microprocessor When one cycle has terminated the next one is activated by an Ic reading This is to ensure continuous diagnostics throughout the car radio operating time To check the status of the device a sampling system is needed The timing is chosen at microprocessor level over half a second is recommended Figure 19 Restart timing without Diagnostic Enable Permanent Each 1mS time a sampling of the fault is done Overcurrent and short circuit protection intervention Short circuit removed i e short circuit to GND Figure 20 Restart timing w
10. cted is considered as double fault Double fault table for Turn On Diagnostic TT See TS GND sig S GND so S GND S GND S Vs S GND S GND S GND Open L C Open S GND so S GND sk in the above table make a distinction according to which of the 2 outputs is shorted to ground test current source side so test current sink side sk More precisely in Channels LF and RR so CH sk CH in Channels LR and RF so CH sk CH In Permanent Diagnostic the table is the same with only a difference concerning Open Load which is not among the recognisable faults Should an Open Load be present during the device s normal working it would be detected at a subsequent Turn on Diagnostic cycle i e at the successive Car Radio Turn on FAULTS AVAILABILITY All the results coming from I Cbus by read operations are the consequence of measurements inside a defined period of time If the fault is stable throughout the whole period it will be sent out To guarantee always resident functions every kind of diagnostic cycles Turn on Permanent Offset will be reactivate after any 2c reading operation So when the micro reads the 1 C a new cycle will be able to start but the read data will come from the previous diag cycle i e The device is in Turn On state with a short to Gnd then the short is removed and micro reads 1 C The short to Gnd is still present in bytes because it is the result of the previous cycle
11. fier working in high efficiency mode D1 1 Left ChannelPower amplifier working in standard mode DO 0 Power amplifier working in high efficiency mode DO 1 IST 15 20 TDA7563 If R W 1 the TDA7563 sends 4 Diagnostics Bytes to uP DB1 DB2 DB3 and DB4 DB1 Thermal warning active D7 1 Diag cycle not activated or not terminated D6 0 Diag cycle terminated D6 1 Channel LF Turn on diagnostic D4 0 Permanent diagnostic D4 1 Channel LF Normal load D3 0 Short load D3 1 Channel LF Turn on diag No open load D2 0 Open load detection D2 1 Offset diag No output offset D2 0 Output offset detection D2 1 Channel LF No short to Vec D1 0 Short to Vcc D1 1 Channel LFNo short to GND D1 0 Short to GND D1 1 DB2 Offset detection not activated D7 0 Offset detection activated D7 1 Channel LR Turn on diagnostic D4 0 Permanent diagnostic D4 1 Channel LR Normal load D3 0 Short load D3 1 Channel LR Turn on diag No open load D2 0 Open load detection D2 1 Permanent diag No output offset D2 0 Output offset detection D2 1 D1 Channel LRNo short to Vcc D1 0 Short to Vec D1 1 Channel LRNo short to GND D1 0 Short to GND D1 1 SI 16 20 TDA7563 D7 Stand by status IB1 D4 Channel RF Turn on diagnostic D4 0 Permanent diagnostic D4 1 Channel RF Normal load D3
12. ied Symbol anns TestConditon Min Typ Max Uni POWER AMPLIFIER POWERAWPLFIER O o o Ve Sunni volge tan IST TETIV la Toti Ovesceni Dr ci __ 800m 40 Output Power THD Total Harmonic Distortion Voltage Gain 1 Voltage Gain Match 1 G Voltage Gain 2 Voltage Gain Match 2 Output Noise Voltage 1 Output Noise Voltage 2 S Supply Voltage Rejection Power Bandwidth Stand by Attenuation Stand by Current A V V T St By Mute pin Current Clip Det High Leakage Current CT RIN VI v2 VR BW SB Isp Am OS AM ON MU OP IMU EIAJ Vs 13 7V W THD 10 THD 1 Ri 29 EIAJ Vs 13 7V RL z 20 THD 10 BL 20 THD 1 RL 20 MAX POWER Po 1W to 10W STD MODE HE MODE Po 1 5W HE MODE Po 8W Po 1 10W f 10kHz Gy 16dB STD Mode Vo 0 1 to 5VRMS pasa KQ Rg 6000 20Hz to 22kHz Rg 6009 GV 16dB 20Hz to 22kHz f 100Hz to 10kHz Vr 1Vpk Rg 6009 3 k 3 lt IB1 0 to 1 IB1 3 D2 D1 IB1 1 to 0 3 D p gt VSTBY MUTE lt 1 5V CD off Clip Det Sat Voltage CD on lcn 1mA Clip Det THD level DO IB1 1 SI 4 20 TDA7563 ELECTRICAL CHARACTERISTICS continued Refer to the test circuit Vs 14 4V RL 40 f 1KHz Gy 30dB Tamb 25 C unless otherwise specified o oto Short to GND det below this limit the Output is considered in Short Circuit to GND Short to Vs det above
13. ith Diagnostic Enable Permanent 1 2mS 100 200mS pa Overcurrent and short circuit protection intervention Short circuit removed i e short circuit to GND OUTPUT DC OFFSET DETECTION Any DC output offset exceeding 2 V are signalled out This inconvenient might occur as a consequence of initially defective or aged and worn out input capacitors feeding a DC component to the inputs so putting the speakers at risk of overheating This diagnostic has to be performed with low level output AC signal or Vin 0 The test is run with selectable time duration by microprocessor from a start to a stop command START Last reading operation or setting IB1 D5 OFFSET enable to 1 SI 11 20 TDA7563 STOP Actual reading operation Excess offset is signalled out if persistent throughout the assigned testing time This feature is disabled if any overloads leading to activation of the short circuit protection occurs in the process MULTIPLE FAULTS When more misconnections are simultaneously in place at the audio outputs it is guaranteed that at least one of them is initially read out The others are notified after successive cycles of IC reading and faults removal provided that the diagnostic is enabled This is true for both kinds of diagnostic Turn on and Permanent The table below shows all the couples of double fault possible It should be taken into account that a short circuit with the 4 ohm speaker unconne
14. le LOW during this clock pulse Transmitter master uP when it writes an address to the TDA7563 slave TDA7563 when the uP reads a data byte from TDA7563 Receiver slave TDA7563 when the uP writes an address to the TDA7563 master uP when it reads a data byte from TDA7563 Figure 22 Data Validity on the I CBUS ae A DATA LINE CHANGE STABLE DATA DATA VALID ALLOWED D99AU1031 Figure 23 Timing Diagram on the I CBUS eee d ACKNOWLEDGMENT D99AU1033 FROM RECEIVER 14 20 GU TDA7563 SOFTWARE SPECIFICATIONS All the functions of the TDA7563 are activated by C interface The bit 0 of the ADDRESS BYTE defines if the next bytes are write instruction from uP to TDA7563 or read instruction from TDA7563 to uP Chip Address D7 DO 1 1 1 1 X D8 H RE NE E EN KM i X 0 Write to device X 1 Read from device If R W 0 the uP sends 2 Instruction Bytes IB1 and IB2 IB1 Diagnostic enable D6 1 Diagnostic defeat D6 0 D5 Offset Detection enable D5 1 Offset Detection defeat D5 0 Front Channel Gain 30dB D4 0 Gain 16dB D4 1 Rear Channel Gain 30dB D3 0 Gain 16dB D3 1 Mute front channels D2 0 Unmute front channels D2 1 Mute rear channels D1 0 Unmute rear channels D1 1 CD 2 DO 0 CD 10 DO 1 used for testing used for testing Right ChannelPower amplifier working in standard mode D1 0 Power ampli
15. ous leackage current or humidity between pins m The delay from 4 to 5 can be selected by software starting from T B D ms 18 20 IST TDA7563 a Pe zrna 445 450 4 65 0 175 0 177 0 183 OUTLINE AND MECHANICAL DATA 140 0 055 0 39 0 42 0 014 0 015 0 016 Los e o 0 031 0040 Q A 0 80 22 47 22 87 C5 io er io ee Me Flexiwatt27 vertical 1 dam bar protusion not included 2 molding protusion included FLEX27ME 7139011 2 mo 19 20 TDA7563 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap
16. proval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Brazil Canada China Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States http www st com 20 20 IST
17. the pulse takes place first power stage still in stand by mode low outputs high impedance Afterwards when the Amplifier is biased the PERMANENT diagnostic takes place The previous Turn On state is kept until a short appears at the outputs Figure 16 Turn On diagnostic working principle Vs 5V I mA Isource 16 Isource Isink 100mS lt lt Pe Measure time 8 20 IST TDA7563 Fig 17 and 18 show SVR and OUTPUT waveforms at the turn on stand by out with and without TURN ON DIAGNOSTIC Figure 17 SVR and Output behaviour CASE 1 without turn on diagnostic Permanent diagnostic acquisition time 100mS Typ Diagnostit Enable Bias power amp turn on Permanent FAULT event Read Data I2CB DATA Permanent Diagnostics data output permitted time Figure 18 SVR and Output pin behaviour CASE 2 with turn on diagnostic Turn on diagnostic k i acquisition time 100mS Typ Permanent diagnostic p q acquisition time 100mS Typ p mni t Diagnostic Enable Turn on Diagnostics data output Turn on permitted time ae Nal Bias power amp turn on Read Data Permanent Diagnostics data output permitted time permitted time Diagnostic Enable Permanent I2CB DATA XI 9 20
18. this limit the Output isconsidered in Short Circuit to VS Normal operation thresholds Within these limits the Output is considered without faults Lsc Shorted Load det Lop Open Load det Lnop Normal Load det TURN ON DIAGNOSTICS 2 Line Driver Mode Pgnd Short to GND det below this limit the Output is considered in Short Circuit to GND Short to Vs det above this limit the Output isconsidered in Short Circuit to VS Normal operation thresholds Within these limits the Output is considered without faults Lsc Shorted Load det Lop Open Load det Lnop Normal Load det PERMANENT DIAGNOSTICS 2 Power Amplifier Mode or Line Driver Mode Short to GND det below this Power Amplifier in Mute or Play limit the Output is considered in one or more short circuits Short Circuit to GND protection activated Short to Vs det above this limit the Output is considered in Short Circuit to VS Normal operation thresholds Within these limits the Output is considered without faults Shorted Load Det Pow Amp mode l2C BUS INTERFACE TU lt n o o O U Q 3 Q L TU o o TO sc Vo d GL seo TDA7563 Figure 2 Quiescent Current vs Supply Voltage Id mA 250 230 Vin 0 2107777 NO LOADS 190 170 150 130 Vs V Figure 3 Output Power vs Supply Voltage 40 Po W 70 65 60 55 50 45 40
19. vice is equipped with a full diagnostics array that communicates the status of each speaker through the 1 C bus VCC2 LI Thermal Ref Protection aiai vali amp Dump IN RE dl IN RR Short Circuit Protection Diagnostic e IN LF JI Short Circuit Protection amp Diagnostic INLR Al Short Circuit Protection amp Diagnostic Short Circuit Protection amp Diagnostic May 2003 1 20 TDA7563 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Vop Vs Vek Operating Supply Voltage Vo Vs DC Supply Voltage Vpeak V peak Peak Supply Voltage for t 50ms VK O CK pin Voltage Data Pin Voltage Output Peak Current not repetitive t 100ms lo Output Peak Current repetitive f gt 10Hz Pitot Power Dissipation Tcase 70 C Storage and Junction Temperature C THERMAL DATA Symbol Rihj case Thermal Resistance Junction to case Max C W PIN CONNECTION Top view DATA PW_GND RR OUT RR CK OUT RR Voce OUT RF PW GND RF OUT RF AC GND IN RF IN RR S_GND INLR IN LF PW_GND LR STBY TAB D00AU1230 SI 2 20 TDA7563 Figure 1 Application Circuit DO0AU1231A XI 3 20 TDA7563 ELECTRICAL CHARACTERISTICS Refer to the test circuit Vs 14 4V RL 40 f 1KHz Gy 30dB Tamb 25 C unless otherwise specif
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ST TDA7563 handbook