PHILIPS 74ABT16543 74ABTH16543 16-bit latched transceivers with dual enable (3-State) handbook
Contents
1. INTEGRATED CIRCUITS DATA 74 16543 74ABTH16543 16 bit latched transceivers with dual enable 3 State Product specification 1998 Feb 27 Supersedes data of 1995 Aug 17 IC23 Data Handbook Philips PHILIPS Semiconductors LI PS Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 3 State 74 16543 74 16543 FEATURES Two 8 bit octal transceivers with D type latch Live insertion extraction permitted Power up 3 State Power up reset Multiple Vcc and GND pins minimize switching noise 9 Back to back registers for storage 9 Separate controls for data flow in each direction 74ABTH16543 incorporates bus hold data inputs which eliminate the need for external pull up resistors to hold unused inputs DESCRIPTION The 74ABT16543 high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive The 74ABT16543 16 bit registered transceiver contains two sets of D type latches for temporary storage of data flowing in either direction Separate Latch Enable nLEAB nLEBA and Output Enable nOEAB nOEBA inputs are provided for each register to permit independent control of data transfer in either direction The outputs are guaranteed to sink 64mA Two options are available 74ABT 16543 which does not have the bus hold feature and 74ABTH16543 which incorporates the 9 Output capa2. Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 LOGIC SYMBOL FUNCTIONAL DESCRIPTION The 74ABT16543 contains two sets of eight D type latches with separate control pins for each set Using data flow from A to B as an example when the A to B Enable nEAB input and the A to B Latch Enable nLEAB input are Low the A to B path is transparent A subsequent Low to High transition of the nLEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs With EAB and nOEAB both Low the 3 State B output buffers are active and display the data present at the outputs of the A latches 10 12 13 14 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1EAB 1EBA 1LEAB 1LEBA Control of data flow from B to A is similar but using the nEBA nLEBA and nOEBA inputs 1BO 1B1 1B2 1B3 1B4 1 5 1B6 1B7 52 51 49 48 47 45 44 43 15 16 17 19 20 21 23 24 2A0 2A1 2A2 2A3 2 4 2A5 2 6 2A7 2EAB 2EBA 2LEAB 2LEBA 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 42 41 40 38 37 36 34 33 SH00038 FUNCTION TABLE STATUS ex T sex sume T mers nennt LC UL LU emm Lot t 8 j x wo J Jed O High voltage level High voltage level one set up time prior to the Low to High transition of nLEXX or nEXX XX AB or BA Low voltage level Low voltage level one set up time prior to the Low to High transition of nLEXX or nEXX
3. enable 3 State SSOP56 plastic shrink small outline package 56 leads body width 7 5 mm Product specification 74 16543 74 16543 SOT371 1 bp c DM ED e 022 1855 76 10 4 925 o2 013 18 30 7 4 9999 101 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES VERSION JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT371 1 MO 118AB EO seo 1998 Feb 27 9 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 TSSOP56 plastic thin shrink small outline package 56 leads body width 6 1mm SOT364 1 seating plane detail X MSA400 Dimensions in mm 1998 Feb 27 10 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 NOTES 1998 Feb 27 11 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 Data sheet status Data sheet Product Definition 1 status status Objective Development This data sheet contains the design target or goal specifications for product development specification Specification may change in any manner without notice Preliminary Qualification This data sheet co
4. of up to 10msec From Voc 2 1V to Vcc 5 10 transition time of up to 100usec is permitted This is the bus hold overdrive current required to force the input to the opposite logic state e 1998 Feb 27 6 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 AC CHARACTERISTICS GND OV tp te 2 5ns C 50pF R 5000 Tamb 259 Tamb 40 to 85 C 5 0V 0 5V tPLH ipHL ao AO C o5 to delay to nAx LEAB to Output enable time OEBA to nAx OEAB to nBx Output disable OEBA to nAx OEAB to tpuz Output disable time 2 0 3 to nAx EAB to nBx 1 7 2 6 AC SETUP REQUIREMENTS GND OV tg te 2 5ns C 50pF R 5000 Tamb 25 C Tamb 40 to 85 C SYMBOL PARAMETER WAVEFORM 205V UNIT Setup time 0 4 iy nAx to LEAB nBx to LEBA 0 1 n H Hold time 0 2 WE nAx to LEAB nBx to LEBA 0 3 Setup time 1 0 2 nAx to EAB nBx to EBA 9 0 3 Am i 79v oilox om ori 2 JH OV gus aolno ow 5 o loo ooj o 1 gt f 2 0 6 6 1 7 5 4 OR an uo won an B m2l o 2 m o loo oo oo Hold time nAx to EAB nBx to EBA gt o AC WAVEFORMS VM 1 5V Vin GND to 3 0V SH00040 SH00041 Wavef
5. XX AB or BA Don t care Low to High transition of nLEXX or nEXX XX AB or BA No change High impedance or off state m x lt gt lt x r jx gt gt r rm Fm gt gt pp I Nz x r r 1998 Feb 27 4 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 LOGIC DIAGRAM DETAIL A DETAIL A X 7 nEAB nLEAB SH00039 ABSOLUTE MAXIMUM RATINGS 2 DC supply voltage 0 5 to 7 0 DC input diode current 18 DC input voltage 1 2 to 47 0 NOTES 1 Stresses beyond those listed may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability 2 The performance capability of a high performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability The maximum junction temperature of this integrated circuit should not exceed 150 C 3 The input and output voltage ratings may be exceeded if the input and output current ratings are observed 1998 Feb 27 5 Philips Semiconductors Product specification 16 bit latched transceiv
6. bility 64mA 32mA bus hold feature 9 atch up protection exceeds 500 Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model 9 See 74ABT161543 for same function with Master Reset control pins QUICK REFERENCE DATA SYMBOL PARAMETER END si TYPICAL UNIT Propagation delay _ 2 5 23 3 F 3 7 ns Input capacitance Vi OV or Voc pF I O capacitance Vo OV or Voc 3 State Outputs disabled 5 5V A Outputs ow Voo 55 3 IccL ORDERING INFORMATION PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 5 6 8 9 10 12 13 14 1A0 1A7 15 16 17 19 20 21 23 24 2A0 2A7 Data inputs outputs 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 2b p A to B B to A Output Enable inputs active Low 1B0 1B7 2B0 2B7 1 1 2OEAB 20EBA 3 54 1 EBA TT 26 31 2EAB 2EBA Ato B B to A Enable inputs active Low 2 55 1LEAB 1LEBA AT 27 30 2 2LEBA Ato B B to A Latch Enable inputs active Low GND OV 1998 Feb 27 2 853 1739 19026 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 LOGIC SYMBOL IEEE IEC PIN CONFIGURATION y V yy yvy 2B1 2B2 2B3 2B4 2B5 2B6 2B7 00037 00036 1998 Feb 27 3 Philips
7. ers with dual enable 74ABT16543 3 State 74ABTH16543 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER Input transition rise or fall rate DC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER TEST CONDITIONS UNIT MIN MAX MIN MAX v estem voe Voc 8v Voc zason 25 29 pes Vou Highieveloutputvotage 507 eo 34 30 VoL Voc 4B Vror SEmA VV oV 29 24 25 current pins CT TT Ports 74ABTH16543 4 5 Vi 20V 15 Saey output current Vi GND or Voc Voe Don t care D 30 s o w Owwucuren 88ViVo 2ev 8o 3100 200 550 200 m Voc 557 High Vi GNDorvoc os 2 2 fm co quiescent supply current Voc 55V Ompas tow GNDorVoo 59 Voc 5 5V Outputs 3 State Additional Supply current Alcc per input pin 74ABT16543 Additional supply current Alcc per input pin 74ABTH16543 NOTES 1 Not more than one output should be tested at a time and the duration of the test should not exceed one second 2 This is the increase in supply current for each input at 3 4V 3 For valid test results data must not be loaded into the flip flops or latches after applying the power 4 This parameter is valid for any Vcc between OV 2 1V with a transition time
8. h applications will be suitable for the specified use without further testing or modification Disclaimers Life support These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application Right to make changes Philips Semiconductors reserves the right to make changes without notice in the products including circuits standard cells and or software described or contained herein in order to improve design and or performance Philips Semiconductors assumes no responsibility or liability for the use of any of these products conveys no license or title under any patent copyright or mask work right to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue All rights reserved Printed in U S A P O Box 3409 Sunnyvale California 94088 3409 print code Date of release 05 96 Telephone 800 234 7381 Document order number 9397 750 03496 4 make things beter ee amp PHILIPS
9. ntains preliminary data and supplementary data will be published at a later date specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product Product Production This data sheet contains final specifications Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the best possible product 1 Please consult the most recently issued datasheet before initiating or completing a design Definitions Short form specification The data in a short form specification is extracted from a full data sheet with the same type number and title For detailed information see the relevant data sheet or data handbook Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Applications that are described herein for any of these products are for illustrative purposes only Philips Semiconductors make no representation or warranty that suc
10. orm 1 Propagation Delay For Inverting Output Waveform 2 Propagation Delay For Non Inverting Output 1998 Feb 27 7 Philips Semiconductors Product specification 16 bit latched transceivers with dual enable 74ABT16543 3 State 74ABTH16543 AC WAVEFORMS Continued Vu 1 5V Vin GND to 3 0V VOL 0 3V VoL NOTE The shaded areas indicate when the input is permitted to change for predictable output performance SH00042 SH00044 Waveform 3 Data Setup and Hold Times and Latch Enable Waveform 5 3 State Output Enable Time to Low Level and Pulse Width Output Disable Time from Low Level 00043 Waveform 4 3 State Output Enable Time to High Level and Output Disable Time from High Level TEST CIRCUIT AND WAVEFORMS 90 NEGATIVE PULSE ov tTLH tR e tTHL tF AMP V POSITIVE T PULSE Test Circuit for 3 State Outputs 10 SWITCH POSITION Vy 1 5V TEST SWITCH Input Pulse Definition tpLz closed closed All other open DEFINITIONS INPUT PULSE REQUIREMENTS Load resistor see AC CHARACTERISTICS for value PAMITE C Load capacitance includes jig and probe capacitance see AC CHARACTERISTICS for value 74ABT H16 3 0V 1MHz 2 5ns Termination resistance should be equal to Zour of pulse generators Amplitude Rep Rate tR tr SA00018 1998 Feb 27 8 Philips Semiconductors 16 bit latched transceivers with dual
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PHILIPS 74ABT16543 74ABTH16543 16 bit latched transceivers with dual enable (3 State) handbook