AMD Am25LS2519 DATA SHEET
Contents
1. RELATED PRODUCTS Am25S 18 Am2918 Quad D Register Am25LS2518 Quad D Register 03660B 9 95 Refer to Page 13 1 for Essential information on Military Devices This Material Copyrighted By Its Respective Manufacturer Am25LS 2519 This Material Copyrighted By Its CONNECTION DIAGRAM Top View CD001870 Note Pin 1 is marked for orientation myn nP 7d Wal si Fo a i 2b a iy NGS ety Fi DIE SIZE 0 083 x 0 099 ORDERING INFORMATION AMD products are available in several packages and operating ranges The order number is formed by a combination of the following Device number speed option if applicable package type operating range and screening option if desired Valid Combinations PC Am25LS2519 D C B l Screening Option Blank Standard processing B Burn in Am25LS2519 Temperature See Operating Range C Commercial 0 C to 70 C M Military 55 C to 125 C Package D 20 pin CERDIP F 20 pin flatpak L 20 pin leadiess chip carrier P 20 pin plastic DIP X Dice Valid Combinations Consult the AMD sales office in your area to determine if a device is currently available in the combination you wish Device type Quad D Register 03660B 9 96 Refer to Page 13 1 for Essential Information on Military Devices Respective Manufacturer PIN DESCRIPTION ee ee Any of the four D flip flop data lines ae ee2. Re Clock Enable When LOW the data is entered into the register on the next clock LOW to HIGH transition When HIGH the data in the register remains unchanged regardless of the data in fo jo E Clock Pulse Data is entered into the register on the LOW to HIGH transition E Output Enable When OE is LOW the register is enable to the output When HIGH the output is in the high impedance OE Y state The OE W controls tha W set of outputs and OE Y controls the Y set Yi Any of the four non inverting three state output lines 0 Any of the four three state outputs with polarity control 6LSZS 1Sscuy reo o Polarity Control The W outputs will be non inverting when POL is LOW and when it is HIGH the outputs are inverting CR J Asynchronous Clear When CLR is LOW the internal Q flip flops are reset to LOW FUNCTION TABLE INPUTS INTERNAL OUTPUTS c o e o ro m a w ow x NC Z Enabled Enabled Z Z Enabled X Output Three State Controt xX Asynchronous Clear aes t t Clock Enabled t A T L LOW X Don t Care H HIGH NC No Change Z High lmpedance t LOW to HIGH Transition APPLICATION Z NC Enabled Non inverting Non Inverting Inverting Non Inverting L gt x r zz lone lt x x xXx L Ir Z2 ex Fr r a r i mK KM I IIIII xmIrirex rrerrx creer I rrerrIrI DATA BUS aa
3. a DATA INPUTS CONTROL INPUTS OTHER DISPLAY INPUTS AF000681 Convenient Register Content Monitor or Test Point 03660B 9 97 Refer to Page 13 1 for Essential Information on Military Devices This Material Copyrighted By Its Respective Manufacturer Am25LS2519 ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage Temperature 00 eeeee 65 C to 150 C Commercial C Devices Ambient Temperature Under Bias 55 C to 125 C Temperat ra i aeicess cv tensiunii inir Supply Voltage to Ground Potential Supply Voltage cceeeeeeeeee ee Continuous c 2esiicccnienccsetevccene lumens 0 5V to 7 0V DC Voltage Applied to Outputs For High Output State ee 0 5V to Voc max DC Input Voltage cc ceeee eee ee ee tees 0 5V to 7 0V DC Output Current Into Outputs 2 eee DC Input Current 0 cece eeee eee Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure Functionality at or above these limits is not implied Exposure to absolute maximum ratings for extended periods may affect device reliability Military M Devices Temperature lt iis ccdeseendscriienesedcseas 55 C to 125 C Supply Voltage 2 eee eee e eee 4 5V to 5 5V Operating ranges define those limits over which the function ality of the device is guaranteed DC CHARACTERISTICS over operating range unless othe
4. 25H M 25LS25194 4 7 Am25LS2519 Quad Register with Two Independently Controlled Three State Outputs DISTINCTIVE CHARACTERISTICS Two sets of fully buffered three state outputs Four D type flip flops Polarity control on W outputs Buffered common clock enable Buffered common asynchronous clear Separate buffered common output enable for each set of outputs GENERAL DESCRIPTION The Am25LS 2519 consists of four D type flip flops with a buffered common clock enable information meeting the set up and hold time requirements on the D inputs is transferred to the flip flop outputs on the LOW to HIGH transition of the clock Data on the Q outputs of the flip flops is enabled at the three state outputs when the output control OE input is LOW When the appropriate OE input is HIGH the outputs are in the high impedance state Two independent sets of outputs W and Y are provided such that the register can simultaneously and independently drive two buses One set of outputs contains a polarity control such that the outputs can either be inverting ar non inverting The device also features an active LOW asynchronous clear When the clear input is LOW the Q output of the internal flip flops are forced LOW independent of the other inputs The Am25LS2519 is packaged in a space saving 0 3 inch row spacing 20 pin package BLOCK DIAGRAM CIR POL CLEAR POLARITY OF DE W OUTPUT ENABLE B80001320 6LGSZSTSZWY
5. e unless otherwise specified COMMERCIAL MILITARY Am25LS2519 Parameters Description Test Conditions Clock to Yj tPHL Either Polarity Clock 10 W es Ether Potent en q gt T s jae Sean eS E Ns ar a i _ A n _ j G PHL Clear to Yi Clear to Wi tPHL Pin Polarity to W potty to w Ci 50pF pw C S dYSCCL mE Clock HIGH tpw t P ho ata Data Data Enabie Data Enable Set up Time Clear Recovery Inactive to Clock t N KN A Mo j Output Enable to Wi or Yi Ci 5 0pF Output Enable to Wj or Yi RL 2 0k2 Maximum Clock Frequency C 5 0pF Note 1 RL 2 0k AC performance over the operating temperature range is guaranteed by testing defined in Group A Subgroup 9 tzL N H on 03660B 9 99 Refer to Page 13 1 for Essential Information on Military Devices This Material Copyrighted By Its Respective Manufacturer 6LScS 1Scwy Am25LS 2519 LOW POWER SCHOTTKY INPUT OUTPUT CURRENT INTERFACE CONDITIONS DRIVING OUTPUT DAIVEN INPUT Am25LS2519 ICO00090 Note Actual current flow direction shown 03660B 9 100 Refer to Page 13 1 for Essential Information on Military Devices This Material Copyrighted By Its Respective Manufacturer
6. rwise specified Typ MIL lon 1 0mA loH 1 0mA 24 Voc MIN lo 4 0 mA ioc B0mA oL 12m o Vcc MIN Vin VIH or Vic y Guaranteed input logical HIGH iH voltage for all inputs Guaranteed input logical LOW C vi andarani voltage for all inputs CO SCT CO i input HIGH Curent Vose MAX vnc2 v Sd Vo 0 4V Off State High impedance Vos 04V O t Short Circuit Current cc Erei MIL Power Supply Current a Mme Note 4 voca MAA COM L Notes 1 Typical limits are at Vcc 5 0V 25 C ambient and maximum loading 2 For conditions shown as MIN or MAX use the appropriate value specified under Operating Ranges for the applicable device type 3 Not more than one output should be shorted at a time Duration of the short circuit test should not exceed one second 4 Inputs grounded outputs open 03660B 9 98 Refer to Page 13 1 for Essential Informatian on Military Devices This Material Copyrighted By Its Respective Manufacturer SWITCHING CHARACTERISTICS Ta 25 C Vcc 5 0V Clock to Yi LOW Clock Putse Width HIGH te Bata Enano th Set up Time Clear Recovery inactive to clock Output Enable to W or Y CL 5 0pF Output Enable to W or Y RL 2 0kQ Pine om eer ea Note 1 Per industry convention fmax is the worst case value of the maximum device operating frequency with no constraints on tr tp puise width or duty cycle SWITCHING CHARACTERISTICS over operating rang
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AMD Am25LS2519 DATA SHEET