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FDT IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C DATA SHEET

1. FAST CMOS IDT54 74FCT543 y dt OCTAL LATCHED IDT54 74FCT543A Integrated Device Technology Inc FEATURES DESCRIPTION IDT54 74FCT543 equivalent to FAST speed The IDT54 74FCT543 A C is a non inverting octal trans IDT54 74FCT543A 25 faster than FAST ceiver built using an advanced dual metal CMOS technology IDT54 74FCT543C 40 faster than FAST These devices contain two sets of eight D type latches with e Equivalent to FAST output drive over full temperature separate input and output controls for each set For data flow and voltage supply extremes from A to B for example the A to B Enable CEAB input must OL 64mA commercial 48mA military be LOW in order to enter data from Ao A7 or to take data from e Separate controls for data flow in each direction Bo B7 as indicated in the Function Table With CEAB LOW e Back to back latches for storage a LOW signal on the A to B Latch Enable LEAB input makes e CMOS power levels 1mW typ static the A to B latches transparent a subsequent LOW to HIGH e Substantially lower input current levels than FAST transition of the LEAB signal puts the A latches in the storage 5uA max mode and their outputs no longer change with the A inputs e TTL input and output level compatible With CEAB and OEAB both LOW the 3 state B output buffers e CMOS output level compatible are act
2. Active LOW Latch Output OEBA B to A Output Enable Input Active LOW Inputs Status Buffers CEAB A to B Enable Input Active LOW CEAB LEAB OEAB AASB Bo B7 CEBA B to A Enable Input Active LOW z Stoning High Z LEAB A to B Latch Enable Input Active LOW a g Storing l LEBA B to A Latch Enable Input Active LOW i High Z Ao A7 A to B Data Inputs or B to A 3 State Outputs 7 L L Parepare oN A Inputs Bo B7 B to A Data Inputs or A to B 3 State Outputs L H L Storing Previous A Inputs NOTES 2614 tbl 01 2614 1102 4 Before LEAB LOW to HIGH Transition H HIGH Voltage Level L LOW Voltage Level Don t Care or Irrelevant 2 A to B data flow shown B to A flow control is the same except using LOGIC SYMBOL CEBA LEBA and OEBA a S LEAB CEAB CEBA LEBA Ao Bo m A1 Bii gt A2 B2 A3 B3 m A4 Ba A5 Bs m A6 Be m ERRAT B7 OEBA OEAB 2614 drw 03 7 17 2 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS CAPACITANCE Ta 25 C f 1 0MHz Symbol Rating Commercial Military Unit Symbol Parameter Conditions Typ Max Unit VTERM Terminal Voltage 0 5to 7 0 0 5 to 7 0 V CIN Input Capacitance VIN OV 6 10 pF Cone Cro I O Capacitance VouT 0V 8 12 pF
3. Bn CEBA or CEAB to An or Bn tPHZ Output Disable Time 2 0 9 0 2 0 13 0 2 0 7 5 2 0 8 5 2 0 65 2 0 7 5 ns tPLZ OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn tsu Set up Time HIGH or LOW 3 0 3 0 2 0 2 0 2 0 2 0 ns An or Bn to LEBA or LEAB tH Hold Time HIGH or LOW 2 0 2 0 2 0 2 0 2 0 2 0 ns An or Bn to LEBA or LEAB tw LEBA or LEAB Pulse Width 5 0 5 0 5 0 5 0 5 0 5 0 ns LOW NOTES 2513 tbl 07 1 See test circuits and waveforms 2 Minimum limits are guaranteed but not tested on Propagation Delays 7 17 5 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS Vcc o o 7 0V O 5009 VIN Pulse gt 4 Generator 500Q SET UP HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL gt tREM PRESET CLEAR ETC SYNCHRONOUS CONTROL e t H tsu gt CLEAR CLOCK ENABLE ETC PROPAGATION DELAY SAME PHASE INPUT TRANSITION OUTPUT OPPOSITE PHASE INPUT TRANSITION MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCH POSITION Test Switch Open Drain Disable Low Closed Enable Low All Other Tests Open DEFINITIONS 2
4. VtERM Terminal Voltage 0 5 to Vcc 0 5toVcc V NOTE 2614 tbl 04 with Respect 1 This parameter is guaranteed by characterization data and not tested to GND TA Operating 0 to 70 55 to 125 C Temperature TBIAS Temperature 55 to 125 65to 135 C Under Bias TSTG Storage 55 to 125 65to 150 C Temperature PT Power Dissipation 0 5 0 5 W IOUT DC Output Current 120 120 mA NOTES 2614 tbl 03 1 Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect reliability No terminal voltage may exceed Vcc by 0 5V unless otherwise noted Inputs and Vcc terminals only Outputs and 1 O terminals only on DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified VLC 0 2V VHC Vcc 0 2V Commercial TA 0 C to 70 C Vcc 5 0V 5 Military TA 55 C to 125 C Vcc 5 0V 10 Symbol Parameter Test Conditions Min Typ Max Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 0 V VIL Input LOW Level Guaranteed Logic LOW Level
5. 0 8 V IIH Input HIGH Current Vcc Max Vi Vcc 5 uA Except I O pins Vi 2 7V 54 liL Input LOW Current Vi 0 5V 5 uA Except I O pins Vi GND 5 IIH Input HIGH Current Vcc Max Vi Vcc 15 uA I O pins Only Vi 2 7V 154 liL Input LOW Current Vi 0 5V 15 pA I O pins Only Vi GND 15 VIK Clamp Diode Voltage Vcc Min IN 18mA 0 7 1 2 V los Short Circuit Current Vcc Max Vo GND 60 120 mA VOH Output HIGH Voltage Vcc 3V VIN VLC or VHC IOH 32uA VHC Vcc V Vcc Min loH 300uA vuc vec VIN VIH or VIL lOH 12mA MIL 2 4 4 3 lOH 15mA COML 2 4 4 3 VoL Output LOW Voltage Vcc 3V VIN VLC or VHC loL 300uA GND VLC V Vcc Min loL 3004A GND Vic VIN VIH or VIL loL 48mA MIL 0 3 0 55 loL 64mA COML 0 3 0 55 NOTES 2614 tbl 05 For conditions shown as Max or Min use appropriate value specified under Electrical Characteristics for the applicable device type Typical values are at Vcc 5 0V 25 C ambient and maximum loading Not more than one output should be shorted at one time Duration of the short circuit test should not exceed one second This parameter is guaranteed but not tested These are maximum lor values per output for 8 outputs turned on simultaneously Total maximum loL all outputs is 512mA for commercial and 384mA for military Derate lo for number of outputs exceedin
6. 614 tbl 08 CL Load capacitance includes jig and probe capacitance Rt Termination resistance should be equal to ZouT of the Pulse Generator PULSE WIDTH 3V 1 5V oV LOW HIGH LOW 3V 1 5V 1 5V PULSE oV tw 3V HIGH LOW HIGH 1 5V 1 5V PULSE oV 3V 1 5V oV ENABLE AND DISABLE TIMES ENABLE DISABLE 3V CONTROL 1 5V INPUT ov OUTPUT 3 5V NORMALLY SMH LOW VoL tPZH VoH OUTPUT NORMALLY SWITON HIGH ov NOTES 2614 drw 05 1 Diagram shown for input Control Enable LOW and input Control Disable HIGH 2 Pulse Generator for All Pulses Rate lt 1 0 MHz Zo lt 50Q tF lt 2 5ns tR lt 2 5ns 7 17 6 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER ORDERING INFORMATION IDT XX FCT XXXX X X Temperature Device Package Process Range Type 7 17 MILITARY AND COMMERCIAL TEMPERATURE RANGES Commercial MIL STD 883 Class B Plastic DIP CERDIP Leadless Chip Carrier Small Outline IC CERPACK Octal Registered Transceiver Fast Octal Registered Transceiver Super Fast Octal Registered Transceiver 55 C to 125 C 0 to 70 C 2614 drw 04
7. g 8 turned on simultaneously IRN 7 17 3 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Vic 0 2V VHc Vcc 0 2V Symbol Parameter Test Conditions Min Typ Max Unit Icc Quiescent Power Vcc Max 0 2 1 5 mA Supply Current VIN gt VHC VIN lt VLC Alcc Quiescent Power Supply Vcc Max ViN 3 4V 0 5 2 0 mA Current TTL Inputs HIGH ICCD Dynamic Power Supply Current Vcc Max Outputs Open VIN gt VHC 0 15 0 25 mA CEAB and OEAB GND VIN lt VLC MHz CEBA Vcc One Input Toggling 50 Duty Cycle Ic Total Power Supply Current Vcc Max Outputs Open VIN gt VHC 1 7 4 0 mA fcP 10MHz LEAB VIN lt VLC 50 Duty Cycle FCT CEAB and OEAB GND CEBA Vcc One Bit Toggling VIN 3 4V 2 2 6 0 at fi 5MHz VIN GND 50 Duty Cycle Vcc Max Outputs Open ViN gt VHC 7 0 12 8 fcP 10MHz LEAB VIN lt VLC 50 Duty Cycle FCT CEAB and OEAB GND CEBA Vcc Eight Bits Toggling VIN 3 4V 9 2 21 8 at fi SMHz VIN GND 50 Duty Cycle NOTES 2614 tbl 06 For conditions shown as Max or Min use appropriate value specified under Electrical Characteristics for the applicable device type Typical values are at Vcc 5 0V 25 C ambient Per TTL driven input Vin 3 4V all other inputs at VCC or GND This parameter is not directly
8. ive and reflect the data present at the output of the A Product available in Radiation Tolerant and Radiation latches Control of data from B to A is similar but uses the Enhanced versions CEBA LEBA and OEBA inputs Military product compliant to MIL STD 883 Class B FUNCTIONAL BLOCK DIAGRAMS D QP l LE l Ao l l EEE E E EE EEEE Ai A2 A3 A4 DETAILAx7 B4 A5 m m B5 As c B6 A7 m B7 E OEAB LEBA dd CEAB LEAB 2614 drw 01 The IDT logo is a registered trademark of Integrated Device Technology Inc FAST is a registered trademark of National Semiconductor Co MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1992 1992 Integrated Device Technology Inc 7 17 DSC 4602 3 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS IDT54 74FCT861 10 BIT TRANSCEIVERS LEBA 1 Vcc OEBA 2 CEBA Ao 3 Bo Al 4 Bi A2 5 B2 A3 6 B3 A4 7 B4 A5 8 B5 A6 9 B6 A7 10 B7 CEAB 11 LEAB Yao oaar GND 12 OEAB lt lt z are 2614 drw 02 O O 4 DIP SOIC CERPACK LCC TOP VIEW TOP VIEW PIN DESCRIPTION FUNCTION TABLE 1 Pin Names Description For A to B Symmetric with B to A OEAB A to B Output Enable Input
9. testable but is derived for use in Total Power Supply calculations Values for these conditions are examples of the Icc formula These limits are guaranteed but not tested Ic IQUIESCENT IINPUTS IDYNAMIC Ic Icc Alcc DHNT Iccp fcP 2 fiNi Icc Quiescent Current Alcc Power Supply Current for a TTL High Input Vin 3 4V DH Duty Cycle for TTL Inputs High Nt Number of TTL Inputs at DH Iccb Dynamic Current Caused by an Input Transition Pair HLH or LHL fcp Clock Frequency for Register Devices Zero for Non Register Devices fi Input Frequency Ni Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz DLN 7 17 4 IDT54 74FCT543 A C FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT54 74FCT543 IDT54 74FCT543A IDT54 74FCT543C Com l Mil Com l Mil Com l Mil Symbol Parameter Condition min max Min Max Min 2 Max Min 2 Max Min 2 Max Min 2 Max Unit tPLH Propagation Delay CL 50pF 2 5 8 5 2 5 10 0 25 6 5 2 5 7 5 25 5 3 2 5 61 ns tPHL Transparent Mode RL 5002 Anto Bn or Bn to An tPLH Propagation Delay 2 5 12 5 2 5 14 0 2 5 8 0 2 5 9 0 2 5 7 0 2 5 8 0 ns tPHL LEBA to An LEAB to Bn tPZH Output Enable Time 2 0 12 0 2 0 14 0 2 0 9 0 2 0 10 0 2 0 8 0 2 0 9 0 ns PZL OEBA or OEAB to An or

FDT IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C DATA SHEET

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