ANALOG DEVICES Triple-Channel Digital Isolators ADuM1300/ADuM1301 handbook
Contents
1. 15 pF CMOS signal levels High Low to High Impedance Output Enable Propagation Delay tpz tezi 6 8 ns C 15 pF CMOS signal levels High Impedance to High Low Output Rise Fall Time 10 to 90 tr te C 15 pF CMOS signal levels 5 V 3 V Operation 3 0 ns 3 V 5 V Operation 2 5 ns Common Mode Transient Immunity at CMH 25 35 kV us Vix Voo1 Vop2 Vem 1000 V Logic High Output transient magnitude 800 V Common Mode Transient Immunity at CMi 25 35 kV us Vix 0V Vem 1000 V Logic Low Output transient magnitude 800 V Refresh Rate fr 5 V 3 V Operation 1 2 Mbps 3 V 5 V Operation 1 1 Mbps Input Dynamic Supply Current per Channel Ibo 5 V 3 V Operation 0 19 mA Mbps 3 V 5 V Operation 0 10 mA Mbps Output Dynamic Supply Current per Channel looi 0 5 V 3 V Operation 0 03 mA Mbps 3 V 5 V Operation 0 05 mA Mbps 1 All voltages are relative to their respective ground Supply current values for all three channels are combined when running at identical data rates Output supply current values are specified with no output load present The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section on Page 17 See Figure 6 through Figure 8 for information on per channel supply current as a function of data rate for unloaded and loaded conditions See Figure 9 through Figure 12 for total lop and loo2 supply currents as a func2. 10 Figure 12 Typical ADUM1301 Voo2 Supply Current vs Data Rate 20 40 60 DATA RATE Mbps for 5 Vand 3 V Operation 80 100 PROPAGATION DELAY ns 03787 0 014 Rev C Page 15 of 20 ADuM1300 ADUM1301 l pe 35 30 B i 25 50 25 0 25 50 75 TEMPERATURE C Figure 13 Propagation Delay vs Temperature C Grade 100 03787 0 019 ADuM1300 ADUM1301 APPLICATION INFORMATION PC BOARD LAYOUT The ADuM130x digital isolator requires no external interface circuitry for the logic interfaces Power supply bypassing is strongly recommended at the input and output supply pins Figure 14 Bypass capacitors are most conveniently connected between Pins 1 and 2 for Vpn and between Pins 15 and 16 for Vopp2 The capacitor value should be between 0 01 uF and 0 1 uF The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm Bypass ing between Pins 1 and 8 and between Pins 9 and 16 should also be considered unless the ground pair on each package side is connected close to the package Vpp1 le Vpp2 GND GND Via Voa Vip Vos Vicioc Vociic NC NC g Ve Ve2 2 GND GND Figure 14 Recommended Printed Circuit Board Layout In applications involving high common mode transients care should be taken to ensure that board coupling across the isola tion barrier is minimized Furthermore the board layout shou
3. By avoiding the use of LEDs and photodiodes iCoupler devices remove the design difficulties commonly associated with optocouplers The typical optocoupler concerns regarding uncertain current transfer ratios nonlinear transfer functions and temperature and lifetime effects are eliminated with the simple iCoupler digital interfaces and stable performance characteristics The need for external drivers and other discretes is eliminated with these iCoupler products Furthermore iCoupler devices consume one tenth to one sixth the power of optocouplers at comparable signal data rates The ADuM130x isolators provide three independent isolation channels in a variety of channel configurations and data rates see the Ordering Guide Both models operate with the supply voltage on either side ranging from 2 7 V to 5 5 V providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier In addition the ADuM130x provides low pulse width distortion lt 2 ns for CRW grade and tight channel to channel matching lt 2 ns for CRW grade Unlike other optocoupler alternatives the ADuM130x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power up power down conditions FUNCTIONAL BLOCK DIAGRAMS g Vpp1 G Vpp2 GND 2 G5 GND Via ORDA A Voa Vie amp 3 Vog Vic o gt 4 Voc nc nc O 0
4. A D U M 1300 hy ANALOG DEVICES Triple Channel Digital Isolators ADuM1300 ADuM1301 FEATURES Low power operation 5 V operation 1 2 mA per channel max 0 Mbps to 2 Mbps 3 5 mA per channel max 10 Mbps 32 mA per channel max 90 Mbps 3 V operation 0 8 mA per channel max 0 Mbps to 2 Mbps 2 2 mA per channel max 10 Mbps 20 mA per channel max 90 Mbps Bidirectional communication 3 V 5 V level translation High temperature operation 105 C High data rate dc to 90 Mbps NRZ Precise timing characteristics 2 ns max pulse width distortion 2 ns max channel to channel matching High common mode transient immunity gt 25 kV ps Output enable function Wide body 16 lead SOIC package Pb free models available Safety and regulatory approvals UL recognition 2500 V rms for 1 minute per UL 1577 CSA component acceptance notice 5A VDE certificate of conformity DIN EN 60747 5 2 VDE 0884 Part 2 2003 01 DIN EN 60950 VDE 0805 2001 12 EN 60950 2000 Viorm 560 V peak APPLICATIONS General purpose multichannel isolation SPI interface data converter isolation RS 232 RS 422 RS 485 transceiver Industrial field bus isolation GENERAL DESCRIPTION The ADuM130x are 3 channel digital isolators based on Analog Devices iCoupler technology Combining high speed CMOS and monolithic transformer technology these isolation compo nents provide outstanding performance characteristics superior to alternatives such as optocoupler devices
5. 1 M 0k 100k 1 Figure 17 Maximum Allowable Current for Various Current to ADuM 130x Spacings MAXIMUM ALLOWABLE CURRENT kA 10M 100M 03787 0 018 MAGNETIC FIELD FREQUENCY Hz ADuM1300 ADUM1301 Note that at combinations of strong magnetic field and high frequency any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry Care should be taken in the layout of such traces to avoid this possibility POWER CONSUMPTION The supply current at a given channel of the ADuM130x isola tor is a function of the supply voltage the channel s data rate and the channel s output load For each input channel the supply current is given by Ibni Iboro f lt 0 5f Inni Innin X 2f fr Inor f gt 0 5f For each output channel the supply current is given by Ippo Ippo fs 0 5f Ippo Inpo w 0 5 x 1073 x CrVpn0 x 2f fr Inno f gt 0 5f where Inni w Inpo are the input and output dynamic supply currents per channel mA Mbps Cz is output load capacitance pF Vopo is the output supply voltage V fis the input logic signal frequency MHz half of the input data rate NRZ signaling f is the input stage refresh rate Mbps Inni Inpo are the specified input and output quiescent sup ply currents mA To calculate the total Ipp and Inm supply current the supply currents for each input and output cha
6. Channel Matching teskcp 2 ns C 15 pF CMOS signal levels Codirectional Channels Channel to Channel Matching teskop 5 ns C 15 pF CMOS signal levels Opposing Directional Channels For All Models Output Disable Propagation Delay tenz tpLH 6 8 ns C 15 pF CMOS signal levels High Low to High Impedance Output Enable Propagation Delay tpz tez 6 8 ns C 15 pF CMOS signal levels High Impedance to High Low Output Rise Fall Time 10 to 90 tr te 3 ns C 15 pF CMOS signal levels Common Mode Transient Immunity at CMa 25 35 kV us Vix Voo1 Vbn2 Vem 1000 V Logic High Output transient magnitude 800 V Common Mode Transient Immunity at CMi 25 35 kV us Vix 0V Va 1000 V Logic Low Output transient magnitude 800 V Refresh Rate fr 1 1 Mbps Input Dynamic Supply Current per Channel IDDI D 0 10 mA Mbps Output Dynamic Supply Current per Channel Ippo 0 0 03 mA Mbps 1 All voltages are relative to their respective ground The supply current values for all three channels are combined when running at identical data rates Output supply current values are specified with no output load present The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section on Page 17 See Figure 6 through Figure 8 for information on per channel supply current as a function of data rate for unloaded and loaded conditions See Figure 9 through Figur
7. Jns C 15 pF CMOS signal levels ADuM130xBRW Minimum Pulse Width PW 100 ns C 15 pF CMOS signal levels Maximum Data Rate 10 Mbps C 15 pF CMOS signal levels Propagation Delay teu tPLH 15 35 50 Ins C 15 pF CMOS signal levels Pulse Width Distortion tetn tex PWD 3 ns C 15 pF CMOS signal levels Change vs Temperature 5 ps C C 15 pF CMOS signal levels Propagation Delay Skew tesk 6 ns C 15 pF CMOS signal levels Channel to Channel Matching teskcp 3 ns C 15 pF CMOS signal levels Codirectional Channels Channel to Channel Matching teskop 22 ns C 15 pF CMOS signal levels Opposing Directional Channels ADuM130xCRW Minimum Pulse Width PW 8 3 11 1 ns C 15 pF CMOS signal levels Maximum Data Rate 90 120 Mbps C 15 pF CMOS signal levels Propagation Delay teu tPLH 20 30 40 jns C 15 pF CMOS signal levels Pulse Width Distortion tpL tp L PWD 0 5 2 ns C 15 pF CMOS signal levels Change vs Temperature 3 ps C C 15 pF CMOS signal levels Propagation Delay Skew tesk 14 jns C 15 pF CMOS signal levels Channel to Channel Matching teskcp 2 ns C 15 pF CMOS signal levels Codirectional Channels Channel to Channel Matching teskop 5 ns C 15 pF CMOS signal levels Opposing Directional Channels Rev C Page 8 of 20 ADuM1300 ADUM1301 Parameter Symbol Min Typ Max Unit Test Conditions For All Models Output Disable Propagation Delay tpHz tPLH 6 8 ns C
8. V peak isolation voltage CSA 60950 1 03 and IEC 60950 1 400 V rms maximum working voltage Complies with DIN EN 60747 5 2 VDE 0884 Part 2 2003 01 DIN EN 60950 VDE 0805 2001 12 EN 60950 2000 Reinforced insulation 560 V peak File E214100 File 205078 File 2471900 4880 0001 1 In accordance with UL1577 each ADuM130x is proof tested by applying an insulation test voltage 3000 V rms for 1 second current leakage detection limit 5 pA 2 In accordance with DIN EN 60747 5 2 each ADUM130x is proof tested by applying an insulation test voltage 1050 V peak for 1 second partial discharge detection limit 5 pC A mark branded on the component designates DIN EN 60747 5 2 approval INSULATION AND SAFETY RELATED SPECIFICATIONS Table 6 Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 Vrms 1 minute duration Minimum External Air Gap Clearance L 101 8 40 min mm Measured from input terminals to output terminals shortest distance through air Minimum External Tracking Creepage L I02 8 10min mm Measured from input terminals to output terminals shortest distance path along body Minimum Internal Gap Internal Clearance 0 017 min mm Insulation distance through insulation Tracking Resistance Comparative Tracking Index CTI gt 175 V DIN IEC 112 VDE 0303 Part 1 Isolation Group llla Material Group DIN VDE 0110 1 89 Table 1 Rev C Page 10 of 20 D
9. Vez GND 9 GND 03789 0 001 Figure 1 ADuM1300 Functional Block Diagram Rev C Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners T Voo Il Vpp2 Voc ENCODE Vic NC ne Ver G Vez OR V 9 GND2 lIl GND il env AO gt ENCODE 3 E H DECODE D gt Voa Vie gt ENCODE 3E H DECODE D gt 3 Vos 03789 0 002 Figure 2 ADuM1301 Functional Block Diagram One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 326 8703 2004 Analog Devices Inc All rights reserved ADuM1300 ADUM1301 TABLE OF CONTENTS SPECI GALLONS orii e r ER A ER beetles 3 Electrical Characteristics 5 V Operation 3 Electrical Characteristics 3 V Operation 5 Electrical Characteristics Mixed 5 V 3 V or 3 V 5 V Operation iiis esere siere sedere ies ier osease oseto S tak seta Se tokenee 7 Package CharacteristiCSi sissi 10 Regulatory Information ss
10. at the decoder a maximum allowable magnetic field is calculated as shown in Figure 16 Rev C Page 16 of 20 100 000 10 000 1 000 0 100 DENSITY kgauss 0 010 MAXIMUM ALLOWABLE MAGNETIC FLUX 0 001 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY Hz 03787 0 017 Figure 16 Maximum Allowable External Magnetic Flux Density For example at a magnetic field frequency of 1 MHz the maximum allowable magnetic field of 0 2 kgauss induces a voltage of 0 25 V at the receiving coil This is about 50 of the sensing threshold and does not cause a faulty output transition Similarly if such an event were to occur during a transmitted pulse and was of the worst case polarity it would reduce the received pulse from gt 1 0 V to 0 75 V still well above the 0 5 V sensing threshold of the decoder The preceding magnetic flux density values correspond to specific current magnitudes at given distances from the ADuM130x transformers Figure 17 expresses these allowable current magnitudes as a function of frequency for selected distances As seen the ADuM130x is extremely immune and can be affected only by extremely large currents operated at high frequency very close to the component For the 1 MHz example one would have to place a 0 5 kA current 5 mm away from the ADuM130x to affect the component s operation KAS PN INN DISTANCE 1m 10 00 NI DISTANCE 100mm B we LT SN 1k
11. mA DC to 1 MHz logic signal freq Voo2 Supply Current Ipp2 5 V 3 V Operation 0 4 0 7 mA DC to 1 MHz logic signal freq 3 V 5 V Operation 0 7 1 0 mA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Voo Supply Current Ipp1 10 5 V 3 V Operation 6 5 8 1 mA 5 MHz logic signal freq 3 V 5 V Operation 3 4 4 9 mA 5 MHz logic signal freq Voo2 Supply Current Ipp2 10 5 V 3 V Operation 1 1 1 6 mA 5 MHz logic signal freq 3 V 5 V Operation 1 9 2 5 mA 5 MHz logic signal freq 90 Mbps CRW Grade Only Voo Supply Current Ipp1 90 5 V 3 V Operation 57 77 mA 45 MHz logic signal freq 3 V 5 V Operation 31 48 mA 45 MHz logic signal freq Voo2 Supply Current Ipp2 90 5 V 3 V Operation 8 13 mA 45 MHz logic signal freq 3 V 5 V Operation 16 18 mA 45 MHz logic signal freq ADuM1301 Total Supply Current Three Channels DC to 2 Mbps Voo Supply Current Ipp1 0 5 V 3 V Operation 1 3 2 1 mA DC to 1 MHz logic signal freq 3 V 5 V Operation 0 7 1 4 mA DC to 1 MHz logic signal freq Voo2 Supply Current Ipp2 0 5 V 3 V Operation 0 6 0 9 mA DC to 1 MHz logic signal freq 3 V 5 V Operation 1 0 1 4 mA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Voo Supply Current Ipp1 10 5 V 3 V Operation 5 0 6 2 mA 5 MHz logic signal freq 3 V 5 V Operation 2 6 3 7 mA 5 MHz logic signal freq Voo2 Supply Current Ipp2 10 5 V 3 V Operation 1 8 2 5 mA 5 MHz logic signal freq 3 V 5 V Operation 3 4 4 2 mA 5 MHz logic sign
12. ns Range C Option ADuM1300ARW 3 0 1 100 40 40 to 105 RW 16 ADuM1300BRW 3 0 10 50 3 40 to 105 RW 16 ADuM1300CRW 3 0 90 32 2 40 to 105 RW 16 ADuM1300ARWZ 3 0 1 100 40 40 to 105 RW 16 ADuM1300BRWZ 3 0 10 50 3 40 to 105 RW 16 ADuM1300CRWZ 3 0 90 32 2 40 to 105 RW 16 ADuM1301 ARW 2 1 1 100 40 40 to 105 RW 16 ADuM1301BRW2 2 1 10 50 3 40 to 105 RW 16 ADuM1301CRW 2 1 90 32 2 40 to 105 RW 16 ADuM1301ARWZ gt 3 0 1 100 40 40 to 105 RW 16 ADuM1301BRWZ 3 0 10 50 3 40 to 105 RW 16 ADuM1301CRWZ2 3 0 90 32 2 40 to 105 RW 16 1 RW 16 16 lead wide body SOIC Tape and reel are available The addition of an RL suffix designates a 13 1 000 units tape and reel option 3 Z Pb free part Rev C Page 18 of 20 ADuM1300 ADUM1301 NOTES Rev C Page 19 of 20 ADuM1300 ADUM1301 NOTES 2004 Analog Devices Inc All rights reserved Trademarks and regis ANALOG tered trademarks are the property of their respective owners www ana l 0 g com aoaaa ka DEVICES Rev C Page 20 of 20
13. 5 5 V 5 5 V 2 GND Ground 1 Ground reference for isolator Side 1 2 GND Ground 1 Ground Reference for Isolator Side 1 3 Via Logic Input A 3 Via Logic Input A 4 Vis Logic Input B 4 Vis Logic Input B 5 Vic Logic Input C 5 Voc Logic Output C 6 NC No Connect 6 NC No Connect 7 NC No Connect 7 Ve Output Enable 1 Active high logic input Vocout 8 GND Ground 1 Ground Reference for Isolator Side 1 put is enabled when Ve ishigh or disconnected 9 GND Ground 2 Ground Reference for Isolator Side 2 ioe ee oii EE aval i 10 Ve Output Enable 2 Active high logic input Vos Vos r lewis ae ene and Voc outputs are enabled when Ve is high or disconnected Voa Vos and Voc outputs are dis 8 GND Ground 1 Ground Reference for Isolator Side 1 abled when Vez is low In noisy environments 9 GND2 Ground 2 Ground Reference for Isolator Side 2 connecting Vez to an external logic high or low is 10 Vez Output Enable 2 Active high logic input Voa and recommended Vos outputs are enabled when Vp is high or dis 11 NC No Connect connected Voa and Vos outputs are disabled 12 Voc Logic Output C when Vez is low In noisy environments connect 13 Vos Logic Output B ing Ve2 to an external logic high or low is recom mended 14 Voa Logic Output A 11 NC No Connect 15 GND2 Ground 2 Ground Reference for Isolator Side 2 12 Ve Logic Input C 16 Voo2 Supply Voltage for Isolator Side 2 2 7 V to 13 Vos Logic Ou
14. IN EN 60747 5 2 VDE 0884 PART 2 INSULATION CHARACTERISTICS ADuM1300 ADUM1301 Table 7 Description Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage lt 150 V rms I IV For Rated Mains Voltage lt 300 V rms I II For Rated Mains Voltage lt 400 V rms I II Climatic Classification 40 105 21 Pollution Degree DIN VDE 0110 Table 1 2 Maximum Working Insulation Voltage Viorm 560 V peak Input to Output Test Voltage Method b1 Ver 1050 V peak Viorm X 1 875 Ver 100 Production Test tm 1 sec Partial Discharge lt 5 pC Input to Output Test Voltage Method a Ver After Environmental Tests Subgroup 1 Viorm X 1 6 Ver tm 60 sec Partial Discharge lt 5 pC 896 V peak After Input and or Safety Test Subgroup 2 3 672 V peak Viorm X 1 2 Ver tm 60 sec Partial Discharge lt 5 pC Highest Allowable Overvoltage Transient Overvoltage trr 10 sec Vir 4000 V peak Safety Limiting Values Maximum value allowed in the event of a failure also see Thermal Derating Curve Figure 3 Case Temperature Ts 150 C Side 1 Current Is 265 mA Side 2 Current Isa 335 mA Insulation Resistance at Ts Vio 500 V Rs gt 10 Q This isolator is suitable for basic isolation only within the safety limit data Maintenance of the safety data is ensured by protective circuits The marking on packages denotes DIN EN 60747 5 2 approval for 560 V peak working voltage SIDE 2 RECOMMENDED OPE
15. RATION CONDITIONS SAFETY LIMITING CURRENT mA Table 8 Parameter Symbol Min Max Unit Operating Temperature Ta 40 105 C Supply Voltages Vooi Voo2 2 7 55 V Input Signal Rise and Fall Times 1 0 ms 03787 0 003 CASE TEMPERATURE C Figure 3 Thermal Derating Curve Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747 5 2 1 All voltages are relative to their respective ground See the DC Correctness and Magnetic Field Immunity section on Page 16 for information on immunity to external magnetic fields Rev C Page 11 of 20 ADuM1300 ADUM1301 ABSOLUTE MAXIMUM RATINGS Ambient temperature 25 C unless otherwise noted Table 9 Parameter Symbol Min Max Unit Storage Temperature Tst 65 150 C Ambient Operating Temperature Ta 40 105 C Supply Voltages Voo1 Voo2 0 5 7 0 V Input Voltage Via Vis Vic Ve1 Ve2 0 5 Vooi 0 5 V Output Voltage Voa Vos Voc 0 5 Vono 0 5 V Average Output Current Per Pin Side 1 lor 23 23 mA Side 2 lo2 30 30 mA Common Mode Transients 100 100 kV us 1 All voltages are relative to their respective ground Von and Vovo refer to the supply voltages on the input and output sides of a given channel respectively See PC Board Layout section 3 See Figure 3 for maximum rated current values for various temperatures 4 Refers to common mode transients across the insulation barrier Common m
16. Supply Current lpp2 0 0 7 1 0 mMA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Von Supply Current loD1 10 65 81 mA 5 MHz logic signal freq Voo2 Supply Current loD2 10 1 9 25 mA 5 MHz logic signal freq 90 Mbps CRW Grade Only Voo Supply Current lDD1 90 57 77 mA 45 MHz logic signal freq Vop2 Supply Current lDD2 90 16 18 mA 45 MHz logic signal freq ADuM1301 Total Supply Current Three Channels DC to 2 Mbps Vop Supply Current loD1 Q 13 21 mA DC to 1 MHz logic signal freq Vpop2 Supply Current lpp2 0 1 0 14 mA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Von Supply Current loD1 10 5 0 62 mA 5 MHz logic signal freq Vop2 Supply Current loD2 10 34 42 mA 5 MHz logic signal freq 90 Mbps CRW Grade Only Von Supply Current lDD1 90 43 57 mA 45 MHz logic signal freq Vop2 Supply Current lDD2 90 29 37 mA 45 MHz logic signal freq For All Models Input Currents lia lis lic 10 0 01 10 UA 0 lt Via Vis Vic lt Von or Vop2 let le2 0 lt Ven Ve2 lt Von Or Vop2 Logic High Input Threshold Vin Ven 2 0 V Logic Low Input Threshold Vi VeL 0 8 V Logic High Output Voltages Voan VosH Vop1 Vpp2 0 1 5 0 V lox 20 pA Vix VixH VocH Voo1 Vo02 0 4 4 8 V lox 4 MA Vix VixH Logic Low Output Voltages Voat Vos Voct 0 0 0 1 V lox 20 pA Vix Vit 0 04 01 V lox 400 pA Vix Vit 0 2 04 V lox 4 MA Vix Vixt SWITCHING SPECIFICATIONS ADuM130xARW Minimum Puls
17. al freq Rev C Page 7 of 20 ADuM1300 ADUM1301 Parameter Symbol Min Typ Max Unit Test Conditions 90 Mbps CRW Grade Only Voo Supply Current Ipp1 90 5 V 3 V Operation 43 57 mA 45 MHz logic signal freq 3 V 5 V Operation 24 36 mA 45 MHz logic signal freq Voo2 Supply Current Ipp2 90 5 V 3 V Operation 16 23 mA 45 MHz logic signal freq 3 V 5 V Operation 29 37 mA 45 MHz logic signal freq For All Models Input Currents lia lis lic 10 0 01 10 yA 0 lt Via Vis Vic lt Von OF Voz len le2 0 lt Ve1Ve2 lt Von Or Vop2 Logic High Input Threshold Vin VeH 5 V 3 V Operation 2 0 V 3 V 5 V Operation 1 6 V Logic Low Input Threshold Vi VeL 5 V 3 V Operation 0 8 V 3 V 5 V Operation 0 4 V Logic High Output Voltages Voan VosH Voo Voo2 Vop Vop2 V lox 20 pA Vix Vin Voch 0 1 Vop1 Vop1 V lox 4 MA Vix VixH Vop2 0 4 Vpop2 0 2 Logic Low Output Voltages Voar Vost Voce 0 0 0 1 V lox 20 pA Vix Viet 0 04 0 1 IV lox 400 pA Vix Vit 0 2 0 4 V lox 4 MA Vix Vix SWITCHING SPECIFICATIONS ADuM130xARW Minimum Pulse Width PW 1000 ns C 15 pF CMOS signal levels Maximum Data Rate 1 Mbps C 15 pF CMOS signal levels Propagation Delay ten teLH 50 70 100 ns C 15 pF CMOS signal levels Pulse Width Distortion ten tex PWD 40 ns C 15 pF CMOS signal levels Propagation Delay Skew tesk 50 Ins C 15 pF CMOS signal levels Channel to Channel Matching tPskcD oD 50
18. e 12 for total lbo and Ipp2 supply currents as a function of data rate for ADUM1300 ADuM1301 channel configurations 3 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed 4 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed gt tex propagation delay is measured from the 50 level of the falling edge of the Vix signal to the 50 level of the falling edge of the Vox signal ten propagation delay is measured from the 50 level of the rising edge of the Vix signal to the 50 level of the rising edge of the Vox signal 5 tpsk is the magnitude of the worst case difference in tex Or te_y that is measured between units at the same operating temperature supply voltages and output load within the recommended operating conditions 7 Codirectional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier Opposing directional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier 8 CMu is the maximum common mode voltage slew rate that can be sustained while maintaining Vo gt 0 8 Von2 CML is the maximum common mode voltage slew rate that can be sustained while maintaining Vo lt 0 8 V The common mode voltage slew rates app
19. e Width PW 1000 ns C 15 pF CMOS signal levels Maximum Data Rate 1 Mbps C 15 pF CMOS signal levels Propagation Delay teri teLH 50 65 100 ns C 15 pF CMOS signal levels Pulse Width Distortion tein tex gt PWD 40 ns C 15 pF CMOS signal levels Propagation Delay Skew tesk 50 jns C 15 pF CMOS signal levels Channel to Channel Matching teskcp op 50 jns C 15 pF CMOS signal levels Rev C Page 3 of 20 ADuM1300 ADUM1301 Parameter ADuM130xBRW Minimum Pulse Width Maximum Data Rate Propagation Delay Pulse Width Distortion tein tex Change vs Temperature Propagation Delay Skew Channel to Channel Matching Codirectional Channels Channel to Channel Matching Opposing Directional Channels ADuM130xCRW Minimum Pulse Width Maximum Data Rate Propagation Delay Pulse Width Distortion tetn tex Change vs Temperature Propagation Delay Skew Channel to Channel Matching Codirectional Channels Channel to Channel Matching Opposing Directional Channels For All Models Output Disable Propagation Delay High Low to High Impedance Output Enable Propagation Delay High Impedance to High Low Output Rise Fall Time 10 to 90 Common Mode Transient Immunity at Logic High Output Common Mode Transient Immunity at Logic Low Output Refresh Rate Input Dynamic Supply Current per Channel Output Dynamic Supply Current per Channel S
20. e transient magnitude is the range over which the common mode is slewed Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate See Figure 6 through Figure 8 for information on per channel supply current for unloaded and loaded conditions See the Power Consumption section on Page 17 for guidance on calculating the per channel supply current for a given data rate Rev C Page 9 of 20 ADuM1300 ADUM1301 PACKAGE CHARACTERISTICS Table 4 Parameter Symbol Min Typ Max Unit Test Conditions Resistance Input Output Rio 1012 Q Capacitance Input Output Cro 1 7 pF f 1 MHz Input Capacitance C 4 0 pF IC Junction to Case Thermal Resistance Side 1 Oia 33 C W Thermocouple located IC Junction to Case Thermal Resistance Side 2 Oco 28 C W at center of package underside 1 Device considered a 2 terminal device Pins 1 2 3 4 5 6 7 and 8 shorted together and Pins 9 10 11 12 13 14 15 and 16 shorted together Input capacitance is from any input data pin to ground REGULATORY INFORMATION The ADuM130x have been approved by the organizations listed in Table 5 Table 5 UL CSA VDE Recognized under 1577 Approved under CSA Component Certified according to DIN EN 60747 5 2 component recognition program Acceptance Notice 5A VDE 0884 Part 2 2003 012 Double insulation 2500 V rms Reinforced insulation per Basic insulation 560
21. edance state within 8 ns of Vooo power restoration if Vex state is L 1 Vix and Vox refer to the input and output signals of a given channel A B or C Vex refers to the output enable signal on the same side as the Vox outputs Von and Vopo refer to the supply voltages on the input and output sides of the given channel respectively In noisy environments connecting Vex to an external logic high or low is recommended Rev C Page 12 of 20 PIN CONFIGURATIONS AND PIN FUNCTION DESCRIPTIONS NC NO CONNECT 03787 0 004 Figure 4 ADUM1300 Pin Configuration ADuM1300 ADUM1301 03787 0 005 NC NO CONNECT Figure 5 ADUM1301 Pin Configuration Pins 2 and 8 are internally connected Connecting both to GND is recommended Pins 9 and 15 are internally connected Connecting both to GND is recommended Output enable Pin 10 on the ADuM1300 may be left disconnected if outputs are to be always enabled Output enable Pins 7 and 10 on the ADUM1301 may be left disconnected if outputs are to be always enabled In noisy environments connecting Pin 7 for ADUM1301 and Pin 10 for both models to an external logic high or low is recommended Table 11 ADuM1300 Pin Function Descriptions Table 12 ADuM1301 Pin Function Descriptions Pin Pin No Mnemonic Function No Mnemonic Function 1 Von Supply Voltage for Isolator Side 1 2 7 V to 1 Voo1 Supply Voltage for Isolator Side 1 2 7 V to
22. ld be designed such that any coupling that does occur equally affects all pins on a given component side Failure to ensure this could cause voltage differentials between pins exceeding the devices Absolute Maximum Ratings thereby leading to latch up or permanent damage PROPAGATION DELAY RELATED PARAMETERS Propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component The propaga tion delay to a logic low output may differ from the propagation delay to a logic high INPUT Vix OUTPUT Vox 03787 0 016 Figure 15 Propagation Delay Parameters Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signal s timing is preserved Channel to channel matching refers to the maximum amount that the propagation delay differs between channels within a single ADuM130x component Propagation delay skew refers to the maximum amount that the propagation delay differs between multiple ADuM130x components operating under the same conditions DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Positive and negative logic transitions at the isolator input cause narrow 1 ns pulses to be sent to the decoder via the trans former The decoder is bistable and is therefore either set or reset by the pulses indicating input logic transitions In the absence of logic t
23. ly Current Ipp1 10 34 49 mA 5 MHz logic signal freq Vop2 Supply Current Ipp2 10 1 1 1 6 mA 5 MHz logic signal freq 90 Mbps CRW Grade Only Von Supply Current IDD1 90 31 48 mA 45 MHz logic signal freq Voo2 Supply Current lDD2 90 8 13 mA 45 MHz logic signal freq ADuM1301 Total Supply Current Three Channels DC to 2 Mbps Voo Supply Current Ipp1 Q 0 7 14 mA DC to 1 MHz logic signal freq Voo2 Supply Current Ipp2 Q 06 09 mA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Von Supply Current Ipp1 10 2 6 3 7 mA 5 MHz logic signal freq Vop2 Supply Current Ipp2 10 1 8 2 5 mA 5 MHz logic signal freq 90 Mbps CRW Grade Only Von Supply Current lDD1 90 24 36 mA 45 MHz logic signal freq Vop2 Supply Current lDD2 90 16 23 mA 45 MHz logic signal freq For All Models Input Currents lia li lic 10 0 01 10 UA 0 lt Via Vis Vic lt Voo OF Vopz len le2 0 lt Ve1Ve2 lt Von or Vop2 Logic High Input Threshold Vin VeH 1 6 V Logic Low Input Threshold Vit VeL 0 4 V Logic High Output Voltages Voan VosH Vop1 Vpp2 0 1 3 0 V lox 20 pA Vix VixH VocH Vooi Voo2 0 4 2 8 V lox 4 MA Vic Vin Logic Low Output Voltages Voar Vost Voct 0 0 0 1 V lox 20 YA Vix Vict 0 04 0 1 V lox 400 pA Vix Viet 0 2 04 V lox 4 MA Vix Vit SWITCHING SPECIFICATIONS ADuM130xARW Minimum Pulse Width PW 1000 ns C 15 pF CMOS signal levels Maximum Data Rate 1 Mbps C 15 pF CMOS signal levels P
24. ly to both rising and falling common mode voltage edges The transient magnitude is the range over which the common mode is slewed Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate See Figure 6 through Figure 8 for information on per channel supply current for unloaded and loaded conditions See the Power Consumption section on Page 17 for guidance on calculating the per channel supply current for a given data rate Rev C Page 6 of 20 ADuM1300 ADUM1301 ELECTRICAL CHARACTERISTICS MIXED 5 V 3 V OR 3 V 5 V OPERATION 5 V 3 V operation 4 5 V lt Von lt 5 5 V 2 7 V lt Vom lt 3 6 V 3 V 5 V operation 2 7 V lt Von lt 3 6 V 4 5 V lt Vom lt 5 5 V all min max specifications apply over the entire recommended operation range unless otherwise noted all typical specifications are at Ta 25 C Von 3 0 V Vom 5 V or Von 5 V Vom 3 0 V Table 3 Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Input Supply Current per Channel Quiescent lboi 0 5 V 3 V Operation 0 50 0 53 mA 3 V 5 V Operation 0 26 0 31 mA Output Supply Current per Channel Quiescent Ippo 0 5 V 3 V Operation 0 11 0 14 mA 3 V 5 V Operation 0 19 0 21 mA ADuM1300 Total Supply Current Three Channels DC to 2 Mbps Voo Supply Current D01 0 5 V 3 V Operation 1 6 2 5 mA DC to 1 MHz logic signal freq 3 V 5 V Operation 0 9 1 7
25. n be sustained while maintaining Vo gt 0 8 Vpo2 CM is the maximum common mode voltage slew rate that can be sustained while maintaining Vo lt 0 8 V The common mode voltage slew rates apply to both rising and falling common mode voltage edges The transient magnitude is the range over which the common mode is slewed Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate See Figure 6 through Figure 8 for information on per channel supply current for unloaded and loaded conditions See the Power Consumption section on Page 17 for guidance on calculating the per channel supply current for a given data rate Rev C Page 4 of 20 ELECTRICAL CHARACTERISTICS 3 V OPERATION 2 7 V lt Von lt 3 6 V 2 7 V lt Vom lt 3 6 V all min max specifications apply over the entire recommended operation range unless other wise noted all typical specifications are at Ta 25 C Vpn Vom 3 0 V ADuM1300 ADUM1301 Table 2 Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Input Supply Current per Channel Quiescent DO 0 26 0 31 mA Output Supply Current per Channel Quiescent Ippo 0 0 11 0 14 mA ADuM1300 Total Supply Current Three Channels DC to 2 Mbps Voo Supply Current Ipp1 Q 0 9 1 7 mA DC to 1 MHz logic signal freq Voo2 Supply Current Ipp2 Q 04 07 mA DC to 1 MHz logic signal freq 10 Mbps BRW and CRW Grades Only Von Supp
26. nnel corresponding to Ipp and Ipm are calculated and totaled Figure 6 and Figure 7 provide per channel supply currents as a function of data rate for an unloaded output condition Figure 8 provides per channel supply current as a function of data rate for a 15 pF output condition Figure 9 through Figure 12 provide total Ipp and Iom supply current as a function of data rate for ADuM1300 ADuM1301 channel configurations Rev C Page 17 of 20 ADuM1300 ADUM1301 OUTLINE DIMENSIONS 0 30 0 0118 10 50 0 4134 10 10 0 3976 gt imi 7 60 0 2992 7 40 0 2913 10 65 0 4193 10 00 0 3937 2 65 0 1043 gt vi 0 0925 gt ja 0 51 0 0201 0 31 0 0122 COPLANARITY 0 10 COMPLIANT TO JEDEC STANDARDS MS 013AA SEATING 0 PLANE 0 33 0 0130 0 20 0 0079 0 75 0 0295 E 0 25 0 0098 C gt be 45 1 27 0 0500 0 40 0 0157 CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 18 16 Lead Standard Small Outline Package SOIC Wide Body RW 16 Dimensions shown in millimeters inches ORDERING GUIDE Number Number Maximum Maximum of Inputs of Inputs Data Rate Maximum Propagation Pulse Width Temperature Package Model Von Side Vop2 Side Mbps Delay 5 V ns Distortion
27. ode transients exceeding the Absolute Maximum Rating may cause latch up or permanent damage Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied Exposure to absolute maximum rating conditions may affect device reliability ESD CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although this product features proprie WARNING S tary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic SAT 4 discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of Bao Senon VE Deve functionality Table 10 Truth Table Positive Logic VixInput Vex Input Vppi State Vppo State Vox Output Notes H H or NC Powered Powered H L H or NC Powered Powered L X L Powered Powered Z X H or NC Unpowered Powered H Outputs return to the input state within 1 us of Vooi power restora tion x lt Unpowered Powered Z X X Powered Unpowered Indeterminate Outputs return to the input state within 1 us of Vooo power restora tion if Vex state is H or NC Outputs returns to high imp
28. ption section on Page 17 See Figure 6 through Figure 8 for information on per channel supply current as a function of data rate for unloaded and loaded conditions See Figure 9 through Figure 12 for total lop and looz supply currents as a function of data rate for ADUM1300 ADuM1301 channel configurations 3 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed 4 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed 5 teu propagation delay is measured from the 50 level of the falling edge of the Vx signal to the 50 level of the falling edge of the Vox signal teun propagation delay is measured from the 50 level of the rising edge of the Vx signal to the 50 level of the rising edge of the Vox signal 5 tesx is the magnitude of the worst case difference in tex or tei that is measured between units at the same operating temperature supply voltages and output load within the recommended operating conditions 7 Codirectional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier Opposing directional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier 8 CMu is the maximum common mode voltage slew rate that ca
29. ransitions of more than 2 us at the input a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output If the decoder receives no internal pulses for more than about 5 us the input side is assumed to be unpowered or nonfunctional in which case the isolator output is forced to a default state see Table 10 by the watchdog timer circuit The ADuM130x is extremely immune to external magnetic fields The limitation on the ADuM130x s magnetic field immunity is set by the condition in which induced voltage in the transformer s receiving coil is sufficiently large to either falsely set or reset the decoder The following analysis defines the conditions under which this may occur The 3 V operating condition of the ADuM130x is examined because it represents the most susceptible mode of operation The pulses at the transformer output have an amplitude greater than 1 0 V The decoder has a sensing threshold at about 0 5 V therefore establishing a 0 5 V margin in which induced voltages can be tolerated The voltage induced across the receiving coil is given by V dB dt 2T1rs n 1 2 N where B is magnetic flux density gauss N is the number of turns in the receiving coil rn is the radius of the n turn in the receiving coil cm Given the geometry of the receiving coil in the ADuM130x and an imposed requirement that the induced voltage be at most 50 of the 0 5 V margin
30. ropagation Delay text teLH 50 75 100 ns C 15 pF CMOS signal levels Pulse Width Distortion te n text gt PWD 40 ns C 15 pF CMOS signal levels Propagation Delay Skew tesk 50 jns C 15 pF CMOS signal levels Channel to Channel Matching teskcp op 50 jns C 15 pF CMOS signal levels Rev C Page 5 of 20 ADuM1300 ADUM1301 Parameter Symbol Min Typ Max Unit Test Conditions ADuM130xBRW Minimum Pulse Width PW 100 ns C 15 pF CMOS signal levels Maximum Data Rate 10 Mbps C 15 pF CMOS signal levels Propagation Delay ten teLH 20 38 50 jns C 15 pF CMOS signal levels Pulse Width Distortion tein tex PWD 3 ns C 15 pF CMOS signal levels Change vs Temperature 5 ps C C 15 pF CMOS signal levels Propagation Delay Skew tesk 26 ns C 15 pF CMOS signal levels Channel to Channel Matching teskcp 3 ns C 15 pF CMOS signal levels Codirectional Channels Channel to Channel Matching teskop 6 ns C 15 pF CMOS signal levels Opposing Directional Channels ADuM130xCRW Minimum Pulse Width PW 8 3 11 1 ns C 15 pF CMOS signal levels Maximum Data Rate 90 120 Mbps C 15 pF CMOS signal levels Propagation Delay ten teLH 20 34 45 ns C 15 pF CMOS signal levels Pulse Width Distortion te y tex PWD 0 5 2 ns C 15 pF CMOS signal levels Change vs Temperature 3 ps C C 15 pF CMOS signal levels Propagation Delay Skew tesk 16 jns C 15 pF CMOS signal levels Channel to
31. ssssssssssssrssressssssssssrserreesss 13 Edits to Absolute Maximum Ratings cssesseessesesseesesseenes 15 Deleted the Package Branding Information 16 ESD Cation eei E e E E EEE 12 Pin Configurations and Pin Function Descriptions 13 Typical Performance Characteristics cscessesesssesesseessesseenes 14 Application Information sssssssssssssssssssssssssrsesssssssssrsereeesssssssrseee 16 POC Board Layout e S ARNa 16 Propagation Delay Related Parameters ccccesseseeseesees 16 DC Correctness and Magnetic Field Immuniity ccceeeeee 16 Power Consumption cccccsesesseseeseseeseseeeseeeseeeseesseeseseeneseess 17 Outline Dimensions namnen iesin 18 Ordering Guidea oiean iesise seenen aanita raisin 18 Rev C Page 2 of 20 ADuM1300 ADUM1301 SPECIFICATIONS ELECTRICAL CHARACTERISTICS 5 V OPERATION 4 5 V lt Von lt 5 5 V 4 5 V lt Vom lt 5 5 V all min max specifications apply over the entire recommended operation range unless other wise noted all typical specifications are at Ta 25 C Von Vom 5 V Table 1 Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Input Supply Current per Channel Quiescent looi 0 0 50 0 53 mA Output Supply Current per Channel Quiescent Ippo 0 0 19 0 21 mA ADuM1300 Total Supply Current Three Channels DC to 2 Mbps Voo Supply Current lDD1 0 16 25 mA DC to 1 MHz logic signal freq Voo2
32. sssssssssssssssssssssssressrtessssssssssrrreeesss 10 Insulation and Safety Related Specifications 10 DIN EN 60747 5 2 VDE 0884 Part 2 Insulation Characteristics sieri inkak A KRR 11 Recommended Operation Conditions ssssssssssssssrrsssssssss 11 Absolute Maximum Ratings cccesessesessesssessesseesessesseesseeseenes 12 REVISION HISTORY 6 04 Data Sheet Changed from Rev B to Rev C Changes to Format Universal Chan ges to Features iss ena ES E ES RE s asi 1 Changes to Electrical Characteristics 5 V Operation 3 Changes to Electrical Characteristics 3 V Operation 5 Changes to Electrical Characteristics Mixed 5 V 3 V or SNJ N Operati Nse erka aE LAKAR EA ESKER 7 Changes to Ordering Guide s ssssssssssssssssssssssssssrsssreesssssssseseee 18 5 04 Data Sheet Changed from Rev A to Rev B Changes to the Format sssssessssssreressssrrresssrerressserrresssee Universal Changes t the Features iis iisi 1 Changes to Table 7 and Table 8 0 00 cceeessesseesessessesseeseessesseens 14 Changes to Table 9 ye a a tices E R sented tied asia 15 Changes to the DC Correctness and Magnetic Field Immunity SOCHON 4 encceisteicentynecspitiaw Moan centre oc tetade oats 19 Changes to the Power Consumption Section 20 Changes to the Ordering Guide eeeseeseseeseeseeseeneeneesenees 21 9 03 Data Sheet Changed from Rev 0 to Rev A Edits to Regulatory Information s sss s
33. tion of data rate for ADUM1300 ADuM1301 channel configurations 3 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed 4 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed 5 teu propagation delay is measured from the 50 level of the falling edge of the Vx signal to the 50 level of the falling edge of the Vox signal ten propagation delay is measured from the 50 level of the rising edge of the Vy signal to the 50 level of the rising edge of the Vox signal tesk is the magnitude of the worst case difference in ter or ten that is measured between units at the same operating temperature supply voltages and output load within the recommended operating conditions 7 Co directional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier Opposing directional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier 8 CMH is the maximum common mode voltage slew rate that can be sustained while maintaining Vo gt 0 8 Voo2 CML is the maximum common mode voltage slew rate that can be sustained while maintaining Vo lt 0 8 V The common mode voltage slew rates apply to both rising and falling common mode voltage edges Th
34. tput B 22N 14 Voa Logic Output A 15 GND2 Ground 2 Ground Reference for Isolator Side 2 16 Voo2 Supply Voltage for Isolator Side 2 2 7 V to Rev C Page 13 of 20 5 5V ADuM1300 ADUM1301 TYPICAL PERFORMANCE CHARACTERISTICS T E l z 9 z 5 oO Ww 9 ied 5 4 a 5 w D ied 5 E DATA RATE Mbps 5 DATA RATE Mbps 5 Figure 6 Typical Input Supply Current per Channel vs Data Rate Figure 9 Typical ADUM1300 Voo Supply Current vs Data Rate for 5 Vand 3 V Operation for 5 Vand 3 V Operation CURRENTICHANNEL mA o he N w A ou o K CURRENT mA 03787 0 009 0 20 40 60 80 100 DATA RATE Mbps 03787 0 012 DATA RATE Mbps Figure 7 Typical Output Supply Current per Channel vs Data Rate Figure 10 Typical ADuM1300 Voo2 Supply Current vs Data Rate for 5 V and 3 V Operation No Output Load for 5 V and 3 V Operation 10 50 9 45 8 viel 40 7 35 g 6 30 q 5 5E 25 5 ai 5V E 4 20 ii 3 3V 3 15 3 2 10 1 5 0 3 0 3 0 20 40 60 80 100 0 20 40 60 80 100 amp DATA RATE Mbps 3 DATA RATE Mbps 3 Figure 8 Typical Output Supply Current per Channel vs Data Rate Figure 11 Typical ADUM1301 Voo Supply Current vs Data Rate for 5 Vand 3 V Operation 15 pF Output Load for 5 Vand 3 V Operation Rev C Page 14 of 20 CURRENT mA 30 25 20 15
35. ymbol PW tph tPLH PWD tpsk tpskco tpskoD PW teu tpLH PWD tpsk teskcp teskop tenz tPLH tezn tezi tr tF CMH CM fr IDp1 D lbo 0 Min 10 20 90 18 25 25 Typ 32 0 19 0 05 Max 100 50 Unit Test Conditions ns C 15 pF CMOS signal levels Mbps C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ps C C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels Mbps C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ps C C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels ns C 15 pF CMOS signal levels kV us Vix Voo1 Vop2 Vem 1000 V transient magnitude 800 V kV us Vix 0 V Vem 1000 V transient magnitude 800 V Mbps mA Mbps mA Mbps 1 All voltages are relative to their respective ground 2 The supply current values for all three channels are combined when running at identical data rates Output supply current values are specified with no output load present The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consum
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ANALOG DEVICES Triple Channel Digital Isolators ADuM1300/ADuM1301 handbook