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ANALOG DEVICES ADM1072 handbook

1. C above 70 C FLT2 ONZ Operating T emperature Range GND STBY Industrial A Version 40 C to 85 C Storage Temperature Range 65 C to 150 C Lead T emperature Soldering 10 sec 300 C oe f f Pin Configuration T his is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this speci fication is not implied Exposure to absolute maximum rating conditions for extended periods of time may affect reliability THERMAL CHARACTERISTICS 16 Pin QSOP Package qa 105 C Watt qc 40 C Watt ORDERING GUIDE Temperature Package Package M odel Range Description Option ADM1072ARQ 40 C to 85 C 16 Pin QSOP RQ 16 Package PIN FUNCTION DESCRIPTION Pin Mnemonic Function 2 3 14 15 MAIN IN Input to M AIN P channel MOSFET source both channels Bypass MAIN_IN witha 22uF capacitor to ground 5 12 ST BY_IN Input to Standby P channel MOSFET source both channels and supply to chip circuitry Bypass ST BY_IN with a 4 7uF capacitor to ground 1 4 OP1 Output from channel 1 P channel MOSFET drains Bypass OP1 with a 120uF capacitor to ground 13 16 OP2 Output from channel 2 P channel MOSFET drains Bypass OP2 with a 120uF capacitor to ground 6 FLT1 Open Drain Digital Output FLT1 goes low when the channel 1 current limit is exceeded for 10mS or the die temperature exce
2. of the current limit amplifier and ground An on chip bandgap reference of 1 24V is connected to the inverting input of the current limit amplifier When the load current exceeds the preset limit the voltage across the current limit resistor exceeds 1 24V and the output voltage of the cur rent limit amplifier rises reducing the gate drive to the FETs By selecting between the Standby and M ain FETs and their associated mirror FET s the ST BY input allows the two differ ent values of current limit specified by USB2 0 to be selected T his feature is particularly useful when driving U SB peripherals from a host system such as a PC that can go into a power saving mode since it limits the current that the peripherals can attempt to draw from the host power supply Rev PrE 1 02 SHORT CIRCUIT PROTECTION T he proportional relationship between the main FET and the mirror FET is only maintained down to an output voltage of about 1 6V Below this voltage the output current is limited to approximately 1 2 x I imit In the event of a high dV dt across the switching FET during a short circuit the switch will turn off and disconnect the input from the output T he switch is then turned on slowly with the current limited to the short circuit value THERMAL SHUTDOWN T he thermal shutdown operates when the die temperature exceeds 150 C turning off both channels T he thermal shut down circuit has built in hysteresis of 10 C so the swi
3. 0 0 ADM 1074 0 O ANALOG Dual USB 2 0 Full Standby Power DEVICES Controller with Supply Steering Preliminary Technical Data ADM1072 FEATURES GENERAL DESCRIPTION 500mA Load Current 100mA in Standby Mode T he AD M 1072 is a logic controlled dual P channel switch 135m On Resistance with low on resistance and a built in current limiter capable of Switchable Current Limit sourcing up to 1A from supply voltages between 2 7V and 50A Typical Quiescent Current 5 5V In addition to logic inputs that switch each channel on 10nA Typical Shutdown Current and off the device has a standby input that switches the output 40nA Typical Switch Off Leakage current limit making it ideal for use with USB peripherals In Short Circuit Protection normal operating mode and Standby mode the output current Thermal Shutdown is typically limited to 500mA and 100mA respectively as FLT Outputs outlined by the USB2 0 Specification T his allows the system Small 16 Pin QSOP Package power supply to be protected against short circuits and surge currents in peripheral USB devices powered via the ADM 1072 APPLICATIONS Over current and over temperature conditions are signalled by Desktop Computers a fault output FLT for each channel Palmtop Computers k P The ADM 1072 also offers low quiescent current of typically Notebook Computers Hand Held Instruments 50uA and shutdown current of typically 10nA Universal Serial Bus USB 1A MAIN FET MAIN
4. _IN 1A MIRROR FET 0 2A MAIN FET 5 5v O ak O opi 0 2A MIRROR FET MIRROR AMPLIFIER 1 24V RpuLLUP BANDGAP 10kQ TO REFERENCE 100kQ sTBY 9 UNDERVOLTAG SENSOR TEMPERATURE SENSOR VpuLLUP 0 TO 5 5V RESISTOR OVERTEMP RpuLLUP 10kQ TO 100kQ TO CHANNEL O op2 TO TO CHANNEL CHANNEL 2 2 one 10 CHANNEL 2 IS IDENTICAL TO CHANNEL 1 FUNCTIONAL BLOCK DIAGRAM Rev PrE 1 02 Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A otherwise under any patent or patent rights of Analog Devices Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 2002 ADM1072 SPECIFICATIONS Specification for either channel 1 or channel 2 Vy 5 0V Ty 40 to 85 C unless otherwise noted Parameter Min T yp M ax Units Test Conditions C omments Operating Voltage Range 2 7 5 5 Volts Quiescent C urrent T otal D evice 50 uA Vin 5V ONI ON2 GND lout 0A Shutdown Supply Current T otal D evice 0 01 2 uA ONI ON2 Vin 5 5V Vout 0V U ndervoltage Lockout 2 0 2 3 2 6 V Vstpy_in Rising Edge 1 H y
5. but should have alow ESR A value of around 10 22uF is suitable Larger values will reduce the voltage drop still further The STBY_IN input requires a proportionately smaller value typically 2 2 to 4 7uF OUTPUT CAPACITANCE 120uF capacitors should be connected between OP1 and OP2 and GND to prevent the back e m f of parasitic inductance from pulling OP1 and OP2 below ground during turn off and to provide adequate turn on current for Universal Serial Bus USB applications that are hot plugged to OP or OP2 This causes the output rise and fall times to be longer as shown in the typical operating characteristics but does not affect the turn off time of the ADM 1072 itself LAYOUT CONSIDERATIONS Printed circuit board tracks to and from the ADM 1072 should be as thick and as short as possible to minimise parasitic induc tance and take full advantage of the fast response time of the switch Input and output capacitors should be placed as close to the device as possible less than 5mm THERMAL CONSIDERATIONS Under normal operating conditions the worst case power dissipation will be 135mW with the 135mQ on resistance and 3V supply W 1A x 0 1350 T he package is capable of handling and dissipating this power but heat dissipation can further be improved by providing a large area of copper in contact with the device pins particularly MAIN_IN and OP1 0P2 OUTLINE DIMENSIONS Dimensions shown in inches and mm 16 Pin QSOP Pa
6. ckage RQ 16 0 157 3 99 0 150 3 81 0 244 6 20 0 228 5 79 0 059 1 50 0 069 1 75 MAX 0 053 1 35 gt e gt e 8 gt je 0 010 0 25 J 0 012 0 30 e en gt m ne a z a SEATING 0 010 0 20 0 0 050 1 27 004 0 10 ESC 0 20 PLANE 0 007 0 18 0 016 0 41 Rev PrE 1 02
7. eds 150 C During startup FLT1 remains low for the turn on time 7 FLT2 Open Drain Digital Output FLT2 goes low when the channel 2 current limit is exceeded for 10mS or the die temperature exceeds 150 C During startup FLT2 remains low for the turn on time GND Ground pin for all chip circuits ST BY Digital Input Active high standby mode input ST BY 0 sets normal operating mode with 500mA current limit ST BY 1 sets standby mode with 100mA current limit 10 ON2 Digital Input Active low switch enable for channel 2 logic 0 turns the switch on 11 ONI Digital Input Active low switch enable for channel 1 logic 0 turns the switch on Rev PrE 1 02 Has ADM1072 Typical Performance Curves Figure 3 Off Supply Current vs Temperature Figure 6 lout Iser Ratio vs Switch Current Rev PrE 1 02 Typical Performance Curves Figure 8 Turn On Time vs Temperature N pitino A o At A Figure 9 Turn Off Time vs Temperature ADM1072 Typical Performance Curves Figure 13 Switch Turn On Time ADM1072 FUNCTIONAL DESCRIPTION The ADM 1072 is a dual logic controlled P channel switch Each channel of the ADM 1072 comprises two P channel switches T he source of one switch is connected to the MAIN_IN input pins and can switch up to 1A T he second switch is conected to the ST BY_IN pins and can switch up to 200mA T he device is rated to provide 500mA continuously in full powe
8. r mode and 100mA continuously in STBY mode The ST BY_IN inputs also provide the power for the chip circuitry and so must be connected to a supply at all times When ST BY is low the MAIN switch is active and when ST BY is high the Standby switch is active Each channel is individually controlled by an active low logic input ONI pin 11 and ON2 pin 10 When either ONI or ON2 is low the internal circuitry of the AD M 1072 is powered up and the output of the corresponding current limit amplifier is low providing gate drive to the switching FET thus turning it on When both ON inputs are high the internal circuitry is powered down and the current consumption is typically 10nA It should be noted that the AD M 1072 is not a bi directional switch so Viy must always be higher than Voyr TABLE 1 Truth Tablefor ON1 ON2 and STBY ON1 ON2 STBY Channel 1 Channel 2 0 0 0 500mA 500mA 0 0 1 100mA 100mA 0 1 0 500mA OFF 0 1 1 100mA OFF 1 0 0 OFF 500mA 1 0 1 OFF 100mA 1 1 X BOTH SHUT DOWN X don t care CURRENT LIMIT When either the M ain or Standby switch is turned on a smaller mirror switch passes a proportionate current equal to lout 1000 The mirror amplifier maintains this relationship by keeping the drain of the mirror FET at the same voltage as the main FET and drives the mirror current through an internal current limit resistor which is connected between the non inverting input
9. steresis On Resistance 135 mO Vin 4 75V mo Vin 3 0V NOMINAL CURRENT LIMIT Full Power M ode 0 8 1 0 1 2 A ST BY Low Notel Standby M ode 160 200 240 mA STBY High Notel ONI ON2 ST BY Input Low Voltage Vj 0 8 V Vin 2 7V to 5 5V ONI ON2 STBY Input High Voltage Viy 2 4 V Vin 2 7V to 5 5V ONI ON2 STBY Input Leakage 0 01 1 uA Von Vstay 5 5V FLT1 FLT2 Logic Output Low Voltage 0 4 V Isink 1MA FLT1 FLT2 Output High Leakage C urrent 0 05 1 uA VrauLt 5 5V Turn On Time 4 ms Vin 5V lout 500MA 4 ms Vin 3V loyr 500MA Turn Off T ime 20 Us Vin 5V lout 500mA Notes 1Current limit is specified with Vour 4 5V Guaranteed by design Derived from the Iser current ratio current limit amplifier and internal set resistor accuraciues 3T ested with lour 200MA and Vser adjusted until Vin Vout 0 8V Specifications to 40 C are guaranteed by design not tested Rev PrE 1 02 ADM1072 ABSOLUTE MAXIMUM RATINGS Ta 25 C unless otherwise noted OP1 OP2 MAININ to GND ic psec bth ti ens ote AS 0 3V to 6V aa jane ONI ONI FLT1 FLT2 to GND 0 3V to 6V E OP1 0OP2 to GND aauanaaaa anaana 0 3 V to Vin 0 3V MAININ aes M aximum Switch Current opi ADM1072 op2 Full Power MOde cece cece eee eee eee 1A ATEYIN TOP VIEW STEYN Standby Power M ode o c2s 05 4s ciacu e esau 200mA a lias a Continuous Power Dissipation TA 70 C 667mW E Bi QSOP derate 8 3mW
10. tch will not turn on again until the die temperature falls to 140 C If the fault condition is not removed the switch will pulse on and off as the temperature cycles between these limits UNDERVOLTAGELOCKOUT T he undervoltage sensor monitors the input supply voltage ie the voltage on ST BY_IN The outputs will not turn on until the supply voltage is sufficient for the chip circuits to operate reliably U ndervoltage lockout occurs at between 2 0 and 2 6V FLT OUTPUTS The ADM 1072 has active low fault outputs for each channel FLT1 pin 6 and FLT2 pin 7 If the current limit is exceeded for greater than 10mS the corresponding FLT output will pull low If the thermal shutdown is activated both FLT outputs will pull low The FLT outputs are open drain and require a pullup resistor of between 10kQ and 100kQ Several FLT outputs may be wire OR d to form a common interrupt line as shown in Figure 17 or FLT outputs may be wire OR d to an existing interrupt line that has a resistive pullup VpuLLup Rputtup Figure 17 Wire Or ing FAULT Outputs During startup the FLT output goes low for the turn on time ADM1072 APPLICATIONS INFORMATION INPUT FILTERING To prevent the input voltage being pulled below the minimum operating voltage under transient short circuit conditions before the current limit has had time to operate a reservoir capacitor should be connected from M AIN_IN to GND This does not need to be large

ANALOG DEVICES ADM1072 handbook

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