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ANALOG DEVICES ADM1052 handbook

1. FORCE 2 i SENSE 2 O VouT2 i 2 x 100pF Figure 1 Test Circuit CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the ADM1052 features proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality WARNING eer ESD SENSITIVE DEVICE REV A ADM1052 Typical Performance Characteristics Tek OJ 25 0MS s 56Acqs 1 HF 2 55 I I I I i 2 54 I i gt 2 53 l e T gt o l 5 2 52 I i 3 gt I 2 51 l i I 2 50 500mV Bw Ch2 20 0mV Bw M2 00ps Chis 3 53V 0 02 04 06 08 10 12 14 16 18 Ch3 20 0mVA Bw CURRENT A TPC 1 Line Transient Response Channel 1 and Channel 2 TPC 4 Load Regulation Channel 1 2 536 2 55 2 535 2 54 2 534 gt gt 2 533 1 28 E gt 3 gt 2 532 2 52 2 531 2 51 2 530 2 529 2 50 29 30 31 32 33 34 35 36 37 0 02 04 06 08 10 12 14 16 18 Vin V CURRENT A TPC 2 Line Regulation Channel 1 TPC 5 Load Regulation Channel 2 2 542 2 541 a 2 540 H z Q gt 2
2. 539 5 5 5 wW gt 2 538 cc wu al a a 2 537 2 536 2 535 29 30 34 32 33 34 35 36 37 10 100 1k 10k 100k 1M 10M Vin V FREQUENCY Hz TPC 3 Line Regulation Channel 2 TPC 6 Vcc Supply Ripple Rejection 4 REV A Tek FE Single Seq 50 0MS s 2 544 2 542 2 540 gt 2 538 I 5 2 2 536 2 534 2 532 2 530 2 528 0 10 20 30 40 50 60 70 80 90 20 0mV Bw M1 00ps Chi 40mV TEMPERATURE C TPC 7 Regulator Output Voltage vs Temperature TPC 10 Transient Response Channel 2 10 mA to2A Output Load Step Tek FE Single Seq 50 0MS s Tek Gy Single Seq 50 0MS s lH 20 0mV Bw M 1 00s Chi 45 0mV 20 0mV Bw M 1 00s Chis 37 6mV TPC 8 Transient Response Channel 1 10 mA to 2 A TPC 11 Transient Response Channel 2 2 A to 10 mA Output Load Step Output Load Step Tek FA Single Seq 50 0MS s Tek GIA 10 0kS s OAcqs H eS 20 0MVA BW M1 00ps Chis 5 2mV 10 0mV Bw M5 00ps Chis 800mV TPC 9 Transient Response Channel 1 2 A to 10 mA TPC 12 Force Output In Hiccup Mode Channel 1 Output Load Step REV A _5 ADM1052 GENERAL DESCRIPTION The ADM1052 is a dual precision voltage regulator controller intended for power rail generation and active bus terminatio
3. Impedance 50 kQ Force Output Voltage Swing Vr High 10 V Rx 10 KQ to GND Force Output Voltage Swing Vr Low 2 V Ry 10 KQ to Voc HICCUP MODE Hiccup Mode Hold Off Time 30 60 90 ms Figure 2 Hiccup Mode Threshold 0 8 x Vour V Hiccup Comparator Glitch Immunity 100 us Hiccup Mode On Time 0 5 1 0 1 5 ms Hiccup Mode Off Time 20 40 60 ms Power On Reset Threshold 6 9 V SHUTDOWN SHDN1 SHDN2 Shutdown Input Low Voltage Vir 0 8 V Shutdown Input High Voltage Vig 2 0 V Supply Current Normal Operation 24 4 0 mA Shutdown Inputs Floating Supply Current Shutdown Mode 600 1000 uA Both Channels Shut Down NOTES Guaranteed by design Specifications subject to change without notice 2 REV A ABSOLUTE MAXIMUM RATINGS PIN FUNCTION DESCRIPTIONS Ta 25 C unless otherwise noted edi alia 14V ti VI FE SHDNI SHDN2 to GND 0 3 V to Vec 0 3 V 2 neon Ri SENSEI SENSE2 to GND 0 3 V to 5 5 V 1 FORCE 2 Output of Channel 2 control amplifier to FORCEI FORCE2 Short Circuit to GND or Vcc gate of external N channel MOSFET Continuous Power Dissipation Ty 70 C 650 mW 2 SENSE 2 Input from source of external MOSFET to 8 Lead SOIC poh aaa ENET Derate 8 3 mW C above 70 C inverting input of Channel 2 control Operating Temperature Range amplifier via output voltage setting feed Commercial J Version 0 C to 70 C back resistor n
4. O 0 ADM 1054 0 O ANALOG Precision Dual Voltage DEVICES Regulator Controller FEATURES GENERAL DESCRIPTION Two Independent Controllers on One Chip The ADM1052 is a dual precision voltage regulator controller Two 2 525 V Outputs intended for power rail generation and active bus termination Shutdown Inputs to Control Each Channel on personal computer motherboards It contains a precision 2 5 Accuracy Over Line Load and Temperature 1 2 V bandgap reference and two channels consisting of con Low Quiescent Current trol amplifiers driving external power devices Each channel has a Low Shutdown Current shutdown input to turn off amplifier output and Hiccup Mode Works with External N Channel MOSFETs for Low Cost protection circuitry for the external power device Hiccup Mode Fault Protection The ADM1052 operates from a 12 V supply This gives suffi No External Voltage or Current Setting Resistors cient headroom for the amplifiers to drive external N channel Small 8 Lead SO Package MOSFETs operating as source followers as the external series APPLICATIONS pass devices This has the advantage that N channel devices are cheaper than P channel devices of similar performance and the circuit is easier to stabilize than one using P channel devices in a common source configuration Desktop Computers Servers Workstations FUNCTIONAL BLOCK DIAGRAM CONTROL AMPLIFIER ADM1052 BANDGAP REFERENCE Vcc OVou
5. ce inadvertently going into hiccup mode during power up or during channel enabling the hiccup mode is held off for approximately 60 ms on both channels By this time the output voltage should have reached its correct value In the case of power up the hold off period starts when Vcc reaches the power on reset threshold of 6 V 9 V In the case of channel enabling the hold off period starts when SHDN is taken high Note that the hold off timeout applies to both channels even if only one channel is disabled enabled As the 3 3 V input to the drain of the MOSFET is not moni tored it should ideally rise at the same or a faster rate than Vcc At the very least it must be available in time for Vopr to reach its final value before the end of the power on delay If the output voltage is still less than 80 of the correct value after the power on delay the device will go into hiccup mode until the output voltage exceeds 80 of the correct value during a hiccup mode on period Of course if there is a fault condition at the output during power up the device will go into hiccup mode after the power up delay and remain there until the fault condition is removed The effect of power on delay is illustrated in Figure 2 which shows an ADM1052 being powered up with a fault condition The output current rises to a very high value during the power on delay the device goes into hiccup mode and the output is pulsed on and off at 1 40 duty cycle When t
6. eshold 6 V 9 V Each amplifier output drives the gate of an N channel power MOSFET whose drain is connected to the unregulated supply input and whose source is the regulated output voltage which is also fed back to the appropriate sense input of the ADM1052 The control amplifiers have high current drive capability so that they can quickly charge and discharge the gate capacitance of the external MOSFET thus giving good transient response to changes in load or input voltage SHUTDOWN INPUTS Each channel has a separate shutdown input which may be controlled by a logic signal and allows the output of the regula tor to be turned on or off If the shutdown input is held high or not connected the regulator operates normally If the shutdown input is held low the enable input of the control amplifier is turned off and the amplifier output goes low turning off the regulator HICCUP MODE FAULT PROTECTION Hiccup mode fault protection is a simple method of protecting the external power device without the added cost of external sense resistors or a current sense pin on the ADM1052 In the event of a short circuit condition at the output the output voltage will fall When the output voltage of a channel falls 20 below the nominal voltage this is sensed by the hiccup com parator and the channel will go into hiccup mode where the enable signal to the control amplifier is pulsed on and off with a 1 40 duty cycle To prevent the devi
7. etwork ee Temperature A e Da 65 C to TOO 3 SHDN2 Digital Input Active low shutdown control Lead Temperature Soldering 10 sec 300 C with 50 WA internal pull up The output This is a stress rating only and functional operation of the device at these or any of Channel 2 control amplifier goes to other conditions above those indicated in the operation sections of this specifica ound when SHDN2 is taken low tion is not implied Exposure to absolute maximum rating conditions for extended gr g periods of time may affect reliability 4 GND Device Ground Pin 5 SHDN1 Digital Input Active low shutdown control THERMAL CHARACTERISTICS with 50 uA internal pull up The output 8 Lead Small Outline Package Oya 150 C W of Channel 1 control amplifier goes to ground when SHDNI is taken low ORDERING GUIDE 6 SENSE 1 Input from source of external MOSFET to inverting input of Channel 1 control Temperature Package Package amplifier via output voltage setting Model Range Description Option feedback resistor network ADM1052JR 0 C to 70 C 8 Lead SOIC SO 8 7 FORCE 1 Output of Channel 2 control amplifier to gate of external N channel MOSFET 8 Vec 12 V Supply 12V 3 3V PIN CONFIGURATION 1pF PHD55N03LT 1004F FORCE 2 1 e Vcc J SENSE 2 2 ADM1052 7 FORCE1 FORCE 1 SHDN2 3 Not to Scale 5 SENSE 1 GND 4 5 SHONT SENSE 1 O Vout N 2 x 100pF 3 3V LEAVE OPEN OR A CONNECT TO LOGIC SIGNALS IF SHUTDOWN REQUIRED MTD3055VL 1004F
8. he fault condition is removed the output voltage recovers to its normal value at the end of the hiccup mode off period The load current at which the ADM1052 will go into hiccup mode is determined by three factors The input voltage to the drain of the MOSFET Viy The output voltage Vour 20 The on resistance of the MOSFET Ron Iniccur Vin 0 8 x Vour Ron It should be emphasized that the hiccup mode is not intended as a precise current limit but as a simple method of protecting the external MOSFET against catastrophic fault conditions such as output short circuits REV A POR THRESHOLD 6V 9V Vpep TURN ON THRESHOLD 12V SUPPLY 3 3V SUPPLY TO EXTERNAL MOSFET DRAIN MOSFET GATE GATE DRIVE TO THRESHOLD EXTERNAL MOSFET OUTPUT lt 0 8 x VREG FAULT FA REMOVED CHANNEL 1 NORMAL OUTPUT VOLTAGE OR CHANNEL 2 Mao i e O O RO A A OUTPUT VOLTAGE DEVICE ENTERS FAULT HICCUP MODE 4 HICCUP MODE CURRENT HOLD OFF TIME sd F CHANNEL 1 OR CHANNEL 2 _2ams I I a leaa OUTPUT CURRENT OFF ON 1 40 DUTY CYCLE Figure 2 Power On Reset and Hiccup Mode APPLICATIONS INFORMATION PCB LAYOUT For optimum voltage regulation the loads should be placed as close as possible to the source of the output MOSFETs and feedback to the sense inputs should be taken from a point as close to the loads as possible The PCB tracks from the loads back to the sense inputs should be separate from the output t
9. n on personal computer motherboards It contains a precision 1 2 V bandgap reference and two channels consisting of control amp lifiers driving external power devices Both channels have an output of nominally 2 525 V Each channel has a shutdown input to turn off amplifier output and protection circuitry for the external power device The ADM1052 operates from a 12 V Vcc supply The output is disabled until Vcc climbs above the reset threshold 6 V 9 V The output from the ADM1052 is used to drive external N channel MOSFETs operating as source followers This has the advan tage that N channel devices are cheaper than P channel devices of similar performance and the circuit is easier to stabilize than one using P channel devices in a common source configuration The external power devices are protected by a Hiccup Mode circuit that operates if the circuit goes out of regulation due to an output short circuit In this case the power device is pulsed on off with a 1 40 duty cycle to limit the power dissipation until the fault condition is removed CIRCUIT DESCRIPTION CONTROL AMPLIFIERS The reference voltage is amplified and buffered by the control amplifiers and external MOSFETs the output voltage of each channel being determined by the feedback resistor network between the sense input and the inverting input of the con trol amplifier A power on reset circuit disables the amplifier output until Voc has risen above the reset thr
10. n the required maximum junc tion temperature OUTLINE DIMENSIONS Dimensions shown in inches and mm 8 Lead Small Outline Package Narrow Body SO 8 0 1968 5 00 7 0 1890 a0 Ly 8 0 1574 4 00 5 0 2440 6 20 0 1497 3 80 171 4 0 2284 5 80 y DI AY H agg 0 0196 0 50 0 0500 1 27 c BSC 0 0099 0 25 48 0 0040 0 10 8 0 0688 1 75 0 0098 0 25 p 0 0532 1 35 HE SEATING 0 0192 0 49 PLANE 0 0138 0 35 8 gt e 0 0 0500 1 27 0 0098 0 25 a 0 0075 0 19 REV A C02127 0 1 01 rev A PRINTED IN U S A
11. ploy distributed decoupling to achieve acceptable noise levels on the supply rails CHOICE OF MOSFET As previously discussed the load current at which an output goes into hiccup mode depends on the on resistance of the external MOSFET If the on resistance is too low this current may be very high While the Test Circuit Figure 1 shows the use of the lower resistance PHD55N03LT from Philips on Channel 1 and the use of the higher resistance MTD3055VL from Motorola on Channel 2 the MTD3055VL is in fact suitable for both channels Similarly the PHB11NO6LT from Philips is also suitable for both channels THERMAL CONSIDERATIONS Heat generated in the external MOSFET must be dissipated and the junction temperature of the device kept within accept able limits The power dissipated in the device is of course the drain source voltage multiplied by the load current The required thermal resistance to ambient is given by 074 Trax Tampax Vosmax X Iourmax Surface mount MOSFETs such as those specified must rely on heat conduction through the device leads and the PCB One square inch of copper 645 sq mm gives a thermal resistance of around 60 C W for a SOT 223 surface mount package and 80 C W for a SO 8 surface mount package For higher power dissipation than can be accommodated by a surface mount package D PAK or TO 220 devices are recom mended These should be mounted on a heatsink with a thermal resistance low enough to maintai
12. racks and not carry any load current CORRECT Similarly the ground connection to the ADM1052 should be made as close as possible to the ground of the loads and the ground track from the loads to the ADM1052 should not carry load current Correct and incorrect layout practice is illustrated in Figure 3 SENSE 1 FORCE 2 Vourz LOAD 1 LOAD 2 SENSE 2 VOLTAGE DROP BETWEEN OUTPUT AND LOAD VOLTAGE DROP IN GROUND LEAD INCORRECT Figure 3 Correct and Incorrect Layout Practice REV A ADM1052 LEAVE OPEN OR CONNECT TO LOGIC SIGNALS IF SHUTDOWN REQUIRED 1004F FORCE 2 SENSE 2 Figure 4 Typical Application Circuit SUPPLY DECOUPLING The supply to the drain of an external MOSFET should be decoupled as close as possible to the drain pin of the device with a 100 uF capacitor to ground The output from the source of the MOSFET should be decoupled as close as possible to the source pin of the device Decoupling capacitors should be chosen to have a low Equivalent Series Resistance ESR With the MOSFETs specified and two 100 uF capacitors in parallel the circuit will be stable for load currents up to 2 A The Vcc pin of the ADM1052 should be decoupled with a 1 uF capacitor to ground connected as close as possible to the Vcc and GND pins In practice the amount of decoupling required will depend on the application PC motherboards are notoriously noisy environ ments and it may be necessary to em
13. ri 2 x 100pF HICCUP COMPARATOR CONTROL AMPLIFIER 1004F O VouT2 2 x 1004F SHUTDOWN CONTROL CLK DELAY GENERATOR GND HICCUP COMPARATOR CLOCK OSCILLATOR POWER ON RESET REV A Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A which may result from its use No license is granted by implication or Tel 781 329 4700 World Wide Web Site http www analog com otherwise under any patent or patent rights of Analog Devices Fax 781 326 8703 Analog Devices Inc 2001 Vec 12 V 6 Vi 3 3 V Ty 0 C to 70 C both channels unless otherwise noted See Test Circuit ADM1052 SPECIFICATION Parameter Min Typ Max Unit Test Conditions Comments OUTPUT VOLTAGE Channel 1 Channel 2 2 525 V SHDNI SHDN2 Floating OUTPUT VOLTAGE ACCURACY 2 5 2 5 Vin 3 0 V to 3 6 V Iour 10 mA to 1 A Load Regulation 5 5 mV Viy 3 3 V Iour 10 mA to 1 A Line Regulation 5 5 mV Vin 3 0 V to 3 6 V Iour 1 A CONTROL AMPLIFIER Control Amplifier Open Loop Gain 100 dB Control Amplifier Slew Rate 3 V us Closed Loop Settling Time 5 us Io 10 mA to2A Turn On Time 5 us To 90 of Force High Output Level Cy 470 pF Sense Input

ANALOG DEVICES ADM1052 handbook

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