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ANALOG DEVICES AD626 handbook

1. 1 1 2 3 4 5 10 100 1k 10k SUPPLY VOLTAGE Volts LOAD RESISTANCE Q Figure 1 Input Common Mode Range vs Supply Figure 4 Positive Output Voltage Swing vs Resistive Load 6 2 3 T 25 C gS part 2 5 g s z I EI SINGLE AND KES D DUAL SUPPLY g w Vi a lt 9 GAIN 10 l fe 5 gt a E 5 2 R p si GAIN 100 Ww 3 UAL SUPPLY gt 1 ri NLY Li g 5 z 0 2 1 100 1k 10k 100k SUPPLY VOLTAGE Volts LOAD RESISTANCE Q Figure 2 Positive Output Voltage Swing vs Supply Voltage Figure 5 Negative Output Voltage Swing vs Resistive Load DUAL SUPPLY ONLY CHANGE IN OFFSET VOLTAGE pV NEGATIVE OUTPUT VOLTAGE SWING Volts 0 1 2 3 4 5 SUPPLY VOLTAGE Volts WARM UP TIME Minutes Figure 3 Negative Output Voltage Swing vs Supply Figure 6 Change in Input Offset Voltage vs Warm Up Voltage Time REV C _5 AD626 Typical Performance Characteristics 1000 100 Vg 5V DUAL SUPPLY GAIN 100 100 85 SINGLE SUPPLY 80 GAIN 10 75 CLOSED LOOP GAIN lt 7 a lt COMMON MODE REJECTION dB V DUAL SUPPLY 70
2. 65 T 100 1k 10k 100k 1M 20 22 24 26 28 30 FREQUENCY Hz INPUT COMMON MODE VOLTAGE Volts Figure 7 Closed Loop Gain vs Frequency Figure 10 Common Mode Rejection vs Input Common Mode Voltage for Dual Supply Operation 100 a no gt 90 o 5 5 m l a 80 a S s z e 70 ej o 60 0 1 1 10 100 1k 10k 100k 1M 0 20 40 60 80 FREQUENCY Hz INPUT SOURCE RESISTANCE MISMATCH Q Figure 8 Common Mode Rejection vs Frequency Figure 11 Common Mode Rejection vs Input Source Resistance Mismatch 100 CURVE APPLIES TO 95 ALL SUPPLY VOLTAGES a A AND GAINS BETWEEN 10 AND 100 I D I 5 o 5 EREN 2 fr tf TOTAL GAIN ERROR w 85 5 GAIN ACCURACY FROM SPEC TABLE oc ADDITIONAL GAIN ERROR u oO O 80 _ S z Vs 5 o 275 E 2 a O lt 70 65 i 5 o 5 10 15 20 25 10 100 1k INPUT COMMON MODE VOLTAGE Volts SOURCE RESISTANCE MISMATCH Q Figure 9 Common Mode Rejection vs Input Common Figure 12 Additional Gain Error vs Source Resistance Mode Voltage for Single Supply Operation Mismatch gs REV C QUIESCENT CURRENT mA Figure 13 Quiescent Supply Current vs Supply Voltage 0 16 0 15 0 14 0 13 SUPPLY VOLTAGE Volts 3 for Single Supply Operation QUIESCENT CURRENT mA Figure 14 Quiescent Supply Current vs Supply Vo
3. 1 V The overall common mode error is minimized by precise laser trimming of R3 and R4 thus giving the AD626 a common mode rejection ratio CMRR of at least 10 000 1 80 dB To minimize the effect of spurious RF signals at the inputs due to rectification at the input to Al small filter capacitors C1 and C2 are included FILTER GAIN 100 Ns Figure 28 Simplified Schematic AD626 The output of Al is connected to the input of A2 via a 100 kQ R12 resistor to facilitate the low pass filtering of the signal of interest see Low Pass Filtering section The 200 kQ input impedance of the AD626 requires that the source resistance driving this amplifier be low in value lt 1 kQ this is necessary to minimize gain error Also any mismatch between the total source resistance at each input will affect gain accuracy and common mode rejection CMR For example when operating at a gain of 10 an 80 Q mismatch in the source resistance between the inputs will degrade CMR to 68 dB The output buffer A2 operates at a gain of 2 or 20 thus setting the overall precalibrated gain of the AD626 with no external components at 10 or 100 The gain is set by the feedback net work around amplifier A2 The output of amplifier A2 relies on a 10 KQ resistor to Vs for pulldown For single supply operation Vs GND A2 can drive a 10 kQ ground referenced load to at least 4 7 V The minimum nominally zero output volt
4. 100 1k 10k 100k 1M FREQUENCY Hz Common Mode Rejection vs Frequency REV C Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices AD626 p The amplifier s inputs are protected against continuous overload of up to 50 V and RFI filters are included in the attenuator network The output range is 0 03 V to 4 9 V using a 5 V supply The amplifier provides a preset gain of 10 but gains be tween 10 to 100 can be easily configured with an external resis tor Furthermore a gain of 100 is available by connecting the G 100 pin to analog ground The AD626 also offers low pass filter capability by connecting a capacitor between the filter pin and analog ground The AD626A and AD626B operate over the industrial tempera ture range of 40 C to 85 C The AD626 is available in two 8 lead packages a plastic mini DIP and SOIC 25 N Vcu FOR SINGLE AND DUAL SUPPLIES a b p Vom FOR DUAL SUPPLIES ONLY INPUT COMMON MODE RANGE Volts a POWER SUPPLY VOLTAGE Volts Input Common Mode Range vs Supply One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 3
5. C C1627c 0 7 99 PRINTED IN U S A
6. Isc 12 12 mA NOISE Voltage Noise RTI Gain 10 f 0 1 Hz 10 Hz 2 2 uV p p Gain 100 f 0 1 Hz 10 Hz 2 2 uV p p Gain 10 f 1 kHz 0 25 0 25 uV AN HZ Gain 100 f 1 kHz 0 25 0 25 uV AN Hz DYNAMIC RESPONSE 3 dB Bandwidth Vour 1 V de 100 100 kHz Slew Rate Tun to Tmax Gain 10 0 17 0 22 0 17 0 22 V us Gain 100 0 1 0 17 0 1 0 17 V us Settling Time to 0 01 1 V Step 24 22 us POWER SUPPLY Operating Range Ta Tun IMAX 24 5 12 24 5 10 V Quiescent Current Gain 10 0 16 0 20 0 16 0 20 mA Gain 100 0 23 0 29 0 23 0 29 mA TRANSISTOR COUNT of Transistors 46 46 NOTES At temperatures above 25 C CMV degrades at the rate of 12 mV C i e 25 C CMV 2 V 85 C CMV 1 28 V Specifications subject to change without notice REV C DUAL SUPPLY e v 5 v and T 25 0 AD626 Model AD626A AD626B Parameter Condition Min Typ Max Min Typ Max Units GAIN Gain Accuracy Total Error Gain 10 Rr 10 kQ 0 2 0 5 0 1 0 3 Gain 100 0 25 1 0 0 15 0 6 Over Temperature Ta Tun IMAx G 10 50 30 ppm C G 100 100 80 ppm C Gain Linearity Gain 10 0 045 0 055 0 045 0 055 Gain 100 0 01 0 015 0 01 0 015 OFFSET VOLTAGE Input Offset Voltage 50 500 50 250 uV vs Temperature Tmm Tmax G 10 or 100 1 0 0 5 mV vs Temperature Tmm Tmax G 10 or 100 1 0 0 5 uVv C vs Supply Voltage PSR PSR 74 80 74 80 dB PSR 64 66 64 66 dB COMMON MODE REJECTION R 10 kQ CMR G
7. Voltage sm cet a del Dai e a 60 V at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions Maximum Reversed Supply Voltage Limit 34 V for extended periods may affect device reliability Output Short Circuit Duration Indefinite 8 Lead Plastic Package ja 100 C W Ojo 50 C W Storage Temperature Range N R 65 C to 125 C 8 Lead SOIC Package ja 155 C W 0jc 40 C W Operating Temperature Range AD626A B scie sat ee et 40 C to 85 C ESD SUSCEPTIBILITY Lead Temperature Range Soldering 60 sec 300 C An ESD classification per method 3015 6 of MIL STD 883C has been performed on the AD626 which is a Class 1 device ORDERING GUIDE Temperature Package Package Model Range Descriptions Options AD626AN 40 C to 85 C Plastic DIP N 8 AD626AR 40 C to 85 C Small Outline IC SO 8 AD626BN 40 C to 85 C Plastic DIP N 8 AD626AR REEL 40 C to 85 C 13 Tape and Reel AD626AR REEL7 40 C to 85 C 7 Tape and Reel METALIZATION PHOTOGRAPH Dimensions shown in inches and mm IN IN i E V FILTER iye REV C Typical Performance Characteristics AD626 Voy FOR SINGLE AND DUAL SUPPLIES La L Ie _ _ Vem FOR DUAL SUPPLIES ONLY POSITIVE OUTPUT VOLTAGE Volts INPUT COMMON MODE RANGE Volts
8. 29 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1999 AD626 SPECIFICATIONS SINGLE SUPPLY e v 5 v and T 25 c Model AD626A AD626B Parameter Condition Min Typ Max Min Typ Max Units GAIN Gain Accuracy Total Error Gain 10 Vout 2 100 mV de 0 4 1 0 0 2 0 6 Gain 100 Vour gt 100 mV de 0 1 1 0 0 5 0 6 Over Temperature Ta Turn IMAx G 10 50 30 ppm C G 100 150 120 ppm C Gain Linearity Gain 10 Vour 2 100 mV de 0 014 0 016 0 014 0 016 Gain 100 Vour gt 100 mV de 0 014 0 02 0 014 0 02 OFFSET VOLTAGE Input Offset Voltage 1 9 2 5 1 9 2 5 mV vs Temperature Tun Max G 10 or 100 2 9 2 9 mV vs Temperature Tmm Tmax G 10 or 100 6 6 uVPC vs Supply Voltage PSR PSR 74 80 74 80 dB PSR 64 66 64 66 dB COMMON MODE REJECTION Ri 10 KQ CMR Gain 10 100 f 100 Hz Vcom 24V 66 90 80 90 dB CMR Gain 10 100 f 10 kHz Vom 6 V 55 64 55 64 dB CMR Gain 10 100 f 100 Hz Vom 2 V 60 85 73 85 dB COMMON MODE VOLTAGE RANGE CMV Gain 10 CMR gt 85 dB 24 24 V CMV Gain 10 CMR gt 85 dB 2 2 V INPUT Input Resistance Differential 200 200 kQ Common Mode 100 100 kQ Input Voltage Range Common Mode 6 Vs 1 6 Vs 1 V OUTPUT Output Voltage Swing R 10 kQ Positive Gain 10 4 7 4 90 4 7 4 90 V Gain 100 4 7 4 90 4 7 4 90 V Negative Gain 10 0 03 0 03 V Gain 100 0 03 0 03 V Short Circuit Current
9. AD626 is shown in Figure 33 The current being measured is sensed across resistor Rs The value of Rs should be less than 1 kQ and should be selected so that the average differential voltage across this resistor is typically 100 mV To produce a full scale output of 4 V a gain of 40 is used adjustable by 20 to absorb the tolerance in the sense resistor Note that there is sufficient headroom to allow at least a 10 overrange to 4 4 V CURRENT IN CURRENT SENSOR CURRENT OUT IN 200k0 200k0 IN OPTIONAL LOW PASS FILTER Figure 33 Current Sensor Interface REV C 11 AD626 OUTLINE DIMENSIONS Dimensions shown in inches and mm 8 Lead SOIC SO 8 0 1968 5 00 seca az Ly 8 0 1574 4 00 0 2440 6 20 0 1497 3 80 f1 4 0 2284 5 80 n PIN1 UD e 0 0500 1 27 0 0196 0 50 BSC gt j 0 0099 0 25 0 0099 0 25 0 0688 1 75 0 0098 0 25 FRED 0 0532 Taso 38 mt 0 0040 0 10 FA 8 SEATING 0 0132 ry 49 0 0098 0 25 0 0 0500 a 27 PLANE 0 0138 0 35 0 0075 0 19 0 0160 0 41 8 Lead Plastic Dual In Line PDIP N 8 0 430 10 92 0 348 8 84 0 280 7 11 0 240 6 10 PIN 1 0 325 8 25 0 300 7 62 0 060 1 52 0 210 0 015 0 38 0 195 4 95 ae 0 115 2 93 AAZ 0 130 0 160 4 06 3 30 0 115 2 93 MIN lhe 0 015 0 381 0 022 0 558 0 070 1 77 SEATING 0 008 0 204 0 014 0 356 0 045 1 15 PLANE 12 REV
10. O 0 AD626 OO ANALOG DEVICES Low Cost Single Supply Differential Amplifier AD626 CONNECTION DIAGRAM 8 Lead Plastic Mini DIP N and SOIC SO Packages FEATURES Pin Selectable Gains of 10 and 100 True Single Supply Operation Single Supply Range of 2 4 V to 10 V Dual Supply Range of 1 2 V to 6 V Wide Output Voltage Range of 30 mV to 4 7 V Optional Low Pass Filtering Excellent DC Performance Low Input Offset Voltage 500 pV max Large Common Mode Range 0 V to 54 V Low Power 1 2 mW Vs 5 V Good CMR of 90 dB typ AC Performance Fast Settling Time 24 ps 0 01 Includes Input Protection Series Resistive Inputs Rin 200 kQ RFI Filters Included Allows 50 V Continuous Overload APPLICATIONS Current Sensing Interface for Pressure Transducers Position Indicators Strain Gages and Other Low Level Signal Sources PRODUCT DESCRIPTION The AD626 is a low cost true single supply differential ampli fier designed for amplifying and low pass filtering small differen tial voltages from sources having a large common mode voltage The AD626 can operate from either a single supply of 2 4 V to 10 V or dual supplies of 1 2 V to 6 V The input common mode range of this amplifier is equal to 6 Vs 1 V which provides a 24 V CMR while operating from a 5 V supply Furthermore the AD626 features a CMR of 90 dB typ 160 140 100 a 9 80 x Z 60 40 20 0 0 1 1 10
11. age will be 30 mV For dual supply operation 5 V the positive output voltage swing will be the same as for a single supply The negative swing will be to 2 5 V at G 100 limited by the ratio R15 R14 x R13 R14 R15 The negative range can be extended to 3 3 V G 100 and 4 V G 10 by adding an external 10 kQ pulldown from the output to Vs This will add 0 5 mA to the AD626 s quiescent current bringing the total to 2 mA The AD626 s 100 kHz bandwidth at G 10 and 100 a 10 MHz gain bandwidth is much higher than can be obtained with low power op amps in discrete differential amplifier circuits Fur thermore the AD626 is stable driving capacitive loads up to 50 pF G10 or 200 pF G100 Capacitive load drive can be increased to 200 pF G10 by connecting a 100 Q resistor in series with the AD626 s output and the load ADJUSTING THE GAIN OF THE AD626 The AD626 is easily configured for gains of 10 or 100 Figure 29 shows that for a gain of 10 Pin 7 is simply left unconnected similarly for a gain of 100 Pin 7 is grounded as shown in Fig ure 30 Gains between 10 and 100 are easily set by connecting a vari able resistance between Pin 7 and Analog GND as shown in Figure 31 Because the on chip resistors have an absolute toler ance of 20 although they are ratio matched to within 0 1 at least a 20 adjustment range must be provided The values shown in the table in Figure 31 provide a good tra
12. ain 10 100 f 100 Hz Vcm 24V 66 90 80 90 dB CMR Gain 10 100 f 10 kHz Vcu 6V 55 60 55 60 dB COMMON MODE VOLTAGE RANGE CMV Gain 10 CMR gt 85 dB 26 5 26 5 V CMV Gain 10 CMR gt 85 dB 32 5 32 5 V INPUT Input Resistance Differential 200 200 kQ Common Mode 110 110 kQ Input Voltage Range Common Mode 6 Vs 1 6 Vs 1 V OUTPUT Output Voltage Swing RL 10 kQ Positive Gain 10 100 4 7 4 90 4 7 4 90 V Negative Gain 10 1 65 2 1 1 65 2 1 V Gain 100 1 45 1 8 1 45 1 8 V Short Circuit Current Isc 12 12 mA Isc 0 5 0 5 mA NOISE Voltage Noise RTI Gain 10 f 0 1 Hz 10 Hz 2 2 uV p p Gain 100 f 0 1 Hz 10 Hz 2 2 uV p p Gain 10 f 1 kHz 0 25 0 25 uV HZ Gain 100 f 1 kHz 0 25 0 25 uVN Hz DYNAMIC RESPONSE 3 dB Bandwidth Vour 1 V dc 100 100 kHz Slew Rate Tmn to Tmax Gain 10 0 17 0 22 0 17 0 22 V us Gain 100 0 1 0 17 0 1 0 17 V us Settling Time to 0 01 1 V Step 24 22 us POWER SUPPLY Operating Range Ta Tun IMAX 1 2 5 6 1 2 6 V Quiescent Current Gain 10 1 5 2 1 5 2 mA Gain 100 1 5 2 1 5 2 mA TRANSISTOR COUNT of Transistors 46 46 Specifications subject to change without notice REV C AD626 ABSOLUTE MAXIMUM RATINGS NOTES Supply Voltage 20 ce eens 36V 1Stresses above those listed under Absolute Maximum Ratings may cause permanent Internal Power Dissipation damage to the device This is a stress rating only functional operation of the device Peak Input
13. de off be tween gain set range and resolution for gains from 11 to 90 10 INPUT O IN 200k0 200k0 IN INPUT O NOT CONNECTED Figure 29 AD626 Configured for a Gain of 10 INPUT O IN 200k0 200k0 IN INPUT O Figure 30 AD626 Configured for a Gain of 100 INPUT O iN 200k0 200k0 IN INPUT O FILTER OPTIONAL CORNER FREQUENCY OF FILTER 2aCF 100k RESISTOR VALUES FOR GAIN ADJUSTMENT GAIN RANGE Ra 0 Ru 0 11 20 100k 4 99k 20 40 10k 802 40 80 1k 80 80 100 100 2 Figure 31 Recommended Circuit for Gain Adjustment REV C AD626 SINGLE POLE LOW PASS FILTERING BRIDGE APPLICATION A low pass filter can be easily implemented by using the features Figure 34 shows the AD626 in a typical bridge application provided by the AD626 Here the AD626 is set to operate at a gain of 100 using dual supply voltages and offering the option of low pass filtering A iN 200kQ 200kQ IN S By simply connecting a capacitor between Pin 4 and ground a single pole low pass filter is created as shown in Figure 32 200k0 IN OPTIONAL LOW PASS FILTER Figure 34 A Typical Bridge Application CORNER FREQUENCY OF FILTER 2nCF 100ka Figure 32 A One Pole Low Pass Filter Circuit Which Operates from a Single 10 V Supply CURRENT SENSOR INTERFACE A typical current sensing application making use of the large common mode range of the
14. ie lel Ee TITEL Figure 20 Large Signal Pulse Response Vs 5 V Figure 23 Settling Time Vs 5 V G 10 G 100 Et Deere ee eee TTT TTT ly 100 90 LILI REEL SI N E E pe Na ATT err FO ECE Figure 21 Large Signal Pulse Response Vs 5 V Figure 24 Settling Time Vs 5 V G 100 G 10 _3 REV C REV C Figure 25 Settling Time Vs 5 V G 10 Ie f Figure 26 Settling Time Vs 5 V G 100 Vs ERROR OUT 10k0 10k0 Figure 27 Settling Time Test Circuit THEORY OF OPERATION The AD626 is a differential amplifier consisting of a precision balanced attenuator a very low drift preamplifier Al and an output buffer amplifier A2 It has been designed so that small differential signals can be accurately amplified and filtered in the presence of large common mode voltages Vem without the use of any other active components Figure 28 shows the main elements of the AD626 The signal inputs at Pins 1 and 8 are first applied to dual resistive attenuators RI through R4 whose purpose is to reduce the peak common mode voltage at the input to the preamplifier a feedback stage based on the very low drift op amp A1 This allows the differen tial input voltage to be accurately amplified in the presence of large common mode voltages six times greater than that which can be tolerated by the actual input to Al As a result the input CMR extends to six times the quantity Vs
15. ltage 2 0 1 5 1 0 0 5 2 SUPPLY VOLTAGE Volts 3 for Dual Supply Operation VOLTAGE NSD pV A Hz Figure 15 Noise Voltage Spectral Density vs Frequency 10 4 1 0 GAIN 10 100 0 1 Vg 5V DUAL SUPPLY 0 01 1 10 100 1k 10k REV C FREQUENCY Hz 100k AD626 24V PER VERTICAL DIVISION 5 SECONDS PER HORIZONTAL DIVISION Figure 16 0 1 Hz to 10 Hz RTI Voltage Noise Vs 5 V Gain 100 100 80 z FOR Vg 5V AND 5V 3 3 60 O a a Wao O sl O 20 0 1 10 100 1k 10k 100k 1M VALUE OF RESISTOR Rg Q Figure 17 Closed Loop Gain vs Rg ALL CURVES FOR GAINS OF 10 OR 100 SINGLE amp DUAL PSRR FA POWER SUPPLY REJECTION dB 0 1 1 10 100 1k 10k 100k 1M FREQUENCY Hz Figure 18 Power Supply Rejection vs Frequency AD626 EEE N LI NEI II Figure 19 Large Signal Pulse Response Vs 5 V Figure 22 Large Signal Pulse Response Vs 5 V G 10 G 100 COO CONCEPT ANEA a EOE e B

ANALOG DEVICES AD626 handbook

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