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ANALOG DEVICES AD620 handbook(2)

1. Vs Figure 40 Common Mode Shield Driver 14 GROUNDING Since the AD620 output voltage is developed with respect to the potential on the reference terminal it can solve many grounding problems by simply tying the REF pin to the appropriate local ground In order to isolate low level analog signals from a noisy digital environment many data acquisition components have separate analog and digital ground pins Figure 41 It would be conve nient to use a single ground line however current through ground wires and PC runs of the circuit card can cause hun dreds of millivolts of error Therefore separate ground returns should be provided to minimize the current flow from the sensi tive points to the system ground These ground returns must be tied together at some point usually best at the ADC package as shown ANALOG P S DIGITAL P S 15V C 15V C 45V DIGITAL DATA OUTPUT Figure 41 Basic Grounding Practice REV E AD620 GROUND RETURNS FOR INPUT BIAS CURRENTS sources such as transformers or ac coupled sources there must Input bias currents are those currents necessary to bias the input be a dc path from each input to ground as shown in Figure 42 transistors of an amplifier There must be a direct return path Refer to the Instrumentation Amplifier Application Guide free for these currents therefore when amplifying floating input from Analog Devices for more information regarding
2. AD620 Precision V I Converter The AD620 along with another op amp and two resistors makes a precision current source Figure 37 The op amp buffers the reference terminal to maintain good CMR The output voltage Vx of the AD620 appears across R1 which converts it to a current This current less only the input bias current of the op amp then flows out to the load ViIN Vin I L L RI RI Figure 37 Precision Voltage to Current Converter Operates on 1 8 mA 3 V GAIN SELECTION The AD620 s gain is resistor programmed by Rg or more pre cisely by whatever impedance appears between Pins 1 and 8 The AD620 is designed to offer accurate gains using 0 1 1 resistors Table II shows required values of Rg for various gains Note that for G 1 the Rg pins are unconnected Rg e For any arbitrary gain Rg can be calculated by using the formula _ 49 4kO ae To minimize gain error avoid high parasitic resistance in series with Rg to minimize gain drift Rg should have a low TC less than 10 ppm C for the best performance Table II Required Values of Gain Resistors 1 Std Table Calculated 0 1 Std Table Calculated Value of Rg Gain Value of Rg O Gain 49 9k 1 990 49 3 k 2 002 12 4k 4 984 12 4k 4 984 5 49 k 9 998 5 40 k 9 998 2 61k 19 93 2 61 k 19 93 1 00k 50 40 1 01 k 49 91 499 100 0 499 100 0 249 199 4 249 199 4 100 495 0 98 8 501 0 49 9 991 0 49 5 1 003 REV E
3. INPUT AND OUTPUT OFFSET VOLTAGE The low errors of the AD620 are attributed to two sources input and output errors The output error is divided by G when referred to the input In practice the input errors dominate at high gains and the output errors dominate at low gains The total Vos for a given gain is calculated as Total Error RTI input error output error G Total Error RTO input error x G output error REFERENCE TERMINAL The reference terminal potential defines the zero output voltage and is especially useful when the load does not share a precise ground with the rest of the system It provides a direct means of injecting a precise offset to the output with an allowable range of 2 V within the supply voltages Parasitic resistance should be kept to a minimum for optimum CMR INPUT PROTECTION The AD620 features 400 Q of series thin film resistance at its inputs and will safely withstand input overloads of up to 15 V or 60 mA for several hours This is true for all gains and power on and off which is particularly important since the signal source and amplifier may be powered separately For longer time periods the current should not exceed 6 mA Ip Vm 400 Q For input overloads beyond the supplies clamping the inputs to the supplies using a low leakage diode such as an FD333 will reduce the required resistance yielding lower noise RF INTERFERENCE All instrumentation amplifiers can rectify out of ba
4. RTI VOLTAGE NOISE 0 1 10Hz pV p p AD620 SUPERBETA BIPOLAR INPUT 1 IN AMP 4k 10k 100k 1M 10M 100M SOURCE RESISTANCE Q Figure 2 Total Voltage Noise vs Source Resistance One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1999 AD620 SPEC FI CATI 0 NS Typical 25 C V 15 V and R 2 KQ unless otherwise noted AD620A AD620B AD620S Model Conditions Min Typ Max Min Typ Max Min Typ Max Units GAIN G 1 49 4 k Rg Gain Range 1 10 000 1 10 000 1 10 000 Gain Error Vour 10 V G 1 0 03 0 10 0 01 0 02 0 03 0 10 G 10 0 15 0 30 0 10 0 15 0 15 0 30 G 100 0 15 0 30 0 10 0 15 0 15 0 30 G 1000 0 40 0 70 0 35 0 50 0 40 0 70 Nonlinearity Vout 10 V to 10 V G 1 1000 R 10 KO 10 40 10 40 10 40 ppm G 1 100 Ry 2 KO 10 95 10 95 10 95 ppm Gain vs Temperature G l 10 10 10 ppm C Gain gt 1 50 50 50 ppm C VOLTAGE OFFSET Total RTI Error Vos Voso G Input Offset Vast Vs 5 V to 15 V 30 125 15 50 30 125 uV Over Temperature Vs 5 V to t15 V 185 85 225 uV Average TC Vs 5 V to t15 V 03 1 0 0 1 0 6 03 10 uV c Output Offset Voso Vs 15 V 400 1000 200 500 400 1000 uV Vs 2t5V 1500 750 1500 uV Over Temperature Vs 5 V to 15 V 2000 1000 2000 uV Average TC Vs t5 Vtot15V 5 0 15 2 7 0 5 0 15 pv C Offset
5. E AD620 AD620A AD620B AD620S Model Conditions Min Typ Max Min Typ Max Min Typ Max Units DYNAMIC RESPONSE Small Signal 3 dB Bandwidth G 1 1000 1000 1000 kHz G 10 800 800 800 kHz G 100 120 120 120 kHz G 1000 12 12 12 kHz Slew Rate 0 75 1 2 0 75 1 2 0 75 1 2 V us Settling Time to 0 01 10 V Step G 1 100 15 15 15 US G 1000 150 150 150 US NOISE Voltage Noise 1 kHz Total RTI Noise Xe ni no GF Input Voltage Noise ey 9 13 9 13 9 13 nV NHz Output Voltage Noise en 72 100 72 100 72 100 nV AHz RTI 0 1 Hz to 10 Hz G 1 3 0 3 0 6 0 3 0 6 0 LV p p G 10 0 55 0 55 0 8 0 55 0 8 LV p p G 100 1000 0 28 0 28 0 4 0 28 0 4 LV p p Current Noise f 1kHz 100 100 100 fA VHz 0 1 Hz to 10 Hz 10 10 10 pA p p REFERENCE INPUT Rw 20 20 20 kQ Im Vint Vrer 0 50 60 50 60 50 60 Voltage Range Vs 1 6 Vs 1 6 Vs 1 6 Vs 1 6 Vs 1 6 Vs 1 6 V Gain to Output 1 0 0001 1 0 0001 1 0 0001 POWER SUPPLY Operating Range t2 3 18 2 3 18 23 18 V Quiescent Current V 2 3 V to 18 V 0 99 13 09 13 0 99 13 mA Over Temperature l1 1 6 l1 1 6 1 1 1 6 mA TEMPERATURE RANGE For Specified Performance 40 to 85 40 to 85 55 to 125 C NOTES See Analog Devices military data sheet for 883B tested specifications Does not include effects of external resistor Rg 3One input grounded G 1 This is defined as the same supply range which is used to specify PSR Specifications s
6. z 1 5 S O L o E E 2 t t E i u ML 80 40 0 40 80 75 25 25 75 125 175 INPUT OFFSET VOLTAGE pV TEMPERATURE C Figure 3 Typical Distribution of Input Offset Voltage Figure 6 Input Bias Current vs Temperature SAMPLE SIZE 850 a PERCENTAGE OF UNITS o a CHANGE IN OFFSET VOLTAGE pV 1200 600 0 600 1200 0 1 2 3 4 5 INPUT BIAS CURRENT pA WARM UP TIME Minutes Figure 4 Typical Distribution of Input Bias Current Figure 7 Change in Input Offset Voltage vs Warm Up Time 1000 SAMPLE SIZE 850 GAIN 1 o E N E E 100 R Z W GAIN 10 E D E o a z O ul T 2 10 a S S GAIN 100 1 000 N GAIN 1000 X BW LIMIT 1 400 200 0 200 400 i 77 100 ik idk d INPUT OFFSET CURRENT pA FREQUENCY Hz Figure 5 Typical Distribution of Input Offset Current Figure 8 Voltage Noise Spectral Density vs Frequency G 1 1000 REV E R AD620 Typical Characteristics 1000 CURRENT NOISE fA Hz 1 10 100 1000 FREQUENCY Hz Figure 9 Current Noise Spectral Densit
7. MAX Figure 34 Make vs Buy Table I Make vs Buy Error Budget AD620 Circuit Homebrew Circuit Error ppm of Full Scale Error Source Calculation Calculation AD620 Homebrew ABSOLUTE ACCURACY at T 25 C Input Offset Voltage UY 125 uV 20 mV 150 uV x 2 20 mV 6 250 10 607 Output Offset Voltage yV 1000 uV 100 20 mV 150 uV x 2 100 20 mV 500 150 Input Offset Current nA 2 nA x 350 Q 20 mV 6 nA x 350 Q 20 mV 18 53 CMR dB 110 dB 3 16 ppm x 5 V 20 mV 0 02 Match x 5 V 20 mV 100 791 500 Total Absolute Error 7 558 11 310 DRIFT TO 85 C Gain Drift ppm C 50 ppm 10 ppm x 60 C 100 ppm C Track x 60 C 3 600 6 000 Input Offset Voltage Drift uV C 1 uV C x 60 C 20 mV 2 5 uV C x V2 x 60 C 20 mV 3 000 10 607 Output Offset Voltage Drift uV C 15 uV C x 60 C 100 20 mV 2 5 uV C x 2 x 60 C 100 20 mV 450 150 Total Drift Error 7 050 16 757 RESOLUTION Gain Nonlinearity ppm of Full Scale 40 ppm 40 ppm 40 40 Typ 0 1 Hz 10 Hz Voltage Noise UV p p 0 28 uV p p 20 mV 0 38 uV p p x N2 20 mV 14 27 Total Resolution Error 54 67 Grand Total Error 14 662 28 134 G 100 Vs 15 V All errors are min max and referred to input REV E 11 AD620 45V O Figure 35 A Pressure Monitor Circuit which Operates on a 5 V Single Supply Pressure Measurement Although useful in many bridge applications such as weigh scales the AD620 is especially suitable for higher re
8. Referred to the Input vs Supply PSR Vs 2 3 Vtot18V G 1 80 100 80 100 80 100 dB G 10 95 120 100 120 95 120 dB G 100 110 140 120 140 110 140 dB G 1000 110 140 120 140 110 140 dB INPUT CURRENT Input Bias Current 0 5 2 0 05 1 0 05 2 nA Over Temperature 2 5 1 5 4 nA Average TC 3 0 3 0 8 0 pA C Input Offset Current 03 10 0 3 0 5 03 10 nA Over Temperature 1 5 0 75 2 0 nA Average TC 1 5 1 5 8 0 pA C INPUT Input Impedance Differential 10 2 1012 10 2 GQ pF Common Mode 10 2 1012 10 2 GO pF Input Voltage Range Vs 2 3 V to 5 V Vs 1 9 Vs 1 2 Vs 1 9 Vs 1 2 Vs 1 9 Vs 1 2 V Over Temperature V 2 1 Vs 1 3 Vs 21 Vs 1 3 Vs 2 1 Vs 1 3 V Vs 5 V to 418 V Vs 1 9 Vs 1 4 Vs 1 9 TVs 1 4 Vs 1 9 TVs 1 4 V Over Temperature V 2 1 Vs 1 4 Vs 2 1 Vs 1 4 Vs 2 3 Vs 1 4 V Common Mode Rejection Ratio DC to 60 Hz with I kQ Source Imbalance Vem 2 0 V to 10 V G 1 73 90 80 90 73 90 dB G 10 93 110 100 110 93 110 dB G 100 110 130 120 130 110 130 dB G 1000 110 130 120 130 110 130 dB OUTPUT Output Swing R 10 kQ Vs 2 3 V to 45 V Vs 1 1 Vs 1 2 Vs 1 1 Vs 1 2 Vs 1 1 Vs 1 2 V Over Temperature Vs 1 4 Vs 1 3 Vs 1 4 Vs 1 3 Vs 1 6 Vs 1 3 V Vs 5 V to 418 V Vs 1 2 Vs 1 4 Vs 1 2 Vs 1 4 Vs 1 2 TVs 1 4 V Over Temperature Vs 1 6 Vs 1 5 Vs 1 6 Vs 1 5 Vs 2 3 TVs 1 5 V Short Current Circuit 18 18 18 mA 2 REV
9. 0 0300 0 0192 0 48 4 agg 0 25 as 0 0099 0 25 4 8 0 0196 0 50 45 9 0 0500 1 27 1 27 90738 035 PLANE sac 20798 0 35 9 0975 0 19 16 0 0160 0 41 REV E C1599c 0 7 99 PRINTED IN U S A
10. 0 15 OUTPUT STEP SIZE Volts Figure 26 Small Signal Pulse Response G 100 Figure 29 Settling Time vs Step Size G 1 R 2 KQ C 100 pF 1000 E e eo SETTLING TIME ps E o 100 1000 GAIN Figure 27 Large Signal Response and Settling Time Figure 30 Settling Time to 0 0196 vs Gain for a 10 V Step G 1000 0 5 mV 0 01 tl Coo eer te PTA i Td TII RECEN ree a E EHS E Tur eee Figure 31a Gain Nonlinearity G 1 R 10 kQ Figure 28 Small Signal Pulse Response G 1000 10 LV 1 ppm R 2 KQ C 100 pF REV E 9 Q GAIN SENSE GAIN SENSE Figure 33 Simplified Schematic of AD620 Figure 31b Gain Nonlinearity G 100 R 10 kQ 100uV 10 ppm THEORY OF OPERATION The AD620 is a monolithic instrumentation amplifier based on a modification of the classic three op amp approach Absolute value trimming allows the user to program gain accurately to 0 15 at G 100 with only one resistor Monolithic construc tion and laser wafer trimming allow the tight matching and 10057 UEEEEEEEEM tracking of circuit components thus ensuring the high level of N IOT TEMARA performance inherent in this circuit The input transistors Q1 and Q2 provide a single differential L pair bipolar input for high precision Figure 33 yet offer 10x lower Input Bias Current thanks to Superfeta processing Feed back through the Q1 AI RI loop and the Q2 A2 R2 loop
11. LY VOLTAGE Volts Figure 15 Negative PSR vs Frequency RTI G 1 1000 Figure 18 Input Voltage Range vs Supply Voltage G 1 1000 o 1 24 00 d 29 gt E EE iu ui z F o ae 41 5 EE RL 2kO 1 ac 1 0 pui Su Og 0 1 Vs 0 0 100 1k 10k 100k 1M 10M 0 5 10 15 20 FREQUENCY Hz SUPPLY VOLTAGE Volts Figure 16 Gain vs Frequency Figure 19 Output Voltage Swing vs Supply Voltage G 10 REV E 7 AD620 30 2 Qa E Vg 15V 2 G 10 20 e Z z o W 9 a E 9 10 gt E 2 n E 2 o 0 0 100 1k 10k LOAD RESISTANCE Q Figure 20 Output Voltage Swing vs Load Resistance Figure 23 Large Signal Response and Settling Time G 10 0 5 mV 001 SACR URN rE PP eT Figure 21 Large Signal Pulse Response and Settling Time Figure 24 Small Signal Response G 10 R 2 KQ G 1 0 5 mV 0 01 C 100 pF IE UR E RE rt TPE ET TT EEBBERELON Figure 22 Small Signal Response G 1 R 2 KQ Figure 25 Large Signal Response and Settling Time C 100 pF G 100 0 5 mV 0 01 8 REV E TO 0 01 SETTLING TIME ps oe a ORE SEM UN O K 20 5 1
12. Typical Bridge Application Error Budget The AD620 offers improved performance over homebrew three op amp IA designs along with smaller size fewer compo nents and 10x lower supply current In the typical application shown in Figure 34 a gain of 100 is required to amplify a bridge output of 20 mV full scale over the industrial temperature range of 40 C to 85 C The error budget table below shows how to calculate the effect various error sources have on circuit accuracy Regardless of the system in which it is being used the AD620 provides greater accuracy and at low power and price In simple AD620A MONOLITHIC PRECISION BRIDGE TRANSDUCER INSTRUMENTATION AMPLIFIER G 100 REFERENCE systems absolute accuracy and drift errors are by far the most significant contributors to error In more complex systems with an intelligent processor an autogain autozero cycle will remove all absolute accuracy and drift errors leaving only the resolution errors of gain nonlinearity and noise thus allowing full 14 bit accuracy Note that for the homebrew circuit the OP07 specifications for input voltage offset and noise have been multiplied by V2 This 1s because a three op amp type in amp has two op amps at its inputs both contributing to the overall input error HOMEBREW IN AMP G 100 0 02 RESISTOR MATCH 3PPM C TRACKING DISCRETE 1 RESISTOR 100PPM C TRACKING SUPPLY CURRENT 15mA MAX SUPPLY CURRENT 1 3mA
13. U U Abed O O ANALOG DEVICES Low Cost Low Power Instrumentation Amplifier AD620 CONNECTION DIAGRAM 8 Lead Plastic Mini DIP N Cerdip Q and SOIC R Packages FEATURES EASY TO USE Gain Set with One External Resistor Gain Range 1 to 1000 Wide Power Supply Range 2 3 V to 18 V Higher Performance than Three Op Amp IA Designs Available in 8 Lead DIP and SOIC Packaging Low Power 1 3 mA max Supply Current EXCELLENT DC PERFORMANCE B GRADE 50 pV max Input Offset Voltage 0 6 pV C max Input Offset Drift 1 0 nA max Input Bias Current 100 dB min Common Mode Rejection Ratio G 10 LOW NOISE 9 nV VHz 1 kHz Input Voltage Noise 0 28 pV p p Noise 0 1 Hz to 10 Hz EXCELLENT AC SPECIFICATIONS 120 kHz Bandwidth G 100 15 ps Settling Time to 0 01 APPLICATIONS Weigh Scales ECG and Medical Instrumentation Transducer Interface Data Acquisition Systems Industrial Process Controls Battery Powered and Portable Equipment PRODUCT DESCRIPTION The AD620 is a low cost high accuracy instrumentation ampli fier that requires only one external resistor to set gains of 1 to 30 000 25 000 3 OP AMP IN AMP 3 OP 07s 20 000 15 000 AD620A 10 000 TOTAL ERROR PPM OF FULL SCALE 0 5 10 15 20 SUPPLY CURRENT mA Figure 1 Three Op Amp IA Designs vs AD620 REV E Information furnished by Analog Devices is believed to be accurate and reliable However no respo
14. in amp applications INPUT REFERENCE INPUT REFERENCE TO POWER TO OY GROUND GROUND Figure 42a Ground Returns for Bias Currents with Figure 42b Ground Returns for Bias Currents with Transformer Coupled Inputs Thermocouple Inputs INPUT REFERENCE 100kO0 TO POWER SUPPLY GROUND Figure 42c Ground Returns for Bias Currents with AC Coupled Inputs REV E 15 AD620 OUTLINE DIMENSIONS Dimensions shown in inches and mm Plastic DIP N 8 Package 0 430 10 92 0 348 8 84 8 5 0 280 7 11 0 240 6 10 e M 0 325 8 25 pi 1 0 060 1 52 0 300 7 62 0 210 5 33 0 015 0 38 F 0 195 4 95 MA 0 115 2 93 0 160 4 06 U 3 30 m MIN 0 115 2 93 a MN p HH narsaga 0 022 0 556 0 100 0 070 1 77 Br ANE 0056204 0 014 0 356 2 54 0 045 1 15 BSC Cerdip Q 8 Package 0 005 0 13 0 055 1 4 MAX 0 310 7 87 0 220 5 59 pm m 0 320 8 13 e MAX ol 0 060 1 52 0 290 7 37 0 200 5 vil 0 015 0 38 MAX 0 150 0 200 5 08 ei JX 3 81 MIN 0 125 3 18 je ja 0 023 0 58 0 100 0 070 1 78 SEATING pe ANE 0 014 0 36 2 54 0 030 0 76 0 36 BSC 0 76 i A gt 0 015 0 38 15 0 008 0 20 SOIC SO 8 Package 0 1968 5 00 N 0 1890 oM L 8 5 0 1574 4 00 0 2440 6 20 0 1497 3 80 TU 4 0 2284 5 80 yii PIN 1 0 0688 1 75 0 0098 0 25 0 0532 1 35 0 0040 0 10 L 3 gt et gt e i SEATING
15. main tains constant collector current of the input devices Q1 Q2 thereby impressing the input voltage across the external gain setting resistor Rg This creates a differential gain from the inputs to the A1 A2 outputs given by G R1 R2 Rg 1 The unity gain subtracter A3 removes any common mode sig nal yielding a single ended output referred to the REF pin potential Figure 31c Gain Nonlinearity G 1000 R 10 kQ The value of Rg also determines the transconductance of the 1 mV 100 ppm preamp stage As Rg is reduced for larger gains the transcon ductance increases asymptotically to that of the input transistors 10k0 Het 10kQ This has three important advantages a Open loop gain is boosted for increasing programmed gain thus reducing gain related errors b The gain bandwidth product determined by C1 C2 and the preamp transconductance increases with pro grammed gain thus optimizing frequency response c The input voltage noise is reduced to a value of 9 nV VHz deter mined mainly by the collector current and base resistance of the input devices The internal gain resistors R1 and R2 are trimmed to an abso lute value of 24 7 KQ allowing the gain to be programmed accurately with a single external resistor The gain equation is then 49 4 RQ ALL RESISTORS 196 TOLERANCE G 1 Rg Figure 32 Settling Time Test Circuit zar _ 49 4 kQ RT 10 REV E AD620 Make vs Buy A
16. nd signals and when amplifying small signals these rectified voltages act as small dc offset errors The AD620 allows direct access to the input transistor bases and emitters enabling the user to apply some first order filtering to unwanted RF signals Figure 38 where RC 1 2 nf and where f gt the bandwidth of the AD620 C lt 150 pF Matching the extraneous capacitance at Pins 1 and 8 and Pins 2 and 3 helps to maintain high CMR Figure 38 Circuit to Attenuate RF Interference 13 AD620 COMMON MODE REJECTION Instrumentation amplifiers like the AD620 offer high CMR which is a measure of the change in output voltage when both inputs are changed by equal amounts These specifications are usually given for a full range input voltage change and a speci fied source imbalance For optimal CMR the reference terminal should be tied to a low impedance point and differences in capacitance and resistance should be kept to a minimum between the two inputs In many applications shielded cables are used to minimize noise and for best CMR over frequency the shield should be properly driven Figures 39 and 40 show active data guards that are configured to improve ac common mode rejections by bootstrapping the capacitances of input cable shields thus minimizing the capaci tance mismatch between the inputs Vs Figure 39 Differential Shield Driver Vs INPUT Q nm Q AD548 O Vour T WC Hg REFERENCE la INPUT
17. nsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices TOP VIEW 1000 Furthermore the AD620 features 8 lead SOIC and DIP packaging that is smaller than discrete designs and offers lower power only 1 3 mA max supply current making it a good fit for battery powered portable or remote applications The AD620 with its high accuracy of 40 ppm maximum nonlinearity low offset voltage of 50 uV max and offset drift of 0 6 uV C max is ideal for use in precision data acquisition systems such as weigh scales and transducer interfaces Fur thermore the low noise low input bias current and low power of the AD620 make it well suited for medical applications such as ECG and noninvasive blood pressure monitors The low input bias current of 1 0 nA max is made possible with the use of Superfeta processing in the input stage The AD620 works well as a preamplifier due to its low input voltage noise of 9 nV VHz at 1 kHz 0 28 uV p p in the 0 1 Hz to 10 Hz band 0 1 pA VHz input current noise Also the AD620 is well suited for multiplexed applications with its settling time of 15 us to 0 0196 and its cost is low enough to enable designs with one in amp per channel 10 000 1 000 TYPICAL STANDARD BIPOLAR INPUT IN AMP 100 10
18. pecification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Specification is for device in free air 8 Lead Plastic Package Oy 95 C W 8 Lead Cerdip Package 0 110 C W 8 Lead SOIC Package 054 155 C W METALIZATION PHOTOGRAPH Dimensions shown in inches and mm Contact factory for latest dimensions Ro Vs OUTPUT REFERENCE 0 0708 1 799 B8 T Ra 3 180 Vs IN IN FOR CHIP APPLICATIONS THE PADS 1R AND 8Rg MUST BE CONNECTED IN PARALLEL TO THE EXTERNAL GAIN REGISTER Rg DO NOT CONNECT THEM IN SERIES TO Rg FOR UNITY GAIN APPLICATIONS WHERE Rg IS NOT REQUIRED THE PADS 1Rg MAY SIMPLY BE BONDED TOGETHER AS WELL AS THE PADS 8Rg CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the AD620 features proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality WARNING emma ESD SENSITIVE DEVICE REV E AD620 Typical Characteristics e 2 v 15 V R 2 kQ unless otherwise noted SAMPLE SIZE 360 g T
19. sistance pressure sensors powered at lower voltages where small size and low power become more significant Figure 35 shows a 3 KQ pressure transducer bridge powered from 5 V In such a circuit the bridge consumes only 1 7 mA Adding the AD620 and a buffered voltage divider allows the signal to be conditioned for only 3 8 mA of total supply current Small size and low cost make the AD620 especially attractive for voltage output pressure transducers Since it delivers low noise and drift it will also serve applications such as diagnostic non invasive blood pressure measurement PATIENT CIRCUIT PROTECTION ISOLATION Medical ECG The low current noise of the AD620 allows its use in ECG monitors Figure 36 where high source resistances of 1 MQ or higher are not uncommon The AD620 s low power low supply voltage requirements and space saving 8 lead mini DIP and SOIC package offerings make it an excellent choice for battery powered data recorders Furthermore the low bias currents and low current noise coupled with the low voltage noise of the AD620 improve the dynamic range for better performance The value of capacitor C1 is chosen to maintain stability of the right leg drive loop Proper safeguards such as isolation must be added to this circuit to protect the patient from possible harm 3V OUTPUT 1V mV AD620A 6 7 FILTER OUTPUT AMPLIFIER Figure 36 A Medical ECG Monitor Circuit 12 REV E
20. ubject to change without notice REV E AD620 ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Supply Voltage 0 eee eee eee eee 18 V Internal Power Dissipation 650 mW Model Temperature Ranges Package Options Input Voltage Common Mode ss tVs AD620AN 40 C to 85 C N 8 Differential Input Voltage 000 008 t25V AD620BN 40 C to 85 C N 8 Output Short Circuit Duration Indefinite AD620AR 40 C to 85 C SO 8 Storage Temperature Range Q 65 C to 150 C AD620AR REEL 40 C to 85 C 12 REEL Storage Temperature Range N R 65 C to 125 C AD620AR REEL7 40 C to 85 C T REEL Operating Temperature Range AD620BR 40 C to 85 C SO 8 AD620 A B oot o9 o9 o9 o9 o9 9 9 9 9 9 t9 9 n9 n9 n n n9 n9 n9 os C to ij AD620BR REEL 409C to 85 C 13 REEL AD620 S o9 9 o9 o9 o9 o9 o o9 9 9 9 9 o9 9 9 9 9 n9 n9 9 n9 n9 n 55 C to 125 C AD620BR REEL7 409 C to 85 C qu REEL Lead Temperate Rarig AD620ACHIPS 40 C to 85 C Die Form Soldering 10 seconds nnana 300 C AD620SQ 883B 55 C to 125 C Q 8 NOTES N Plastic DIP Q Cerdip SO Small Outli Stresses above those listed under Absolute Maximum Ratings may cause perma zc see ERP OD SUMUS nent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this s
21. y vs Frequency RTI NOISE 2 0 pV DIV l TIME 1 SEC DIV Figure 10a 0 1 Hz to 10 Hz RTI Voltage Noise G RTI NOISE 0 14 V DIV l TIME 1 SEC DIV Figure 10b 0 1 Hz to 10 Hz RTI Voltage Noise G 1000 1 Figure 11 0 1 Hz to 10 Hz Current Noise 5 pA Div 100 000 RTI pV TOTAL DRIFT FROM 25 C TO 85 C CMR dB 10 000 FET INPUT IN AMP e e eo AD620A 100 10k 100k SOURCE RESISTANCE Q 1M 10M Figure 12 Total Drift vs Source Resistance 160 140 120 100 10 100 1k FREQUENCY Hz 10k 100k 1M Figure 13 CMR vs Frequency RTI Zero to 1 kQ Source Imbalance REV E e a G 10 100 1000 30 e Qa 2 25 2 gt I B M 20 2 d 2 9 15 E z LE 10 2 i 5 0 0 1 1 10 100 1k 10k 100k 1M 1k 10k 100k 1M FREQUENCY Hz FREQUENCY Hz Figure 14 Positive PSR vs Frequency RTI G 1 1000 Figure 17 Large Signal Frequency Response 180 Vg 0 0 160 05 o W 25 NECEM I E E E n T TTT 10 E gt 120 EL 5 C ut Y 100 o5 t o o HO 80 oL 5 a 5a 60 Sui 1 0 z 40 kat 40 5 20 Vs 40 0 0 1 1 10 100 1k 10k 100k 1M 0 5 10 15 20 FREQUENCY Hz SUPP

ANALOG DEVICES AD620 handbook(2)

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