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MICROCHIP PIC16C5X Data sheet1

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1. FIGURE 14 2 TYPICAL RC OSC FIGURE 14 3 TYPICAL RC OSC FREQUENCY vs VDD FREQUENCY vs VDD CEXT 20 PF CEXT 100 PF Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 5 5 1 8 R 3 3K R 3 3K 5 0 ee 1 6 4 5 14 4 0 R 5K Je R 5K a I 1 0 N I o 3 0 2 2 R 10K u 08 r A ON R 10K 2 5 0 6 20 Measured on DIP Packages T 25 C 0 4 Measured on DIP Packages T 25 C 1 5 0 2 R 100K 1 0 0 0 3 0 3 5 4 0 45 5 0 5 5 6 0 05 R 100K VDD Volts 0 0 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts DS30453D page 92 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 14 4 TYPICAL RC OSC FIGURE 14 5 TYPICAL IPD vs VDD FREQUENCY vs VDD WATCHDOG DISABLED CEXT 300 PF Typical statistical mean 25 C a Maximum mean 3s 40 C to 125 C Typical statistical mean 25 C ini Ane S Maximum mean 3s 40 C to 125 C Minimums mean 951040 C1012520 Minimum mean 3s 40 C to 125 C 25 800 700 R 3 3K 600 NJ
2. FIGURE 3 1 PIC16C5X SERIES BLOCK DIAGRAM 9 11 UA EPROM ROM 9 11 ero STACK TOCKI CONFIGURATION WORD OSC OSC2 MCLR 512X12TO k STACK2 7 5048 X12 DISABLE OSC 12 WATCHDOG lt TIMER CODE PROTECT OSCILLATOR INSTRUCTION TIMING amp REGISTER CONTROL 9 WDT TIME WDT TMRO CLKOUT T 19 v OUT PRESCALER 4 8 SLEEP INSTRUCTION DECODER OPTION REG lt OPTION DIRECT ADDRESS DIRECT RAM 7 ae SEEN ADDRESS PURPOSE 5 REGISTER FILE qs PL SRAM on 24 25 72 or z STATUS 73 Bytes T i TMRO FSR E al DATA BUS Low au o V i FROM W 8 FROM W FROM W 4 8 Y ye Ts TRIS 5 TRIS 6 TRIS 7 TRISA PORTA TRISB PORTB TRISC PORTC RA lt 3 0 gt RB lt 7 0 gt RC lt 7 0 gt 28 Pin Devices Only DS30453D page 10 Preliminary O 2002 Microchip Technology Inc PIC16C5X TABLE 3 1 PINOUT DESCRIPTION PIC16C54 PIC16CR54 PIC16C56 PIC16CR56 PIC16C58 PIC16CR58 Pin Number Pin Buffer ND Pin Name DIP SOIC SSOP Type Type Description RAO 17 17 19 1 0 TTL Bi directional I O port RA1 18 18 20 1 0 TTL RA2 1 1 1 1 0 TTL RA3 2 2 2 1 0 TTL RBO 6 6 7 1 0 TTL Bi directional I O p
3. FIGURE 8 1 TIMERO BLOCK DIAGRAM Data Bus Fosc 4 0 PSout Sync with 1 Internal TMRO reg TOCKI K Programma le Glocke PSout pin Prescaler Sync TOSE 2 cycle delay Y 3 PS2 PS1 PSO PSA Tocs Section 6 4 Note 1 Bits TOCS TOSE PSA PS2 PS1 and PSO are located in the OPTION register 2 The prescaler is shared with the Watchdog Timer Figure 8 6 FIGURE 8 2 ELECTRICAL STRUCTURE OF TOCKI PIN RIN e ANV y TOCKI 1 Schmitt Tri pin 1 N H input Buffer i i Y Vss Vss Note 1 ESD protection circuits O 2002 Microchip Technology Inc Preliminary DS30453D page 37 PIC16C5X FIGURE 8 3 TIMERO TIMING INTERNAL CLOCK NO PRESCALER PC Q1 a2 a3 as a1 a2 a3 a4 a1 a2 a3 a4 a1 az as as a1 az as as ar az as as a1 az as as ar az as as Program 1 1 1 1 1 1 1 pin MOVWF TMPO MOVF TMRO W MOVF TMRO W MOVF TMRO W MOVF TMRO W MOVF TMRO W Counter PC Y PC XLLLPCH y PO Y PCx338 X PC CY POG NT XO NTO 2 XA Timero TO TOA 102 NTO Xi NTO XON ar Instruction 4 4 4 4 4 4 Executed Write TMRO ReadTMRO ReadTMRO ReadTMRO ReadTMRO ReadTMRO executed reads NTO reads NTO reads NTO reads NTO 1 reads NTO 2 FIGURE 8 4 TIMERO TIMING INTERNAL CLOCK PRESCALER 1 2 PC Q1 az az a4 a1 az azla4 a1 a2 a3 as a1 a2 a3 a4
4. TOCS PSA 9 8 bit Pr ler M it Prescale U 11 X Watchdog 84 Timer 8 to 1MUX 4 gt PS lt 2 0 gt PSA 0 1 WDT Enable bit MUX 4 PSA WDT Time Out Note TOCS TOSE PSA PS lt 2 0 gt are bits in the OPTION register 2002 Microchip Technology Inc Preliminary DS30453D page 41 PIC16C5X NOTES RR A H G G nL DS30453D page 42 Preliminary 2002 Microchip Technology Inc PIC16C5X 9 0 SPECIAL FEATURES OF THE CPU What sets a microcontroller apart from other proces sors are special circuits that deal with the needs of real time applications The PIC16C5X family of microcon trollers have a host of such features intended to maxi mize system reliability minimize cost through elimination of external components provide power sav ing operating modes and offer code protection These features are Oscillator Selection Section 4 0 RESET Section 5 0 Power On Reset Section 5 1 Device Reset Timer Section 5 2 Watchdog Timer WDT Section 9 2 SLEEP Section 9 3 Code protection Section 9 4 ID locations Section 9 5 The PIC16C5X Family has a Watchdog Timer which can be shut off only through configuration bit WDTE It runs off of its own RC oscillator for added reliability There is an 18 ms delay provided by the Device Reset Timer DRT intended to
5. Device Pins VO OH RAM PIC16C54 18 12 512 25 PIC16C54A 18 12 512 25 PIC16C54C 18 12 512 25 PIC16CR54A 18 12 512 25 PIC16CR54C 18 12 512 25 PIC16C55 28 20 512 24 PIC16C55A 28 20 512 24 PIC16C56 18 12 1K 25 PIC16C56A 18 12 1K 25 PIC16CR56A 18 12 1K 25 PIC16C57 28 20 2K 72 PIC16C57C 28 20 2K 72 PIC16CR57C 28 20 2K 72 PIC16C58B 18 12 2K 73 PIC16CR58B 18 12 2K 73 12 bit wide instructions 8 bit wide data path Seven or eight special function hardware registers Two level deep hardware stack Direct indirect and relative addressing modes for data and instructions Peripheral Features 8 bit real time clock counter TMRO with 8 bit programmable prescaler Power on Reset POR Device Reset Timer DRT Watchdog Timer WDT with its own on chip RC oscillator for reliable operation Programmable Code Protection Power saving SLEEP mode Selectable oscillator options RC Low cost RC oscillator XT Standard crystal resonator HS High speed crystal resonator 23 EP Power saving low freguency crystal CMOS Technology Low power high speed CMOS EPROM ROM tech nology Fully static design Wide operating voltage and temperature range EPROM Commercial Industrial 2 0V to 6 25V ROM Commercial Industrial 2 0V to 6 25V EPROM Extended 2 5V to 6 0V ROM Extended 2 5V to 6 0V Low power consumption lt 2 mA typical O 5V 4 MHz 15 A typical 3V 32 kHz lt 0 6 LA typic
6. 90 80 70 60 50 40 30 20 Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Max 40 C 4 Typ 25 C Min 85 C 00 05 10 15 20 25 3 0 VoL Volts FIGURE 16 22 PORTA B AN VoL VDD 3V Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 45 40 Max 40 C 35 30 25 z E d Typ 25 C m 20 2 15 Min 85 C 10 5 0 0 0 05 1 0 15 2 0 2 5 3 0 VoL Volts TABLE 16 2 INPUT CAPACITANCE FOR PIC16C54A C58A Typical Capacitance pF Pin 18L PDIP 18L SOIC RA port 5 0 4 3 RB port 5 0 4 3 MCLR 17 0 17 0 OSC1 4 0 3 5 OSC2 CLKOUT 4 8 3 5 TOCKI 3 2 2 8 All capacitance values are typical at 25 C A part to part variation of 25 three standard deviations should be taken into account O 2002 Microchip Technology Inc Preliminary DS30453D page 129 PIC16C5X NOTES EE H i a a A nL DS30453D page 130 Preliminary 2002 Microchip Technology Inc PIC16C5X 17 0 ELECTRICAL CHARACTERISTICS PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B Absolute Maximum Ratings Ambient temperature under bias iii 55 C to 125 C Storage temperature ici
7. A et Symbol Characteristic Min Typt Max Units 10 TosH2ckL OSC1T to CLKOUTJ 12 15 30 ns 11 TosH2ckH OSC1 to CLKOUTT2 15 30 ns 12 TckR CLKOUT rise time 5 0 15 ns 13 TckF CLKOUT fall time 2 5 0 15 ns 14 TckL2ioV CLKOUT to Port out valid 2 40 ns 15 TioV2ckH Port in valid before CLKOUT1 1 2 0 25 TCY 30 ns 16 TckH2iol Port in hold after CLKOUTT 2 0 ns 17 TosH2ioV OSC1T Q1 cycle to Port out valid 2 100 ns 18 TosH2iol OSC11 Q2 cycle to Port input invalid TBD ns 1 O in hold time 19 TioV2osH Port input valid to OSC1T TBD ns 1 O in setup time 20 TioR Port output rise time 10 25 ns 21 TioF Port output fall time 10 25 ns These parameters are characterized but not tested These parameters are design targets and are not tested No characterization data available at this time Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 Measurements are taken in RC Mode where CLKOUT output is 4 x Tosc 2 Refer to Figure 19 2 for load conditions 2002 Microchip Technology Inc Preliminary DS30453D page 161 PIC16C5X FIGURE 19 5 RESET WATCHDOG TIMER AND DEVICE RESET TIMER TIMING PIC16C5X 40 VDD E 5 s D Internal POR
8. kn Symbol Characteristic Min Typt Max Units 10 TosH2ckL OSC11 to CLKOUTU 15 30 ns 11 TosH2ckH OSC1 to CLKOUTT 15 30 ns 12 TckR CLKOUT rise time 5 0 15 ns 13 TckF CLKOUT fall time 5 0 15 ns 14 TckL2ioV CLKOUTI to Port out valid 40 ns 15 TioV2ckH Port in valid before CLKOUTT 0 25 TCY 30 ns 16 TckH2iol Port in hold after CLKOUTT 12 ns 17 TosH2ioV OSC1T Q1 cycle to Port out valid 2 100 ns 18 TosH2iol OSC11 Q2 cycle to Port input invalid TBD ns I O in hold time 19 TioV20sH Port input valid to OSC1T TBD ns 1 O in setup time 20 TioR Port output rise time 10 25 ns 21 TioF Port output fall time 10 25 ns These parameters are characterized but not tested These parameters are design targets and are not tested No characterization data available at this time Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 Measurements are taken in RC Mode where CLKOUT output is 4 x Tosc 2 Refer to Figure 17 5 for load conditions DS30453D page 142 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 17 8 RESET WATCHDOG TIMER AND DEVICE RESET TIMER TIMING PIC16C5X PIC16CR5X i 30 Internal POR i 32 32 i ja f
9. 2 Y PA lt 1 0 gt STATUS 0 CALL or Modify PCL Instruction 10 9 8 7 0 PC PCL li Instruction Word Reset to 0 2 PA lt 1 0 gt 7 STATUS O 2002 Microchip Technology Inc Preliminary DS30453D page 31 PIC16C5X 6 5 1 PAGING CONSIDERATIONS PIC16C56 CR56 PIC16C57 CR57 AND PIC16C58 CR58 If the Program Counter is pointing to the last address of a selected memory page when it increments it will cause the program to continue in the next higher page However the page preselect bits in the STATUS Reg ister will not be updated Therefore the next GOTO CALL or modify PCL instruction will send the program to the page specified by the page preselect bits PAO or PA lt 1 0 gt For example a NOP at location 1FFh page 0 incre ments the PC to 200h page 1 A GOTO xxx at 200h will return the program to address xxh on page 0 assuming that PA lt 1 0 gt are clear To prevent this the page preselect bits must be updated under program control 6 5 2 EFFECTS OF RESET The Program Counter is set upon a RESET which means that the PC addresses the last location in the last page i e the RESET vector The STATUS Register page preselect bits are cleared upon a RESET which means that page 0 is pre selected Therefore upon a RESET a GOTO instruction at the RESET vector locat
10. These parameters are characterized but not tested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard oper ating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period TCY equals four times the input oscillator time base period DS30453D page 140 Preliminary 2002 Microchip Technology Inc PIC16C5X TABLE 17 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C5X PIC16CR5X Standard Operating Conditions unless otherwise specified ds A S Ao 40 C lt TA 125 C for extended ic Symbol Characteristic Min Typt Max Units Conditions 2 Tcy Instruction Cycle Time 2 4 FOSC 3 TosL TosH Clock in OSC1 Low or High 50 ns XT oscillator Time 20 ns HS oscillator 2 0 m us LP oscillator 4 TosR TosF Clock in OSC1 Rise or Fall 25 ns XT oscillator Time 25 ns HS oscillator 50 ns ILP oscillator These parameters are characterized but not t
11. Increment TimerO Q4 TimerO Q1I Q21 Q3I Q4 011 Q21 Q3I Q4 Q11 Q21 AZI Q4 011 021 Q3I Q4 Small pulse Win NNNM X misses sampling A A 3 A A A 4 A TO X Toad T TO 2 Note 1 External clock if no prescaler selected prescaler output otherwise 2 The arrows indicate the points in time where sampling occurs 3 Delay from clock input change to TimerO increment is 3Tosc to 7Tosc duration of Q Tosc Therefore the error in measuring the interval between two edges on TimerO input 4Tosc max O 2002 Microchip Technology Inc Preliminary DS30453D page 39 PIC16C5X 8 2 Prescaler An 8 bit counter is available as a prescaler for the TimerO module or as a postscaler for the Watchdog Timer WDT respectively Section 9 2 1 For simplic ity this counter is being referred to as prescaler throughout this data sheet Note that the prescaler may be used by either the TimerO module or the WDT but not both Thus a prescaler assignment for the TimerO module means that there is no prescaler for the WDT and vice versa The PSA and PS lt 2 0 gt bits OPTION lt 3 0 gt determine prescaler assignment and prescale ratio When assigned to the TimerO module all instructions writing to the TMRO register e g CLRF 1 MOVWF 1 BSF 1 x etc will clear the prescaler When assigned to WDT a CLRWDT instruction will clear the prescaler along with the WDT The p
12. PUN MN POEM UE E MAG DRT Time out i Internal i RESET i Watchdog i i Timer i i RESET 34 ou RARE TA o Note 1 Please refer to Figure 19 2 for load conditions TABLE 19 3 RESET WATCHDOG TIMER AND DEVICE RESET TIMER PIC16C5X 40 Standard Operating Conditions unless otherwise specified AC Characteristics Operating Temperature 0 C lt TA 70 C commercial Operating Voltage VDD range is described in Section 19 1 Param No Symbol Characteristic Min Typt Max Units Conditions 30 TmeL MCLR Pulse Width low 1000 ns VDD 5 0V 31 Twdt Watchdog Timer Time out Period 9 0 18 30 ms VDD 5 0V Comm No Prescaler 32 TDRT Device Reset Timer Period 9 0 18 30 ms VDD 5 0V Comm 34 Tioz l O Hi impedance from MCLR Low 100 300 1000 ns These parameters are characterized but not tested T Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested DS30453D page 162 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 19 6 TIMERO CLOCK TIMINGS PIC16C5X 40 TOK J X z 40 z D 41 Lo L 42 ki Note Refer to Figure 19 2 for load conditions TABLE 19 4 TIMERO CLOCK REQUIREMENTS PIC16C5X 40 Standard Operating Conditions unless ot
13. iia Symbol Characteristic Min Typt Max Units Conditions 40 TtOH TOCKI High Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 41 TtOL TOCKI Low Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 42 TtOP TOCKI Period 20 or Tcv 40 ns Whichever is greater N N Prescale Value 1 2 4 256 These parameters are characterized but not tested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested 2002 Microchip Technology Inc Preliminary DS30453D page 115 PIC16C5X NOTES RR A A i nL DS30453D page 116 Preliminary O 2002 Microchip Technology Inc PIC16C5X 16 0 DEVICE CHARACTERIZATION PIC16C54A The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only The performance characteristics listed herein are not tested or guaran teed In some graphs or tables the data presented may be outside the specified operating range e g outside specified power supply range and therefore outside the warranted range Typical represents the mean of the distribution at 25 C Maximum or minimum represents mean 30 or mean 30 respectively where o is a standard deviation over the whole temperature range
14. mA Fosc 2 0 MHz VDD 3 0V LP mode Commercial 11 27 uA Fosc 32 kHz VDD 2 5V WDT disabled LP mode Industrial 14 35 A Fosc 32 kHz VDD 2 5V WDT disabled DO20 IPD Power down Current Commercial 2 5 12 uA VDD 2 5V WDT enabled Commercial 0 25 40 A VDD 2 5V WDT disabled Industrial 3 5 14 uA VDD 2 5V WDT enabled Industrial 0 3 5 0 A VDD 2 5V WDT disabled These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can
15. O 2002 Microchip Technology Inc Preliminary DS30453D page 81 PIC16C5X 13 2 DC Characteristics PIC16CR54A 04E 10E 20E Extended PIC16CR54A 04E 10E 20E Standard Operating Conditions unless otherwise specified 40 C lt TA lt 125 C for extended Extended Operating Temperature rl Symbol Characteristic Min Typt Max Units Conditions DO01 VDD Supply Voltage RC XT and LP modes 3 25 6 0 V HS mode 4 5 5 5 V D002 VDR RAM Data Retention Voltage 1 5 V Device in SLEEP mode D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 Svpp Vop Rise Rate to ensure Power 0 05 V ms See Section 5 1 for details on on Reset Power on Reset D010 IDD Supply Current RC 9 and XT modes 18 3 3 mA Fosc 4 0 MHz VDD 5 5V HS mode 4 8 10 mA Fosc 10 MHz VDD 5 5V HS mode 9 0 20 mA Fosc 16 MHz VDD 5 5V D020 IPD Power down Current 5 0 22 HA VDD 3 25V WDT enabled 0 8 18 HA VDD 3 25V WDT disabled These parameters are characterized but not tested T Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a fun
16. 2 0 8 0 LA VDD 5 5V WDT disabled Industrial 4 12 A VoD 3 0V WDT enabled Commercial 4 14 A VoD 3 0V WDT enabled Industrial 9 8 27 LA VDD 5 5V WDT enabled Commercial 12 30 LA VDD 5 5V WDT enabled Industrial Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested T Data in Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current con sumption a Thetest conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all 1 O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b Forstandby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ DS30453D page 136
17. O 2002 Microchip Technology Inc Preliminary DS30453D page 77 PIC16C5X FIGURE 12 5 TIMERO CLOCK TIMINGS PIC16C54 55 56 57 z 40 gt a 41 Ag 1 42 Note Please refer to Figure 12 1 for load conditions TABLE 12 4 TIMERO CLOCK REQUIREMENTS PIC16C54 55 56 57 Standard Operating Conditions unless otherwise specified Operating Temperature 0 C TA 70 C for commercial 40 C lt TA 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics Ed Symbol Characteristic Min Typt Max Units Conditions 40 TtOH TOCKI High Pulse Width No Prescaler 0 5 Tcv 20 ns With Prescaler 10 ns 41 TtOL TOCKI Low Pulse Width No Prescaler 0 5 Tcv 20 ns With Prescaler 10 ns 42 TtOP TOCKI Period 20 or Tcy 40 ns Whichever is greater N N Prescale Value 1 2 4 256 These parameters are characterized but not tested Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested DS30453D page 78 Preliminary O 2002 Microchip Technology Inc PIC16C5X 13 0 ELECTRICAL CHARACTERISTICS PIC16CR54A Absolute Maximum Ratings Ambient Temperature under D AS sen 55 C to 125 C Storage Temperatute a ete is 65 C to 150 C Voltage ori Vpb withirespect
18. 1 gt TOS k gt PC lt 7 0 gt STATUS lt 6 5 gt PC lt 10 9 gt 0 gt PC lt 8 gt Status Affected None Encoding 1001 kkkk kkkk Description Subroutine call First return address PC 1 is pushed onto the stack The eight bit immediate address is loaded into PC bits lt 7 0 gt The upper bits PC lt 10 9 gt are loaded from STATUS lt 6 5 gt PC lt 8 gt is cleared CALL is a two cycle instruction Words 1 Cycles 2 Example HERE CALL THERE Before Instruction PC address HERE After Instruction PC address THERE TOS address HERE 1 CLRF Clear f Syntax label CLRF f Operands 0 lt f lt 31 Operation 00h gt f 1 gt Z Status Affected Z Encoding 0000 011 ffff Description The contents of register T are cleared and the Z bit is set Words 1 Cycles 1 Example CLRF FLAG REG Before Instruction FLAG REG Ox5A After Instruction FLAG REG 0x00 Z 1 CLRW Clear W Syntax label CLRW Operands None Operation 00h gt W 1 Z Status Affected Z Encoding 0000 0100 0000 Description The W register is cleared Zero bit Z is set Words 1 Cycles 1 Example CLRW Before Instruction W Ox5A After Instruction W 0x00 Z 1 CLRWDT Clear Watchdog Timer Syntax label CLRWDT Operands None Operation 00h gt WDT 0 gt WDT prescaler if assigned 1 TO 1 gt PD S
19. 63 PICDEM 3 Low Cost PIC16CXXX Demonstration Board 64 PICSTART Plus Entry Level Development Programmer 63 Pin Configurations anna ranu 2 Pinout Description PIC16C54 PIC16CR54 PIC16C56 PIC16CR56 PIC16C58 PIC16CRBS8 coccccccccccccccccconcccnnccnoo 11 Pinout Description PIC16C55 PIC16C57 PIC16CR57 12 PORTA s des AAA deu 35 Val e oh reset ced e An tail tee 20 PORTB ee E dioi ss stetit e oneri 35 Value on reset 20 PORTO 35 Value on reset 20 Power Down Mode 47 Power On Reset POR Register values on 20 Prescaler tee ia 40 PRO MATE II Universal Device Programmer 63 Program Counter 31 Program Memory Organization 25 Program Verification Code Protection 47 Q OOO iss nee oboe trie te inte uh RIS REA 13 Quick Turnaround Production QTP Devices 7 R RG Oscillatori 22 otto asta Read Only Memory ROM Devices Read Modify Write ss Register File Map PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIG16CR5O inde tute nene d e way 26 PIC16C57 CR57 27 PIG1I6G58 CR5 8 ce e tides 27 Registers Special Function miser 28 Value on reset 20 Software Simulator MPLAB SIM Special Features of the CPU Special Function Registers eseseeeseereesreeeernerrerrerrnereeree STATUS Register
20. V loH 1 0 mA VDD 4 5V RC mode only These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 Forthe RC mode the OSC1 CLKIN pin is a Schmitt Trigger input It is not recommended that the PIC16C5X be driven with external clock in RC mode DS30453D page 138 Preliminary O 2002 Microchip Technology Inc PIC16C5X 17 4 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created with one of the following formats 1 TppS2ppS 2 TppS T F Frequency T Time Lowercase letters pp and their meanings pp P 2 to mc MCLR ck CLKOUT osc oscillator cy cycle time os OSC1 drt device reset timer t0 TOCKI io l O port wdt watchdog timer Uppercase letters and their meanings S F Fall P Period H High R Rise Invalid Hi impedance V Valid L Low Z Hi impedance FIGURE 17 5 LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B 04 20 Pin X CL 50 pF for
21. e D Q Data WR Latch pla Port 1b CK a D E O A ol RESET RD Port Note 1 I O pins have protection diodes to VDD and Vss TABLE 7 1 SUMMARY OF PORT REGISTERS Value on _Value on Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Power On MCLR and Reset WDT Reset N A TRIS 1 0 Control Registers TRISA TRISB TRISC 1111 1111 1111 1111 05h PORTA RA3 RA2 RA1 RAO XXXX uuuu 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RBO XXXX xxxx uuuu uuuu 07h PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RCO xxxx xxxx uuuu uuuu Legend x unknown u unchanged unimplemented read as 0 Shaded cells unimplemented read as 0 2002 Microchip Technology Inc Preliminary DS30453D page 35 PIC16C5X 7 6 O Programming Considerations 7 6 1 BI DIRECTIONAL I O PORTS Some instructions operate internally as read followed by write operations The BCF and BSF instructions for example read the entire port into the CPU execute the bit operation and re write the result Caution must be used when these instructions are applied to a port where one or more pins are used as input outputs For example a BSF operation on bit5 of PORTB will cause all eight bits of PORTB to be read into the CPU bit5 to be set and the PORTB value to be written to the output
22. D005 PICLCR54A 10 20 NA Fosc 32 kHz VDD 2 0V 70 HA Fosc 32 kHz VDD 6 0V D005A RC and XT modes PIC16CR54A 2 0 3 6 mA Fosc 4 0 MHz VDD 6 0V 0 8 1 8 mA Fosc 4 0 MHz VDD 3 0V 90 350 uA Fosc 200 kHz VDD 2 5V HS mode 4 8 10 mA Fosc 10 MHz VDD 5 5V 9 0 20 mA Fosc 20 MHz VDD 5 5V Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested Datain Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the fo
23. MICROCHIP PIC16C5X Data Sheet EPROM ROM Based 8 bit CMOS Microcontroller Series PR O RR D ES O 2002 Microchip Technology Inc Preliminary DS30453D Note the following details of the code protection feature on PICmicro MCUs The PICmicro family meets the specifications contained in the Microchip Data Sheet Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today when used in the intended manner and under normal conditions There are dishonest and possibly illegal methods used to breach the code protection feature All of these methods to our know edge require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet The person doing so may be engaged in theft of intellectual property Microchip is willing to work with the customer who is concerned about the integrity of their code Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code Code protection does not mean that we are guaranteeing the product as unbreakable Code protection is constantly evolving We at Microchip are committed to continuously improving the code protection features of our product If you have any further questions about this matter please contact the local sales office nearest to you Information contained in this publication regarding device applications and the like is
24. PIC16C5X 12 2 DC Characteristics PIC16C54 55 56 57 RCI XTI 101 HSI LPI Industrial PIC16C54 55 56 57 RCI XTI 101 HSI LPI Standard Operating Conditions unless otherwise specified Industrial Operating Temperature 40 C lt TA lt 85 C for industrial Param ae A v No Symbol Characteristic Device Min Typt Max Units Conditions D001 VDD Supply Voltage PIC16C5X RCI 3 0 6 25 V PIC16C5X XTI 3 0 6 25 V PIC16C5X 101 4 5 5 5 V PIC16C5X HSI 4 5 5 5 V PIC16C5X LPI 2 5 6 25 V D002 VDR RAM Data Retention Voltage 1 5 V Device in SLEEP mode DO03 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 Svpp Vpp Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset D010 IDD Supply Current PIC16C5X RCI 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC16C5X XTI 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC16C5X 101 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HSI 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HSI 9 0 20 mA Fosc 20 MHz VDD 5 5V PIC16C5X LPI 15 40 HA FOSC 32 kHz VDD 3 0V WDT disabled DO20 IPD Power down Current 4 0 14 uA VDD 3 0V WDT enabled 0 6 12 HA VDD 3 0V WDT disabled Note 1 These parameters are characterized but not tested Data in Typ column i
25. Preliminary O 2002 Microchip Technology Inc PIC16C5X 17 2 DC Characteristics PIC16C54C C55A C56A C57C C58B 04E 20E Extended PIC16CR54C CR56A CR57C CR58B 04E 20E Extended PIC16C54C C55A C56A C57C C58B 04E 20E Standard Operating Conditions unless otherwise specified PIC16CR54C CR56A CR57C CR58B 04E 20E Operating Temperature 40 C lt TA lt 125 C for extended Extended Pond Symbol Characteristic Min Typt Max Units Conditions D001 VDD Supply Voltage RC XT LP and HS mode 3 0 5 5 V fromO 10 MHz 45 5 5 V from 10 20 MHz D002 VDR RAM Data Retention Voltage 1 5 V Device in SLEEP mode D003 VPOR VDD start voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvpD VoD rise rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset D010 IDD Supply Current XT and RC modes 18 3 3 mA Fosc 4 0 MHz VDD 5 5V HS mode 9 0 20 mA Fosc 20 MHz VDD 5 5V D020 IPD Power down Current 03 17 uA Vop 3 0V WDT disabled 10 50 A VDD 4 5V WDT disabled 12 60 A VDD 5 5V WDT disabled 48 31 yA VDD 3 0V WDT enabled 18 68 LA VDD 4 5V WDT enabled 26 90 LA VDD 5 5V WDT enabled These parameters are characterized but not tested Data in Typ column is a
26. The MPASM assembler features include Integration into MPLAB IDE projects User defined macros to streamline assembly code Conditional assembly for multi purpose source files Directives that allow complete control over the assembly process 11 3 MPLAB C17 and MPLAB C18 C Compilers The MPLAB C17 and MPLAB C18 Code Development Systems are complete ANSI C compilers for Microchips PIC17CXXX and PIC18CXXX family of microcontrollers respectively These compilers provide powerful integration capabilities and ease of use not found with other compilers For easier source level debugging the compilers pro vide symbol information that is compatible with the MPLAB IDE memory display O 2002 Microchip Technology Inc Preliminary DS30453D page 61 PIC16C5X 11 4 MPLINK Object Linker MPLIB Object Librarian The MPLINK object linker combines relocatable objects created by the MPASM assembler and the MPLAB C17 and MPLAB C18 C compilers It can also link relocatable objects from pre compiled libraries using directives from a linker script The MPLIB object librarian is a librarian for pre compiled code to be used with the MPLINK object linker When a routine from a library is called from another source file only the modules that contain that routine will be linked in with the application This allows large libraries to be used efficiently in many different applications The MPLIB object librarian m
27. Y 10H Y VDD VOH x lOH Z VOL x IOL NOTICE Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device atthose or any other conditions above those indi cated in the operation listings of this specification is not implied Exposure to maximum rating conditions for extended periods may affect device reliability O 2002 Microchip Technology Inc Preliminary DS30453D page 103 PIC16C5X 15 1 DC Characteristics PIC16C54A 04 10 20 Commercial PIC16C54A 04I 101 201 Industrial PIC16LC54A 04 Commercial PIC16LC54A 041 Industrial PIC16LC54A 04 Standard Operating Conditions unless otherwise specified PIC16LC54A 04I Operating Temperature 0 C x TA lt 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial PIC16C54A 04 10 20 Standard Operating Conditions unless otherwise specified PIC16C54A 041 101 201 Operating Temperature 0 C lt TA 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial Param a A su No Symbol Characteristic Device Min Typt Max Units Conditions VDD Supply Voltage D001 PIC16LC54A 3 0 6 25 V XTand RC modes 2 5 6 25 V LP mode D001A PIC16C54A 3 0 6 25 V RO XT and LP modes 4 5 5 5 V HS mode D002 Vor RAM Data Retention 15 V
28. a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ O 2002 Microchip Technology Inc Preliminary DS30453D page 107 PIC16C5X 15 3 DC Characteristics PIC16LV54A 02 Commercial PIC16LV54A 021 Industrial PIC16LV54A 02 Standard Operating Conditions unless otherwise specified PIC16LV54A 021 Operating Temperature 0 C lt TA 707C for commercial Commercial Industrial 20 C lt TA 85 C for industrial ER Symbol Characteristic Min Typt Max Units Conditions D001 Supply Voltage VDD RC and XT modes 2 0 3 8 V D002 VDR RAM Data Retention 15 V Device in SLEEP mode Voltage D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 Svoo Vpp Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset D010 IDD Supply Current RC and XT modes 05
29. gt RB4 RA2 e Js DO 211 lt gt RC3 RA3 sg S 201 RC2 RBO lt gt 10 19 gt RCI RB1 1 181 RCO RB2 4 112 171 gt RB7 RB3 13 161 RB6 RB4 lt 14 15 RB5 SSOP SSOP c A s mec E EDT Eum RAS lt gt 12 190 lt gt RAO E 7 VpD 13 26 1 OSC2 CLKOUT TOK a uuu 19 OSCHOLKIN VEU acri pe IT MOLR VPP 14 o 00 00 0 170 gt OSC2 CLKOUT RAO lt gt 15 3 3 3 240 gt RC6 Vss H5 000000 1611 VDD RA lt gt 16 ho ares 23101 gt RC5 Vss 6 6060000 15 1 VoD RA2 lt gt O7 8 2 3 2211 RC4 RBO gt 7 gagn 1411 RB7 Per quat 8 ao 2 RC3 RBI lt 8 9 9 131 lt gt RBG Rii Y foa ACI RB2 lt 9 120 RB5 RB2 lt gt 111 181 RCO RB3 lt 110 110 lt RB4 RB3 lt gt 012 171 lt gt RB7 RB4 lt 113 16 1 lt RB6 VSS 114 151 RB5 Device Differences Oscillator Process TATO Device ue Selection Oscillator Technology E ER E 9 Program Microns a PIC16C54 2 5 6 25 Factory See Note 1 1 2 PIC16CR54A No PIC16C54A 2 0 6 25 User See Note 1 0 9 No PIC16C54C 2 5 5 5 User See Note 1 0 7 PIC16CR54C Yes PIC16C55 2 5 6 25 Factory See Note 1 1 7 No PIC16C55A 2 5 5 5 User See Note 1 0 7 Yes PIC16C56 2 5 6 25 Factory See Note 1 1 7 No PIC16C56A 2 5 5 5 User See Note 1 0 7 PIC16CR56A Yes PIC16C57 2 5 6 25 Factory See Note 1 1 2 No PIC16C57C 2 5 5 5 User See Note 1 0 7 PIC16CR57C Yes PIC1
30. 064 068 072 1 63 1 73 1 83 Standoff 8 A1 002 006 010 0 05 0 15 0 25 Overall Width E 299 309 322 7 59 7 85 8 18 Molded Package Width E1 201 207 212 5 11 5 25 5 38 Overall Length D 278 284 289 7 06 7 20 7 34 Foot Length L 022 030 037 0 56 0 75 0 94 Lead Thickness c 004 007 010 0 10 0 18 0 25 Foot Angle 9 0 4 8 0 00 101 60 203 20 Lead Width B 010 013 015 0 25 0 32 0 38 Mold Draft Angle Top u 0 5 10 0 5 10 Mold Draft Angle Bottom B 0 5 10 0 5 10 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 0 254mm per side JEDEC Equivalent MO 150 Drawing No C04 072 DS30453D page 178 Preliminary 2002 Microchip Technology Inc PIC16C5X 28 Lead Plastic Shrink Small Outline SS 209 mil 5 30 mm SSOP i n J D OF n 1 Y a a c Ly 1 i A1 E L B 2m Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 28 28
31. 40 C to 125 C Minimum mean 3s 40 C to 125 C 425 Typ 3 0 3 5 4 0 4 5 VDD Volts 5 0 5 5 6 0 FIGURE 20 5 VTH INPUT THRESHOLD TRIP POINT VOLTAGE OF OSC1 INPUT HS MODE vs VDD 3 4 3 2 3 0 2 8 2 6 2 4 2 2 2 0 1 8 1 6 1 4 VTH Volts 1 2 1 0 Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C e Se 2 5 3 0 3 5 4 0 4 5 VDD Volts 5 0 5 5 6 0 2002 Microchip Technology Inc Preliminary DS30453D page 167 PIC16C5X FIGURE 20 6 TYPICAL IDD vs VDD 40 MHZ WDT DISABLED HS MODE 70 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 12 11 10 9 0 T E 8 8 0 7 0 6 0 5 0 4 0 3 5 4 0 4 5 5 0 5 5 6 0 6 5 VDD Volts DS30453D page 168 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 20 7 WDT TIMER TIME OUT FIGURE 20 8 lOH vs VOH VDD 5 V PERIOD vs Vpp Typical statistical mean 25 C NE us Maximum mean 3s 40 C to 125 C Typical statistical me
32. 600 625 15 11 15 24 15 88 Molded Package Width El 505 545 560 12 83 13 84 14 22 Overall Length D 1 395 1 430 1 465 35 43 36 32 37 21 Tip to Seating Plane 120 130 135 3 05 3 30 3 43 Lead Thickness c 008 012 015 0 20 0 29 0 38 Upper Lead Width B1 030 050 070 0 76 1 27 1 78 Lower Lead Width B 014 018 022 0 36 0 46 0 56 Overall Row Spacing 8 eB 620 650 680 15 75 16 51 17 27 Mold Draft Angle Top ol 5 10 15 5 10 15 Mold Draft Angle Bottom B 5 10 15 5 10 15 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions 010 0 254mm per side JEDEC Equivalent MO 011 Drawing No C04 079 Mold flash or protrusions shall not exceed O 2002 Microchip Technology Inc Preliminary DS30453D page 175 PIC16C5X 18 Lead Plastic Small Outline SO Wide 300 mil SOIC Lar E too TP pe Ed 1 17 D Y B n O Y h 4 459 c Y f e ne fr ales E d B L A1 Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 18 18 Pitch p 050 1 27 Overall Height A 093 099 104 2 36 2 50 2 64 Molded Packa
33. C to 125 C 6 R 3 3K 5 R 5K 4 3 R 10K 2 1 R 100K 0 25 3 0 3 5 4 0 45 5 0 5 5 6 0 VDD Volts FIGURE 18 3 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 100 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 1 8 R 3 3K 1 6 1 4 pz ij R 5K N I o 1 0 a LL R 10K 0 6 0 2 R 100K 0 2 5 3 0 3 5 4 0 VDD Volts 5 5 0 5 5 6 0 DS30453D page 146 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 18 4 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 300 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 700 R 3 3K 600 e 500 R 5K N I m 9 400 O LL 300 R 10K 200 100 R 100K 0 2 5 8 0 8 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 18 5 TYPICAL IPD vs VDD WATCHDOG DISABLED 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 25 20 15 T Q e 10 5 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 147 PIC16C5X FIGURE 18 6 TYPICAL IPD vs VDD WATCHDOG ENABLED 25 C Typical statistical mean 25 C Maximum
34. Device in SLEEP mode Voltage D003 VPOR VDD Start Voltage to Vss V See Section 5 1 for details on ensure Power on Reset Power on Reset D004 Svpp Vpp Rise Rate to ensure 0 05 Vms See Section 5 1 for details on Power on Reset Power on Reset IDD Supply Current D005 PIC16LC5X 05 2 5 mA Fosc 4 0 MHz VDD 5 5V RC and XT modes 11 27 uA FOSC 32 kHz VDD 2 5V WDT disabled LP mode Commercial 11 35 uA Fosc 32 kHz VDD 2 5V WDT disabled LP mode Industrial D005A PIC16C5X 18 24 mA Fosc 4 0 MHz VDD 5 5V RC and XT modes 2 4 80 mA Fosc 10 MHz VDD 5 5V HS mode 4 5 16 mA Fosc 20 MHz VDD 5 5V HS mode 14 29 uA Fosc 32 kHz VDD 3 0V WDT disabled LP mode Commercial 17 37 uA Fosc 32 kHz VDD 3 0V WDT disabled LP mode Industrial Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested Data in Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temp
35. J clock 04 X i PC PC PC 1 PC 2 OSC2 CLKOUT 1 0000 RC mode Fetch INST PC Execute INST PC 1 Fetch INST PO 1 Execute INST PC Fetch INST PC 2 Execute INST PC 1 EXAMPLE 3 1 INSTRUCTION PIPELINE FLOW 1 MOVLW H 55 Fetch 1 Execute 1 2 MOVWF PORTB Fetch 2 Execute 2 3 CALL SUB 1 Fetch 3 Execute 3 4 BSF PORTA BIT3 Fetch 4 Flush Fetch SUB_1 Execute SUB_1 All instructions are single cycle except for any program branches These take two cycles since the fetch instruction is flushed from the pipeline while the new instruction is being fetched and then executed O 2002 Microchip Technology Inc Preliminary DS30453D page 13 PIC16C5X NOTES A nn i i nL DS30453D page 14 Preliminary O 2002 Microchip Technology Inc PIC16C5X 4 0 OSCILLATOR CONFIGURATIONS 4 1 Oscillator Types PIC16C5Xs can be operated in four different oscillator modes The user can program two configuration bits FOSC1 FOSCO to select one of these four modes 1 LP Low Power Crystal 2 XT Crystal Resonator 3 HS High Speed Crystal Resonator 4 RC Resistor Capacitor Note Not all oscillator selections available for all parts See Section 9 1 4 2 Crystal Oscillator Ceramic Resonators In XT LP or HS modes a crystal or ceramic resonator is connected to the OSC1 CLKIN and OSC2 CLKOUT pins to establish oscillation Figure 4 1 The PIC16C5X oscillator de
36. None 0110 bbbf ffff If bit bin register is O then the next instruction is skipped If bit b is O then the next instruc tion fetched during the current instruction execution is discarded and a NOP is executed instead making this a 2 cycle instruction HERE BTFSC FLAG 1 FALSE GOTO PROCESS_CODE TRUE e Before Instruction PC address HERE After Instruction if FLAG lt 1 gt 0 PC address TRUE if FLAG lt 1 gt 1 PC address FALSE BTFSS Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Bit Test f Skip if Set label BTFSS fb O lt f lt 31 0 lt b lt 7 skip if lt b gt 1 None 0111 bbbf ffff If bit b in register f is 1 then the next instruction is skipped tion fetched during the current instruction execution is discarded and a NOP is executed instead making this a 2 cycle instruction HERE BTFSS FLAG 1 FALSE GOTO PROCESS_CODE TRUE Before Instruction PC address HERE After Instruction If FLAG lt 1 gt 0 PC address FALSE if FLAG lt 1 gt 1 PC address TRUE DS30453D page 52 Preliminary 2002 Microchip Technology Inc PIC16C5X CALL Subroutine Call Syntax label CALL k Operands 0 lt k lt 255 Operation PC
37. Pitch p 026 0 65 Overall Height A 068 073 078 1 73 1 85 1 98 Molded Package Thickness A2 064 068 072 1 63 1 73 1 83 Standoff 8 Al 002 006 010 0 05 0 15 0 25 Overall Width E 299 309 319 7 59 7 85 8 10 Molded Package Width El 201 207 212 541 5 25 5 38 Overall Length D 396 402 407 10 06 10 20 10 34 Foot Length L 022 030 037 0 56 0 75 0 94 Lead Thickness c 004 007 010 0 10 0 18 0 25 Foot Angle gt 0 4 8 0 00 101 60 203 20 Lead Width B 010 013 015 0 25 0 32 0 38 Mold Draft Angle Top 0 5 10 0 5 10 Mold Draft Angle Bottom B 0 5 10 0 5 10 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 0 254mm per side JEDEC Equivalent MS 150 Drawing No C04 073 2002 Microchip Technology Inc Preliminary DS30453D page 179 PIC16C5X 18 Lead Ceramic Dual In line with Window JW 300 mil CERDIP I E 1 gl Eg i ati E a Ln 1 7 E M d n D 1 E a E ati n A FS Pt Wi E E mn ale silu bt B p Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 18 18 Pitch p 100 2 54 Top to Seating Plan
38. Z 0 DS30453D page 56 Preliminary 2002 Microchip Technology Inc PIC16C5X MOVWF Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Move W to f label MOVWF f 0 lt f lt 31 W f None 0000 001f ffff Move data from the W register to register f 1 1 MOVWF TEMP REG Before Instruction TEMP REG OxFF W Ox4F After Instruction TEMP REG 0x4F W NOP Syntax Operands Operation Status Affected Encoding Description Words Cycles Example 0x4F No Operation label NOP None No operation None 0000 0000 0000 No operation NOP OPTION Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Load OPTION Register label OPTION None W gt OPTION None 0000 0000 0010 The content of the W register is loaded into the OPTION register 1 1 OPTION Before Instruction W 0x07 After Instruction OPTION RETLW Syntax Operands Operation Status Affected Encoding Description Words Cycles Example TABLE 0x07 Return with Literal in W label RETLW k 0 lt k lt 255 k gt W TOS 5 PC None 1000 kkkk kkkk The W register is loaded with the eight bit literal k The program counter is loaded from the top of the stack the return address This is a two cycl
39. a brown out To RESET PIC16C5X devices when a brown out occurs external brown out protection circuits may be built as shown in Figure 5 6 Figure 5 7 and Figure 5 8 FIGURE 5 6 EXTERNAL BROWN OUT PROTECTION CIRCUIT 1 VDD VDD 395 ai 10K MCLR X 40K PIC16C5X This circuit will activate RESET when VDD goes below Vz 0 7V where Vz Zener voltage FIGURE 5 7 EXTERNAL BROWN OUT PROTECTION CIRCUIT 2 VDD VDD ais Q1 rf MCLR R2 40K PIC16C5X This brown out circuit is less expensive although less accurate Transistor Q1 turns off when VDD is below a certain level such that R1 ENG 7 VbD SIENE FIGURE 5 8 EXTERNAL BROWN OUT PROTECTION CIRCUIT 3 VDD VDD vo aL MCP809 Alt ves RSI MCLR PIC16C5X This brown out protection circuit employs Micro chip Technologys MCP809 microcontroller supervisor The MCP8XX and MCP1XX families of supervisors provide push pull and open collec tor outputs with both active high and active low RESET pins There are 7 different trip point selec tions to accommodate 5V and 3V systems 2002 Microchip Technology Inc Preliminary DS30453D page 23 PIC16C5X NOTES RR n in i a D nt DS30453D page 24 Preliminary 2002 Microchip Technology Inc PIC16C5X 6 0 MEMORY ORGANIZATION PIC16C5X m
40. a1 az as as a1 a2 AZ a4 ar az az a4 a1 az az 34 Program 1 1 1 1 1 1 1 1 1 Counter PCI Y PC X PCH Y PC 2 Y PC 3 Y PC PC 5 Y PC 6 __ Instruction MOVWF TMRO MOVF TMRO W MOVF TMRO W MOVF TMRO W MOVF TMRO W MOVF TMRO W pende i i 1 i i i i i i Timero TO o TO vam NTO CON Instruction 1 i i i i i Execute i Write TMRO ReadTMRO ReadTMRO ReadTMRO ReadTMRO Read TMRO executed reads NTO reads NTO reads NTO reads NTO reads NTO 1 TABLE 8 1 REGISTERS ASSOCIATED WITH TIMERO Value on Value on Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Power on MCLR and Reset WDT Reset 01h TMRO Timero0 8 bit real time clock counter XXXX XXXX uuuu uuuu N A OPTION TOCS TOSE PSA PS2 PS1 PSO 11 1111 11 1111 Legend x unknown u unchanged unimplemented Shaded cells not used by TimerO DS30453D page 38 Preliminary O 2002 Microchip Technology Inc PIC16C5X 8 1 Using TimerO with an External Clock When an external clock input is used for TimerO it must meet certain requirements The external clock require ment is due to internal phase clock TOSC synchroniza tion Also there is a delay in the actual incrementing of TimerO after synchronization 8 1 1 EXTERNAL CLOCK SYNCHRONIZATION When no prescaler is used the external clock input is the same as the prescaler output The synchronization
41. eene Value on f6S9U s i id T Timer0 Switching Prescaler Assignment 40 TimerO TMRO Module da TMRO register Value on reset 20 TMRO with External Clock 39 Timing Diagrams and Specifications PIC16C54 55 56 57 PIGIG C54 A oett PIC16C54C CR54C C55A C56A CR56A C57C CR57C G58B GRB8B cintia tee viele 140 PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B 40 0 err 160 PIC16CR54A Timing Parameter Symbology and Load Conditions PIC16C54 55 56 57 csse 73 PIC16C54A nene Etro rH ER kienu 110 PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CRBBB rennur 139 PIC16C54C CR54C C55A C56A CRS6A C57C CR57C TRIS REGIS SISI k dados 35 Value On reset a ee dee trece u 20 DS30453D page 186 Preliminary O 2002 Microchip Technology Inc PIC16C5X U UV Erasable Devices rns tui 7 W W Register Value ONTO O nnn 20 Programming Considerations Register values on reset WWW On Line Support X RORLM ned ndo rdv endl 60 KORWE eroana anarie a ERA 60 Z ZOO Z biten nnna its nes 9 29 2002 Microchip Technology Inc Preliminary DS30453D page 187 PIC16C5X NOTES EE i i a iat DS30453D page 188 Preliminary 2002 Microchip Technology Inc PIC16C5X ON LINE SUPPORT Microchip provides on line support on the Microchip World Wide Web WWW site The web site is used by Microchip as a means to mak
42. mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 25 20 15 T a a 5 0 let 0 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 18 7 TYPICAL IPD vs VDD WATCHDOG ENABLED 40 C 85 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 35 30 25 20 T a 2 15 10 5 0 A0 C ee 0 485 C 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts DS30453D page 148 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 18 8 VTH INPUT THRESHOLD TRIP POINT VOLTAGE OF I O PINS vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 2 0 1 8 1 6 en 2 C gs m O E E 1 2 gt 1 0 0 8 0 6 25 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 18 9 VIH VIL OF MCLR TOCKI AND OSC1 IN RC MODE vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 4 5 4 0 3 5 ox 3 0 2 S 25 Z ES I gt 1 5 vin max 40 C to 85 1 0 Vit typ 25 C 0 5 VIL min 40 C to 485 C 0 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts Note These input pins have Sch
43. namely Q1 Q2 Q3 and Q4 Internally the pro gram counter is incremented every Q1 and the instruc tion is fetched from program memory and latched into the instruction register in Q4 lt is decoded and exe cuted during the following Q1 through Q4 The clocks and instruction execution flow are shown in Figure 3 2 and Example 3 1 FIGURE 3 2 CLOCK INSTRUCTION CYCLE 3 2 An Instruction Cycle consists of four Q cycles Q1 G2 Q3 and Q4 The instruction fetch and execute are pipelined such that fetch takes one instruction cycle while decode and execute takes another instruction cycle However due to the pipelining each instruction effectively executes in one cycle If an instruction causes the program counter to change e g GOTO then two cycles are required to complete the instruction Example 3 1 Instruction Flow Pipelining A fetch cycle begins with the program counter PC incrementing in Q1 In the execution cycle the fetched instruction is latched into the Instruction Register in cycle Q1 This instruc tion is then decoded and executed during the Q2 Q3 and Q4 cycles Data memory is read during Q2 oper and read and written during Q4 destination write Qi 92 Q3 Q4 Q1 Q2 93 Q4 Qi 92 Q3 Q4 OSC1 N NV N VI Y A Wo Nis TEN N ow A N Qiy J 3 EN Q2 A informal phase Q3 A
44. of Microchip Technology Incorporated in the U S A All other trademarks mentioned herein are property of their respective companies O 2002 Microchip Technology Incorporated Printed in the U S A All Rights Reserved gt Printed on recycled paper Microchip received QS 9000 quality system certification for its worldwide headquarters design and wafer fabrication facilities in Chandler and Tempe Arizona in July 1999 The Company s quality system processes and procedures are QS 9000 compliant for its PICmicro 8 bit MCUs KEELOQ code hopping devices Serial EEPROMs and microperipheral products In addition Microchip s quality system for the design and manufacture of development systems is ISO 9001 certified DS30453D page ii Preliminary O 2002 Microchip Technology Inc MICROCHIP PIC16C5X EPROM ROM Based 8 bit CMOS Microcontroller Series Devices Included in this Data Sheet PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56 PIC16C57 PIC16CR57 PIC16C58 PIC16CR58 Note PIC16C5X refers to all revisions of the part i e PIC16C54 refers to PIC16C54 PIC16C54A and PIC16C54C unless specifically called out otherwise High Performance RISC CPU Only 33 single word instructions to learn All instructions are single cycle except for pro gram branches which are two cycle Operating speed DC 40 MHz clock input DC 100 ns instruction cycle
45. of TOCKI with the internal phase clocks is accom plished by sampling the prescaler output on the Q2 and Q4 cycles of the internal phase clocks Figure 8 5 Therefore it is necessary for TOCKI to be high for at least 2Tosc and a small RC delay of 20 ns and low for at least 2Tosc and a small RC delay of 20 ns Refer to the electrical specification of the desired device FIGURE 8 5 When a prescaler is used the external clock input is divided by the asynchronous ripple counter type pres caler so that the prescaler output is symmetrical For the external clock to meet the sampling requirement the ripple counter must be taken into account There fore it is necessary for TOCKI to have a period of at least 4Tosc and a small RC delay of 40 ns divided by the prescaler value The only requirement on TOCKI high and low time is that they do not violate the mini mum pulse width requirement of 10 ns Refer to param eters 40 41 and 42 in the electrical specification of the desired device 8 1 2 TIMERO INCREMENT DELAY Since the prescaler output is synchronized with the internal clocks there is a small delay from the time the external clock edge occurs to the time the TimerO mod ule is actually incremented Figure 8 5 shows the delay from the external clock edge to the timer incrementing TIMERO TIMING WITH EXTERNAL CLOCK External Clock Input or Prescaler Output 1 External Clock Prescaler 2 Output After Sampling 7
46. this example the chip will RESET properly if and only if Vi gt VDD min DS30453D page 22 Preliminary O 2002 Microchip Technology Inc PIC16C5X 5 2 Device Reset Timer DRT The Device Reset Timer DRT provides an 18 ms nominal time out on RESET regardless of Oscillator mode used The DRT operates on an internal RC oscil lator The processor is kept in RESET as long as the DRT is active The DRT delay allows VDD to rise above VDD min and for the oscillator to stabilize Oscillator circuits based on crystals or ceramic resona tors require a certain time after power up to establish a stable oscillation The on chip DRT keeps the device in a RESET condition for approximately 18 ms after the voltage on the MCLR VPP pin has reached a logic high VH level Thus external RC networks connected to the MCLR input are not required in most cases allow ing for savings in cost sensitive and or space restricted applications The Device Reset time delay will vary from chip to chip due to VDD temperature and process variation See AC parameters for details The DRT will also be triggered upon a Watchdog Timer time out This is particularly important for applications using the WDT to wake the PIC16C5X from SLEEP mode automatically 5 3 Reset on Brown Out A brown out is a condition where device power VDD dips below its minimum value but not to zero and then recovers The device should be RESET in the event of
47. 0 25 3 0 VOH Volts VOH Volts DS30453D page 100 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 14 21 PORTA B AND C lor vs FIGURE 14 22 PORTA B AND C lor vs Vor VDD 3V VOL Vpp 5V Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 45 90 40 Max 40 C 80 Max 40 C 35 70 30 60 Typ 25 C 25 50 C Typ 25 20 40 umm Min 85 C 15 30 loL mA loL mA Min 85 C 10 20 J 5 10 0 0 00 05 10 15 20 25 3 0 00 05 10 15 20 25 3 0 VoL Volts VOL Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 101 PIC16C5X TABLE 14 2 INPUT CAPACITANCE FOR PIC16C54 56 Typical Capacitance pF Pin 18L PDIP 18L SOIC RA port 5 0 4 3 RB port 5 0 4 3 MCLR 17 0 17 0 OSC1 4 0 3 5 OSC2 CLKOUT 4 3 3 5 TOCKI 3 2 2 8 All capacitance values are typical at 25 C A part to part variation of 25 three standard deviations should be taken into account TABLE 14 3 INPUT CAPACITANCE FOR PIC16C55 57 Typical Capacitance pF an 28L PDIP 28L SOIC 600 mil RA port 5 2 4 8 RB
48. 0V WDT disabled 5 0 45 HA VDD 6 0V WDT enabled D007A PIC16CR54A Industrial 1 0 8 0 HA VDD 2 5V WDT disabled 2 0 10 HA VDD 4 0V WDT disabled 3 0 20 HA VDD 4 0V WDT enabled 3 0 18 HA VDD 6 0V WDT disabled 5 0 45 HA VDD 6 0V WDT enabled Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested T Datain Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ
49. 2 24 2 31 2 39 Standoff 8 A1 004 008 012 0 10 0 20 0 30 Overall Width E 394 407 420 10 01 10 34 10 67 Molded Package Width El 288 295 299 7 32 7 49 7 59 Overall Length D 695 704 712 17 65 17 87 18 08 Chamfer Distance h 010 020 029 0 25 0 50 0 74 Foot Length L 016 033 050 0 41 0 84 1 27 Foot Angle Top 0 0 4 8 0 4 8 Lead Thickness c 009 011 013 0 23 0 28 0 33 Lead Width B 014 017 020 0 36 0 42 0 51 Mold Draft Angle Top a 0 12 15 0 12 15 Mold Draft Angle Bottom B 0 12 15 0 12 15 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 0 254mm per side JEDEC Equivalent MS 013 Drawing No C04 052 O 2002 Microchip Technology Inc Preliminary DS30453D page 177 PIC16C5X 20 Lead Plastic Shrink Small Outline SS 209 mil 5 30 mm SSOP El Fo D B by V y T L A1 B j Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 20 20 Pitch p 026 0 65 Overall Height A 068 073 078 1 73 1 85 1 98 Molded Package Thickness A2
50. 25 us LP osc mode 2 Tcy Instruction Cycle Time 4 Fosc 3 TosL Clock in OSC1 Low or High 85 ns XT oscillator TosH Time 20 ns HS oscillator 2 0 us LP oscillator 4 TosR Clock in OSC1 Rise or Fall 25 ns XT oscillator TosF Time 25 ns HS oscillator 50 ns LP oscillator These parameters are characterized but not tested Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period O 2002 Microchip Technology Inc Preliminary DS30453D page 75 PIC16C5X FIGURE 12 3 CLKOUT AND I O TIMING PIC16C54 55 56 57 Q4 Q1 Q2 i Q3 OSC1 CLKOUT me M A RE RE ZA ES AE u 6 s MMO AO input M IT 15 io Old Value D New Value 20 21 Note P
51. 32 kHz VDD 2 5V LP mode 14 35 HA Commercial Fosc 32 kHz VDD 2 5V LP mode Industrial D010A PIC16C5X 18 24 mA Fosc 4 MHz VDD 5 5V XT and RC 2 6 3 6 mA modes 4 5 16 mA Fosc 10 MHz VDD 3 0V HS mode 14 32 HA Fosc 20 MHz VDD 5 5V HS mode Fosc 32 kHz VDD 3 0V LP mode 17 40 HA Commercial Fosc 32 kHz VDD 3 0V LP mode Industrial Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested T Data in Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current con sumption a Thetest conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all 1 O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b Forstandby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REX
52. 4 x Tosc DS30453D page 88 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 13 4 RESET WATCHDOG TIMER AND DEVICE RESET TIMER TIMING PIC16CR54A VDD E d 5 i S D Internal FOR 32 32 32 i 1 gt gt a gt DRT Time out Internal RESET i Watchdog i A e Timer i RESET i i 34e T Ss H o gt Note 1 i Note 1 Please refer to Figure 13 1 for load conditions TABLE 13 3 RESET WATCHDOG TIMER AND DEVICE RESET TIMER PIC16CR54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA lt 70 C for commercial 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics Param No Symbol Characteristic Min Typt Max Units Conditions 30 TmcL MCLR Pulse Width low 1 0 us VDD 5 0V 31 Twdt Watchdog Timer Time out Period 7 0 18 40 ms VDD 5 0V Comm No Prescaler 32 TDRT Device Reset Timer Period 7 0 18 30 ms VDD 5 0V Comm 34 Tioz O Hi impedance from MCLR Low 1 0 us These parameters are characterized but not tested Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested O 2002 Microchip Technology Inc Prelim
53. Clock in OSC1 Low or High 6 0 ns HS oscillator Time 4 TosR TosF Clock in OSC1 Rise or Fall 6 55 ns HS oscillator Time These parameters are characterized but not tested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard oper ating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period DS30453D page 160 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 19 4 CLKOUT AND 1 O TIMING PIC16C5X 40 OSC1 7 P CLKOUT s E Ei pedem Lo 2m KTO KLI input HA 1 q i CENT MES e 15 gt M Old Value y New Value 20 21 Note Refer to Figure 19 2 for load conditions TABLE 19 2 CLKOUT AND I O TIMING REQUIREMENTS PIC16C5X 40 Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial AC Characteristics
54. DS30453D page 106 Preliminary O 2002 Microchip Technology Inc PIC16C5X 15 2 DC Characteristics PIC16C54A 04E 10E 20E Extended PIC16LC54A 04E Extended PIC16LC54A 04E Standard Operating Conditions unless otherwise specified Extended Operating Temperature 40 C lt TA lt 125 C for extended PIC16C54A 04E 10E 20E Standard Operating Conditions unless otherwise specified Extended Operating Temperature 40 C lt TA 125 C for extended da Symbol Characteristic Min Typt Max Units Conditions IPD Power down Current D020 PIC16LC54A 2 5 15 LA VoD 2 5V WDT enabled Extended 0 25 7 0 LA VDD 2 5V WDT disabled Extended DO20A PIC16C54A 5 0 22 A VDD 3 5V WDT enabled 0 8 18 A VDD 3 5V WDT disabled Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption
55. FIGURE 14 17 TRANSCONDUCTANCE gm OF LP OSCILLATOR vs VDD FIGURE 14 18 TRANSCON gm OF XT vs VDD DUCTANCE OSCILLATOR Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 45 40 35 Max 4 0 C 30 25 gm A V 20 gm A V 15 10 0 2 0 3 0 4 0 5 0 VDD Volts 6 0 7 0 2500 2000 1500 1000 500 0 Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Max 40 C Typ 25 C Min 85 C 2 0 3 0 4 0 5 0 VDD Volts 6 0 7 0 2002 Microchip Technology Inc Preliminary DS30453D page 99 PIC16C5X FIGURE 14 19 PORTA B AND C loH vs FIGURE 14 20 PORTA B AND C loH vs Vor VDD 3 V Von VoD 5 V Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 0 0 Min 85 C Min 85 C 10 su 10 E E r 2 o Typ 25 C o Typ 25 C 15 m Max 40 C 30 Max 40 C 20 40 25 15 20 25 30 35 40 45 5 0 0 0 5 1 0 15 2
56. FIGURE 16 1 TYPICAL RC OSCILLATOR FREQUENCY vs TEMPERATURE Fosc Frequency normalized to 25 C Fosc 25 C Rext gt 10 kW CEXT 100 pF TABLE 16 1 RC OSCILLATOR FREQUENCIES Aver CEXT REXT Fosc ESV 25 C 20 pF 3 3K 5 MHz 27 5K 3 8 MHz 21 10K 2 2 MHz 21 100K 262 kHz 31 100 pF 3 3K 1 6 MHz 13 5K 1 2 MHz 13 10K 684 kHz t 18 100K 71 kHz 25 300 pF 3 3K 660 kHz t 10 5 0K 484 kHz 14 10K 267 kHz t15 100K 29 kHz 19 The frequencies are measured on DIP packages The percentage variation indicated here is part to part variation due to normal process distribution The variation indicated is 3 standard deviation from average value for VDD 5V 2002 Microchip Technology Inc Preliminary DS30453D page 117 PIC16C5X FIGURE 16 2 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 20 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 6 R 3 3K 5 R 5K 4 N I 2 3 2 R 10K LL 2 1 R 100K 0 25 3 0 3 5 4 0 45 5 0 5 5 VDD Volts FIGURE 16 3 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 100 PF 25 C Typical statistical mea
57. I O port configuration and prescaler options The General Purpose Registers are used for data and control information under command of the instructions For the PIC16C54 PIC16CR54 PIC16C56 and PIC16CR56 the register file is composed of 7 Special Function Registers and 25 General Purpose Registers Figure 6 4 For the PIC16C55 the register file is composed of 8 Special Function Registers and 24 General Purpose Registers For the PIC16C57 and PIC16CR57 the register file is composed of 8 Special Function Registers 24 General Purpose Registers and up to 48 additional General Purpose Registers that may be addressed using a banking scheme Figure 6 5 For the PIC16C58 and PIC16CR58 the register file is composed of 7 Special Function Registers 25 General Purpose Registers and up to 48 additional General Purpose Registers that may be addressed using a banking scheme Figure 6 6 6 2 1 GENERAL PURPOSE REGISTER FILE The register file is accessed either directly or indirectly through the File Select Register FSR The FSR Reg ister is described in Section 6 7 FIGURE 6 4 PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56 REGISTER FILE MAP File Address 00h INDF 01h TMRO o2n Po 03h STATUS 04h FSR 05h PORTA 06h PORTB 07h PORTCO 08h General Registers 1Fh Note 1 Nota physical register See Section 6 7 2 PIC16C55 only in all other devices this is implemented as a a general purpo
58. Massy France Tel 33 1 69 53 63 20 Fax 33 1 69 30 90 79 Germany Microchip Technology GmbH Gustav Heinemann Ring 125 D 81739 Munich Germany Tel 49 89 627 144 0 Fax 49 89 627 144 44 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V Le Colleoni 1 20041 Agrate Brianza Milan Italy Tel 39 039 65791 1 Fax 39 039 6899883 United Kingdom Arizona Microchip Technology Ltd 505 Eskdale Road Winnersh Triangle Wokingham Berkshire England RG41 STU Tel 44 118 921 5869 Fax 44 118 921 5820 03 01 02 DS30453D page 192 2002 Microchip Technology Inc
59. On chip 3 8 Program dni 5 o Memory n 5 RESET Vector 1FFh FIGURE 6 2 PIC16C56 CR56 PROGRAM MEMORY MAP AND STACK PC lt 9 0 gt 10 CALL RETLW Stack Level 1 Stack Level 2 000h 5 On chip Program OFFh 5 Memory Page 0 100h 58 s g 1FFh 59 200h 5 On chip Program 2FFh Memory Page 1 300h Y RESET Vector 3FFh FIGURE 6 3 PIC16C57 CR57 C58 CR58 PROGRAM MEMORY MAP AND STACK PC lt 10 0 gt CALL RETLW 1 Stack Level 1 Stack Level 2 000h On chip Program OFFh Memory Page 0 100h 1FFh 200h On chip Program gt 2FFh 2 5 Memory Page 1 7 300h 2 3 zo 3FFh 5 400h gt On chip Program Memory Page 2 E 5FFh 600h On chip Program Memory Page 3 HAL Y RESET Vector 7FFh O 2002 Microchip Technology Inc Preliminary DS30453D page 25 PIC16C5X 6 2 Data Memory Organization Data memory is composed of registers or bytes of RAM Therefore data memory for a device is specified by its register file The register file is divided into two functional groups Special Function Registers and General Purpose Registers The Special Function Registers include the TMRO reg ister the Program Counter PC the Status Register the I O registers ports and the File Select Register FSR In addition Special Purpose Registers are used to control the
60. P456 O O AQ YYWWNNN o AQ oo23cBA 28 Lead Skinny PDIP 300 Example XXXXXXXXXXXXXXXXX PIC16C55A O XXXXXXXXXXXXXXXXX e O 041 SP456 O AN YYWWNNN AS 0023CBA 28 Lead PDIP 600 Example XXXXXXXXXXXXXXX PIC16C55A XXXXXXXXXXXXXXX 04 P126 O XXXXXXXXXXXXXXX O S YYWWNNN LAN 0042CDA MICROCHIP MICROCHIP 18 Lead SOIC Example XXXXXXXXX XXX PIC16C54C XXXXXXXXXXXX 04 S0218 XXXXXXXXXXXX o 2 YYWWNNN o A 0018CDK 28 Lead SOIC Example XXXXXXXXXXXXXXXXXXXX PIC16C57C XXXXXXXXXXXXXXXXXXXX 04 SO XXXXXXXXXXXXXXXXXXXX o YYWWNNN 20 Lead SSOP XXXXXXXXXXX XXXXXXXXXXX YYWWNNN O 28 Lead SSOP XXXXXXXXXXXX XXXXXXXXXXXX O YYWWNNN O 2002 Microchip Technology Inc PIC16C5X o DBoot5CBK Example PIC16C54C 04 55218 amp 0020CBP O Example PIC16C57C 04 55123 O AN 0025CBK Preliminary DS30453D page 171 PIC16C5X Package Marking Information Cont d 18 Lead CERDIP Windowed Example XXXXXXXX PIC16C54C DS XXXXXXXX 2 8 IW i YYWWNNN TENES 0001CBA 28 Lead CERDIP Windowed Example XXXXXXXXXXX PIC16C57C AN 30000000000 S JW D MICROCHIP XXXXXXXXXXX D MICROCHIP YYWWNNN 0038CBA Legend XX X Customer specific information Y Year code last digit of calendar year YY Year code last 2 digits of calenda
61. PIC16CR56 PIC16C58 and PIC16CR58 3 These values are valid for PIC16C57 CR57 C58 CR58 For the PIC16C54 CR54 C55 C56 CR56 the value on RESET is 111x xxxx and for MCLR and WDT Reset the value is 111u uuuu DS30453D page 28 Preliminary O 2002 Microchip Technology Inc PIC16C5X 6 3 STATUS Register This register contains the arithmetic status of the ALU the RESET status and the page preselect bits for pro gram memories larger than 512 words The STATUS Register can be the destination for any instruction as with any other register If the STATUS Register is the destination for an instruction that affects the Z DC or C bits then the write to these three bits is disabled These bits are set or cleared according to the device logic Furthermore the TO and PD bits are not writable Therefore the result of an instruction with the STATUS Register as destination may be different than intended For example CLRF STATUS will clear the upper three bits and set the Z bit This leaves the STATUS Register as 000u uluu where u unchanged It is recommended therefore that only BCF BSF and MOVWF instructions be used to alter the STATUS Reg ister because these instructions do not affect the Z DC or C bits from the STATUS Register For other instruc tions which do affect STATUS Bits see Section 10 0 Instruction Set Summary REGISTER 6 1 STATUS REGISTER ADDRESS 03h R W 0 R W 0 R W 0 R
62. TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 0 8 VDD VDD V HS 20 MHz lt Fosc lt 40 MHz D050 VHys Hysteresis of Schmitt 0 15 VDD V Trigger inputs D060 IL Input Leakage Current For VDD lt 5 5V I O ports 1 0 0 5 1 0 HA Vss lt VPIN lt VDD pin at hi impedance MCLR 5 0 5 0 HA VPIN Vss 0 25V MCLR 0 5 3 0 HA VPIN VDD TOCKI 3 0 0 5 3 0 HA Vss VPIN lt VDD OSC1 3 0 0 5 HA Vss VPIN VDD HS D080 VoL Output Low Voltage I O ports 0 6 V loi 8 7 mA VDD 4 5V D090 VoH Output High Voltage I O ports VDD 0 7 V lOH 5 4 mA VDD 4 5V These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 Device operation between 20 MHz to 40 MHz requires the following VDD between 4 5V to 5 5V OSC1 pin externally driven OSC2 pin not connected and HS oscillator mode and commercial temperatures For opera tion between DC and 20 MHz See Section 17 3 2 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input volt age 3 Negative current is defined as coming out of the pin DS30453D page 158 Preliminary 2002 Microchip Technology Inc PIC16C5X
63. Tosc 2 Please refer to Figure 12 1 for load conditions DS30453D page 76 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 12 4 RESET WATCHDOG TIMER AND DEVICE RESET TIMER TIMING PIC16C54 55 56 57 i 30 Internal POR i i NEC MT PN NS NEL qd DRT Time out i Internal RESET Watchdog i i e Timer i i Reset i i 31 e 34 34 se lt lt Note 1 Note 1 Please refer to Figure 12 1 for load conditions TABLE 12 3 RESET WATCHDOG TIMER AND DEVICE RESET TIMER PIC16C54 55 56 57 Standard Operating Conditions unless otherwise specified HM Operating Temperature 0 C lt TA 70 C for commercial BG Characteuleties 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended Param No Symbol Characteristic Min Typt Max Units Conditions 30 TmcL MCLR Pulse Width low 100 ns VDD 5 0V 31 Twdt Watchdog Timer Time out Period 9 0 18 30 ms VDD 5 0V Comm No Prescaler 32 TDRT Device Reset Timer Period 9 0 18 30 ms VDD 5 0V Comm 34 Tioz I O Hi impedance from MCLR Low 100 ns These parameters are characterized but not tested Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested
64. and one or more operands which further specify the opera tion of the instruction The PIC16C5X instruction set summary in Table 10 2 groups the instructions into byte oriented bit oriented and literal and control oper ations Table 10 1 shows the opcode field descriptions For byte oriented instructions f represents a file reg ister designator and d represents a destination desig nator The file register designator is used to specify which one of the 32 file registers in that bank is to be used by the instruction The destination designator specifies where the result of the operation is to be placed If is the result is placed in the W register If is 1 the result is placed in the file register specified in the instruction For bit oriented instructions b represents a bit field designator which selects the number of the bit affected by the operation while represents the number of the file in which the bit is located For literal and control operations k represents an 8 or 9 bit constant or literal value TABLE 10 1 OPCODE FIELD DESCRIPTIONS Field Description f Register file address 0x00 to 0x1F Working register accumulator Bit address within an 8 bit file register Literal field constant data or label Dont care location 0 or 1 The assembler will generate code with x 0 It is the recommended form of use for com patibility with all Microchip software tools d Destination select d 0 stor
65. can read verify or program PICmicro devices lt can also set code protection in this mode 11 10 PICSTART Plus Entry Level Development Programmer The PICSTART Plus development programmer is an easy to use low cost prototype programmer It con nects to the PC via a COM RS 232 port MPLAB Integrated Development Environment software makes using the programmer simple and efficient The PICSTART Plus development programmer sup ports all PICmicro devices with up to 40 pins Larger pin count devices such as the PIC16C92X and PIC17C76X may be supported with an adapter socket The PICSTART Plus development programmer is CE compliant 11 11 PICDEM 1 Low Cost PlCmicro Demonstration Board The PICDEM 1 demonstration board is a simple board which demonstrates the capabilities of several of Microchip s microcontrollers The microcontrollers sup ported are PIC16C5X PIC16C54 to PIC16C58A PIC16C61 PIC16C62X PIC16C71 PIC16C8X PIC17C42 PIC17C43 and PIC17C44 All necessary hardware and software is included to run basic demo programs The user can program the sample microcon trollers provided with the PICDEM 1 demonstration board on a PRO MATE ll device programmer or a PICSTART Plus development programmer and easily test firmware The user can also connect the PICDEM 1 demonstration board to the MPLAB ICE in circuit emulator and download the firmware to the emu lator for testing A prototype area is available for the user to buil
66. data sheet could be made without affecting the overall usefulness 6 Is there any incorrect or misleading information what and where 7 How would you improve this document 8 How would you improve our software systems and silicon products DS30453D page 190 Preliminary 2002 Microchip Technology Inc PIC16C5X PRODUCT IDENTIFICATION SYSTEM To order or obtain information e g on pricing or delivery refer to the factory or the listed sales office PARTNO XX X XX XXX A Ji ilr WU Examples Device Frequency Temperature Package Pattern a PIC16C55A 04 P 301 Commercial Temp Range OSC Range PDIP package 4 MHz standard VDD limits Type QTP pattern 301 b PIC16LC54C 041 SO Industrial Temp SOIC Devise PIC16C54 PICI6C54TO package 200 kHz extended ADD limits PIC16C54A PIC16C54ATO c PIC16C57 RC SP RC Oscillator commer ial temp skinny PDIP package 4 MHz stan PIC16CR54A PIC16CR54AT 2 ca ee PIC16C54C PIC16C54CT dard VDD limits PIC16CR54C PIC16CR54CT d PIC16C58BT 40 SS 123 commercial PIC16C55 PIC1 S055T temp SSOP package in tape and reel 4 PIC16C55A PICI6CSSAL MHz extended VDD limits ROM pattern PIC16C56 PIC16C56T 123 PIC16C56A PIC16C56AT PIC16CR56A PIC16CR56AT 2 PIC16C57 PIC16C57T 2 PIC16C57C PIC16C57CT PIC16CR57C PIC16CR57CTP PIC16C58B PIC16C58BT 2 Note 1 C normal voltage range PIC16CR58B PIC16CR58BT 2 LC extended 2 T in tape and
67. f Syntax label XORWF fd Operands 0 lt f lt 31 de 0 1 Operation W XOR f gt dest Status Affected Z Encoding 0001 10df ffff Description Exclusive OR the contents of the W register with register f If d is 0 the result is stored in the W regis ter If d is 1 the result is stored back in register f Words 1 Cycles 1 Example XORWF REG 1 Before Instruction REG OxAF W 0xB5 After Instruction REG Ox1A W 0xB5 DS30453D page 60 Preliminary O 2002 Microchip Technology Inc PIC16C5X 11 0 DEVELOPMENT SUPPORT The PICmicro microcontrollers are supported with a full range of hardware and software development tools Integrated Development Environment MPLAB IDE Software Assemblers Compilers Linkers MPASM Assembler MPLAB C17 and MPLAB C18 C Compilers MPLINK Object Linker MPLIB Object Librarian Simulators MPLAB SIM Software Simulator Emulators MPLAB ICE 2000 In Circuit Emulator ICEPIC In Circuit Emulator In Circuit Debugger MPLAB ICD Device Programmers PRO MATE II Universal Device Programmer PICSTART Plus Entry Level Development Programmer Low Cost Demonstration Boards PICDEM 1 Demonstration Board PICDEM 2 Demonstration Board PICDEM3 Demonstration Board PICDEM 17 Demonstration Board KEELOQ Demonstration Board 11 1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease
68. indicated in the device number 1 C as in PIC16C54C These devices have EPROM program memory and operate over the standard voltage range 2 LC as in PIC16LC54A These devices have EPROM program memory and operate over an extended voltage range 3 CR as in PIC16CR54A These devices have ROM program memory and operate over the standard voltage range 4 LCR as in PIC16LCR54A These devices have ROM program memory and operate over an extended voltage range 2 1 UV Erasable Devices EPROM The UV erasable versions offered in CERDIP pack ages are optimal for prototype development and pilot programs UV erasable devices can be programmed for any of the four oscillator configurations Microchip s PICSTART Plus and PRO MATE programmers both support programming of the PIC16C5X Third party programmers also are available Refer to the Third Party Guide DS00104 for a list of sources 2 2 One Time Programmable OTP Devices The availability of OTP devices is especially useful for customers expecting frequent code changes and updates or small volume applications The OTP devices packaged in plastic packages per mit the user to program them once In addition to the program memory the configuration bits must be pro grammed Note 1 PIC16C55A and PIC16C57C devices require OSC2 not to be connected while programming with PICSTART Plus programmer 2 3 Quick Turnaround Production QTP Devices Mic
69. kHz 15 pF 15 pF XT 100 kHz 15 30 pF 200 300 pF 200 kHz 15 30 pF 100 200 pF 455 kHz 15 30 pF 15 100 pF 1 MHz 15 30 pF 15 30 pF 2 MHz 15 pF 15 pF 4 MHz 15 pF 15 pF HS 4 MHz 15 pF 15 pF 8 MHz 15 pF 15 pF 20 MHz 15 pF 15 pF Note 1 For VDD gt 4 5V C1 C2 30 pF is recommended These values are for design guidance only Rs may be required in HS mode as well as XT mode to avoid overdriving crystals with low drive level specification Since each crystal has its own characteristics the user should consult the crystal manufacturer for appropriate values of external components Note If you change from this device to another device please verify oscillator characteris tics in your application 2002 Microchip Technology Inc Preliminary DS30453D page 15 PIC16C5X 4 3 External Crystal Oscillator Circuit Either a prepackaged oscillator or a simple oscillator circuit with TTL gates can be used as an external crys tal oscillator circuit Prepackaged oscillators provide a wide operating range and better stability A well designed crystal oscillator will provide good perfor mance with TTL gates Two types of crystal oscillator circuits can be used one with parallel resonance or one with series resonance Figure 4 3 shows an implementation example of a par allel resonant oscillator circuit The circuit is designed to use the fundamental frequency of the crystal The 74AS04 inverter
70. kHz LP osc mode These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period DS30453D page 86 Preliminary O 2002 Microchip Technology Inc PIC16C5X TABLE 13 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16CR54A Standard Operating Conditions unless otherwise specified 40 C lt TA 125 C for extended ioa Symbol Characteristic Min Typt Max Units Conditions 1 Tosc External CLKIN Period 250 ns XT osc mode 250 ns HS osc mode 04 100 ns HS osc mode 10 50 ns HS osc mode 20 5 0 us LP osc mode Oscillator Period 250 ns RC osc mode 250 10 000 ns XT osc mode 250 250 ns HS osc mode 04 100 250 ns HS osc mode 10 50 250 ns HS osc mode 20 5 0 200 us ILP osc mode Tcy Inst
71. label ANDWF fd Operands 0 lt f lt 31 de 0 1 Operation W AND f gt dest Status Affected Z Encoding 0001 01df ffff Description The contents of tne W register are AND ed with register f If d is 0 the result is stored in the W regis ter If d is 1 the result is stored back in register f Words 1 Cycles 1 Example ANDWF TEMP REG 1 Before Instruction W 0x17 TEMP REG 0xC2 After Instruction W 0x17 TEMP REG 0x02 BCF Bit Clear f Syntax label BCF fb Operands 0 lt f lt 31 O lt b lt 7 Operation 0 gt f lt b gt Status Affected None Encoding 0100 bbbf ffff Description Bit b in register f is cleared Words 1 Cycles 1 Example BCF FLAG_REG 7 Before Instruction FLAG_REG 0xC7 After Instruction FLAG_REG 0x47 O 2002 Microchip Technology Inc Preliminary DS30453D page 51 PIC16C5X BSF Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Bit Set f label BSF fb O lt f lt 31 O lt bs7 1 gt f lt b gt None 0101 bbbf ffff Bit b in register is set BSF FLAG_REG 7 Before Instruction FLAG_REG Ox0A After Instruction FLAG REG 0x8A BTFSC Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Bit Test f Skip if Clear label BTFSC fb O lt f lt 31 0 lt b lt 7 skip if lt b gt 0
72. lt VPIN lt VDD pin at hi impedance MCLR 5 0 HA VPIN Vss 0 25V MCLR 0 5 5 0 HA VPIN VDD TOCKI 3 0 0 5 3 0 HA Vss lt VPIN lt VDD OSC1 3 0 0 5 3 0 HA VSS lt VPIN lt VDD XT HS and LP modes D080 VoL Output Low Voltage I O ports 0 6 V IOL 8 7 mA VDD 4 5V OSC2 CLKOUT 0 6 V loL 1 6 mA VDD 4 5V RC mode only D090 VoH Output High Voltage I O ports VDD 0 7 V IOH 5 4 mA VDD 4 5V OSC2 CLKOUT VDD 0 7 V IOH 1 0 mA VDD 4 5V RC mode only These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 Theleakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 Forthe RC mode the OSC1 CLKIN pin is a Schmitt Trigger input It is not recommended that the PIC16C5X be driven with external clock in RC mode 4 The user may use the better of the two specifications DS30453D page 84 Preliminary O 2002 Microchip Technology Inc PIC16C5X 13 5 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created with one of the following f
73. oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period DS30453D page 112 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 15 3 CLKOUT AND I O TIMING PIC16C54A Q4 Q1 Q2 Q3 1 10 n SETE CLKOUT i i L a gt A act foe es D mi 16 pa NANO ENANA input y E i i I a 15 u URED Old Value ne New Value 20 21 Note Please refer to Figure 15 1 for load conditions TABLE 15 2 CLKOUT AND I O TIMING REQUIREMENTS PIC16C54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial AC Characteristics 40 C lt TA lt 85 C for industrial 20 C lt TA lt 85 C for industrial PIC16LV54A 021 40 C lt TA lt 125 C for extended a Symbol Characteristic Min Typt Max Units 10 TosH2ckL OSC1T to CLKOUTL 15 30 ns 11 TosH2ckH OSC1T to CLKOUTT 15 30 ns 12 TckR CLKOUT rise time 5 0 15 ns 13 TckF CLKOUT fall time 5 0 15 ns 14 TckL2ioV CLKOUT to Port out valid 40 ns 15 TioV2ckH Port in valid before CLKOUTT 0 25 TCY 30 ns 16 TckH2iol Port in hold after CLKOUTT 0 ns 17 TosH2ioV OSC1
74. port 5 6 4 7 RC port 5 0 4 1 MCLR 17 0 17 0 OSC1 6 6 3 5 OSC2 CLKOUT 4 6 3 5 TOCKI 4 5 3 5 All capacitance values are typical at 25 C A part to part variation of 25 three standard deviations should be taken into account DS30453D page 102 Preliminary O 2002 Microchip Technology Inc PIC16C5X 15 0 ELECTRICAL CHARACTERISTICS PIC16C54A Absolute Maximum Ratings t Ambient temperature under bias ss 55 C to 125 C AS 00011230100 qtii ee bees 65 C to 150 C Voltage on VDD with respect to VSS iii 0 to 7 5V Voltage on MCLR with respect t0 WEST ibn bs s Mech t rete elos 0 to 14V Voltage on all other pins with respect to VSS sssesseem emm emen 0 6V to VDD 0 6V Total power dissipation EE EEE EEE A 800 mW Max CUTTONEQUEO VSS Pla AA A A e mnt 150 mA Max currentinto VDD Pilot ie A RE cv EE LV ERE te 100 mA Max current into an input pin TOCKI only inner 500 uA Input clamp current lik VI lt 0 or VI gt VDD eee 20 mA Output clamp current IOK VO lt 0 or VO gt VDD eee 20 mA Max output current sunk by any I O pin RR 25 mA Max output current sourced by any I O pin sise 20 mA Max output current sourced by a single I O port PORTA or B us 50 mA Max output current sunk by a single I O port PORTA or B nee nennen nent 50 mA Note 1 Power dissipation is calculated as follows Pdis VDD x IDD
75. present DS30453D page 62 Preliminary O 2002 Microchip Technology Inc PIC16C5X 11 8 MPLAB ICD In Circuit Debugger Microchip s In Circuit Debugger MPLAB ICD is a pow erful low cost run time development tool This tool is based on the FLASH PICmicro MCUs and can be used to develop for this and other PICmicro microcontrollers The MPLAB ICD utilizes the in circuit debugging capa bility built into the FLASH devices This feature along with Microchip s In Circuit Serial Programming proto col offers cost effective in circuit FLASH debugging from the graphical user interface of the MPLAB Integrated Development Environment This enables a designer to develop and debug source code by watch ing variables single stepping and setting break points Running at full speed enables testing hardware in real time 11 9 PRO MATE ll Universal Device Programmer The PRO MATE II universal device programmer is a full featured programmer capable of operating in Stand alone mode as well as PC hosted mode The PRO MATE ll device programmer is CE compliant The PRO MATE ll device programmer has program mable VDD and VPP supplies which allow it to verify programmed memory at VDD min and VDD max for max imum reliability lt has an LCD display for instructions and error messages keys to enter commands and a modular detachable socket assembly to support various package types In Stand alone mode the PRO MATE II device programmer
76. reel SOIC and SSOP Frequency Range RC Resistor Capacitor packages only Oscillator Type LP Low Power Crystal 3 JW Devices are UV erasable and can be XT Standard Crystal Resonator programmed to any device configura HS High Speed Crystal tion JW Devices meet the electrical 02 200 KHz LP or 2 MHz XT and RC requirements of each oscillator type 04 200 KHz LP or 4 MHz XT and RC FEAT 10 10 MHz HS only including LC devices 20 20 MHz HS only 4 b Blank 40 40 MHz HS only b No oscillator type for JW packages RC LP XT HS are for 16C54 55 56 57 devices only 02 is available for 16LV54A only 04 10 20 options are available for all other devices 40 is available for 16C54C 55A 56A 57C 58B devices only 0 Cto 70 C 40 C to 85 C Temperature Range b 4 E 40 C to 125 C Package S zi Die in Waffle Pack JW 28 pin 600 mil 18 pin 300 mil windowed CER pip P 28 pin 600 mil 18 pin 300 mil PDIP SO 300 mil SOIC SS 209 mil SSOP SP 28 pin 300 mil Skinny PDIP See Section 21 for additional package information Pattern QTP SQTP ROM code factory specified or Special Requirements Blank for OTP and Windowed devices Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom mended workarounds To determine if an errata sheet exists for a particular device please contact one of the follow
77. to be high After the time out period which is typically 18 ms it will RESET the reset latch and thus end the on chip RESET signal A power up example where MCLR is not tied to VDD is shown in Figure 5 3 VDD is allowed to rise and stabilize before bringing MCLR high The chip will actually come out of reset TDRT msec after MCLR goes high In Figure 5 4 the on chip Power On Reset feature is being used MCLR and VDD are tied together The VDD is stable before the start up timer times out and there is no problem in getting a proper RESET However Figure 5 5 depicts a problem situation where VDD rises too slowly The time between when the DRT senses a high on the MCLR VPP pin and when the MCLR VPP pin and VDD actually reach their full value is too long In this situation when the start up timer times out VDD has not reached the VDD min value and the chip is therefore not guaranteed to function correctly For such situations we recommend that external RC cir cuits be used to achieve longer POR delay times Figure 5 2 Note When the device starts normal operation exits the RESET condition device oper ating parameters voltage frequency tem perature etc must be met to ensure operation If these conditions are not met the device must be held in RESET until the operating conditions are met For more information on PIC16C5X POR see Power Up Considerations AN522 in the Embedded Control H
78. 0 898 905 22 61 22 80 22 99 Tip to Seating Plane L 125 130 135 3 18 3 30 3 43 Lead Thickness c 008 012 015 0 20 0 29 0 38 Upper Lead Width B1 045 058 070 1 14 1 46 1 78 Lower Lead Width B 014 018 022 0 36 0 46 0 56 Overall Row Spacing eB 310 370 430 7 87 9 40 10 92 Mold Draft Angle Top ol 5 10 15 5 10 15 Mold Draft Angle Bottom B 5 10 15 5 10 15 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 0 254mm per side JEDEC Equivalent MS 001 Drawing No C04 007 2002 Microchip Technology Inc Preliminary DS30453D page 173 PIC16C5X 28 Lead Skinny Plastic Dual In line SP 300 mil PDIP b E1 n b 4 d E d E d E d E di E di E D q E r E d E di E di E u 2 nd AO Y A ke A Ft eB B p Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 28 28 Pitch p 100 2 54 Top to Seating Plane A 140 150 160 3 56 3 81 4 06 Molded Package Thickness A2 125 130 135 3 18 3 30 3 43 Base to Seating Plane Al 015 0 38 Shoulder to Shoulder Width E 300 310 325 7 62 7 87 8 26 Molded Package Width El 275 285 295 6 99 7 24 7
79. 0110 REG1 1110 0110 C 0 C 0 After Instruction After Instruction REG1 1110 0110 REG1 1110 0110 W 1100 1100 W 0111 0011 C 1 C O SLEEP Enter SLEEP Mode Syntax label SLEEP Operands None Operation 00h gt WDT 0 gt WDT prescaler if assigned 1 gt TO 0 PD Status Affected TO PD Encoding 0000 0000 0011 Description Time out status bit TO is set The power down status bit PD is cleared The WDT and its pres caler are cleared The processor is put into SLEEP mode with the oscillator stopped See section on SLEEP for more details Words 1 Cycles 1 Example SLEEP DS30453D page 58 Preliminary O 2002 Microchip Technology Inc PIC16C5X SUBWF Subtract W from f Syntax label SUBWF f d Operands 0 lt f lt 31 d e 0 1 Operation f W dest Status Affected C DC Z Encoding 0000 10df ffff Description Subtract 2s complement method the W register from register f If is O the result is stored in the W register If d is 1 the result is stored back in register f Words 1 Cycles 1 Example 1 SUBWF REG1 1 Before Instruction REG1 3 W 2 C 7 After Instruction REG1 2 1 W 2 C 1 result is positive Example 2 Before Instruction REG1 2 2 W 2 C After Instruction REG1 0 W 2 C 1 result is zero Example 3 Before Instruction REG1 2 1 W 2 C After Instruction REG1 OxFF W 2 C 0 result is negati
80. 1 R 1 R W x R W x R W x PA2 PA1 PAO TO PD Z DC C bit 7 bit O bit 7 PA2 This bit unused at this time Use of the PA2 bit as a general purpose read write bit is not recommended since this may affect upward compatibility with future products bit 6 5 PA lt 1 0 gt Program page preselect bits PIC16C56 CR56 PIC16C57 CR57 PIC16C58 CR58 00 Page 0 000h 1FFh PIC16C56 CR56 PIC16C57 CR57 PIC16C58 CR58 01 Page 1 200h 3FFh PIC16C56 CR56 PIC16C57 CR57 PIC16C58 CR58 je 10 Page 2 400h 5FFh PIC16C57 CR57 PIC16C58 CR58 Je 11 Page 3 600h 7FFh Each page is 512 words PIC16C57 CR57 PIC16C58 CR58 Using the PA lt 1 0 gt bits as general purpose read write bits in devices which do not use them for program page preselect is not recommended since this may affect upward compatibility with future products bit 4 TO Time out bit 1 After power up CLRWDT instruction or SLE 0 WDT time out occurred bit 3 PD Power down bit 1 After power up or by the CLRWDT instruction 0 By execution of the SLEEP instruction Z Zero bit bit 2 EP instruction 1 The result of an arithmetic or logic operation is zero 0 The result of an arithmetic or logic operation is not zero bit 1 ADDWF DC Digit carry borrow bit for ADDWF and SUBWF instructions 1 carry from the 4th low order bit of the result occurred 0 A carry from the 4th low order bit of the result did n
81. 10H Y VDD VOH x lOH Z VOL x IOL NOTICE Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at those or any other conditions above those indi cated in the operation listings of this specification is not implied Exposure to maximum rating conditions for extended periods may affect device reliability 2002 Microchip Technology Inc Preliminary DS30453D page 155 PIC16C5X FIGURE 19 1 PIC16C54C C55A C56A C57C C58B 40 VOLTAGE FREQUENCY GRAPH 0 C lt TA lt 70 C 6 0 5 5 5 0 VoD 4 5 Volts 4 0 3 5 0 4 10 20 fee Frequency MHz Note 1 The shaded region indicates the permissible combinations of voltage and frequency 2 The maximum rated speed of the part limits the permissible combinations of voltage and frequency Please reference the Product Identification System section for the maximum rated speed of the parts 3 Operation between 20 to 40 MHz requires the following VDD between 4 5V and 5 5V OSC1 externally driven OSC2 not connected HS mode Commercial temperatures Devices qualified for 40 MHz operation have 40 designation ex PIC16C54C 40 P 4 For operation between DC and 20 MHz see Section 17 1 DS30453D page 156 Preliminary O 2002 Microchip Technology Inc PIC16C5X 19 1 DC Character
82. 16C5X 10 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HS 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HS 9 0 20 mA Fosc 20 MHz VDD 5 5V PIC16C5X LP 15 32 uA Fosc 32 kHz VDD 3 0V WDT disabled D020 IPD Power down Current 4 0 12 uA VDD 3 0V WDT enabled 0 6 9 uA VDD 3 0V WDT disabled These parameters are characterized but not tested T Data in Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type Does not include current through REXT The current through the resistor can be estimated by the formula IR gt VDD 2REXT mA with REXT in kQ DS30453D page 68 Preliminary O 2002 Microchip Technology Inc
83. 19 3 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created with one of the following formats 1 TppS2ppS 2 TppS T F Frequency T Time Lowercase letters pp and their meanings pp EE 2 to mc MCLR ck CLKOUT osc oscillator Cy cycle time os OSCI drt device reset timer t0 TOCKI io I O port wdt watchdog timer Uppercase letters and their meanings S F Fall P Period H High R Rise Invalid Hi impedance V Valid L Low Z Hi impedance FIGURE 19 2 LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS PIC16C54C C55A C56A C57C C58B 40 CL 50pF for all pins except OSC2 0 pF for OSC2 in HS mode for operation between 20 MHz to 40 MHz O 2002 Microchip Technology Inc Preliminary DS30453D page 159 PIC16C5X 19 4 Timing Diagrams and Specifications FIGURE 19 3 EXTERNAL CLOCK TIMING PIC16C5X 40 Q4 i Q1 Q2 i Q3 i Q4 i Q1 OSC1 CLKOUT TABLE 19 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C5X 40 Standard Operating Conditions unless otherwise specified AC Characteristics Operating Temperature 0 C lt TA lt 70 C for commercial om Symbol Characteristic Min Typt Max Units Conditions Fosc External CLKIN Frequency 20 40 MHz HS osc mode Tosc External CLKIN Period 25 ns HSosc mode Tcy Instruction Cycle Time 4 Fosc TosL TosH
84. 3 1 for load conditions TABLE 13 2 CLKOUT AND I O TIMING REQUIREMENTS PIC16CR54A Standard Operating Conditions unless otherwise specified e Operating Temperature 0 C lt TA 707C for commercial AC Chatacterlstics 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended ee Symbol Characteristic Min Typt Max Units 10 TosH2ckL OSCI to CLKOUTI 15 30 ns 11 TosH2ckH OSC1 to CLKOUTT 15 30 ns 12 TckR CLKOUT rise time 5 0 15 ns 13 TckF CLKOUT fall time 5 0 15 ns 14 TckL2ioV CLKOUT to Port out valid 40 ns 15 TioV2ckH Portin valid before CLKOUTT 0 25 TCY 30 ns 16 TckH2iol Port in hold after CLKOUTT 0 ns 17 TosH2ioV OSC1T Q1 cycle to Port out valid 2 100 ns 18 TosH2iol OSC1T Q2 cycle to Port input invalid TBD ns I O in hold time 19 TioV20sH Port input valid to OSC1T TBD ns 1 O in setup time 20 TioR Port output rise time 10 25 ns 21 TioF Port output fall time 10 25 ns These parameters are characterized but not tested These parameters are design targets and are not tested No characterization data available at this time Datainthe Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested 2 Please refer to Figure 13 1 for load conditions Measurements are taken in RC Mode where CLKOUT output is
85. 3 5 OSC2 CLKOUT 4 3 3 5 TOCKI 3 2 2 8 All capacitance values are typical at 25 C A part to part variation of 25 three standard deviations should be taken into account DS30453D page 154 Preliminary O 2002 Microchip Technology Inc PIC16C5X 19 0 ELECTRICAL CHARACTERISTICS PIC16C54C C55A C56A C57C C58B 40MHz Absolute Maximum Ratings Ambient temperature under bias iii 55 C to 125 C Storage temperature ici dia 65 C to 150 C Voltag on VbD with respect TO VSS nodo tti dtt nn 0 to 7 5V Voltage on MCLR with respect t0 VSS cmm eo me be tA tute o Aet chest e 0 to 14V Voltage on all other pins with respect to VSS ssssseeen meme 0 6V to VDD 0 6V Total power dissipation EE EE AE EO 800 mW Max curtentoutof V S PI iii A da a 150 mA Max cutrentinto VDD PI ka A A A ee tt areal 100 mA Max current into an input pin TOCKI only inner 500 uA Input clamp current lik VI lt 0 or VI gt VDD Output clamp current IOK VO lt 0 or VO gt VDD eee 20 mA Max output current sunk by any VO pins hel a ltda 25 mA Max output current sourced by any I O pin iii 20 mA Max output current sourced by a single I O Port A B or C oooononnnoc non rn 50 mA Max output current sunk by a single I O Port A B or C iii 50 mA Note 1 Power dissipation is calculated as follows Pdis VDD x IDD Y
86. 4 in the PLCC package lt will also support future 44 pin PLCC microcontrollers with an LCD Mod ule All the necessary hardware and software is included to run the basic demonstration programs The user can program the sample microcontrollers pro vided with the PICDEM 3 demonstration board on a PRO MATE II device programmer or a PICSTART Plus development programmer with an adapter socket and easily test firmware The MPLAB ICE in circuit emula tor may also be used with the PICDEM 3 demonstration board to test firmware A prototype area has been pro vided to the user for adding hardware and connecting it to the microcontroller socket s Some of the features include a RS 232 interface push button switches a potentiometer for simulated analog input a thermistor and separate headers for connection to an external LCD module and a keypad Also provided on the PICDEM 3 demonstration board is a LCD panel with 4 commons and 12 segments that is capable of display ing time temperature and day of the week The PICDEM 3 demonstration board provides an additional RS 232 interface and Windows software for showing the demultiplexed LCD signals on a PC A simple serial interface allows the user to construct a hardware demultiplexer for the LCD signals 11 14 PICDEM 17 Demonstration Board The PICDEM 17 demonstration board is an evaluation board that demonstrates the capabilities of several Microchip microcontrollers including PIC17C752 PIC17C756
87. 49 Overall Length D 1 345 1 365 1 385 34 16 34 67 35 18 Tip to Seating Plane L 125 130 135 3 18 3 30 3 43 Lead Thickness c 008 012 015 0 20 0 29 0 38 Upper Lead Width B1 040 053 065 1 02 1 33 1 65 Lower Lead Width B 016 019 022 0 41 0 48 0 56 Overall Row Spacing eB 320 350 430 8 13 8 89 10 92 Mold Draft Angle Top a 5 10 15 5 10 15 Mold Draft Angle Bottom B 5 10 15 5 10 15 Controlling Parameter Significant Characteristic Notes Dimension D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 0 254mm per side JEDEC Equivalent MO 095 Drawing No C04 070 DS30453D page 174 Preliminary O 2002 Microchip Technology Inc PIC16C5X 28 Lead Plastic Dual In line P 600 mil PDIP a E1 D ola b o da e lo o cl DS o lo o o b e LI TI TJ TI TI LI ar TI TI 17111171 U IN O 1 gt a _ lt ji A e a A NEUE I B p Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 28 28 Pitch p 100 2 54 Top to Seating Plane A 160 175 190 4 06 4 45 4 83 Molded Package Thickness A2 140 150 160 3 56 3 81 4 06 Base to Seating Plane A1 015 0 38 Shoulder to Shoulder Width E 595
88. 6C58B 2 5 5 5 User See Note 1 0 7 PIC16CR58B Yes PIC16CR54A 2 5 6 25 Factory See Note 1 1 2 N A Yes PIC16CR54C 2 5 5 5 Factory See Note 1 0 7 N A Yes PIC16CR56A 2 5 5 5 Factory See Note 1 0 7 N A Yes PIC16CR57C 2 5 5 5 Factory See Note 1 0 7 N A Yes PIC16CR58B 2 5 5 5 Factory See Note 1 0 7 N A Yes Note 1 If you change from this device to another device please verify oscillator characteristics in your application Note The table shown above shows the generic names of the PIC16C5X devices For device varieties please refer to Section 2 0 DS30453D page 2 Preliminary O 2002 Microchip Technology Inc PIC16C5X Table of Contents l 0 General Descriptions on neret rr ert a nr A nee as n 5 20 RIC16C5X Device Varieties 0 5100 ooo rv Ha li ON eee 7 3 0 4 0 5 0 3 6 0 Memory Organization tirer rhet eint Mense Ebr n tee dt ERE er e ERR he M aen ro Ninka 25 YS MENO A E AN 35 8 0 TimerO Module and TMRO Register 87 9 0 Special Features of the CPU 48 10 0 Instruction Set Summary 49 11 0 Development SUP 070 4 ARA 61 12 0 Electrical Characteristics PIC16C54 55 56 57 ui RRP 67 13 0 Electrical Characteristics PIC16CR54A E 14 0 Device Characterization PIC16C54 55 56 57 CR54A oooooccccoccccconcccnoncccnnnncoconnnncnnn RPR RRP 15 0 Electrical Characteristics PIC 16 CO4A wi iii r A zial i AAA AAA 16 0 Device Characterization PIGIGC 54 A iii nb a bl a ner dla d
89. 7C CR57C C58B CR58B CP CP CP CP CP CP CP CP CP WDTE FOSC1 FOSCO bit 11 bit O bit 11 3 CP Code Protection Bit 1 Code protection off 0 Code protection on bit 2 WDTE Watchdog timer enable bit 1 2 WDT enabled 0 WDT disabled bit 1 0 FOSC1 FOSCO Oscillator Selection Bit 00 LP oscillator 01 XT oscillator 10 HS oscillator 11 RC oscillator Note 1 Refer to the PIC16C5X Programming Specification Literature Number DS30190 to determine how to access the configuration word Legend R Readable bit W Writable bit n Value at POR 1 bit is set U Unimplemented bit read as 0 bit is cleared X bit is unknown DS30453D page 44 Preliminary 2002 Microchip Technology Inc PIC16C5X REGISTER 9 2 CONFIGURATION WORD FOR PIC16C54 C55 C56 C57 CP WDTE FOSC1 FOSCO bit 11 bit 0 bit 11 4 Unimplemented Read as 0 bit 3 CP Code protection bit 1 Code protection off 0 Code protection on bit 2 WDTE Watchdog timer enable bit 1 WDT enabled 0 WDT disabled bit 1 0 FOSC1 FOSCO Oscillator selection bits 00 LP oscillator 01 XT oscillator 10 HS oscillator 11 RC oscillator Note 1 Refer to the PIC16C5X Programming Specifications Literature Number DS30190 to determine how to access the configuration word 2 PIC16LV54A supports XT RC and LP oscillator only Legend R Readable bit W Writa
90. A PIC17C762 and PIC17C766 All neces sary hardware is included to run basic demo programs which are supplied on a 3 5 inch disk A programmed sample is included and the user may erase it and program it with the other sample programs using the PRO MATE II device programmer or the PICSTART Plus development programmer and easily debug and test the sample code In addition the PICDEM 17 dem onstration board supports downloading of programs to and executing out of external FLASH memory on board The PICDEM 17 demonstration board is also usable with the MPLAB ICE in circuit emulator or the PICMASTER emulator and all of the sample programs can be run and modified using either emulator Addition ally a generous prototype area is available for user hardware 11 15 KEELOQ Evaluation and Programming Tools KEELOO evaluation and programming tools support Microchip s HCS Secure Data Products The HCS eval uation kit includes a LCD display to show changing codes a decoder to decode transmissions and a pro gramming interface to program test transmitters DS30453D page 64 Preliminary O 2002 Microchip Technology Inc PIC16C5X DEVELOPMENT TOOLS FROM MICROCHIP TABLE 11 1 S90119p 199 aep igejrene 10 S uo ejqejreAe SI 00 JUSUIdOJSASG y oul KBojouuoe dIY90J9IN 1961002 yx LL 94 YL El ZL S9 VI 9 Z9D9LOIA UUM LOOFYLNG Je66ngeg 1n2415 u GO gav IAW eui esn 0 moy uo uomeuuojur 10 uioo diu90J
91. C to 125 C Minimum mean 3s 40 C to 125 C 10000 1000 ES T A 6 0V 1 m 5 5V 1111 100 5 0V 4 5V 4 0V 3 5V 3 0V 2 5V 10 0 01 0 1 1 Freq MHz O 2002 Microchip Technology Inc Preliminary DS30453D page 125 PIC16C5X FIGURE 16 16 WDT TIMER TIME OUT PERIOD vs Vpp FIGURE 16 17 TRANSCONDUCTANCE gm OF HS OSCILLATOR vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Typical statistical mean 25 C Minimum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C 50 Minimum mean 3s 40 C to 125 C 9000 45 8000 40 7000 35 T 6000 3 g 30 5 Max 85 C 5000 a lt 2 25 a 4000 Max 70 C 5 20 Typ 25 C 3000 os 15 Min 85 C Min 0 C 2000 10 Min 40 C 100 5 2 0 3 0 4 0 5 0 6 0 7 0 0 VDD Volts 2 0 3 0 4 0 5 0 6 0 7 0 Note 1 Prescaler set to 1 1 VoD Volts DS30453D page 126 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 16 18 TRANSCONDUCTANCE FIGURE 16 19 T
92. C16C5X FIGURE 17 1 PIC16C54C 55A 56A 57C 58B 04 20 VOLTAGE FREQUENCY GRAPH 0 C lt TA x 70 C COMMERCIAL TEMPS 6 0 5 5 5 0 VoD 4 5 Volts 4 0 3 5 3 0 2 5 0 4 10 20 25 Frequency MHz Note 1 The shaded region indicates the permissible combinations of voltage and frequency 2 The maximum rated speed of the part limits the permissible combinations of voltage and frequency Please reference the Product Identification System section for the maximum rated speed of the parts FIGURE 17 2 PIC16C54C 55A 56A 57C 58B 04 20 VOLTAGE FREQUENCY GRAPH 40 C x T4 lt 0 C 70 C lt TA x 125 C OUTSIDE OF COMMERCIAL TEMPS 6 0 5 5 5 0 VoD 4 5 Volts 4 0 3 5 3 0 2 5 2 0 0 4 10 20 25 Frequency MHz Note 1 The shaded region indicates the permissible combinations of voltage and frequency 2 The maximum rated speed of the part limits the permissible combinations of voltage and frequency Please reference the Product Identification System section for the maximum rated speed of the parts DS30453D page 132 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 17 3 PIC16LC54C 55A 56A 57C 58B VOLTAGE FREQUENCY GRAPH 0 C lt TA lt 85 C 6 0 5 5 5 0 VoD 4 5 Volts 4 0 3 5 3 0 2 5 2 0 0 4 10 20 25 Frequency MHz Note 1 The shaded region indicates the permissible combinations of voltage and frequency 2 The maxim
93. Hz NN AW NOOR AGM uououous lt lt lt lt lt lt lt FIGURE 16 13 MAXIMUM IDD vs FREQUENCY WDT DISABLED RC MODE 100 PF 40 C to 85 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 1000 Z z 3 E a a A 6 0V 5 5V LL 5 0V 100 4 5V 4 0V 3 5V 3 0V 2 5V 10 0 01 0 1 1 10 Freq MHz DS30453D page 124 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 16 14 TYPICAL IDD vs FREQUENCY WDT DISABLED RC MODE 300 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 1000 T i a gt x 6 0V deep eed 100 LE 5 0V 4 5V 4 0V 3 5V 3 0V 25V A 10 0 01 0 1 1 Freq MHz FIGURE 16 15 MAXIMUM IDD vs FREQUENCY WDT DISABLED RC MODE 300 PF 40 C to 85 C Typical statistical mean 25 C Maximum mean 3s 40
94. Hz LP osc mode These parameters are characterized but not tested Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period DS30453D page 74 Preliminary O 2002 Microchip Technology Inc PIC16C5X TABLE 12 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C54 55 56 57 Standard Operating Conditions unless otherwise specified a A NE o 40 C lt TA 125 C for extended wr Symbol Characteristic Min Typt Max Units Conditions 1 Tosc External CLKIN Period 250 ns XT osc mode 100 ns 10 MHz mode 50 ns HS osc mode Comm lnd 62 5 ns HS osc mode Ext 25 us LP osc mode Oscillator Period 250 ns RC osc mode 250 10 000 ns XT osc mode 100 250 ns 10 MHz mode 50 250 ns HS osc mode Comm lnd 62 5 250 ns HS osc mode Ext
95. IC16LCSX 25 12 pA VDD 2 5V WDT enabled Commercial 0 25 40 A VDD 2 5V WDT disabled Commercial 2 5 14 A VDD 2 5V WDT enabled Industrial 0 25 50 A VDD 2 5V WDT disabled Industrial D006A PIC16C5X 4 0 12 uA VDD 3 0V WDT enabled Commercial 0 25 40 UA VDD 3 0V WDT disabled Commercial 5 0 14 A VDD 3 0V WDT enabled Industrial 0 3 5 0 pA VDD 3 0V WDT disabled Industrial Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested T Data in Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the
96. IP 18 pin DIP 18 pin DIP SOIC SOIC SOIC SOIC SOIC 20 pin SSOP 20 pin SSOP 28 pin SSOP 20 pin SSOP 20 pin SSOP I O current capability All PICmicro Family devices have Power on Reset selectable Watchdog Timer selectable Code Protect and high Features PIC16C57 PIC16CR57 PIC16C58 PIC16CR58 Maximum Operation Frequency 40 MHz 20 MHz 40 MHz 20 MHz EPROM Program Memory x12 words 2K 2K ROM Program Memory x12 words 2K 2K RAM Data Memory bytes 72 72 73 73 Timer Module s TMRO TMRO TMRO TMRO VO Pins 20 20 12 12 Number of Instructions 33 33 33 33 Packages 28 pin DIP SOIC 28 pin DIP SOIC 18 pin DIP SOIC 18 pin DIP SOIC 28 pin SSOP 28 pin SSOP 20 pin SSOP 20 pin SSOP 1 O current capability All PICmicro Family devices have Power on Reset selectable Watchdog Timer selectable Code Protect and high DS30453D page 6 Preliminary O 2002 Microchip Technology Inc PIC16C5X 2 0 PIC16C5X DEVICE VARIETIES A variety of frequency ranges and packaging options are available Depending on application and production requirements the proper device option can be selected using the information in this section When placing orders please use the PIC16C5X Product Identifica tion System at the back of this data sheet to specify the correct part number For the PIC16C5X family of devices there are four device types as
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98. P mode without losing RAM data The supply current is mainly a function of the operating voltage and frequency Other factors such as bus load ing oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled dis N a b abled as specified For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type O 2002 Microchip Technology Inc Preliminary DS30453D page 157 PIC16C5X 19 2 DC Characteristics PIC16C54C C55A C56A C57C C58B 40 Commercial DC CHARACTERISTICS Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA lt 70 C for commercial ie Symbol Characteristic Min Typt Max Units Conditions D030 ViL Input Low Voltage I O Ports Vss 0 8 V 45V lt VpD lt 5 5V MCLR Schmitt Trigger Vss 1 0 15Vpp V TOCKI Schmitt Trigger Vss 1 0 15Vpp V OSC1 Vss 0 2 VDD V HS 20 MHz lt Fosc lt 40 MHz D040 VIH Input High Voltage I O ports 2 0 VDD V 4 5V lt VDD lt 5 5V MCLR Schmitt Trigger 0 85 VDD VDD V
99. R56A C57C CR57C C58B CR58B Commerciales iret 134 138 Extended Industrial PIC16CR54A Commercials eris 80 83 Extended Industrial PIC16LV54A Commercial rr 108 109 S 108 109 Development Support sse 61 Device Characterization PIC16C54 55 56 57 CR54A sss 91 PIG16C54A eei ch nome ems 117 PIC16C54C C55A C56A C57C C58B 40 165 Device Reset Timer DRT 2 29 Device Varieties PET Digit Carry DC bit 9 29 DE iss ct eerie ee a ee eret Ry er Pee net EO e Yee een 23 E Electrical Specifications PIC16C54 55 56 57 PIG16C54A Linie neni err PIC16C54C CR54C C55A C56A CR56A C57C CR570 C58B CRS8B 0 rr 131 PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B 40 rr 155 PIC16CR54A 0 eeen 79 Errata External Power On Reset Circuit 21 F Family of Devices PIG BESX iia a 6 FSR Register 5 Vall On reset ento need Ee dius 20 G General Purpose Registers Value on reset 20 GOTO udi e A taie 31 55 H High Performance RISC CPU nn 1 l lO Interfacing sr ne iii 35 1 0 Ports n 95 O Programming Considerations 36 ICEPIC In Circuit Emulator 62 I LOCATIONS x lin reote eet 43 47 INC Fs 55 INCFSZ vee 55 INDF Register nog Value on reset 20 Indirect Da
100. RANSCONDUCTANCE gm OF LP OSCILLATOR gm OF XT OSCILLATOR vs VDD vs VDD Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 45 2500 40 gt Max 40 C Max 409C 2000 35 30 1500 25 s Typ 25 C E 3 5 20 5 1000 Lo 15 pee Ead Min 85 C 500 10 5 0 2 0 3 0 4 0 5 0 6 0 7 0 0 20 30 40 50 60 70 VPDAMOIES VDD Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 127 PIC16C5X FIGURE 16 20 PORTA B AND C loH vs FIGURE 16 21 PORTA B AND C Ion vs Von VOH VDD 3V VDD 5V Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 0 0 L 1 Min 85 C 5 Min 85 C 10 a 10 g E E M 20 5 7 Typ 25 C 3 Typ 25 C 15 o Max 40 C _30 Max 40 C 20 L 40 25 15 20 25 30 35 40 45 50 0 0 5 1 0 15 2 0 2 5 3 0 VOH Volts VOH Volts DS30453D page 128 Preliminary 2002 Microchip Technology Inc PIC16C5X D CloL vs FIGURE 16 23 PORTA B AND C lor vs VoL VDD 5V
101. S lt 4 3 gt are set or cleared depending on the different RESET conditions Table 5 1 These bits may be used to determine the nature of the RESET Table 5 3 lists a full description of RESET states of all registers Figure 5 1 shows a simplified block diagram of the On chip Reset circuit TABLE 5 1 STATUS BITS AND THEIR SIGNIFICANCE Condition TO PD Power On Reset 1 1 MCLR Reset normal operation u u MCLR Wake up from SLEEP 1 0 WDT Reset normal operation 0 1 WDT Wake up from SLEEP 0 0 Legend u unchanged x unknown unimplemented read as 0 TABLE 5 2 SUMMARY OF REGISTERS ASSOCIATED WITH RESET h A F gt Value on Value on Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR MCLR and WDT Reset 03h STATUS PA2 PAI PAO TO PD Z DC C 0001 1xxx 000g guuu Legend u unchanged x unknown g see Table 5 1 for possible values O 2002 Microchip Technology Inc Preliminary DS30453D page 19 PIC16C5X TABLE 5 3 RESET CONDITIONS FOR ALL REGISTERS Register Address Power On Reset MCLR or WDT Reset W N A XXXX XXXX uuuu uuuu TRIS N A 1111 1111 1111 1111 OPTION N A 11 1111 11 1111 INDF 00h XXXX XXXX uuuu uuuu TMRO 01h XXXX XXXX uuuu uuuu PCL 02h 1111 1111 TITI LITT STATUS 03h 0001 1xxx 000g quuu FSR 04h 1xxx XXXX luuu uuuu PORTA 05h XXXX uuu
102. T Q1 cycle to Port out valid 100 ns 18 TosH2iol OSC1 Q2 cycle to Port input invalid TBD ns I O in hold time 19 TioV2osH Port input valid to OSC1T TBD ns VO in setup time 20 TioR Port output rise time 10 25 ns 21 TioF Port output fall time 10 25 ns These parameters are characterized but not tested These parameters are design targets and are not tested No characterization data available at this time Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 Measurements are taken in RC Mode where CLKOUT output is 4 x Tosc 2 Please refer to Figure 15 1 for load conditions 2002 Microchip Technology Inc Preliminary DS30453D page 113 PIC16C5X FIGURE 15 4 RESET WATCHDOG TIMER AND DEVICE RESET TIMER TIMING PIC16C54A VDD E 5 MCLR 7 Internal i POR i 32 DRT Time out 32 Internal i RESET i Watchdog 1 X Timer i i RESET 34 Note 1 Please refer to Figure 15 1 for load conditions ar AS o5 c Note 1 TABLE 15 3 RESET WATCHDOG TIMER AND DEVICE RESET TIMER PIC16C54A AC Characteristics 40 C lt TA lt 85 C for industrial 20 C lt TA lt 85 C for industrial Standard Operating Conditions unless oth
103. T The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ 2002 Microchip Technology Inc Preliminary DS30453D page 135 PIC16C5X 17 1 DC Characteristics PIC16C54C C55A C56A C57C C58B 04 20 Commercial Industrial PIC16LC54C LC55A LC56A LC57C LC58B 04 Commercial Industrial PIC16CR54C CR56A CR57C CR58B 04 20 Commercial Industrial PIC16LCR54C LCR56A LCR57C LCR58B 04 Commercial Industrial PIC16LC5X PIC16LCR5X Commercial Industrial Standard Operating Conditions unless otherwise specified Operating Temperature 0 C TA 70 C for commercial 40 C lt TA lt 85 C for industrial PIC16C5X PIC16CR5X Commercial Industrial Standard Operating Conditions unless otherwise specified 0 C lt TA lt 70 C for commercial Operating Temperature 40 C lt TA lt 85 C for industrial Param No Symbol Characteristic Device Min Typt Max Units Conditions IPD Power down Current D020 PIC16LC5X 0 25 2 HA VDD 2 5V WDT disabled Commercial 0 25 3 HA VDD 2 5V WDT disabled Industrial 1 5 HA VDD 2 5V WDT enabled Commercial 1 25 8 HA VDD 2 5V WDT enabled Industrial D020A PIC16C5X 0 25 4 0 HA VDD 3 0V WDT disabled Commercial 0 25 5 0 LA VDD 3 0V WDT disabled Industrial 18 7 0 UA VDD 5 5V WDT disabled Commercial
104. TION and FSR registers since these have changed 5 Change RESET vector to proper value for processor used 6 Remove any use of the ADDLW RETURN and SUBLW instructions 7 Rewrite any code segments that use interrupts 2002 Microchip Technology Inc Preliminary DS30453D page 183 PIC16C5X NOTES RR A A A H Ai DS30453D page 184 Preliminary O 2002 Microchip Technology Inc PIC16C5X INDEX A Absolute Maximum Ratings PIC16C54 55 56 57 sss 67 PIC16G54A n cnet a tedious 103 PIC16C54C CR54C C55A C56A CR56A C57C CR57C G58B GCR58B ius V 131 PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B 40 cccoccccoccncconcconcnnnnononcconnnnconnnncconcnnnnns 155 APPLICATIONS ri ona 5 Architectural Overview eese 9 Assembler MPASM Assembler ccccccnncococccncccononnccnnncnnonnnnnnccnonnnnns 61 B Block Diagram On Chip Reset Circuit PIC16C5X Series IMO TMRO WDT Prescaler Watchdog Timer Brown Out Protection Circuit CMOS Technology Gode Protection nee ens li e Tri et te Compatibility 2 Configuration Bits essen 44 D Data Memory Organization 26 DC Characteristics PIC16C54 55 56 57 Commercial Extended s Industrial hee cites PIC16C54A Commercial 104 109 Extended Industrial PIC16C54C C55A C56A C57C C58B 40 Commercial ls 157 158 PIC16C54C CR54C C55A C56A C
105. TppS T F Frequency T Time Lowercase letters pp and their meanings pp EE 2 to mc MCLR ck CLKOUT osc oscillator Cy cycle time os OSCI drt device reset timer t0 TOCKI io I O port wdt watchdog timer Uppercase letters and their meanings S F Fall P Period H High R Rise Invalid Hi impedance V Valid L Low Z Hi impedance FIGURE 12 1 LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS PIC16C54 55 56 57 CL 50 pF for all pins and OSC2 for RC mode 0 15pF for OSC2 in XT HS or LP modes when external clock is used to drive OSC1 O 2002 Microchip Technology Inc Preliminary DS30453D page 73 PIC16C5X 12 7 Timing Diagrams and Specifications FIGURE 12 2 EXTERNAL CLOCK TIMING PIC16C54 55 56 57 CLKOUT TABLE 12 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C54 55 56 57 Standard Operating Conditions unless otherwise specified He adil A co o 40 C lt TA 125 C for extended aly Symbol Characteristic Min Typt Max Units Conditions 1A Fosc External CLKIN Frequency DC 4 0 MHz XT osc mode DC 10 MHz 10 MHz mode DC 20 MHz HS osc mode Comm lnd DC 16 MHz HS osc mode Ext DC 40 kHz LP osc mode Oscillator Frequency DC 4 0 MHz RC osc mode 0 1 4 0 MHz XT osc mode 4 0 10 MHz 10 MHz mode 4 0 20 MHz HS osc mode Comm lnd 4 0 16 MHz HS osc mode Ext DC 40 k
106. UMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER Value on Value on Address Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 BitO Power On MCLR and Reset WDT Reset N A OPTION Tosc Tose PSA PS2 PSI PSO 11 1111 11 1111 Legend u unchanged unimplemented read as Shaded cells not used by Watchdog Timer DS30453D page 46 Preliminary 2002 Microchip Technology lnc PIC16C5X 9 3 Power Down Mode SLEEP A device may be powered down SLEEP and later powered up Wake up from SLEEP 9 3 1 SLEEP The Power down mode is entered by executing a SLEEP instruction If enabled the Watchdog Timer will be cleared but keeps running the TO bit STATUS lt 4 gt is set the PD bit STATUS lt 3 gt is cleared and the oscillator driver is turned off The O ports maintain the status they had before the SLEEP instruction was executed driving high driving low or hi impedance It should be noted that a RESET generated by a WDT time out does not drive the MCLR VPP pin low For lowest current consumption while powered down the TOCKI input should be at VDD or Vss and the MCLR VPP pin must be at a logic high level MCLR VIH 9 3 2 WAKE UP FROM SLEEP The device can wake up from SLEEP through one of the following events 1 An external RESET input on MCLR VPP pin 2 A Watchdog Timer Time out Reset if WDT was enabled Both of these events cause a de
107. XIMUM IpD vs FREQUENCY EXTERNAL CLOCK 55 C TO 125 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10 1 0 y eem A 65 Bel 6 0 SH 5 5 PLATI 5 0 CIA 4 0 3 5 3 0 2 5 0 01 10K 100K 1M 10M 100M External Clock Frequency Hz O 2002 Microchip Technology Inc Preliminary DS30453D page 97 PIC16C5X TRANSCONDUCTANCE FIGURE 14 15 WDT TIMER TIME OUT FIGURE 14 16 PERIOD vs Voo gm OF HS OSCILLATOR vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Tvnical Lo A AA j S 5 ypical statistical mean 25 C Minimum mean 3S 6191870 Maximum mean 3s 40 C to 125 C 50 Minimum mean 3s 40 C to 125 C 9000 45 m 8000 40 7000 35 2 6000 E Ss Max 85 C 5 ant 5000 E 2 lt 2 25 3 Max 70 C E 4000 20 Typ 25 C ite 3000 i Min 85 C in 10 Min 40 C 100 5 2 0 3 0 4 0 5 0 6 0 7 0 0 ep Volts 20 30 40 50 60 7 0 Note 1 Prescaler set to 1 1 VOD Volts DS30453D page 98 Preliminary O 2002 Microchip Technology Inc PIC16C5X
108. Z VOL x IOL NOTICE Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied Exposure to maximum rating conditions for extended periods may affect device reliability O 2002 Microchip Technology Inc Preliminary DS30453D page 67 PIC16C5X 12 1 DC Characteristics PIC16C54 55 56 57 RC XT 10 HS LP Commercial PIC16C54 55 56 57 RC XT 10 HS LP Standard Operating Conditions unless otherwise specified Commercial Operating Temperature 0 C lt TA lt 70 C for commercial Param T A A No Symbol Characteristic Device Min Typt Max Units Conditions D001 VDD Supply Voltage PIC16C5X RC 3 0 6 25 V PIC16C5X XT 3 0 6 25 V PIC16C5X 10 4 5 5 5 V PIC16C5X HS 4 5 5 5 V PIC16C5X LP 2 5 6 25 V D002 VDR RAM Data Retention Voltage 1 97 V Device in SLEEP Mode D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvDD__ VDD Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset D010 IDD Supply Current PIC16C5X RC 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC16C5X XT 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC
109. _ DH 500 sg z gt L a x s o 400 o i he 300 R 10K 4 es 200 0 0 Measured on DIP Packages T 25 C 05 30 35 40 45 50 55 60 100 VDD Volts R 100K 0 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 93 PIC16C5X FIGURE 14 6 MAXIMUM IPD vs VDD FIGURE 14 8 MAXIMUM IPD vs VDD WATCHDOG DISABLED WATCHDOG ENABLED Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 100 60 50 125C pe hebes Ee 11 PPA 40 x709C 0 C lt 30 4009 A B T 125 C 15520 i l 1 a a 0 25 30 85 40 45 50 55 60 65 7 0 25 30 35 40 45 50 55 60 65 70 VDD Volts VDD Volts IPD with WDT enabled has two components The leakage current which increases with higher temper ature and the operating current of the WDT logic which FIGURE 14 7 TYPICAL IPD vs VDD WATCHDOG ENABLED increases with lower temperature At 40 C the latter m dominates explaining the apparently anomalous behav Typical st
110. a we let 17 0 Electrical Characteristics PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B 18 0 Device Characterization PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B T 19 0 Electrical Characteristics PIC16C54C C55A C56A C57C C58B 40MHZ ire 20 0 Device Characterization PIC16C54C C55A C56A C57C C58B 40MHZ ie 21 0 Packaging Information ooa reote A ta dirt es esse cin Appendix aereum E HY On Line Support 2 Reader RESpONSe MEE A A A A A R EE Product Identification SYSTEM aka eie De ra aree n a rar Re uh nA de TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products To this end we will continue to improve our publications to better suit your needs Our publications will be refined and enhanced as new volumes and updates are introduced If you have any questions or comments regarding this publication please contact the Marketing Communications Department via E mail at docerrorsOmail microchip com or fax the Reader Response Form in the back of this data sheet to 480 792 4150 We welcome your feedback Most Current Data Sheet To obtain the most up to date version of this data sheet please register at our Worldwide Web site at http www microchip com You can determine the version of a data sheet by examining its literature number found on the bottom outside
111. ake programming with the PIC16C5X simple yet efficient In addition the learning curve is reduced significantly The PIC16C5X device contains an 8 bit ALU and work ing register The ALU is a general purpose arithmetic unit It performs arithmetic and Boolean functions between data in the working register and any register file The ALU is 8 bits wide and capable of addition subtrac tion shift and logical operations Unless otherwise mentioned arithmetic operations are two s comple ment in nature In two operand instructions typically one operand is the W working register The other operand is either a file register or an immediate con stant In single operand instructions the operand is either the W register or a file register The W register is an 8 bit working register used for ALU operations It is not an addressable register Depending on the instruction executed the ALU may affect the values of the Carry C Digit Carry DC and Zero Z bits inthe STATUS register The C and DC bits operate as a borrow and digit borrow out bit respec tively in subtraction See the SUBWF and ADDWF instructions for examples A simplified block diagram is shown in Figure 3 1 with the corresponding device pins described in Table 3 1 for PIC16C54 56 58 and Table 3 2 for PIC16C55 57 2002 Microchip Technology Inc Preliminary DS30453D page 9 PIC16C5X
112. al 11 37 LA Fosc 32 kHz VDD 2 5V LP mode Extended DO10A PIC16C54A 1 8 3 3 mA Fosc 4 0 MHz VDD 5 5V RC 9 and XT modes 4 8 10 mA Fosc 10 MHz VDD 5 5V HS mode 9 0 20 mA Fosc 20 MHz VDD 5 5V HS mode Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ
113. al 20 C lt TA lt 85 C for industrial PIC16LV54A 02l 40 C lt TA 125 C for extended iod Symbol Characteristic Min Typt Max Units Conditions 1 Tosc External CLKIN Period 250 ns XT osc mode 500 ns XT osc mode PIC16LV54A 250 ns HS osc mode 04 100 ns HS osc mode 10 50 ns HS osc mode 20 5 0 us LP osc mode Oscillator Period 250 ns RC osc mode 500 ns RC osc mode PIC16LV54A 250 10 000 ns XT osc mode 500 ns XT osc mode PIC16LV54A 250 250 ns HS osc mode 04 100 250 ns HS osc mode 10 50 250 ns HS osc mode 20 5 0 200 us LP osc mode 2 Tcy Instruction Cycle Time 4 Fosc m 3 TosL TosH Clock in OSC1 Low or 85 ns XT oscillator High Time 20 ns HS oscillator 2 0 us LP oscillator 4 TosR TosF Clock in OSC1 Rise or 25 ns XT oscillator Fall Time 25 ns HS oscillator mE 50 ns LP oscillator These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable
114. al 40 C lt TA 85 C for industrial Param A A No Symbol Characteristic Device Min Typt Max Units Conditions Vo Supply Voltage DO01 PIC16LC5X 2 5 5 5 V 40 C lt TA lt 85 C 16LCR5X 2 7 5 5 V 40 C TA x 0 C 16LC5X 2 5 5 5 V 0 C lt TA lt 85 C 16LC5X PIC16C5X RC XT LP and HS mode D001A 3 0 515 V from 0 10 MHz 4 5 55 V from 10 20 MHz D002 VDR RAM Data Retention Volt 1 5 V Device in SLEEP mode age D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvpD VDp Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset Legend Rows with standard voltage device data only are shaded for improved readability These parameters are characterized but not tested T Data in Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply currentis mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current con sumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail al
115. al standby current with WDT disabled 3V 0 C to 70 C Note ln this document figure and table titles refer to all varieties of the part number indi cated i e The title Figure 15 1 Load Conditions For Device Timing Specifica tions PIC16C54A also refers to PIC16LC54A and PIC16LV54A parts unless specifically called out otherwise O 2002 Microchip Technology Inc Preliminary DS30453D page 1 PIC16C5X Pin Diagrams PDIP SOIC Windowed CERDIP PDIP SOIC Windowed CERDIP RAZ 1 Se 18 lt gt RAI took 7 2a WerRwee RA3 lt 11011011 H pui m voo 12 27 oSC1 CLKIN Tock 3 000000 N C NOTRE 204 PESOS 151 OSC2ICLKOUT bk 3 26 OSC2 CLKOUT vs 05 9998 9g 1411 Vpo 4 25 gt RC7 RBO lt gt s HOAHAS 13 RB7 NC 5 gu 20 Ace RB1 gt 7 12 lt RB6 RAO ll 000 2311 RC5 RB2 lt 18 11 lt gt RB5 RAT lt gt 7 o 201 4 RC4 RB3 19 10
116. all pins and OSC2 for RC mode CL 0 15pF for OSC2 in XT HS or LP modes when external clock is used to drive OSC1 Vss 2002 Microchip Technology Inc Preliminary DS30453D page 139 PIC16C5X 17 5 Timing Diagrams and Specifications FIGURE 17 6 EXTERNAL CLOCK TIMING PIC16C5X PIC16CR5X Q4 Q1 Q2 i Q3 i Q4 i Q1 OSC1 CLKOUT TABLE 17 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C5X PIC16CR5X Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt Ta lt 70 C for commercial 40 C lt Ta lt 85 C for industrial 40 C lt TA lt 125 C for extended AC Characteristics b Symbol Characteristic Min Typt Max Units Conditions Fosc External CLKIN Frequency DO lt 4 0 MHz XT osc mode DC 4 0 MHz HS osc mode 04 DC 20 MHz HS osc mode 20 DC 200 kHz LP osc mode Oscillator Frequency DC 4 0 MHz RC osc mode 0 45 4 0 MHz XT osc mode 4 0 4 0 MHz HS osc mode 04 4 0 20 MHz HS osc mode 20 5 0 200 kHz LP osc mode 1 Tosc External CLKIN Period 250 ns XT osc mode 250 ns HS osc mode 04 50 ns HS osc mode 20 5 0 us LP osc mode Oscillator Period 250 ns RC osc mode 250 2 200 ns XT osc mode 250 250 ns HS osc mode 04 50 250 ns HS osc mode 20 5 0 200 us LP osc mode
117. an 25 C A j Maximum mean 3s 40 C to 125 C Minimi Meal de nO Ge 125 C Minimum mean 3s 40 C to 125 C 0 50 45 10 40 Typ 125 C 35 E 2 9 30 o Typ 85 C E Typ 125 C Typ 25 C 2 25 Typ 85 C 30 yp 400 20 T 25 C mP 15 Typ 40 C 40 10 15 20 25 30 35 40 45 50 VOH Volts 5 0 2 0 3 0 4 0 5 0 6 0 7 0 VDD Volts Note 1 Prescaler setto 1 1 TABLE 20 1 INPUT CAPACITANCE Typical Capacitance pF ER 18L PDIP 18L SOIC RA port 5 0 4 3 RB port 5 0 4 3 MCLR 17 0 17 0 OSC1 4 0 3 5 OSC2 CLKOUT 4 3 3 5 TOCKI 3 2 2 8 All capacitance values are typical at 25 C A part to part variation of 25 three standard deviations should be taken into account 2002 Microchip Technology Inc Preliminary DS30453D page 169 PIC16C5X FIGURE 20 9 loL vs VoL VDD 5V Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 90 80 Max 40 C 70 60 50 loL mA 40 30 20 10 0 00 05 10 15 20 25 3 0 VOL Volts DS30453D page 170 Preliminary O 2002 Microchip Technology Inc 21 0 PACKAGING INFORMATION 21 1 Package Marketing Information 18 Lead PDIP Example XXXXXXXXXXXXXXXXX PIC16C56A XXXXXXXXXXXXXXXXX O 041
118. anages the creation and modification of library files The MPLINK object linker features include Integration with MPASM assembler and MPLAB C17 and MPLAB C18 C compilers Allows all memory areas to be defined as sections to provide link time flexibility The MPLIB object librarian features include Easier linking because single libraries can be included instead of many smaller files Helps keep code maintainable by grouping related modules together Allows libraries to be created and modules to be added listed replaced deleted or extracted 11 5 MPLAB SIM Software Simulator The MPLAB SIM software simulator allows code devel opment in a PC hosted environment by simulating the PICmicro series microcontrollers on an instruction level On any given instruction the data areas can be examined or modified and stimuli can be applied from a file or user defined key press to any of the pins The execution can be performed in single step execute until break or trace mode The MPLAB SIM simulator fully supports symbolic debug ging using the MPLAB C17 and the MPLAB C18 C com pilers and the MPASM assembler The software simulator offers the flexibility to develop and debug code outside of the laboratory environment making it an excellent multi project software development tool 11 6 MPLAB ICE High Performance Universal In Circuit Emulator with MPLAB IDE The MPLAB ICE universal in circuit emulator is intended to p
119. andbook The POR circuit does not produce an internal RESET when VDD declines O 2002 Microchip Technology Inc PIC16C5X FIGURE 5 2 EXTERNAL POWER ON RESET CIRCUIT FOR SLOW VDD POWER UP VDD VDD AD R R1 m ANV MCLR c PIC16C5X External Power On Reset circuit is required only if VDD power up is too slow The diode D helps discharge the capacitor quickly when VDD powers down R lt 40 KQ is recommended to make sure that voltage drop across R does not violate the device electrical specification R1 1000 to 1 kQ will limit any current flow ing into MCLR from external capacitor C in the event of MCLR pin breakdown due to Electro static Discharge ESD or Electrical Over stress EOS Preliminary DS30453D page 21 PIC16C5X FIGURE 5 3 TIME OUT SEQUENCE ON POWER UP MCLR NOT TIED TO VDD VDD _ y i MCLA Os INTERNAL POR TDRT DRT TIME OUT INTERNAL RESET FIGURE 5 4 TIME OUT SEGUENCE ON POWER UP MCLR TIED TO VDD FAST VDD RISE TIME VDD ar i MCLR INTERNAL POR l TORT DRT TIME OUT INTERNAL RESET FIGURE 5 5 TIME OUT SEQUENCE ON POWER UP MCLR TIED TO VDD SLOW VDD RISE TIME MI VDD MCLR INTERNAL POR TDRT gt DRT TIME OUT INTERNAL RESET When VDD rises slowly the TDRT time out expires long before VDD has reached its final value In
120. atistical mean 25 C ior Maximum mean 3s 40 C to 125 C 3 Minimum mean 3s 40 C to 125 C 20 18 16 14 T 25 C 12 10 lt 3 a 8 amp 6 4 2 0 25 30 35 40 45 50 55 6 0 VDD Volts DS30453D page 94 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 14 9 VTH INPUT THRESHOLD VOLTAGE OF I O PINS vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 2 00 1 80 850 40 C io 1 60 x 2 140 a 570 a D A dp er gum E 1 20 gt C 1 00 sc to 85 Min 40 T 0 80 gue 0 60 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 14 10 ViH ViL OF MCLR TOCKI AND OSC1 RC MODE vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 4 5 4 0 3 5 3 0 2 25 E Z 50 I gt o C 1 5 Vi max 40 C to 85 C 1 0 VIH typ 25 C 0 5 Vit min 40 C to 85 C 0 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts Note These input pins have Schmitt Trigger input buffers 2002 Microchip Technology Inc Preliminary DS30453D page 95 PIC16C5X FIGURE 14 11 VTH INPUT THRESHOLD VOLTAGE OF OSC1 INPUT XT HS AND LP MODES vs VDD Typica
121. be estimated by the formula IR VDD 2REXT mA with REXT in KQ 4 The oscillator start up time can be as much as 8 seconds for XT and LP oscillator selection on wake up from SLEEP mode or during initial power up DS30453D page 108 Preliminary O 2002 Microchip Technology Inc PIC16C5X 15 4 DC Characteristics PIC16C54A 04 10 20 PIC16LC54A 04 PIC16LV54A 02 Commercial PIC16C54A 041 101 201 PIC16LC54A 041 PIC16LV54A 021 Industrial PIC16C54A 04E 10E 20E PIC16LC54A 04E Extended Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA lt 70 C for commercial DC CHARACTERISTICS 40 C lt TA x 85 C for industrial 20 C lt TA lt 85 C for industrial PIC16LV54A 021 40 C lt TA lt 125 C for extended ie Symbol Characteristic Min Typt Max Units Conditions D030 VIL Input Low Voltage 1 O ports Vss 0 2 VDD V Pinathi impedance MCLR Schmitt Trigger Vss 0 15 VDD V TOCKI Schmitt Trigger Vss 0 15 VDD V OSC1 Schmitt Trigger Vss 0 15VbD V RC mode only OSC1 Vss 0 3 VDD XT HS and LP modes D040 VIH Input High Voltage O ports 0 2 VDD 1 VDD V For all Voo O ports 2 0 VDD V 4 0V lt Von lt 5 5V 4 MCLR Schmitt Trigger 0 85 VDD m VDD V TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 Schmitt Trigger 0 85 VDD VDD V RC mode only OSC1 0 7 VDD VDD V XT HS and LP modes D050 VHys Hys
122. ble bit U Unimplemented bit read as n Value at POR 1 bit is set 0 bit is cleared X bit is unknown 2002 Microchip Technology Inc Preliminary DS30453D page 45 PIC16C5X 9 2 Watchdog Timer WDT The Watchdog Timer WDT is a free running on chip RC oscillator which does not require any external com ponents This RC oscillator is separate from the RC oscillator of the OSC1 CLKIN pin That means that the WDT will run even if the clock on the OSC1 CLKIN and OSC2 CLKOUT pins have been stopped for example by execution of a SLEEP instruction During normal Operation or SLEEP a WDT Reset or Wake up Reset generates a device RESET The TO bit STATUS lt 4 gt will be cleared upon a Watch dog Timer Reset Section 6 3 The WDT can be permanently disabled by program ming the configuration bit WDTE as a V Section 9 1 Refer to the PIC16C5X Programming Specifications Literature Number DS30190 to determine how to access the configuration word 9 2 1 WDT PERIOD An 8 bit counter is available as a prescaler for the TimerO module Section 8 2 or as a postscaler for the Watchdog Timer WDT respectively For simplicity this counter is being referred to as prescaler through out this data sheet Note that the prescaler may be used by either the TimerO module or the WDT but not both Thus a prescaler assignment for the TimerO module means that there is no prescaler for the WDT and vice v
123. c PIC16C5X FIGURE 16 7 VTH INPUT THRESHOLD VOLTAGE OF 1 0 PINS VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 2 0 ee 1 8 95 C 40 C io 1 6 vor z j gr M pee Typ u gt E 1 2 C 1 0 sc to 85 Min 40 n 0 8 ame 0 6 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 16 8 VTH INPUT THRESHOLD VOLTAGE OF OSC1 INPUT IN XT HS AND LP MODES vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 3 4 3 2 3 0 2 8 2 6 2 4 2 2 2 0 1 8 1 6 1 4 22007 VTH Volts 1 2 1 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 121 PIC16C5X FIGURE 16 9 VIH VIL OF MCLR TOCKI AND OSC1 IN RC MODE vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 45 4 0 3 5 me 3 0 2 2 25 Z 20 I gt 15 vin max 40 C to 85 __ 1 0 Vil typ 425 C 0 5 Vit min 40 C to 485 C 0 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts Note These inpu
124. ce MCLR 5 HA VPIN Vss 0 25V MCLR 0 5 5 HA VPIN VDD TOCKI 3 0 5 3 HA Vss lt VPIN lt VDD OSC1 3 0 5 3 uA Vss lt VPIN lt VDD PIC16C5X XT 10 HS LP DO80 VoL Output Low Voltage I O ports 0 6 V IOL 8 7 mA VDD 4 5V OSC2 CLKOUT 0 6 V loL 1 6 mA VDD 4 5V PIC16C5X RC D090 VoH Output High Voltage 1 O ports VDD 0 7 V lOH 2 5 4 mA VDD 4 5V OSC2 CLKOUT VDD 0 7 V loH 1 0 mA VDD 4 5V PIC16C5X RC These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 For PIC16C5X RC devices the OSC1 CLKIN pin is a Schmitt Trigger input It is not recommended that the PIC16C5X be driven with external clock in RC mode 4 The user may use the better of the two specifications DS30453D page 72 Preliminary O 2002 Microchip Technology Inc PIC16C5X 12 6 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created with one of the following formats 1 TppS2ppS 2
125. corner of any page The last character of the literature number is the version number e g DS30000A is version A of document DS30000 Errata An errata sheet describing minor operational differences from the data sheet and recommended workarounds may exist for current devices As device documentation issues become known to us we will publish an errata sheet The errata will specify the revision of silicon and revision of document to which it applies To determine if an errata sheet exists for a particular device please check with one of the following Microchip s Worldwide Web site http www microchip com Your local Microchip sales office see last page The Microchip Corporate Literature Center U S FAX 480 792 7277 When contacting a sales office or the literature center please specify which device revision of silicon and data sheet include liter ature number you are using Customer Notification System Register on our web site at www microchip com cn to receive the most current information on all of our products O 2002 Microchip Technology Inc Preliminary DS30453D page 3 PIC16C5X NOTES P i i a A nL DS30453D page 4 Preliminary 2002 Microchip Technology Inc MICROCHIP PIC16C5X 8 Bit EPROM ROM Based CMOS Microcontrollers 1 0 GENERAL DESCRIPTION The PIC16C5X from Microchip Technology is a family of low cost high performance 8 bit fully static EPROM ROM based CMOS mi
126. crochip Technology Inc PIC16C5X 12 0 ELECTRICAL CHARACTERISTICS PIC16C54 55 56 57 Absolute Maximum Ratings Ambient Temperature under Dia sise 55 C to 125 C Storage Temperature s cbs e dete ni 65 C to 150 C Voltage on VDD with respect to VSS ii een ens ne nn nn nine OV to 7 5V Voltage on MCLR with respect to VSS osado OV to 14V Voltage on all other pins with respect to Vss 00 rr 0 6V to VDD 0 6V Total power dissipation 2 EE 800 mW Max CUTTONEQUEO VS Pili anni tide dinde nine 150 mA Max CUrrentinto VDD pln x5 el ee eh 100 mA Max current into an input pin TOCKI only siennes 500 uA Input clamp current IIK VI lt O or VI gt VDD o on nn nn nn 20 mA Output clamp current IOK VO lt 0 or Vo gt VDD eee 20 mA Max output current sunk by any I O pin RR 25 MA Max output current sourced by any I O pin RR 20 mA Max output current sourced by a single I O port PORTA B or C ooosonon vonnnnnnnnn non 40 mA Max output current sunk by a single I O port PORTA B or C nennen 50 mA Note 1 Voltage spikes below Vss at the MCLR pin inducing currents greater than 80 mA may cause latch up Thus a series resistor of 50 to 100 Q should be used when applying a low level to the MCLR pin rather than pulling this pin directly to Vss 2 Power Dissipation is calculated as follows Pdis VDD x IDD Y 10H Y VDD VOH x IOH
127. crocontrollers It employs a RISC architecture with only 33 single word single cycle instructions All instructions are single cycle except for program branches which take two cycles The PIC16C5X delivers performance in an order of magnitude higher than its competitors in the same price category The 12 bit wide instructions are highly symmetrical resulting in 2 1 code compression over other 8 bit microcontrollers in its class The easy to use and easy to remember instruction set reduces development time significantly The PIC16C5X products are equipped with special fea tures that reduce system cost and power requirements The Power on Reset POR and Device Reset Timer DRT eliminate the need for external RESET circuitry There are four oscillator configurations to choose from including the power saving LP Low Power oscillator and cost saving RC oscillator Power saving SLEEP mode Watchdog Timer and Code Protection features improve system cost power and reliability The UV erasable CERDIP packaged versions are ideal for code development while the cost effective One Time Programmable OTP versions are suitable for production in any volume The customer can take full advantage of Microchip s price leadership in OTP microcontrollers while benefiting from the OTP s flexibility The PIC16C5X products are supported by a full fea tured macro assembler a software simulator an in cir cuit emulator a low cost development prog
128. ction of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ DS30453D page 82 Preliminary O 2002 Microchip Technology Inc PIC16C5X 13 3 DC Characteristics PIC16CR54A 04 10 20 PIC16LCR54A 04 Commercial PIC16CR54A 041 101 201 PIC16LCR54A 041 Industrial Standard Operating Conditions unless otherwise specified DC CHARACTERISTICS Operating Temperature 0 C lt TA 70 C for commercial 40 C lt TA 85 C for industrial Eod Symbol Characteristic Min Typt Max Units Conditions D030 VIL Input Low Voltage I O ports Vss 0 2 VDD V Pin at hi impedance MCLR Schmitt Trigger Vss 0 15 VDD V TOCKI Schmitt Trigger Vss 0 15 VDD V OSC1 Schmitt Tri
129. cycle whereas for reading the data must be valid at the beginning of the instruction cycle Figure 7 2 Therefore care must be exercised if a write followed by a read operation is carried out on the same I O port The sequence of instructions should allow the pin volt age to stabilize load dependent before the next instruction which causes that file to be read into the CPU is executed Otherwise the previous state of that pin may be read into the CPU rather than the new state When in doubt it is better to separate these instruc tions with a NOP or another instruction not accessing this I O port 7 6 2 FIGURE 7 2 SUCCESSIVE I O OPERATION Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 ASI Q4 i PC Y port X00 YN PCa Instruction 1 fetched MOVWF PORTB MOVF PORTBW NOP i NOP i 2d This example shows a write RB lt 7 0 gt l C l to PORTB followed by a read 1 1 1 from PORTE i i Portpin Portpin written here sampled here 1 1 1 1 hal MOVWF PORTB MOVF PORTB W NOP Instruction Write to 1 Read 1 1 executed PORTB PORTB DS30453D page 36 Preliminary 2002 Microchip Technology Inc PIC16C5X 8 0 TIMERO MODULE AND TMRO REGISTER The TimerO module has the following features 8 bit timer counter register TMRO Readable and writable 8 bit software programmable prescaler Internal or ext
130. d Z Encoding 0010 10df ffff Description The contents of register are incremented If is 0 the result is placed in the W register If is 1 the result is placed back in register f Words 1 Cycles 1 Example INCF CNT 1 Before Instruction CNT OxFF Z 0 After Instruction CNT 0x00 Z 1 INCFSZ Syntax Operands Operation Status Affected Encoding Description Words Cycles Example Increment f Skip if 0 label INCFSZ f d O lt f lt 31 d e 0 1 f 1 gt dest skip if result 0 None 0011 11df ffff The contents of register f are incremented If d is 0 the result is placed in the W register If is 1 the result is placed back in register f If the result is O then the next instruction which is already fetched is discarded and a NoP is executed instead making it a two cycle instruction 1 1 2 HERE INCFSZ CNT 1 GOTO LOOP CONTINUE e Before Instruction PC address HERE After Instruction CNT if CNT PC if CNT PC CNT 1 0 address CONTINUE 0 address HERE 1 ow Il 2002 Microchip Technology Inc Preliminary DS30453D page 55 PIC16C5X IORLW Inclusive OR literal with W MOVF Move f Syntax label IORLW k Syntax label MOVF f d Operands 0 lt k lt 255 Operands 0 lt f lt 31 Opera
131. d some additional hardware and connect it to the microcontroller socket s Some of the features include an RS 232 interface a potentiometer for simu lated analog input push button switches and eight LEDs connected to PORTB 11 12 PICDEM 2 Low Cost PIC16CXX Demonstration Board The PICDEM 2 demonstration board is a simple dem onstration board that supports the PIC16C62 PIC16C64 PIC16C65 PIC16C73 and PIC16C74 microcontrollers All the necessary hardware and soft ware is included to run the basic demonstration pro grams The user can program the sample microcontrollers provided with the PICDEM 2 demon stration board on a PRO MATE ll device programmer or a PICSTART Plus development programmer and easily test firmware The MPLAB ICE in circuit emula tor may also be used with the PICDEM 2 demonstration board to test firmware A prototype area has been pro vided to the user for adding additional hardware and connecting it to the microcontroller socket s Some of the features include a RS 232 interface push button switches a potentiometer for simulated analog input a serial EEPROM to demonstrate usage of the CT bus and separate headers for connection to an LCD module and a keypad 2002 Microchip Technology Inc Preliminary DS30453D page 63 PIC16C5X 11 13 PICDEM 3 Low Cost PIC16CXXX Demonstration Board The PICDEM 3 demonstration board is a simple dem onstration board that supports the PIC16C923 and PIC16C92
132. dia 65 C to 150 C Voltag on VbD with respect TO VSS nodo tti dtt nn 0 to 7 5V Voltage on MCLR with respect t0 VSS cmm eo me be tA tute o Aet chest e 0 to 14V Voltage on all other pins with respect to VSS ssssseeen meme 0 6V to VDD 0 6V Total power dissipation EE EE AE EO Max curtentoutof V S PI iii A da a Max cutrentinto VDD PI ka A A A ee tt areal Max current into an input pin TOCKI only Input clamp current l k VI lt 0 or VI gt VDD ce einer 20 mA Output clamp current IOK VO lt 0 or VO gt VDD eee 20 mA Max output current sunk by any VO Di cusco ltda 25 MA Max output current sourced by any I O pin on RR 20 mA Max output current sourced by a single I O Port A B or C oooononnnoc non nn 50 mA Max output current sunk by a single I O Port A B or ooo oon con cn rn iii 50 mA Note 1 Power dissipation is calculated as follows Pdis VDD x IDD Y 10H Y VDD VOH x IOH Z VOL x IOL NOTICE Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at those or any other conditions above those indi cated in the operation listings of this specification is not implied Exposure to maximum rating conditions for extended periods may affect device reliability 2002 Microchip Technology Inc Preliminary DS30453D page 131 PI
133. directional I O port RB1 11 11 10 VO TTL RB2 12 12 11 VO TTL RB3 13 13 12 VO TTL RB4 14 14 13 VO TTL RB5 15 15 15 VO TTL RB6 16 16 16 O TTL RB7 17 17 17 VO TTL RCO 18 18 18 O TTL Bi directional I O port RC1 19 19 19 VO TTL RC2 20 20 20 VO TTL RC3 21 21 21 VO TTL RC4 22 22 22 VO TTL RC5 23 23 23 VO TTL RC6 24 24 24 VO TTL RC7 25 25 25 VO TTL TOCKI 1 1 2 ST Glock input to TimerO Must be tied to Vss or VDD if not in use to reduce current consumption MCLR 28 28 28 ST Master clear RESET input This pin is an active low RESET to the device OSC1 CLKIN 27 27 27 ST Oscillator crystal input external clock source input OSC2 CLKOUT 26 26 26 O Oscillator crystal output Connects to crystal or resonator in crystal Oscillator mode In RC mode OSC2 pin outputs CLKOUT which has 1 4 the frequency of OSC1 and denotes the instruction cycle rate VDD 2 2 3 4 P Positive supply for logic and I O pins Vss 4 4 1 14 P Ground reference for logic and I O pins N C 3 5 3 5 Unused do not connect Legend input O output I O input output P power Not Used TTL TTL input ST Schmitt Trigger input DS30453D page 12 Preliminary 2002 Microchip Technology Inc PIC16C5X 3 1 Clocking Scheme Instruction Cycle The clock input OSC1 CLKIN pin is internally divided by four to generate four non overlapping quadrature clocks
134. dress Bit oriented file register operations 11 87 54 0 OPCODE b BIT f FILE b 3 bit bit address f 5 bit file register address Literal and control operations except GOTO 11 8 7 0 OPCODE k literal k 8 bit immediate value Literal and control operations GOTO instruction 11 9 8 0 OPCODE k literal k 9 bit immediate value 2002 Microchip Technology Inc Preliminary DS30453D page 49 PIC16C5X TABLE 10 2 INSTRUCTION SET SUMMARY Mnemonic ae 12 Bit Opcode Status o ds Description Cycles Affected Notes peran MSb LSb ADDWF f d Add W and f 1 0001 11df ffff C DC Z 1 2 4 ANDWF f d AND W with f 1 0001 01df ffff Z 2 4 CLRF f Clear f 1 0000 011 ffff Z 4 CLRW Clear W 1 0000 0100 0000 Z COMF f d Complement f 1 0010 01df ffff Z DECF f d Decrement f 1 0000 11df ffff Z 2 4 DECFSZ f d Decrement f Skip if 0 10 0010 iidf ffff None 2 4 INCF f d Increment f 1 0010 10df ffff Z 2 4 INCFSZ fd Incrementf Skip if O 10 0011 iidf ffff None 2 4 IORWF f d Inclusive OR W with f 1 0001 00df ffff Z 2 4 MOVF f d Move f 1 0010 00df ffff Z 2 4 MOVWF f Move W to f 1 0000 001 ffff None 1 4 NOP No Operation 1 0000 0000 0000 None RLF f d Rotate left f through Carry 1 0011 01df ffff C 2 4 RRF f d Rotate right f through Carry 1 0011 00df ffff C 2 4 SUBWF f d Subtract W from f 1 0000 10df
135. e Decrement f Skip if 0 label DECFSZ f d 0 lt f lt 31 d e 0 1 1 gt skip if result 0 None 0010 11df ffff The contents of register f are dec remented If d is O the result is placed in the W register If d is 1 the result is placed back in register f If the result is O the next instruc tion which is already fetched is discarded and a NOP is executed instead making it a two cycle instruction HERE DECFSZ CNT 1 GOTO LOOP CONTINUE e Before Instruction PC address HERE After Instruction CNT if CNT PC if CNT PC CNT 1 0 address CONTINUE 0 address HERE 1 I HI DS30453D page 54 Preliminary 2002 Microchip Technology lnc PIC16C5X GOTO Unconditional Branch Syntax label GOTO k Operands O lt k lt 511 Operation k gt PC lt 8 0 gt STATUS lt 6 5 gt gt PC lt 10 9 gt Status Affected None Encoding 101k kkkk kkkk Description GOTO is an unconditional branch The 9 bit immediate value is loaded into PC bits lt 8 0 gt The upper bits of PC are loaded from STATUS lt 6 5 gt GOTO is a two cycle instruction Words 1 Cycles 2 Example GOTO THERE After Instruction PC address THERE INCF Increment f Syntax label INCF fd Operands 0 lt f lt 31 de 0 1 Operation f 1 gt dest Status Affecte
136. e files and information easily available to customers To view the site the user must have access to the Internet and a web browser such as Netscape or Microsoft Explorer Files are also available for FTP download from our FTP site Connectingtothe Microchip Internet Web Site The Microchip web site is available by using your favorite Internet browser to attach to www microchip com The file transfer site is available by using an FTP ser vice to connect to ftp ftp microchip com The web site and file transfer site provide a variety of services Users may download files for the latest Development Tools Data Sheets Application Notes User s Guides Articles and Sample Programs A vari ety of Microchip specific business information is also available including listings of Microchip sales offices distributors and factory representatives Other data available for consideration s Latest Microchip Press Releases Technical Support Section with Frequently Asked Questions Design Tips Device Errata Job Postings Microchip Consultant Program Member Listing Links to other useful web sites related to Microchip Products Conferences for products Development Systems technical information and more Listing of seminars and events Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides System users a listing of the latest versions of all of Microchip s development syst
137. e A 170 183 195 4 32 4 64 4 95 Ceramic Package Height A2 155 160 165 3 94 4 06 4 19 Standoff A1 015 023 030 0 38 0 57 0 76 Shoulder to Shoulder Width E 300 313 325 7 62 7 94 8 26 Ceramic Pkg Width El 285 290 295 7 24 7 37 7 49 Overall Length D 880 900 920 22 35 22 86 23 37 Tip to Seating Plane L 125 138 150 3 18 3 49 3 81 Lead Thickness c 008 010 012 0 20 0 25 0 30 Upper Lead Width B1 050 055 060 1 27 1 40 1 52 Lower Lead Width B 016 019 021 0 41 0 47 0 53 Overall Row Spacing eB 345 385 425 8 76 9 78 10 80 Window Width Wi 130 140 150 3 30 3 56 3 81 Window Length W2 190 200 210 4 83 5 08 5 33 Controlling Parameter Significant Characteristic JEDEC Equivalent MO 036 Drawing No C04 010 DS30453D page 180 Preliminary O 2002 Microchip Technology Inc PIC16C5X 28 Lead Ceramic Dual In line with Window JW 600 mil CERDIP lt lt Ef lo b CEE n n n Ns El n Cp Al n El Cp 5 n n CEE n El Cp a n El Cp CEE 52 n d 51 la 7 Y IL 7 4 i OI A A2 c ARA eB A1 B p Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 28 28 Pitch p 100 2 54 Top to Seating Plane A 195 210 225 4 95 5 33 5 72 Ceram
138. e high performance of the PIC16C5X family can be attributed to a number of architectural features com monly found in RISC microprocessors To begin with the PIC16C5X uses a Harvard architecture in which program and data are accessed on separate buses This improves bandwidth over traditional von Neumann architecture where program and data are fetched on the same bus Separating program and data memory further allows instructions to be sized differently than the 8 bit wide data word Instruction opcodes are 12 bits wide making it possible to have all single word instructions A 12 bit wide program memory access bus fetches a 12 bit instruction in a single cycle A two stage pipeline overlaps fetch and execution of instruc tions Consequently all instructions 33 execute in a single cycle except for program branches The PIC16C54 CR54 and PIC16C55 address 512 x 12 of program memory the PIC16C56 CR56 address 1K x 12 of program memory and the PIC16C57 CR57 and PIC16C58 CR58 address 2K x 12 of program memory All program memory is internal The PIC16C5X can directly or indirectly address its register files and data memory All special function reg isters including the program counter are mapped in the data memory The PIC16C5X has a highly orthogonal symmetrical instruction set that makes it possible to carry out any operation on any register using any addressing mode This symmetrical nature and lack of special optimal situations m
139. e instruction 1 2 CALL TABLE W contains table offset value W now has table value ADDWF PC W offset RETLW kl Begin table R Wk2 e RETLW kn End of table Before Instruction W 0x07 After Instruction W value of k8 2002 Microchip Technology Inc Preliminary DS30453D page 57 PIC16C5X RLF Rotate Left f through Carry RRF Rotate Right f through Carry Syntax label RLF fd Syntax label RRF f d Operands O lt f lt 31 Operands 0 lt f lt 31 d e 0 1 d e 0 1 Operation See description below Operation See description below Status Affected C Status Affected C Encoding 0011 Oldf ffff Encoding 0011 00df ffff Description The contents of register are Description The contents of register are rotated one bit to the left through rotated one bit to the right through the Carry Flag STATUS lt 0 gt If d the Carry Flag STATUS lt 0 gt If d is O the result is placed in the W is O the result is placed in the W register If d is 1 the result is register If d is 1 the result is stored back in placed back in register register d C register f C gt register f gt Words 1 Words 1 Cycles 1 Cycles 1 Example RLF REG1 0 Example RRE REG1 0 Before Instruction Before Instruction REG1 1110
140. e result in W d 1 store result in file register T Default is d 1 label Label name TOS Top of Stack PC Program Counter WDT Watchdog Timer Counter TO Time out bit PD Power down bit dest Destination either the W register or the specified register file location xIm o z o Options C Contents gt Assigned to lt gt Register bit field In the set of italics User defined term font is courier All instructions are executed within one single instruc tion cycle unless a conditional test is true or the pro gram counter is changed as a result of an instruction In this case the execution takes two instruction cycles One instruction cycle consists of four oscillator periods Thus for an oscillator frequency of 4 MHz the normal instruction execution time would be 1 us If a condi tional test is true or the program counter is changed as a result of an instruction the instruction execution time would be 2 us Figure 10 1 shows the three general formats that the instructions can have All examples in the figure use the following format to represent a hexadecimal num ber Oxhhh where h signifies a hexadecimal digit FIGURE 10 1 GENERAL FORMAT FOR INSTRUCTIONS Byte oriented file register operations 11 6 5 4 0 OPCODE d f FILE d 0 for destination W d 1 for destination f f 5 bit file register ad
141. e timing parameter symbols have been created with one of the following formats 1 TppS2ppS 2 TppS T F Frequency T Time Lowercase letters pp and their meanings pp E 2 to mc MCLR ck CLKOUT osc oscillator Cy cycle time os OSC1 drt device reset timer to TOCKI io l O port wdt watchdog timer Uppercase letters and their meanings S F Fall P Period H High R Rise Invalid Hi impedance V Valid L Low Z Hi impedance FIGURE 15 1 LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS PIC16C54A Pin PI O E CL 50 pF for all pins and OSC2 for RC modes 0 15pF for OSC2 in XT HS or LP modes when external clock is used to drive OSC1 DS30453D page 110 Preliminary O 2002 Microchip Technology Inc PIC16C5X 15 6 Timing Diagrams and Specifications FIGURE 15 2 EXTERNAL CLOCK TIMING PIC16C54A OSC1 CLKOUT TABLE 15 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial AC Characteristics 40 C lt TA lt 85 C for industrial 20 C lt TA lt 85 C for industrial PIC16LV54A 02l 40 C lt TA 125 C for extended AO Symbol Characteristic Min Typt Max Units Conditions Fosc External CLKIN Fre DC 4 0 MHz XT osc mode quency DC 2 0 MHz XT osc mode PIC16LV54A DC 4 0 MHz HS o
142. emory is organized into program memory and data memory For devices with more than 512 bytes of program memory a paging scheme is used Program memory pages are accessed using one or two STATUS Register bits For devices with a data memory register file of more than 32 registers a banking scheme is used Data memory banks are accessed using the File Selection Register FSR 6 1 Program Memory Organization The PIC16C54 PIC16CR54 and PIC16C55 have a 9 bit Program Counter PC capable of addressing a 512 x 12 program memory space Figure 6 1 The PIC16C56 and PIC16CR56 have a 10 bit Program Counter PC capable of addressing a 1K x 12 program memory space Figure 6 2 The PIC16CR57 PIC16C58 and PIC16CR58 have an 11 bit Program Counter capable of addressing a 2K x 12 program memory space Figure 6 3 Accessing a location above the physically implemented address will cause a wraparound A NOP at the RESET vector location will cause a restart at location 000h The RESET vector for the PIC16C54 PIC16CR54 and PIC16C55 is at 1FFh The RESET vector for the PIC16C56 and PIC16CR56 is at 3FFh The RESET vector for the PIC16C57 PIC16CR57 PIC16C58 and PIC16CR58 is at 7FFh See Section 6 5 for additional information using CALL and GOTO instructions FIGURE 6 1 PIC16C54 CR54 C55 PROGRAM MEMORY MAP AND STACK PC lt 8 0 gt CALL RETLW E Stack Level 1 Stack Level 2 000h gt Bo
143. ems software products Plus this line provides information on how customers can receive any currently available upgrade kits The Hot Line Numbers are 1 800 755 2345 for U S and most of Canada and 1 480 792 7302 for the rest of the world 013001 O 2002 Microchip Technology Inc Preliminary DS30453D page 189 PIC16C5X READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod uct Ifyou wish to provide your comments on organization clarity subject matter and ways in which our documentation can better serve you please FAX your comments to the Technical Publications Manager at 480 792 4150 Please list the following information and use this outline to provide us with your comments about this Data Sheet To Technical Publications Manager Total Pages Sent RE Reader Response From Name Company Address City State ZIP Country Telephone FAX Application optional Would you like a reply Y N Device PIC16C5X Literature Number DS30453D Guestions 1 What are the best features of this document 2 How does this document meet your hardware and software development needs 3 Do you find the organization of this data sheet easy to follow If not why 4 What additions to the data sheet do you think would enhance the structure and subject 5 What deletions from the
144. en Microchip Technology Consulting Shanghai Co Ltd Shenzhen Liaison Office Rm 1315 13 F Shenzhen Kerry Centre Renminnan Lu Shenzhen 518001 China Tel 86 755 2350361 Fax 86 755 2366086 Hong Kong Microchip Technology Hongkong Ltd Unit 901 6 Tower 2 Metroplaza 223 Hing Fong Road Kwai Fong N T Hong Kong Tel 852 2401 1200 Fax 852 2401 3431 India Microchip Technology Inc India Liaison Office Divyasree Chambers 1 Floor Wing A A3 A4 No 11 O Shaugnessey Road Bangalore 560 025 India Tel 91 80 2290061 Fax 91 80 2290062 Japan Microchip Technology Japan K K Benex S 1 6F 3 18 20 Shinyokohama Kohoku Ku Yokohama shi Kanagawa 222 0033 Japan Tel 81 45 471 6166 Fax 81 45 471 6122 Korea Microchip Technology Korea 168 1 Youngbo Bldg 3 Floor Samsung Dong Kangnam Ku Seoul Korea 135 882 Tel 82 2 554 7200 Fax 82 2 558 5934 Singapore Microchip Technology Singapore Pte Ltd 200 Middle Road 07 02 Prime Centre Singapore 188980 Tel 65 6334 8870 Fax 65 6334 8850 Taiwan Microchip Technology Taiwan 11F 3 No 207 Tung Hua North Road Taipei 105 Taiwan Tel 886 2 2717 7175 Fax 886 2 2545 0139 EUROPE Denmark Microchip Technology Nordic ApS Regus Business Centre Lautrup hoj 1 3 Ballerup DK 2750 Denmark Tel 45 4420 9895 Fax 45 4420 9910 France Microchip Technology SARL Parc d Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A ler Etage 91300
145. erature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ DS30453D page 104 Preliminary O 2002 Microchip Technology Inc PIC16C5X 15 1 DC Characteristics PIC16C54A 04 10 20 Commercial PIC16C54A 04I 101 201 Industrial PIC16LC54A 04 Commercial PIC16LC54A 041 Industrial PIC16LC54A 04 Standard Operating Conditions unless otherwise specified PIC16LC54A 041 Operating Temperature 0 C lt TA 70 C for commercial Commercial Industrial 40 C lt TA 85 C for industrial PIC16C54A 04 10 20 Standard Operating Conditions unless otherwise specified PIC16C54A 041 101 201 Operating Temperature 0 C lt TA 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial Param 2 zl No Symbol Characteristic Device Min Typt Max Units Conditions IPD Power down Current D006 P
146. ernal clock select Edge select for external clock Figure 8 1 is a simplified block diagram of the TimerO module while Figure 8 2 shows the electrical structure of the TimerO input Timer mode is selected by clearing the TOCS bit OPTION lt 5 gt In Timer mode the TimerO module will increment every instruction cycle without prescaler If TMRO register is written the increment is inhibited for the following two cycles Figure 8 3 and Figure 8 4 The user can work around this by writing an adjusted value to the TMRO register Counter mode is selected by setting the TOCS bit OPTION lt 5 gt In this mode TimerO will increment either on every rising or falling edge of pin TOCKI The incrementing edge is determined by the source edge select bit TOSE OPTION lt 4 gt Clearing the TOSE bit selects the rising edge Restrictions on the external clock input are discussed in detail in Section 8 1 Note The prescaler may be used by either the TimerO module or the Watchdog Timer but not both The prescaler assignment is controlled in software by the control bit PSA OPTION lt 3 gt Clearing the PSA bit will assign the prescaler to TimerO The prescaler is not readable or writable When the prescaler is assigned to the TimerO module prescale values of 1 2 1 4 1 256 are selectable Section 8 2 details the operation of the prescaler A summary of registers associated with the Timer0 module is found in Table 8 1
147. ersa The PSA and PS lt 2 0 gt bits OPTION lt 3 0 gt determine prescaler assignment and prescale ratio Section 6 4 The WDT has a nominal time out period of 18 ms with no prescaler If a longer time out period is desired a prescaler with a division ratio of up to 1 128 can be assigned to the WDT under software control by writ ing to the OPTION register Thus time out a period of a nominal 2 3 seconds can be realized These periods vary with temperature VDD and part to part process variations see Device Characterization Under worst case conditions VDD Min Temperature Max WDT prescaler 1 128 it may take several seconds before a WDT time out occurs 9 2 2 WDT PROGRAMMING CONSIDERATIONS The CLRWDT instruction clears the WDT and the pres caler if assigned to the WDT and prevents it from tim ing out and generating a device RESET The SLEEP instruction RESETS the WDT and the pres caler if assigned to the WDT This gives the maximum SLEEP time before a WDT Wake up Reset FIGURE 9 1 WATCHDOG TIMER BLOCK DIAGRAM From TMRO Clock Source Lo M Watchdog 1 LS Prescaler a Timer x Y 8 to 1MUX Le PS2 PSO WDT Enable PSA EPROM Bit To TMRO 0 Y y MUX 4 PSA Note TOCS TOSE PSA PS2 PSO are bits in the WDT OPTION register Time out TABLE 9 1 S
148. erwise specified Operating Temperature 0 C lt TA 70 C for commercial PIC16LV54A 021 40 C lt TA 125 C for extended Param No Symbol Characteristic Min Typt Max Units Conditions 30 TmcL MCLR Pulse Width low 100 ns VDD 5 0V 1 us VDD 5 0V PIC16LV54A only 31 Twdt Watchdog Timer Time out 9 0 18 30 ms VDD 5 0V Comm Period No Prescaler 32 TDRT Device Reset Timer Period 9 0 18 30 ms VDD 5 0V Comm 34 Tioz 1O Hi impedance from MCLR 100 ns Low ius PIC16LV54A only These parameters are characterized but not tested T Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested DS30453D page 114 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 15 5 TIMERO CLOCK TIMINGS PIC16C54A TOK 7 z 40 z D 41 Lo iS 42 m Note Please refer to Figure 15 1 for load conditions TABLE 15 4 TIMERO CLOCK REQUIREMENTS PIC16C54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA lt 70 C for commercial AC Characteristics 40 C lt TA lt 85 C for industrial 20 C lt TA lt 85 C for industrial PIC16LV54A 021 40 C lt TA 125 C for extended
149. ested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard oper ating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period O 2002 Microchip Technology Inc Preliminary DS30453D page 141 PIC16C5X FIGURE 17 7 CLKOUT AND I O TIMING PIC16C5X PIC16CR5X Q4 Q1 Q2 Q3 OSC1 i i i 10 E 11 EKOUT SRETEN LODS 40 5 ONDE UR Ie ope ah 1 fo i 743 12 D 118 E s SN DL MENOR T I O Pin W V input NI poi F i Pod NT 15 l I O Pin WA l i output Old Value i x New Value 20 21 Note Refer to Figure 17 5 for load conditions TABLE 17 2 CLKOUT AND I O TIMING REQUIREMENTS PIC16C5X PIC16CR5X Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics
150. ffff C DC Z 1 224 SWAPF f d Swapf 1 0011 10df ffff None 2 4 XORWF f d Exclusive OR W with f 1 0001 10df ffff Z 2 4 BIT ORIENTED FILE REGISTER OPERATIONS BCF f b Bit Clear f 1 0100 bbbf ffff None 2 4 BSF f b Bit Set f 1 0101 bbbf ffff None 2 4 BTFSC fb Bit Test f Skip if Clear 1 0110 bbbf ffff None BTFSS fb Bit Test f Skip if Set 1 oiii bbbf ffff None LITERAL AND CONTROL OPERATIONS ANDLW k AND literal with W 1 1110 kkkk kkkk Z CALL k Call subroutine 2 1001 kkkk kkkk None 1 CLRWDT k Clear Watchdog Timer 1 0000 0000 0100 TO PD GOTO k Unconditional branch 2 101k kkkk kkkk None IORLW k Inclusive OR Literal with W 1 1101 kkkk kkkk Z MOVLW k Move Literal to W 1 1100 kkkk kkkk None OPTION k Load OPTION register 1 0000 0000 0010 None RETLW k Return place Literal in W 2 1000 kkkk kkkk None SLEEP Go into standby mode 1 0000 0000 0011 TO PD TRIS f Load TRIS register 1 0000 0000 Offf None 3 XORLW k Exclusive OR Literal to W 1 1111 kkkk kkkk Z Note 1 The 9th bit of the program counter will be forced to a 0 by any instruction that writes to the PC except for GOTO see Section 6 5 for more on program counter 2 When an I O register is modified as a function of itself e g MOVF PORTB 1 the value used will be that value present on the pins themselves For example if the data latch is 1 for a pin configured as input and is driven low by an external device the data will be written back with a 0 3 The in
151. ge PIC16C5X RCE 3 25 6 0 V PIC16C5X XTE 3 25 6 0 V PIC16C5X 10E 4 5 5 5 V PIC16C5X HSE 4 5 5 5 V PIC16C5X LPE 2 5 6 0 V D002 Vor RAM Data Retention Voltage 1 5 V Device in SLEEP mode D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvpD VDD Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset D010 IDD Supply Current PIC16C5X RCE 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC16C5X XTE 1 8 3 3 mA Fosc 4 MHz VDD 5 5V PIC16C5X 10E 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HSE 4 8 10 mA Fosc 10 MHz VDD 5 5V PIC16C5X HSE 9 0 20 mA Fosc 16 MHz VDD 5 5V PIC16C5X LPE 19 55 HA FOSC 32 kHz VDD 3 25V WDT disabled DO20 IPD Power down Current 5 0 22 HA VDD 3 25V WDT enabled 0 8 18 HA VDD 3 25V WDT disabled These parameters are characterized but not tested T Data in Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data 2 The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumptio
152. ge Thickness A2 088 091 094 2 24 2 31 2 39 Standoff 8 A1 004 008 012 0 10 0 20 0 30 Overall Width E 394 407 420 10 01 10 34 10 67 Molded Package Width El 291 295 299 7 39 7 49 7 59 Overall Length D 446 454 462 11 83 11 53 11 73 Chamfer Distance h 010 020 029 0 25 0 50 0 74 Foot Length L 016 033 050 0 41 0 84 1 27 Foot Angle 0 0 4 8 0 4 8 Lead Thickness c 009 011 012 0 23 0 27 0 30 Lead Width B 014 017 020 0 36 0 42 0 51 Mold Draft Angle Top a 0 12 15 0 12 15 Mold Draft Angle Bottom B 0 12 15 0 12 15 Controlling Parameter Significant Characteristic Notes Dimensions D and E1 do not include mold flash or protrusions 010 0 254mm per side JEDEC Equivalent MS 013 Drawing No C04 051 DS30453D page 176 Preliminary Mold flash or protrusions shall not exceed O 2002 Microchip Technology Inc PIC16C5X 28 Lead Plastic Small Outline SO Wide 300 mil SOIC E I 4 E1 U B FE 1010111111111 N rat Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 28 28 Pitch p 050 1 27 Overall Height A 093 099 104 2 36 2 50 2 64 Molded Package Thickness A2 088 091 094
153. gger Vss 0 15 Vo V RC mode only OSC1 Vss 0 15 VDD V XT HS and LP modes D040 VIH Input High Voltage O ports 2 0 VDD V VDD 3 0V to 5 5V 4 I O ports 0 6 VDD VDD V Full VoD range MCLR Schmitt Trigger 0 85 VDD m VDD V TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 Schmitt Trigger 0 85 VDD VDD V RC mode only OSC1 0 85 VDD VDD V XT HS and LP modes D050 VHys Hysteresis of Schmitt 0 15 VDD V Trigger inputs D060 IL Input Leakage Current For VDD lt 5 5V I O ports 1 0 1 0 NA VSs lt VPIN lt VDD pin at hi impedance MCLR 5 0 cs m UA VPIN Vss 0 25V MCLR 0 5 5 0 HA VPIN VDD TOCKI 3 0 0 5 3 0 HA Vss VPIN lt VDD OSC1 3 0 0 5 3 0 HA Vss lt VPIN lt VDD XT HS and LP modes D080 VoL Output Low Voltage I O ports 0 5 V loL 10 mA VDD 6 0V OSC2 CLKOUT 0 5 V loL 1 9 mA VDD 6 0V RC mode only D090 VoH Output High Voltage I O ports VDD 0 5 V IOH 2 4 0 mA VDD 6 0V OSC2 CLKOUT VDD 0 5 V IOH 0 8 mA VDD 6 0V RC mode only These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current
154. herwise specified AC Characteristics Operating Temperature 0 C lt Ta lt 70 C for commercial a Symbol Characteristic Min Typt Max Units Conditions 40 TtOH TOCKI High Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 41 TIOL TOCKI Low Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 42 TtOP TOCKI Period 20 or TCY 40 ns Whichever is greater N N Prescale Value 1 2 4 256 x These parameters are characterized but not tested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested O 2002 Microchip Technology Inc Preliminary DS30453D page 163 PIC16C5X NOTES T e tt nn i nL DS30453D page 164 Preliminary 2002 Microchip Technology Inc PIC16C5X 20 0 DEVICE CHARACTERIZATION PIC16C54C C55A C56A C57C C58B 40MHz The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only The performance characteristics listed herein are not tested or guaran teed In some graphs or tables the data presented may be outside the specified operating range e g outside specified power supply range and therefore outside the warranted range Typical represents the mean of the distr
155. ibution at 25 C Maximum or minimum represents mean 30 or mean 30 respectively where o is a standard deviation over the whole temperature range FIGURE 20 1 TYPICAL IPD vs VDD WATCHDOG DISABLED 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 25 20 15 T i a 2 10 5 0 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 165 PIC16C5X FIGURE 20 2 TYPICAL IPD vs VDD WATCHDOG ENABLED 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 25 20 15 lt 10 5 0 sa 0 25 3 0 5 4 0 4 5 5 0 5 6 0 VDD Volts FIGURE 20 3 TYPICAL IPD vs VDD WATCHDOG ENABLED 40 C 85 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 35 30 25 20 T a 15 10 5 0 L40 C 0 85 C 25 3 0 5 4 0 45 5 0 5 6 0 VDD Volts DS30453D page 166 Preliminary O 2002 Microchip Technology Inc FIGURE 20 4 PIC16C5X VTH INPUT THRESHOLD TRIP POINT VOLTAGE OF I O PINS vs VDD VTH Volts Typical statistical mean 25 C Maximum mean 3s
156. ic Package Height A2 155 160 165 3 94 4 06 4 19 Standoff A1 015 038 060 0 38 0 95 1 52 Shoulder to Shoulder Width E 595 600 625 15 11 15 24 15 88 Ceramic Pkg Width El 514 520 526 13 06 13 21 13 36 Overall Length D 1 430 1 460 1 490 36 32 37 08 37 85 Tip to Seating Plane L 125 138 150 3 18 3 49 3 81 Lead Thickness c 008 010 012 0 20 0 25 0 30 Upper Lead Width B1 050 058 065 1 27 1 46 1 65 Lower Lead Width B 016 020 023 0 41 0 51 0 58 Overall Row Spacing 8 eB 610 660 710 15 49 16 76 18 03 Window Diameter W 270 280 290 6 86 7 11 7 37 Controlling Parameter Significant Characteristic JEDEC Equivalent MO 103 Drawing No C04 013 O 2002 Microchip Technology Inc Preliminary DS30453D page 181 PIC16C5X NOTES EE IE M ENIE DD IC gq gg A A A AAA DS30453D page 182 Preliminary O 2002 Microchip Technology Inc PIC16C5X APPENDIX A COMPATIBILITY To convert code written for PIC16CXX to PIC16C5X the user should take the following steps 1 Check any CALL GOTO or instructions that modify the PC to determine if any program memory page select operations PA2 PA1 PAO bits need to be made 2 Revisit any computed jump operations write to PC or add to PC etc to make sure page bits are set properly under the new scheme 3 Eliminate any special function register page switching Redefine data variables to reallocate them 4 Verify all writes to STATUS OP
157. ics listed herein are not tested or guaran teed In some graphs or tables the data presented may be outside the specified operating range e g outside specified power supply range and therefore outside the warranted range Typical represents the mean of the distribution at 25 C Maximum or minimum represents mean 30 or mean 30 respectively where o is a standard deviation over the whole temperature range FIGURE 14 1 TYPICAL RC OSCILLATOR FREQUENCY vs TEMPERATURE Fosc Frequency normalized to 25 C Fosc 25 C 1 10 REXT gt 10 kQ CEXT 100 pF 1 08 1 06 1 04 1 02 1 00 0 98 0 96 0 94 0 92 0 90 0 88 0 10 20 25 30 40 50 60 70 TEC TABLE 14 1 RC OSCILLATOR FREQUENCIES Average CExt RESI Fosc 5 V 25 C 20 pF 3 3K 5 MHz 27 5K 3 8 MHz 21 10K 2 2 MHz 21 100K 262 kHz 31 100 pF 3 3K 1 6 MHz 13 5K 1 2 MHz 13 10K 684 kHz 18 100K 71 kHz 25 300 pF 3 3K 660 kHz 10 5 0K 484 kHz 14 10K 267 kHz 15 100K 29 kHz 19 The frequencies are measured on DIP packages The percentage variation indicated here is part to part variation due to normal process distribution The variation indicated is 3 standard deviations from the average value for VDD 5V 2002 Microchip Technology Inc Preliminary DS30453D page 91 PIC16C5X
158. inary DS30453D page 89 PIC16C5X FIGURE 13 5 TIMERO CLOCK TIMINGS PIC16CR54A TOK ___ a z 40 z e 41 Ax 42 m Note Please refer to Figure 13 1 for load conditions TABLE 13 4 TIMERO CLOCK REQUIREMENTS PIC16CR54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics Ea Symbol Characteristic Min Typt Max Units Conditions 40 TtOH TOCKI High Pulse Width No Prescaler 0 5 Tcv 20 ns With Prescaler 10 ns 41 TtOL TOCKI Low Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 42 TtOP TOCKI Period 200r TCY 40 ns Whichever is greater N N Prescale Value 1 2 4 256 These parameters are characterized but not tested T Datainthe Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested DS30453D page 90 Preliminary O 2002 Microchip Technology Inc PIC16C5X 14 0 DEVICE CHARACTERIZATION PIC16C54 55 56 57 CR54A The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only The performance characterist
159. ing 1 Your local Microchip sales office 2 The Microchip Corporate Literature Center U S FAX 480 792 7277 3 The Microchip Worldwide Site www microchip com Please specify which device revision of silicon and Data Sheet include Literature you are using New Customer Notification System Register on our web site www microchip com cn to receive the most current information on our products O 2002 Microchip Technology Inc Preliminary DS30453D page 191 MICROCHIP WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd Chandler AZ 85224 6199 Tel 480 792 7200 Fax 480 792 7277 Technical Support 480 792 7627 Web Address http www microchip com Rocky Mountain 2355 West Chandler Blvd Chandler AZ 85224 6199 Tel 480 792 7966 Fax 480 792 7456 Atlanta 500 Sugar Mill Road Suite 200B Atlanta GA 30350 Tel 770 640 0034 Fax 770 640 0307 Boston 2 Lan Drive Suite 120 Westford MA 01886 Tel 978 692 3848 Fax 978 692 3821 Chicago 333 Pierce Road Suite 180 ltasca IL 60143 Tel 630 285 0071 Fax 630 285 0075 Dallas 4570 Westgrove Drive Suite 160 Addison TX 75001 Tel 972 818 7423 Fax 972 818 2924 Detroit Tri Atria Office Building 32255 Northwestern Highway Suite 190 Farmington Hills MI 48334 Tel 248 538 2250 Fax 248 538 2260 Kokomo 2767 S Albright Road Kokomo Indiana 46902 Tel 765 864 8360 Fax 765 864 8387 Los Angeles 18201 Von
160. intended through suggestion only and may be superseded by updates It is your responsibility to ensure that your application meets with your specifications No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information or infringement of patents or other intellectual property rights arising from such use or otherwise Use of Microchip s products as critical com ponents in life support systems is not authorized except with express written approval by Microchip No licenses are con veyed implicitly or otherwise under any intellectual property rights DNV Certification Inc DNY MSC The Netherlands Accredited by the RVA ANSI RAB QMS x 7 DNY a11143422V ISO 9001 QS 9000 REGISTERED FIRM Trademarks The Microchip name and logo the Microchip logo FilterLab KEELOQ microlD MPLAB PIC PlCmicro PICMASTER PICSTART PRO MATE SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Tech nology Incorporated in the U S A and other countries dsPIC ECONOMONITOR FanSense FlexROM fuzzyLAB In Circuit Serial Programming ICSP ICEPIC microPort Migratable Memory MPASM MPLIB MPLINK MPSIM MXDEV PICC PICDEM PICDEM net rfPIC Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U S A Serialized Quick Turn Programming SQTP is a service mark
161. ion will automatically cause the pro gram to jump to page 0 6 6 Stack PIC16C5X devices have a 10 bit or 11 bit wide two level hardware push pop stack A CALL instruction will push the current value of stack 1 into stack 2 and then push the current program counter value incremented by one into stack level 1 If more than two sequential CALL s are executed only the most recent two return addresses are stored A RETLW instruction will pop the contents of stack level 1 into the program counter and then copy stack level 2 contents into level 1 If more than two sequential RETLW s are executed the stack will be filled with the address previously stored in level 2 Note that the W Register will be loaded with the literal value specified in the instruction This is particularly useful for the implementation of data look up tables within the pro gram memory For the RETLW instruction the PC is loaded with the Top of Stack TOS contents All of the devices covered in this data sheet have a two level stack The stack has the same bit width as the device PC therefore paging is not an issue when returning from a subroutine DS30453D page 32 Preliminary 2002 Microchip Technology Inc PIC16C5X 6 7 Indirect Data Addressing INDF and FSR Registers The INDF Register is not a physical register Addressing INDF actually addresses the register whose address is contained in the FSR Register FSR is a pointer This
162. ions above those indi cated in the operation listings of this specification is not implied Exposure to maximum rating conditions for extended periods may affect device reliability O 2002 Microchip Technology Inc Preliminary DS30453D page 79 PIC16C5X 13 1 DC Characteristics PIC16CR54A 04 10 20 PIC16LCR54A 04 Commercial PIC16CR54A 04I 101 201 PIC16LCR54A 041 Industrial PIC16LCR54A 04 PIC16LCR54A 041 Commercial Industrial Standard Operating Conditions unless otherwise specified 0 C lt TA lt 70 C for commercial 40 C x TA lt 85 C for industrial Operating Temperature PIC16CR54A 04 10 20 PIC16CR54A 041 101 201 Commercial Industrial Standard Operating Conditions unless otherwise specified 0 C lt TA x 70 C for commercial 40 C lt TA lt 85 C for industrial Operating Temperature ae Symbol Characteristic Device Min Typt Max Units Conditions VDD Supply Voltage DO01 PIC16LCR54A 2 0 6 25 V D001 PIC16CR54A 2 5 6 25 V RC and XT modes D001A 4 5 5 5 V HS mode D002 VDR RAM Data Retention 1 5 V Device in SLEEP mode Voltage D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvoD VDD Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset IDD Supply Current
163. is indirect addressing EXAMPLE 6 1 INDIRECT ADDRESSING Register file 08 contains the value 10h Register file 09 contains the value OAh Load the value 08 into the FSR Register A read of the INDF Register will return the value of 10h Increment the value of the FSR Register by one FSR 09h A read of the INDF register now will return the value of OAh Reading INDF itself indirectly FSR 0 will produce 00h Writing to the INDF Register indirectly results in a no operation although STATUS bits may be affected A simple program to clear RAM locations 10h 1Fh using indirect addressing is shown in Example 6 2 EXAMPLE 6 2 HOW TO CLEAR RAM USING INDIRECT ADDRESSING MOVLW RTO initialize pointer MOVWF FSR to RAM NEXT CLRF INDF clear INDF Register INCF FSR F inc pointer BTFSC FSR 4 all done GOTO NEXT NO clear next CONTINUE YES continue The FSR is either a 5 bit PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56 or 7 bit PIC16C57 PIC16CR57 PIC16C58 PIC16CR58 wide register It is used in conjunction with the INDF Register to indirectly address the data memory area The FSR lt 4 0 gt bits are used to select data memory addresses 00h to 1Fh PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56 These do not use banking FSR lt 6 5 gt bits are unimplemented and read as 1 s PIC16C57 PIC16CR57 PIC16C58 PIC16CR58 FSR lt 6 5 gt are the bank select bits and are used to selec
164. istics PIC16C54C C55A C56A C57C C58B 40 Commercial 1 PIC16C54C C55A C56A C57C C58B 40 Standard Operating Conditions unless otherwise specified Commercial Operating Temperature 0 C lt TA 70 C for commercial fr Symbol Characteristic Min Typt Max Units Conditions DO01 VDD Supply Voltage 45 5 5 V HS mode from 20 40 MHz D002 VDR RAM Data Retention Voltage 155 V Device in SLEEP mode D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvDD VDD Rise Rate to ensure Power 0 05 V ms See Section 5 1 for details on on Reset Power on Reset D010 IDD Supply Current 52 123 mA Fosc 40 MHz VDD 4 5V HS mode 6 8 16 mA Fosc 40 MHz VDD 5 5V HS mode DO20 IPD Power down Current 1 8 7 0 pA VDD 5 5V WDT disabled Commercial 9 8 27 LA VDD 5 5V WDT enabled Commercial These parameters are characterized but not tested T Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 Device operation between 20 MHz to 40 MHz requires the following VDD between 4 5V to 5 5V OSC1 pin externally driven OSC2 pin not connected HS oscillator mode and commercial temperatures For operation between DC and 20 MHz See Section 19 1 This is the limit to which VDD can be lowered in SLEE
165. it 1 Prescaler assigned to the WDT 0 Prescaler assigned to Timer0 bit 2 0 PS lt 2 0 gt Prescaler rate select bits Bit Value Timer0 Rate WDT Rate 000 1 2 1 1 001 1 4 1 2 010 1 8 1 4 011 1 16 1 8 100 1 32 1 16 101 1 64 1 32 110 1 128 1 64 111 1 256 1 128 Legend R Readable bit W Writable bit U Unimplemented bit read as n Value at POR 1 bit is set 0 bit is cleared X bit is unknown DS30453D page 30 Preliminary 2002 Microchip Technology Inc PIC16C5X 6 5 Program Counter As a program instruction is executed the Program Counter PC will contain the address of the next pro gram instruction to be executed The PC value is increased by one every instruction cycle unless an instruction changes the PC For a GOTO instruction bits 8 0 of the PC are provided by the GoTo instruction word The PC Latch PCL is mapped to PC lt 7 0 gt Figure 6 7 Figure 6 8 and Figure 6 9 For the PIC16C56 PIC16CR56 PIC16C57 PIC16CR57 PIC16C58 and PIC16CR58 a page num ber must be supplied as well Bit5 and bit6 of the STA TUS Register provide page information to bit9 and bit10 of the PC Figure 6 8 and Figure 6 9 For a CALL instruction or any instruction where the PCL is the destination bits 7 0 of the PC again are pro vided by the instruction word However PC 8 does not come from the instruction word but is always cleared Figure 6 7 and Figure 6 8 Inst
166. j DRT Time out i Internal RESET j Watchdog r lt Timer i RESET T ASS Note 1 Note 1 Please refer to Figure 17 5 for load conditions TABLE 17 3 RESET WATCHDOG TIMER AND DEVICE RESET TIMER PIC16C5X PIC16CR5X Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics Param No Symbol Characteristic Min Typt Max Units Conditions 30 TmcL MCLR Pulse Width low 1000 ns VDD 5 0V 31 Twdt Watchdog Timer Time out Period 9 0 18 30 ms VDD 5 0V Comm No Prescaler 32 TDRT Device Reset Timer Period 9 0 18 30 ms VDD 5 0V Comm 34 Tioz l O Hi impedance from MCLR Low 100 300 1000 ns These parameters are characterized but not tested T Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested 2002 Microchip Technology Inc Preliminary DS30453D page 143 PIC16C5X FIGURE 17 9 TIMERO CLOCK TIMINGS PIC16C5X PIC16CR5X TOK X i z 40 E 41 Ar a 42 Note Please refer to Figure 17 5 for load conditions TABLE 17 4 TIMERO CLOCK REQUIREMENTS PIC16C5X PIC16CR5X Standard Operating Conditions un
167. keep the chip in RESET until the crystal oscillator is stable With this timer on chip most applications need no external RESET circuitry The SLEEP mode is designed to offer a very low cur rent Power down mode The user can wake up from SLEEP through external RESET or through a Watch dog Timer time out Several oscillator options are also made available to allow the part to fit the application The RC oscillator option saves system cost while the LP crystal option saves power A set of configuration bits are used to select various options 2002 Microchip Technology Inc Preliminary DS30453D page 43 PIC16C5X 9 1 Configuration Bits Configuration bits can be programmed to select various device configurations Two bits are for the selection of the oscillator type and one bit is the Watchdog Timer enable bit Nine bits are code protection bits for the PIC16C58B and PIC16CR58B devices Register 9 1 One bit is for code protection for the PIC16C54 PIC16C55 PIC16C56 and PIC16C57 devices Register 9 2 QTP or ROM devices have the oscillator configuration PIC16C54A PIC16CR54A PIC16C54C programmed at the factory and these parts are tested PIC16CR54C PIC16C55A PIC16C56A accordingly see Product Identification System dia PIC16CR56A PIC16C57C PIC16CR57C grams in the back of this data sheet REGISTER 9 1 CONFIGURATION WORD FOR PIC16C54A CR54A C54C CR54C C55A C56A CR56A C5
168. l O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ DS30453D page 134 Preliminary O 2002 Microchip Technology Inc PIC16C5X 17 1 DC Characteristics PIC16C54C C55A C56A C57C C58B 04 20 Commercial Industrial PIC16LC54C LC55A LC56A LC57C LC58B 04 Commercial Industrial PIC16CR54C CR56A CR57C CR58B 04 20 Commercial Industrial PIC16LCR54C LCR56A LCR57C LCR58B 04 Commercial Industrial PIC16LC5X Standard Operating Conditions unless otherwise specified PIC16LCR5X Operating Temperature 0 C lt TA lt 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial PIC16C5X Standard Operating Conditions unless otherwise specified PIC16CR5X Operating Temperature 0 C lt TA lt 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial Param E A xi No Symbol Characteristic Device Min Typt Max Units Conditions loo Supply Current D010 PIC16LC5X 0 5 2 4 mA Fosc 4 0 MHz VDD 5 5V XT and 11 27 HA RC modes Fosc
169. l statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C VTH Volts 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 14 12 TYPICAL IDD VS FREQUENCY EXTERNAL CLOCK 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C lt H 8 0 1 7 0 6 5 H 6 0 B i 4 5 OI 4 0 1 3 5 T 3 0 25 MT 0 01 10K 100K 1M 10M 100M External Clock Freguency Hz DS30453D page 96 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 14 13 MAXIMUM IDD VS FREQUENCY EXTERNAL CLOCK 40 C TO 85 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10 U A 1 0 lt E A LAAT a 70 oF 6 5 0 1 6 0 M 5 0 4 5 4 0 3 5 f LA 3 0 2 5 0 01 10K 100K 1M 10M 100M External Clock Frequency Hz FIGURE 14 14 MA
170. latches If another bit of PORTB is used as a bi direc tional I O pin say bitO and it is defined as an input at this time the input signal present on the pin itself would be read into the CPU and rewritten to the data latch of this particular pin overwriting the previous content As long as the pin stays in the Input mode no problem occurs However if bitO is switched into Output mode later on the content of the data latch may now be unknown Example 7 1 shows the effect of two sequential read modify write instructions e g BCF BSF etc on an I O port A pin actively outputting a high or a low should not be driven from external devices at the same time in order to change the level on this pin wired or wired and The resulting high output currents may damage the chip EXAMPLE 7 1 READ MODIFY WRITE INSTRUCTIONS ON AN I O PORT Initial PORT Settings PORTB lt 7 4 gt Inputs PORTB lt 3 0 gt Outputs PORTB lt 7 6 gt have external pull ups and are not connected to other circuitry PORT latch PORT pins Ee er ee o RM Ao el BCF PORTB 7 0lpp pppp 11pp pppp BCF PORTB 6 10pp pppp 11pp pppp MOVLW H 3F TRIS PORTB 10pp pppp 10pp pppp Note that the user may have expected the pin values to be 00pp pppp The 2nd BCF caused RB7 to be latched as the pin value High SUCCESSIVE OPERATIONS ON I O PORTS The actual write to an I O port happens at the end of an instruction
171. lease refer to Figure 12 1 for load conditions TABLE 12 2 CLKOUT AND I O TIMING REQUIREMENTS PIC16C54 55 56 57 Standard Operating Conditions unless otherwise specified as Operating Temperature 0 C lt TA 70 C for commercial AP Characteristics _40 C lt Ta lt 85 C for industrial 40 C lt TA 125 C for extended Ne Symbol Characteristic Min Typt Max Units 10 TosH2ckL OSC1 to CLKOUTI 15 30 ns 11 TosH2ckH OSC1T to CLKOUTT 15 30 ns 12 TckR CLKOUT rise time 5 0 15 ns 13 TckF CLKOUT fall time 5 0 15 ns 14 TckL2ioV CLKOUTI to Port out valid 40 ns 15 TioV2ckH Portin valid before CLKOUTT 0 25 TCY 30 ns 16 TckH2iol Portin hold after CLKOUTT 0 ns 17 TosH2ioV 0SC11 Q1 cycle to Port out valid 100 ns 18 TosH2iol OSC11 Q2 cycle to Port input invalid TBD ns I O in hold time 19 TioV2osH Port input valid to OSC1T TBD ns I O in setup time 20 TioR Port output rise time 10 25 ns 21 TioF Port output fall time 10 25 ns These parameters are characterized but not tested These parameters are design targets and are not tested No characterization data available at this time Data in the Typical Typ column is at 5 0V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 Measurements are taken in RC Mode where CLKOUT output is 4 x
172. less otherwise specified Operating Temperature 0 C lt TA lt 70 C for commercial 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended AC Characteristics ae Symbol Characteristic Min Typt Max Units Conditions 40 TtOH TOCKI High Pulse Width No Prescaler 0 5 Tcv 20 ns With Prescaler 10 ns 41 TtOL TOCKI Low Pulse Width No Prescaler 0 5 TCY 20 ns With Prescaler 10 ns 42 TtOP TOCKI Period 20 or TCY 40 ns Whichever is greater N N Prescale Value 1 2 4 256 x These parameters are characterized but not tested Data in the Typical Typ column is at 5V 25 C unless otherwise stated These parameters are for design guid ance only and are not tested DS30453D page 144 Preliminary 2002 Microchip Technology Inc PIC16C5X 18 0 DEVICE CHARACTERIZATION PIC16C54C CR54C C55A C56A CR56A C57C CR57C C58B CR58B The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only The performance characteristics listed herein are not tested or guaran teed In some graphs or tables the data presented may be outside the specified operating range e g outside specified power supply range and therefore outside the warranted range Typical represents the mean of
173. may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 Forthe RC mode the OSC1 CLKIN pin is a Schmitt Trigger input It is not recommended that the PIC16C5X be driven with external clock in RC mode 4 The user may use the better of the two specifications O 2002 Microchip Technology Inc Preliminary DS30453D page 83 PIC16C5X 13 4 DC Characteristics PIC16CR54A 04E 10E 20E Extended Standard Operating Conditions unless otherwise specified BO CHARACTERISTICS Operating Temperature 40 C lt TA 125 C for extended Ne Symbol Characteristic Min Typt Max Units Conditions DO30 VIL Input Low Voltage 1 O ports Vss 0 15 VDD V Pin at hi impedance MCLR Schmitt Trigger Vss 0 15 VDD V TOCKI Schmitt Trigger Vss 0 15 VDD V OSC1 Schmitt Trigger Vss 0 15 VDD V RC mode only OSC1 Vss 0 3 VDD V XT HS and LP modes D040 VIH input High Voltage I O ports 0 45 VoD VDD V For all Vo I O ports 2 0 ES VDD V 40V lt VoD 5 5v 9 I O ports 0 36 VDD VDD V VDD 5 5V MCLR Schmitt Trigger 0 85 VDD VDD V TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 Schmitt Trigger 0 85 VoD VDD V RC mode only OSC1 0 7 VDD VDD V XT HS and LP modes DO50 VHys Hysteresis of Schmitt 0 15 VDD V Trigger inputs D060 IL Input Leakage Current For VDD lt 5 5V 1 O ports 1 0 0 5 1 0 HA Vss
174. mitt Trigger input buffers O 2002 Microchip Technology Inc Preliminary DS30453D page 149 PIC16C5X FIGURE 18 10 VTH INPUT THRESHOLD TRIP POINT VOLTAGE OF OSC1 INPUT IN XT HS AND LP MODES vs VDD Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 3 4 3 2 3 0 2 8 2 6 2 4 2 2 2 0 1 8 1 6 1 4 9 C ayo Y VTH Volts 1 2 1 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 18 11 TYPICAL IDD vs FREQUENCY WDT DISABLED RC MODE 20 PF 25 C TYPICAL IDD vs FREQ RC MODE 20pF 25C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 LA 1000 a T 3 a8 a s LT 100 n 3 5 2 5 10 0 1 1 10 FREQ MHz DS30453D page 150 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 18 12 TYPICAL IDD vs FREQUENCY WDT DISABLED RC MODE 100 PF 25 C TYPICAL IDD vs FREQ RC MODE 100 pF 25C Typical sta
175. n a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ DS30453D page 70 Preliminary 2002 Microchip Technology Inc PIC16C5X 12 4 DC Characteristics PIC16C54 55 56 57 RC XT 10 HS LP Commercial PIC16C54 55 56 57 RCI XTI 101 HSI LPI Industrial Standard Operating Conditions unless otherwise specified DC CHARACTERISTICS Operating Temperature 0 C lt TA 70 C for commercial 40 C lt TA lt 85 C for industrial Param s ds A A d a No Symbol Characteristic Device Min Typt Max Units Conditions DO30 VIL Input Low Voltage 1 O ports Vss 0 2 VDD V Pin at hi impedance MCLR Schmitt Trigger Vss 0 15 VDD V TOCKI Schmitt Trigger Vss EE 0 15 VDD V OSC1 Schmitt Trigger Vss 015Vpp V PIC16C5X RC only OSC1 Schmitt Trigger Vss 0 3 VDD V PIC16C5X XT 10 HS LP D040 VIH Input High Voltage I O ports 0 45 VDD VDD V Forall Vop 4 O po
176. n 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 6 R 3 3K 5 R 5K 4 N I z 3 o R 10K LL 2 1 R 100K 0 25 3 0 3 5 4 0 45 5 0 5 5 VDD Volts DS30453D page 118 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 16 4 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 300 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 700 R 3 3K 600 500 R 5K an 400 N Ec 2 300 R 10K 200 100 R 100K 0 2 5 3 0 3 5 4 0 4 5 5 0 9 5 6 0 VDD Volts 2002 Microchip Technology Inc Preliminary DS30453D page 119 PIC16C5X FIGURE 16 5 TYPICAL IPD vs VDD WATCHDOG DISABLED 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 2 5 2 0 a 1 5 lt 2 e 1 0 0 5 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 VDD Volts FIGURE 16 6 TYPICAL IPD vs VDD WATCHDOG ENABLED 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 25 00 20 00 15 00 10 00 5 00 0 00 2 5 3 3 5 4 4 5 5 5 5 6 VDD Volts DS30453D page 120 Preliminary O 2002 Microchip Technology In
177. nto two sets The Special Function Registers associated with the core functions are described in this section Those related to the operation of the peripheral features are described in the section for each peripheral feature TABLE 6 1 SPECIAL FUNCTION REGISTER SUMMARY yalue on Details Address Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 BitO Power on Reset on Page N A TRIS l O Control Registers TRISA TRISB TRISC 1111 1111 35 N A OPTION Contains control bits to configure TimerO and TimerO WDT prescaler 11 1111 30 00h INDF Uses contents of FSR to address data memory not a physical register XXXX XXXX 32 01h TMRO TimerO Module Register XXXX XXXX 38 02h PCL Low order 8 bits of PC 1111 1111 31 03h STATUS PA2 PA1 PAO TO PD Z DC C 0001 1xxx 29 04h FSR Indirect data memory address pointer 1xxx xxxx 32 05h PORTA RA3 RA2 RA1 RAO XXXX 35 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RBO XXXX XXXX 35 07h02 PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RCO XXXX XXXX 35 Legend x unknown u unchanged unimplemented read as if applicable Shaded cells unimplemented or unused Note 1 The upper byte of the Program Counter is not directly accessible See Section 6 5 for an explanation of how to access these bits 2 File address 07h is a General Purpose Register on the PIC16C54 PIC16CR54 PIC16C56
178. oIu MMM Te elis Gam ou Bojouuoe diuooJorN eui JOJO Uy s Jedoje eg NVI 0LSZdOW 1M s Jedojo og qg10491u uoisijj oonuy zHIN 9S EL iy s Jadojanagq wiGlO49IW uoisijoonuy zH SZL yy s 49doj919Gg wi 01042111 ZH G HM S J9UI1UILIBOJd y 10121LU 14 Jopuodsuej 400133M V UOHENIBAF 400133 p1eog uonedsuouleg ZL wW3aold pieog uonesuouie Vb wiINAddId p1eog uonensuowaq uN DI Y Y pueog uone4jsuouleg Z wiINAGOId V pieog uonel SUOWS w N3Q91Id 1911LIEIBOIJ SINS ESISNIUN Il pA LVW Odd 142 A UULUBIBOAq JUSLUdOJSAS3G 19197 nua snid gLYVLSOld Jeb6nqeq unoJi u GOI AV IAN Jojejnur3 HNOMNO UI wld 4 Joje nur3 YN9A19 U 391 SAV 1dW Jexur 199 90 u MNITdIN HeIquessy wiINSVdIN 4911dul09 9 819 eAV Id 4911dLu09 2 ZLO AV IAN E O U N a o XXX440W XXXSIH XXX4d8L ld HO EIRE gt XXZOLLOld X 92L9Id DO CHOICE gt XX849 LOld X809L0ld XXZO9LOld XZ99L9ld X2949LOld XXX99LOld X90910ld Xg09L0ld 0007 Lld XXX ZL ld yuawuoaug 1ueuidojaAeq paje163 u SAV Id SOO 9IEMIJOS EI Pre SUM PAW pue spieog ow9q DS30453D page 65 iminary Prel O 2002 Microchip Technology Inc PIC16C5X NOTES P c EE IEEE DI i nt DS30453D page 66 Preliminary 2002 Mi
179. of software development previously unseen in the 8 bit microcon troller market The MPLAB IDE is a Windows based application that contains An interface to debugging tools simulator programmer sold separately emulator sold separately in circuit debugger sold separately Afull featured editor A project manager Customizable toolbar and key mapping Astatus bar On line help The MPLAB IDE allows you to Edit your source files either assembly or C One touch assemble or compile and download to PICmicro emulator and simulator tools auto matically updates all project information Debug using source files absolute listing file machine code The ability to use MPLAB IDE with multiple debugging tools allows users to easily switch from the cost effective simulator to a full featured emulator with minimal retraining 11 2 MPASM Assembler The MPASM assembler is a full featured universal macro assembler for all PICmicro MCU s The MPASM assembler has a command line interface and a Windows shell It can be used as a stand alone application on a Windows 3 x or greater system or it can be used through MPLAB IDE The MPASM assem bler generates relocatable object files for the MPLINK object linker Intel standard HEX files MAP files to detail memory usage and symbol reference an abso lute LST file that contains source lines and generated machine code and a COD file for debugging
180. on of oscillator frequency due to VDD for given REXT CEXT values as well as frequency variation due to oper ating temperature for given R C and VDD values The oscillator frequency divided by 4 is available on the OSC2 CLKOUT pin and can be used for test pur poses or to synchronize other logic FIGURE 4 5 RC OSCILLATOR MODE von RExT Internal l T gt clock CEXT m PIC16C5X 4 OSC2 CLKOUT Fosc 4 Note If you change from this device to another device please verify oscillator characteris tics in your application O 2002 Microchip Technology Inc Preliminary DS30453D page 17 PIC16C5X NOTES A A DDD ODO DD a i nL DS30453D page 18 Preliminary O 2002 Microchip Technology Inc PIC16C5X 5 0 RESET PIC16C5X devices may be RESET in one of the follow ing ways Power On Reset POR MCLR Reset normal operation MCLR Wake up Reset from SLEEP WDT Reset normal operation WDT Wake up Reset from SLEEP Table 5 1 shows these RESET conditions for the PCL and STATUS registers Some registers are not affected in any RESET condi tion Their status is unknown on POR and unchanged in any other RESET Most other registers are reset to a RESET state on Power On Reset POR MCLR or WDT Reset A MCLR or WDT wake up from SLEEP also results in a device RESET and not a continuation of operation before SLEEP The TO and PD bits STATU
181. ormats 1 TppS2ppS 2 TppS T F Frequency T Time Lowercase letters pp and their meanings pp a 2 to mc MCLR ck CLKOUT osc oscillator cy cycle time os OSC1 drt device reset timer t0 TOCKI io I O port wdt watchdog timer Uppercase letters and their meanings S F Fall P Period H High R Rise Invalid Hi impedance V Valid L Low Z Hi impedance FIGURE 13 1 LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS PIC16CR54A Pin X CL 50pF for all pins and OSC2 for RC modes CL 0 15pF for OSC2 in XT HS or LP modes when v external clock is used to drive OSC1 Vss O 2002 Microchip Technology Inc Preliminary DS30453D page 85 PIC16C5X 13 6 Timing Diagrams and Specifications FIGURE 13 2 EXTERNAL CLOCK TIMING PIC16CR54A CLKOUT TABLE 13 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16CR54A Standard Operating Conditions unless otherwise specified 40 C lt TA 125 C for extended aoe Symbol Characteristic Min Typt Max Units Conditions Fosc External CLKIN Frequency DC 4 0 MHz XT osc mode DC 4 0 MHz HS osc mode 04 DC 10 MHz HS osc mode 10 DC 20 MHz HS osc mode 20 DC 200 kHz LP osc mode Oscillator Frequency DC 4 0 MHz RC osc mode 0 1 4 0 MHz XT osc mode 4 0 4 0 MHz HS osc mode 04 4 0 10 MHz HS osc mode 10 4 0 20 MHz HS osc mode 20 5 0 200
182. ort RB1 7 7 8 1 0 TTL RB2 8 8 9 1 0 TTL RB3 9 9 10 1 0 TTL RB4 10 10 11 1 0 TTL RB5 11 11 12 1 0 TTL RB6 12 12 13 1 0 TTL RB7 13 13 14 1 0 TTL TOCKI 3 3 3 ST Glock input to Timer0 Must be tied to Vss or VDD if not in use to reduce current consumption MCLR VPP 4 4 4 ST Master clear RESET input programming voltage input This pin is an active low RESET to the device Voltage on the MCLR VPP pin must not exceed VDD to avoid unin tended entering of Programming mode OSC1 CLKIN 16 16 18 ST Oscillator crystal input external clock source input OSC2 CLKOUT 15 15 17 O Oscillator crystal output Connects to crystal or resonator in crystal Oscillator mode In RC mode OSC2 pin outputs CLKOUT which has 1 4 the frequency of OSC1 and denotes the instruction cycle rate VDD 14 14 1516 P Positive supply for logic and I O pins Vss 5 5 5 6 P Ground reference for logic and I O pins Legend input O output I O input output P power Not Used TTL TTL input ST Schmitt Trigger input 2002 Microchip Technology Inc Preliminary DS30453D page 11 PIC16C5X TABLE 3 2 PINOUT DESCRIPTION PIC16C55 PIC16C57 PIC16CR57 Pin Number Pin Buffer en Pin Name Description DIP soc ssop Type Type RAO 6 6 5 1 0 TTL Bi directional I O port RA1 7 7 6 VO TTL RA2 8 8 7 VO TTL RA3 9 9 8 VO TTL RBO 10 10 9 1 0 TTL Bi
183. oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ O 2002 Microchip Technology Inc Preliminary DS30453D page 105 PIC16C5X 15 2 DC Characteristics PIC16C54A 04E 10E 20E Extended PIC16LC54A 04E Extended PIC16LC54A 04E Standard Operating Conditions unless otherwise specified Extended Operating Temperature 40 C lt TA 125 C for extended PIC16C54A 04E 10E 20E Standard Operating Conditions unless otherwise specified Extended Operating Temperature 40 C lt TA 125 C for extended join Symbol Characteristic Min Typt Max Units Conditions VDD Supply Voltage D001 PIC16LC54A 3 0 6 25 V XTand RC modes 2 5 6 25 V LP mode D001A PIC16C54A 3 5 5 5 V RC and XT modes 4 5 5 5 V HS mode D002 Vor RAM Data Retention Voltage 1 5 V Device in SLEEP mode D003 VPOR VDD Start Voltage to ensure Vss V See Section 5 1 for details on Power on Reset Power on Reset D004 SvoD VDD Rise Rate to ensure 0 05 V ms See Section 5 1 for details on Power on Reset Power on Reset IDD Supply Current D010 PIC16LC54A 0 5 25 mA Fosc 4 0 MHz VDD 5 5V RC and XT modes 11 27 LA Fosc 32 kHz VDD 2 5V LP mode Commercial 11 35 UA Fosc 32 kHz VDD 2 5V LP mode Industri
184. ot occur SUBWF 1 A borrow from the 4th low order bit of the result did not occur 0 A borrow from the 4th low order bit of the result occurred bit 0 ADDWF 1 A carry occurred 0 A carry did not occur SUBWF 1 A borrow did not occur 0 A borrow occurred C Carry borrow bit for ADDWE SUBWF and RRE RLF instructions RRF or RLF Loaded with LSb or MSb respectively Legend R Readable bit n Value at POR W Writable bit 1 bit is set U Unimplemented bit read as 0 bit is cleared X bitis unknown O 2002 Microchip Technology Inc Preliminary DS30453D page 29 PIC16C5X 6 4 OPTION Register The OPTION Register is a 6 bit wide write only regis ter which contains various control bits to configure the Timer0 WDT prescaler and TimerO By executing the OPTION instruction the contents of the W Register will be transferred to the OPTION Reg ister A RESET sets the OPTION lt 5 0 gt bits REGISTER 6 2 OPTION REGISTER U 0 U 0 W 1 W 1 W 1 W 1 W 1 W 1 TOCS TOSE PSA PS2 PS1 PSO bit 7 bit 0 bit 7 6 Unimplemented Read as 0 bit 5 TOCS TimerO clock source select bit 1 Transition on TOCKI pin 0 Internal instruction cycle clock CLKOUT bit 4 TOSE TimerO source edge select bit 1 Increment on high to low transition on TOCKI pin 0 Increment on low to high transition on TOCKI pin bit 3 PSA Prescaler assignment b
185. pecified Operating Temperature 0 C lt TA 70 C for commercial BO CHARACTERISTICS 40 C lt TA lt 85 C for industrial 40 C lt TA 125 C for extended n Symbol Characteristic Min Typt Max Units Conditions DO30 VIL Input Low Voltage I O Ports Vss 0 8V V 4 5V lt VDD lt 5 5V I O Ports Vss 1 0 15Vpp V Otherwise MCLR Schmitt Trigger Vss 0 15Vpp V TOCKI Schmitt Trigger Vss 0 15Vpp V OSC1 Schmitt Trigger Vss 0 15Vpbp V RC mode only OSC1 Vss 0 3 VDD V XT HS and LP modes D040 VIH Input High Voltage I O ports 2 0 VDD V 4 5V lt VDD lt 5 5V I O ports 0 25 VDD 0 8 VDD V Otherwise MCLR Schmitt Trigger 0 85 VDD VDD V TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 Schmitt Trigger 0 85 VDD VDD V RC mode only OSC1 0 7 VDD VDD V XT HS and LP modes D050 VHYS Hysteresis of Schmitt 0 15 VDD V Trigger inputs D060 IL Input Leakage Current For VDD lt 5 5V I O ports 1 0 0 5 1 0 NA Vss lt VPIN lt VDD pin at hi impedance MCLR 5 0 5 0 uA VPIN Vss 0 25V MCLR 0 5 3 0 NA VPIN VDD TOCKI 3 0 0 5 3 0 NA Vss VPIN lt VDD OSC1 3 0 0 5 NA Vss VPIN VDD XT HS and LP modes DO80 VoL Output Low Voltage I O ports 0 6 V loL 8 7 mA VDD 4 5V OSC2 CLKOUT 0 6 V oi 1 6 mA VDD 4 5V RC mode only D090 Vor Output High Voltage I O ports VDD 0 7 V lOH 5 4 mA VDD 4 5V OSC2 CLKOUT VDD 0 7
186. perat ing temperature In addition to this the oscillator frequency will vary from unit to unit due to normal pro cess parameter variation Furthermore the difference in lead frame capacitance between package types will also affect the oscillation frequency especially for low CEXT values The user also needs to take into account variation due to tolerance of external R and C compo nents used Figure 4 5 shows how the R C combination is con nected to the PIC16C5X For REXT values below 2 2 kQ the oscillator operation may become unstable or stop completely For very high REXT values e g 1 MQ the oscillator becomes sensitive to noise humidity and leakage Thus we recommend keeping REXT between 3 kQ and 100 kQ Although the oscillator will operate with no external capacitor CEXT 0 pF we recommend using values above 20 pF for noise and stability reasons With no or small external capacitance the oscillation freguency can vary dramatically due to changes in external capacitances such as PCB trace capacitance or pack age lead frame capacitance The Electrical Specifications sections show RC fre quency variation from part to part due to normal pro cess variation The variation is larger for larger R since leakage current variation will affect RC frequency more for large R and for smaller C since variation of input capacitance will affect RC frequency more Also see the Electrical Specifications sections for vari ati
187. performs the 180 degree phase shift that a parallel oscillator requires The 4 7 kQ resistor provides the negative feedback for stability The 10 ko potentiometers bias the 74AS04 in the linear region This circuit could be used for external oscillator designs FIGURE 4 3 EXAMPLE OF EXTERNAL PARALLEL RESONANT CRYSTAL OSCILLATOR CIRCUIT USING XT HS OR LP OSCILLATOR MODE 5V To Other Devices 10K 4 7K 74AS04 PIC16C5X 74AS04 CLKIN e _ OSC2 Ak XTAL 10K Lo Hee d 20 pF L 20 pF Figure 4 4 shows a series resonant oscillator circuit This circuit is also designed to use the fundamental fre quency of the crystal The inverter performs a 180 degree phase shift in a series resonant oscillator cir cuit The 330 kQ resistors provide the negative feed back to bias the inverters in their linear region FIGURE 4 4 EXAMPLE OF EXTERNAL SERIES RESONANT CRYSTAL OSCILLATOR CIRCUIT USING XT HS OR LP OSCILLATOR MODE To Other 330K 330K Devices WN AW 74AS04 74AS04 74AS04 t PIC16C5X C gt D CLKIN 0 1 uF XTAL Open OSC2 INI LIT DS30453D page 16 Preliminary O 2002 Microchip Technology Inc PIC16C5X 4 4 RC Oscillator For timing insensitive applications the RC device option offers additional cost savings The RC oscillator frequency is a function of the supply voltage the resis tor REXT and capacitor CEXT values and the o
188. r PIC16C5X RC devices the OSC1 CLKIN pin is a Schmitt Trigger input lt is not recommended that the PIC16C5X be driven with external clock in RC mode 4 The user may use the better of the two specifications O 2002 Microchip Technology Inc Preliminary DS30453D page 71 PIC16C5X 125 DC Characteristics PIC16C54 55 56 57 RCE XTE 10E HSE LPE Extended Standard Operating Conditions unless otherwise specified BC CHARACTERISTICS Operating Temperature 40 C lt TA 125 C for extended re Symbol Characteristic Min Typt Max Units Conditions D030 VIL Input Low Voltage 1 O ports Vss 0 15 VDD V Pin at hi impedance MCLR Schmitt Trigger Vss 0 15 VDD V TOCKI Schmitt Trigger Vss 0 15 VDD V OSC1 Schmitt Trigger Vss 0 15Vpp V PIC16C5X RC only OSC1 Schmitt Trigger Vss 0 3 VDD V PIC16C5X XT 10 HS LP D040 VIH Input High Voltage I O ports 0 45 VDD VDD V For all Vop 4 I O ports 2 0 VDD V 4 0V lt Vpop 5 5v 9 I O ports 0 36 VDD VDD V VDD gt 55V MCLR Schmitt Trigger 0 85 VDD VDD V TOCKI Schmitt Trigger 0 85 VDD VDD V OSC1 Schmitt Trigger 0 85 VDD VDD V PIC16C5X RC only OSC1 Schmitt Trigger 0 7 VDD VDD V PIC16C5X XT 10 HS LP DO50 VHYS Hysteresis of Schmitt 0 15 VDD V Trigger inputs DO60 IL Input Leakage Current 1 2 For VDD lt 5 5 V I O ports 1 0 5 1 HA Vss lt VPIN VDD pin at hi impedan
189. r year WW Week code week of January 1 is week 01 NNN Alphanumeric traceability code Note Inthe event the full Microchip part number cannot be marked on one line it will be carried over to the next line thus limiting the number of available characters for customer specific information Standard PICmicro device marking consists of Microchip part number year code week code and traceability code For PICmicro device marking beyond this certain price adders apply Please check with your Microchip Sales Office For QTP devices any special marking adders are included in QTP price DS30453D page 172 Preliminary O 2002 Microchip Technology Inc PIC16C5X 18 Lead Plastic Dual In line P 300 mil PDIP E1 D 5 pa a mu gu h mu gs rs ns OA ENEE TE JE Ga Le GA U E ids E EN IIA Pee od Jl Ji B P B eB Units INCHES MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 18 18 Pitch p 100 2 54 Top to Seating Plane A 140 155 170 3 56 3 94 4 32 Molded Package Thickness A2 315 130 145 2 92 3 30 3 68 Base to Seating Plane Al 015 0 38 Shoulder to Shoulder Width E 300 313 325 7 62 7 94 8 26 Molded Package Width El 240 250 260 6 10 6 35 6 60 Overall Length D 89
190. ral Purpose Register for PIC16C54 PIC16CR54 PIC16C56 PIC16CR56 PIC16C58 and PIC16CR58 7 4 TRIS Registers The Output Driver Control Registers are loaded with the contents of the W Register by executing the TRIS f instruction A 1 from a TRIS Register bit puts the corresponding output driver in a hi impedance input mode A 0 puts the contents of the output data latch on the selected pins enabling the output buffer Note A read of the ports reads the pins not the output data latches That is if an output driver on a pin is enabled and driven high but the external system is holding it low a read of the port will indicate that the pin is low The TRIS Registers are write only and are set output drivers disabled upon RESET 7 5 The equivalent circuit for an I O port pin is shown in Figure 7 1 All ports may be used for both input and output operation For input operations these ports are non latching Any input must be present until read by an input instruction e g MOVF PORTB W The out puts are latched and remain unchanged until the output latch is rewritten To use a port pin as output the corre sponding direction control bit in TRISA TRISB TRISC must be cleared 0 For use as an input the corresponding TRIS bit must be set Any I O pin can be programmed individually as input or output 1 O Interfacing FIGURE 7 1 EQUIVALENT CIRCUIT FOR A SINGLE I O PIN Data Bus
191. rammer and a full featured programmer All the tools are supported on IBM PC and compatible machines 1 1 Applications The PIC16C5X series fits perfectly in applications rang ing from high speed automotive and appliance motor control to low power remote transmitters receivers pointing devices and telecom processors The EPROM technology makes customizing application programs transmitter codes motor speeds receiver frequen cies etc extremely fast and convenient The small footprint packages for through hole or surface mount ing make this microcontroller series perfect for applica tions with space limitations Low cost low power high performance ease of use and l O flexibility make the PIC16C5X series very versatile even in areas where no microcontroller use has been considered before e g timer functions replacement of glue logic in larger Systems co processor applications O 2002 Microchip Technology Inc Preliminary DS30453D page 5 PIC16C5X TABLE 1 1 PIC16C5X FAMILY OF DEVICES Features PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56 Maximum Operation Frequency 40 MHz 20 MHz 40 MHz 40 MHz 20 MHz EPROM Program Memory x12 words 512 512 1K ROM Program Memory x12 words 512 1K RAM Data Memory bytes 25 25 24 25 25 Timer Module s TMRO TMRO TMRO TMRO TMRO VO Pins 12 12 20 12 12 Number of Instructions 33 33 33 33 33 Packages 18 pin DIP 18 pin DIP 28 pin D
192. rescaler is nei ther readable nor writable On a RESET the prescaler contains all 0 s 8 2 1 SWITCHING PRESCALER ASSIGNMENT The prescaler assignment is fully under software con trol i e it can be changed on the fly during program execution To avoid an unintended device RESET the following instruction sequence Example 8 1 must be executed when changing the prescaler assignment from TimerO to the WDT EXAMPLE 8 1 CHANGING PRESCALER TIMERO gt WDT CLRWDT Clear WDT CLRF TMRO Clear TMRO 4 Prescaler MOVLW B 00xx1111 Last 3 instructions in this example OPTION jare reguired only if desired CLRWDT PS lt 2 0 gt are 000 or 001 MOVLW B 00xxlxxx Set Prescaler to OPTION desired WDT rate To change prescaler from the WDT to the TimerO mod ule use the sequence shown in Example 8 2 This sequence must be used even if the WDT is disabled A CLRWDT instruction should be executed before switch ing the prescaler EXAMPLE 8 2 CHANGING PRESCALER WDT TIMERO CLRWDT Clear WDT and prescaler Select TMRO new prescale value and MOVLW B XxxxxOxxx clock source OPTION DS30453D page 40 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 8 6 BLOCK DIAGRAM OF THE TIMERO WDT PRESCALER Tcy Fosc 4 Data Bus 0 1 8 TOCKI 11 x M Sync pin U 2 13 TMROreg 0 X Cycles TOSE 4
193. rmula IR gt VDD 2REXT mA with REXT in kQ DS30453D page 80 Preliminary O 2002 Microchip Technology Inc PIC16C5X 13 1 DC Characteristics PIC16CR54A 04 10 20 PIC16LCR54A 04 Commercial PIC16CR54A 041 101 201 PIC16LCR54A 041 Industrial PIC16LCR54A 04 PIC16LCR54A 041 Commercial Industrial Standard Operating Conditions unless otherwise specified 0 C lt TA lt 70 C for commercial 40 C x TA lt 85 C for industrial Operating Temperature PIC16CR54A 04 10 20 PIC16CR54A 041 101 201 Commercial Industrial Standard Operating Conditions unless otherwise specified 0 C lt TA lt 707C for commercial 40 C lt TA lt 85 C for industrial Operating Temperature ra Symbol Characteristic Device Min Typt Max Units Conditions IPD Power down Current D006 PIC16LCR54A Commercial 1 0 6 0 uA VDD 2 5V WDT disabled 2 0 8 0 uA VDD 4 0V WDT disabled 3 0 15 uA VDD 6 0V WDT disabled 5 0 25 uA VDD 6 0V WDT enabled D006A PIC16CR54A Commercial 1 0 6 0 HA VDD 2 5V WDT disabled 2 0 8 0 HA VDD 4 0V WDT disabled 3 0 15 HA VDD 6 0V WDT disabled 5 0 25 HA VDD 6 0V WDT enabled D007 PIC16LCR54A Industrial 1 0 8 0 uA VDD 2 5V WDT disabled 2 0 10 uA VDD 4 0V WDT disabled 3 0 20 uA VDD 4 0V WDT enabled 3 0 18 uA VDD 6
194. rochip offers a QTP Programming Service for fac tory production orders This service is made available for users who choose not to program a medium to high quantity of units and whose code patterns have stabi lized The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory Certain code and prototype verification procedures apply before produc tion shipments are available Please contact your Microchip Technology sales office for more details 2 4 Serialized Quick Turnaround Production SQTP Devices Microchip offers the unique programming service where a few user defined locations in each device are programmed with different serial numbers The serial numbers may be random pseudo random or sequen tial The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory Serial programming allows each device to have a unique number which can serve as an entry code password or ID number 2 5 Read Only Memory ROM Devices Microchip offers masked ROM versions of several of the highest volume parts giving the customer a low cost option for high volume mature products O 2002 Microchip Technology Inc Preliminary DS30453D page 7 PIC16C5X NOTES RR A A i nt DS30453D page 8 Preliminary O 2002 Microchip Technology Inc PIC16C5X 3 0 ARCHITECTURAL OVERVIEW Th
195. rovide the product development engineer with a complete microcontroller design tool set for PICmicro microcontrollers MCUs Software control of the MPLAB ICE in circuit emulator is provided by the MPLAB Integrated Development Environment IDE which allows editing building downloading and source debugging from a single environment The MPLAB ICE 2000 is a full featured emulator sys tem with enhanced trace trigger and data monitoring features Interchangeable processor modules allow the system to be easily reconfigured for emulation of differ ent processors The universal architecture of the MPLAB ICE in circuit emulator allows expansion to support new PICmicro microcontrollers The MPLAB ICE in circuit emulator system has been designed as a real time emulation system with advanced features that are generally found on more expensive development tools The PC platform and Microsoft Windows environment were chosen to best make these features available to you the end user 11 7 ICEPIC In Circuit Emulator The ICEPIC low cost in circuit emulator is a solution for the Microchip Technology PIC16C5X PIC16C6X PIC16C7X and PIC16CXXX families of 8 bit One Time Programmable OTP microcontrollers The mod ular system can support different subsets of PIC16C5X or PIC16CXXX products through the use of inter changeable personality modules or daughter boards The emulator is capable of emulating without target application circuitry being
196. rts 2 0 VDD V 4 0V lt Von lt 5 5V 4 I O ports 0 36 VDD VDD V VDD 5 5V MCLR Schmitt Trigger 0 85 VDD VDD V TOCKI Schmitt Trigger 0 85 VDD E VDD V OSC1 Schmitt Trigger 0 85 VDD VDD V PIC16C5X RC only OSC1 Schmitt Trigger 0 7 VDD VDD V PIC16C5X XT 10 HS LP D050 VHYS Hysteresis of Schmitt 0 15 VDD V Trigger inputs DO60 IL Input Leakage Current For VDD lt 5 5V I O ports 1 0 5 1 HA Vss lt VPIN lt VDD pin at hi impedance MCLR 5 HA VPIN Vss 0 25V MCLR 0 5 5 HA VPIN VDD TOCKI 3 0 5 3 HA Vss lt VPIN lt VDD OSC1 3 0 5 3 HA Vss lt VPIN lt VDD PIC16C5X XT 10 HS LP D080 VoL Output Low Voltage I O ports 0 6 V IOL 8 7 mA VDD 4 5V OSC2 CLKOUT 0 6 V loL 1 6 mA VDD 4 5V PIC16C5X RC D090 VoH Output High Voltage I O ports VDD 0 7 V loH2 5 4 mA VDD 4 5V OSC2 CLKOUT VDD 0 7 V loH 1 0 mA VDD 4 5V PIC16C5X RC These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 Fo
197. ruction Cycle Time 4 Fosc TosL TosH Clock in OSC1 Low or High 50 ns XT oscillator Time 20 ns HS oscillator 2 0 us LP oscillator 4 TosR TosF Clock in OSC1 Rise or Fall 25 ns XT oscillator Time 25 ns HS oscillator 50 ns LP oscillator These parameters are characterized but not tested t Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period O 2002 Microchip Technology Inc Preliminary DS30453D page 87 PIC16C5X FIGURE 13 3 CLKOUT AND I O TIMING PIC16CR54A Q4 Q1 Q2 Q3 i OSC1 ve CLKOUT Z X e NU ge Nu 40 e 4908 i i RN TAS es s z I O Pin A 1 v input y NES l 14 17 E 15 out Old Value Xx New Value 20 21 Note Please refer to Figure 1
198. ructions where the PCL is the destination or modify PCL instructions include MOVWF PCL ADDWF PCL and BsF PCL 5 For the PIC16C56 PIC16CR56 PIC16C57 PIC16CR57 PIC16C58 and PIC16CR58 a page num ber again must be supplied Bit5 and bit6 of the STA TUS Register provide page information to bit9 and bit10 of the PC Figure 6 8 and Figure 6 9 FIGURE 6 8 LOADING OF PC BRANCH INSTRUCTIONS PIC16C56 PIC16CR56 GOTO Instruction 10 9 8 7 0 PC 0 PCL Instruction Word 2 Af PA lt 1 0 gt o STATUS CALL or Modify PCL Instruction 10 9 8 7 0 PC 0 PCL Instruction Word Note Because PC lt 8 gt is cleared in the CALL instruction or any modify PCL instruction all subroutine calls or computed jumps are limited to the first 256 locations of any pro Reset to 0 2 PA lt 1 0 gt 7 0 STATUS FIGURE 6 9 LOADING OF PC BRANCH INSTRUCTIONS PIC16C57 PIC16CR57 AND PIC16C58 PIC16CR58 gram memory page 512 words long FIGURE 6 7 LOADING OF PC BRANCH INSTRUCTIONS PIC16C54 PIC16CR54 PIC16C55 GOTO Instruction 8 7 0 PC PCL E Instruction Word CALL or Modify PCL Instruction 8 7 0 PC PCL Reset to 0 Instruction Word GOTO Instruction 109 8 7 0 PC PCL f Instruction Word
199. s based on characterization results at 25 C This data is for design guidance only and is not tested This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption a The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled disabled as specified b For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type Does not include current through REXT The current through the resistor can be estimated by the formula IR gt VDD 2REXT mA with REXT in kQ O 2002 Microchip Technology Inc Preliminary DS30453D page 69 PIC16C5X 123 DC Characteristics PIC16C54 55 56 57 RCE XTE 10E HSE LPE Extended PIC16C54 55 56 57 RCE XTE 10E HSE LPE Standard Operating Conditions unless otherwise specified Extended Operating Temperature 40 C lt TA lt 125 C for extended Param gigs A A T No Symbol Characteristic Device Min Typt Max Units Conditions D001 VDD Supply Volta
200. sc mode 04 DC 10 MHz HS osc mode 10 DC 20 MHz HS osc mode 20 DC 200 kHz LP osc mode Oscillator Frequency DC 4 0 MHz RC osc mode DC 2 0 MHz RC osc mode PIC16LV54A 0 1 4 0 MHz XT osc mode 0 1 2 0 MHz XT osc mode PIC16LV54A 4 0 4 0 MHz HS osc mode 04 4 0 10 MHz HS osc mode 10 4 0 20 MHz HS osc mode 20 5 0 200 kHz LP osc mode These parameters are characterized but not tested T Data in the Typical Typ column is based on characterization results at 25 C This data is for design guid ance only and is not tested Note 1 All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code Exceeding these specified limits may result in an unstable oscillator operation and or higher than expected current consumption When an external clock input is used the max cycle time limit is DC no clock for all devices 2 Instruction cycle period Tcy equals four times the input oscillator time base period O 2002 Microchip Technology Inc Preliminary DS30453D page 111 PIC16C5X TABLE 15 1 EXTERNAL CLOCK TIMING REQUIREMENTS PIC16C54A Standard Operating Conditions unless otherwise specified Operating Temperature 0 C lt TA 70 C for commercial AC Characteristics 40 C lt TA lt 85 C for industri
201. se register DS30453D page 26 Preliminary O 2002 Microchip Technology Inc PIC16C5X Note 1 Nota physical register See Section 6 7 FIGURE 6 5 PIC16C57 CR57 REGISTER FILE MAP FSR 6 5 00 01 10 11 File Address Y 00h INDF 20h 40h 60h 01h TMRO 02h PCL 03h STATUS 04h E Addresses map back to 05h PORTA addresses in Bank 0 06h PORTB 07h PORTC 08h General Purpose OFh Registers 2Fh 4Fh 6Fh 10h 30h 50h 70h General General General General Purpose Purpose Purpose Purpose Registers Registers Registers Registers 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 Bank 3 Note 1 Nota physical register See Section 6 7 FIGURE 6 6 PIC16C58 CR58 REGISTER FILE MAP FSR 6 5 00 01 10 11 File Address Y 00h INDF 20h 40h 60h 01h TMRO 02h PCL 03h STATUS 04h FAB Addresses map back to 05h PORTA addresses in Bank 0 06h PORTB 07h General Purpose Registers OFh 2Fh 4Fh 6Fh 10h 30h 50h 70h General General General General Purpose Purpose Purpose Purpose Registers Registers Registers Registers 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 Bank 3 2002 Microchip Technology Inc Preliminary DS30453D page 27 PIC16C5X 6 2 2 SPECIAL FUNCTION REGISTERS The Special Function Registers are registers used by the CPU and peripheral functions to control the opera tion of the device Table 6 1 The Special Registers can be classified i
202. sign requires the use of a paral lel cut crystal Use of a series cut crystal may give a fre quency out of the crystal manufacturers specifications When in XT LP or HS modes the device can have an external clock source drive the OSC1 CLKIN pin Figure 4 2 CRYSTAL CERAMIC RESONATOR OPERATION HS XT OR LP OSC CONFIGURATION FIGURE 4 1 FIGURE 4 2 EXTERNAL CLOCK INPUT OPERATION HS XT OR LP OSC CONFIGURATION Clock from OSC1 ext system PIC16C5X Open 4 OSC2 PIC16C5X SLEEP To internal logic See Capacitor Selection tables for recommended values of C1 and C2 2 A series resistor RS may be required for AT strip cut crystals 3 RF varies with the Oscillator mode cho sen approx value 10 MQ TABLE 4 1 CAPACITOR SELECTION FOR CERAMIC RESONATORS PIC16C5X PIC16CR5X Osc Resonator Cap Range Cap Range Type Freq C1 C2 XT 455 kHz 68 100 pF 68 100 pF 2 0 MHz 15 33 pF 15 33 pF 4 0 MHz 10 22 pF 10 22 pF HS 8 0 MHz 10 22 pF 10 22 pF 16 0 MHz 10 pF 10 pF These values are for design guidance only Since each resonator has its own characteristics the user should consult the resonator manufacturer for appropriate values of external components TABLE 4 2 CAPACITOR SELECTION FOR CRYSTAL OSCILLATOR PIC16C5X PIC16CR5X Osc Crystal Cap Range Cap Range Type Freq C1 C2 LP 32
203. struction TRIS f where f 5 6 or 7 causes the contents of the W register to be written to the tristate latches of PORTA B or C respectively A 1 forces the pin to a hi impedance state and disables the output buffers 4 If this instruction is executed on the TMRO register and where applicable d 1 the prescaler will be cleared if assigned to TMRO DS30453D page 50 Preliminary O 2002 Microchip Technology Inc PIC16C5X ADDWF Add W and f Syntax label ADDWF f d Operands 0 lt f lt 31 d e 0 1 Operation W f gt dest Status Affected C DC Z Encoding 0001 11df ffff Description Add the contents of the W register and register If d is O the result is stored in the W register If d is 1 the result is stored back in register Words 1 Cycles 1 Example ADDWF TEMP REG 0 Before Instruction W 0x17 TEMP REG 0x02 After Instruction W OxD9 TEMP REG 0xC2 ANDLW AND literal with W Syntax label ANDLW k Operands 0 lt k lt 255 Operation W AND k gt W Status Affected Z Encoding 1110 kkkk kkkk Description The contents of the W register are AND ed with the eight bit literal k The result is placed in the W regis ter Words 1 Cycles 1 Example ANDLW H 5F Before Instruction Ww 0xA3 After Instruction Ww 0x03 ANDWF AND W with f Syntax
204. t 5V 25 C unless otherwise stated These parameters are for design guidance only and are not tested Note 1 This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data The supply current is mainly a function of the operating voltage and frequency Other factors such as bus loading oscillator type bus rate internal code execution pattern and temperature also have an impact on the current consumption The test conditions for all IDD measurements in active Operation mode are OSC1 external square wave from rail to rail all I O pins tristated pulled to Vss TOCKI VDD MCLR VDD WDT enabled a b disabled as specified For standby current measurements the conditions are the same except that the device is in SLEEP mode The power down current in SLEEP mode does not depend on the oscillator type 3 Does not include current through REXT The current through the resistor can be estimated by the formula IR VDD 2REXT mA with REXT in kQ O 2002 Microchip Technology Inc Preliminary DS30453D page 137 PIC16C5X 17 3 DC Characteristics PIC16C54C C55A C56A C57C C58B 04 20 Commercial Industrial Extended PIC16LC54C LC55A LC56A LC57C LC58B 04 Commercial Industrial PIC16CR54C CR56A CR57C CR58B 04 20 Commercial Industrial Extended PIC16LCR54C LCR56A LCR57C LCR58B 04 Commercial Industrial Standard Operating Conditions unless otherwise s
205. t pins have Schmitt Trigger input buffers DS30453D page 122 Preliminary O 2002 Microchip Technology Inc PIC16C5X FIGURE 16 10 TYPICAL IDD vs FREQUENCY WDT DISABLED RC MODE 20 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 A 1000 f lt EN pad a 6 0V E IN SA 100 40v 3 5V 3 0V 2 5V 10 0 1 y 10 Freq MHz FIGURE 16 11 MAXIMUM IpD vs FREQUENCY WDT DISABLED RC MODE 20 PF 40 C to 85 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 LA A 1000 lt EE 3 En E HVE SV 100 FEV 3 0V 2 5V 10 0 1 1 10 Freg MHz 2002 Microchip Technology Inc Preliminary DS30453D page 123 PIC16C5X FIGURE 16 12 TYPICAL IpD vs FREQUENCY WDT DISABLED RC MODE 100 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 0 01 0 1 1 10 Freq M
206. t the bank to be addressed 00 bank oO 01 bank 1 10 bank 2 11 bank 3 FIGURE 6 10 DIRECT INDIRECT ADDRESSING Direct Addressing FSR opcode 6 5 4 3 2 1 0 bank select location select gt 00 01 Indirect Addressing FSR 6 5 4 3 2 1 0 iy A J bank location select 11 8 ke 00h ad Addresses map back to dresses in Bank 0 Data OFh Memory 10h 1Fh 3Fh 7Fh Bank 0 Bank 1 Note 1 For register map detail see Section 6 2 Bank 2 Bank 3 O 2002 Microchip Technology Inc Preliminary DS30453D page 33 PIC16C5X NOTES DS30453D page 34 Preliminary 2002 Microchip Technology Inc PIC16C5X 7 0 VOPORTS As with any other register the I O Registers can be written and read under program control However read instructions e g MOVF PORTB W always read the I O pins independent of the pin s input output modes On RESET all 1 O ports are defined as input inputs are at hi impedance since the I O control registers TRISA TRISB TRISC are all set 7 1 PORTA PORTA is a 4 bit I O Register Only the low order 4 bits are used RA lt 3 0 gt Bits 7 4 are unimplemented and read as Os 7 2 PORTB PORTB is an 8 bit O Register PORTB lt 7 0 gt 7 3 PORTC PORTC is an 8 bit I O Register for PIC16C55 PIC16C57 and PIC16CR57 PORTO is a Gene
207. ta Addressing cooococccconococinocccinoncccnonnncnonnnc conan 33 Instruction Gycle nee rnnt rettet nennt 13 Instruction Flow Pipelining eene 13 Instruction Set Summary sse 49 OR Wins ce ern LE LAIT eni iti ame deed 56 lei S 56 K KeeLog Evaluation and Programming Tools 64 O 2002 Microchip Technology Inc Preliminary DS30453D page 185 PIC16C5X L EN A erre retra 31 M MCLR Reset Register values on ss 20 Memory Map PIC16C54 CR54 C55 eeen 25 PIC16C56 CR56 moraii aaie ei 25 PIC16C57 CR57 C58 CR58 25 Memory Organization sese 25 MOVF 56 MPLAB C17 and MPLAB C18 C Compilers 61 MPLAB ICD In Circuit Debugger eese 63 MPLAB ICE High Performance Universal In Circuit Emulator with MPLAB IDE iii 62 MPLAB Integrated Development Environment Software 61 MPLINK Object Linker MPLIB Object Librarian 62 N NOP eh aed t s e d ea eee es 57 0 One Time Programmable OTP Devices Soe al OPTIONS 57 OPTION Register 30 Value on reset 20 Oscillator Configurations 15 Oscillator Types P PAO Dita ii PA1 bit ee Paging e Peripheral Features 1 PICDEM 1 Low Cost PICmicro Demonstration Board PICDEM 17 Demonstration Board PICDEM 2 Low Cost PIC16CXX Demonstration Board
208. tatus Affected TO PD Encoding 0000 0000 0100 Description The CLRWDT instruction resets the WDT It also resets the prescaler if the prescaler is assigned to the WDT and not TimerO Status bits TO and PD are set Words 1 Cycles 1 Example CLRWDT Before Instruction WDT counter After Instruction WDT counter 0x00 WDT prescaler 0 TO n PD 1 2002 Microchip Technology Inc Preliminary DS30453D page 53 PIC16C5X COMF Complement f Syntax label COMF fd Operands O lt f lt 31 d e 0 1 Operation f gt dest Status Affected Z Encoding 0010 Oldf ffff Description The contents of register are complemented If d is 0 the result is stored in the W register If is 1 the result is stored back in register f Words 1 Cycles 1 Example COMF REG1 0 Before Instruction REG1 0x13 After Instruction REG1 0x13 W OxEC DECF Decrement f Syntax label DECF f d Operands 0 lt f lt 31 d e 0 1 Operation f 1 gt dest Status Affected Z Encoding 0000 11df ffff Description Decrement register f If d is O the result is stored in the W register If d is 1 the result is stored back in register Words 1 Cycles 1 Example DECF CNT 1 Before Instruction CNT 0x01 Z 0 After Instruction CNT 0x00 Z 1 DECFSZ Syntax Operands Operation Status Affected Encoding Description Words Cycles Exampl
209. teresis of Schmitt 0 15 VDD V Trigger inputs D060 IIL Input Leakage Current For VDD lt 5 5V I O ports 1 0 0 5 1 0 HA Vss lt VPIN VDD pin at hi impedance MCLR 5 0 5 0 HA VPIN Vss 0 25V MCLR 0 5 3 0 HA VPIN VDD TOCKI 3 0 0 5 3 0 HA Vss VPIN lt VDD OSC1 3 0 0 5 HA Vss VPIN lt VDD XT HS and LP modes D080 VOL Output Low Voltage 1 O ports 0 6 V loL 8 7 mA VDD 4 5V OSC2 CLKOUT 0 6 V loL 1 6 mA VDD 4 5V RC mode only VOH Output High Voltage 1 O ports VDD 0 7 V IOH 5 4 mA VDD 4 5V OSC2 CLKOUT VDD 0 7 V IOH 1 0 mA VDD 4 5V RC mode only These parameters are characterized but not tested Data in the Typical Typ column is based on characterization results at 25 C This data is for design guidance only and is not tested Note 1 The leakage current on the MCLR VPP pin is strongly dependent on the applied voltage level The specified levels represent normal operating conditions Higher leakage current may be measured at different input voltage 2 Negative current is defined as coming out of the pin 3 For the RC mode the OSC1 CLKIN pin is a Schmitt Trigger input It is not recommended that the PIC16C5X be driven with external clock in RC mode 2002 Microchip Technology Inc Preliminary DS30453D page 109 PIC16C5X 15 5 Timing Parameter Symbology and Load Conditions Th
210. the distribution at 25 C Maximum or minimum represents mean 30 or mean 30 respectively where o is a standard deviation over the whole temperature range FIGURE 18 1 TYPICAL RC OSCILLATOR FREQUENCY vs TEMPERATURE Fosc Frequency normalized to 25 C Fosc 25 C REXT gt 10 kW CEXT 100 pF 0 10 20 25 30 40 50 60 70 T C TABLE 18 1 RC OSCILLATOR FREQUENCIES Average CEXT REXT Fosc Av 25 C 20 pF 3 3K 5 MHz 127 5K 3 8 MHz 21 10K 2 2 MHz 21 100K 262 kHz 31 100 pF 3 3K 1 63 MHz 13 5K 1 2 MHz t 13 10K 684 kHz 18 100K 71 kHz 25 300 pF 3 3K 660 kHz 10 5 0K 484 kHz 14 10K 267 kHz 15 100K 29 kHz t 19 The freguencies are measured on DIP packages The percentage variation indicated here is part to part variation due to normal process distribution The variation indicated is 3 standard deviation from average value for VDD 5V 2002 Microchip Technology Inc Preliminary DS30453D page 145 PIC16C5X FIGURE 18 2 TYPICAL RC OSCILLATOR FREQUENCY vs VDD CEXT 20 PF 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40
211. tion W OR k gt W de 0 1 Status Affected Z Operation f gt dest Encoding 1101 kkkk kkkk Status Affected Z Description The contents of the W register are Encoding OOTO j MORTC SEs OR ed with the eight bit literal k Description The contents of register f is The result is placed in the W regis moved to destination If d is 0 ter destination is the W register If d Words 4 is 1 the destination is file register f d is 1 is useful to test a Cycles 1 file register since status flag Z is Example IORLW 0x35 affected Before Instruction Words 1 W 0x9A Cycles 1 After Instruction W OxBF Example MOVF FSR 0 Z 0 After Instruction W value in FSR register IORWF Inclusive OR W with f Syntax Paper ORNE fig MOVLW Move Literal to W Operands 0 lt f lt 31 P de 0 1 Syntax label MOVLW k Operation W OR f dest Operands 0 lt k lt 255 Status Affected Z Operation k gt W Encoding 0001 00d ffff Status Affected None Description Inclusive OR the W register with Encoding 1100 KEKR kk register f If d is O the result is Description The eight bit literal k is loaded into placed in the W register If d is 1 the W register the result is placed back in Words 1 register Cycles 1 Words 1 Example MOVLW Ox5A Cycles 1 After Instruction Example IORWF RESULT O0 W 0x5A Before Instruction RESULT 0x13 W 0x91 After Instruction RESULT 0x13 W 0x93
212. tistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 1000 gt 4 A a Q A 5 5 eee 100 4 5 3 5 25 10 0 1 1 FREQ MHz 19 FIGURE 18 13 TYPICAL IDD vs FREQUENCY WDT DISABLED RC MODE 300 PF 25 C TYPICAL IDD vs FREQ RC MODE 300 pF 25C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 10000 1000 AA T pec i HA ERES 2 100 prv Ep 4 5V 3 5V TI 25v 0 0 01 0 1 FREQ MHz 2002 Microchip Technology Inc Preliminary DS30453D page 151 PIC16C5X FIGURE 18 14 WDT TIMER TIME OUT FIGURE 18 15 PORTA B AND C loH vs PERIOD vs Vpp VoH VDD 3 V Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 50 0 45 5 40 Min 85 C ENDE 35 A z 10 5 Typ 25 C o Typ 125 C O 25 de 15 z DP 850 20 Max 40 C LL Typ 25 C 20 15 TJ Typ 40 C P 10 25 0 0 5 1 0 1 5 2 0 25 30 5 0 VOH Vol
213. to VSS 5m nien tdo e 0 to 7 5V Voltage on MCLR with respect to Vs s o scie d eua ach n OR Pb ne 0 to 14V Voltage on all other pins with respect to VSS 0 rennt 0 6V to VDD 0 6V Total power dissipation 2 PEE ee MUR Bae bee limp d pet e a d Us 800 mW Max Curr nt out of VSS PIN see dio federico et eee et deiner teuer dte egt ti poe age eed desidera 150 mA Max currentinto VDD DIN ius o rer e t toe ep a ae e E i er Fete Ba 50 mA Max current into an input pin TOCKI only sense 500 uA Input clamp current lik VI 0 or VI gt VDD eee 20 mA Output clamp current Iok VO 0 or VO gt VDD inner 20 mA Max output current sunk by any I O pin isa 25 mA Max output current sourced by any I O pin RR 20 mA Max output current sourced by a single I O port PORTA or B nennen 40 mA Max output current sunk by a single I O port PORTA or B us 50 mA Note 1 Voltage spikes below Vss at the MCLR pin inducing currents greater than 80 mA may cause latch up Thus a series resistor of 50 to 100 O should be used when applying a low level to the MCLR pin rather than pulling this pin directly to Vss 2 Power Dissipation is calculated as follows PDIS VDD x IDD Z 10H Y VDD VOH x loH Z VOL x IOL NOTICE Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at those or any other condit
214. ts 2 0 3 0 4 0 5 0 6 0 7 0 VDD Volts Note 1 Prescaler set to 1 1 DS30453D page 152 Preliminary 2002 Microchip Technology Inc PIC16C5X FIGURE 18 16 PORTA B AND C Ion vs FIGURE 18 17 PORTA B AND C lor vs VOH VDD 5V VOL VDD 3V Typical statistical mean 25 C Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 0 45 ae 40 Max 40 C 10 35 Typ 125 C a lt E 25 3 Typ 85 C t Typ 25 C 2 20 Typ 25 C ET yp 40 C 15 L min 85 C 10 40 5 15 20 25 30 35 40 45 50 VOH Volts 0 0 0 0 5 1 0 1 5 2 0 2 5 3 0 VoL Volts O 2002 Microchip Technology Inc Preliminary DS30453D page 153 PIC16C5X FIGURE 18 18 PORTA B AND C lor vs VoL VDD 5 V Typical statistical mean 25 C Maximum mean 3s 40 C to 125 C Minimum mean 3s 40 C to 125 C 90 80 Max 40 C 70 60 50 loL mA 40 30 20 10 0 00 05 10 15 20 25 3 0 VOL Volts TABLE 18 2 INPUT CAPACITANCE Typical Capacitance pF n 18L PDIP 18L SOIC RA port 5 0 4 3 RB port 5 0 4 3 MCLR 17 0 17 0 OSC1 4 0
215. u PORTB 06h XXXX XXXX uuuu uuuu PORTC 07h XXXX XXXX uuuu uuuu General Purpose Register Files 07 7Fh XXXX XXXX uuuu uuuu Legend x unknown u unchanged g see tables in Table 5 1 for possible values Note 1 These values are valid for PIC16C57 CR57 C58 CR58 For the PIC16C54 CR54 C55 C56 CR56 the value on RESET is 111x xxxx and for MCLR and WDT Reset the value is 111u uuuu 2 General purpose register file on PIC16C54 CR54 C56 CR56 C58 CR58 unimplemented read as FIGURE 5 1 SIMPLIFIED BLOCK DIAGRAM OF ON CHIP RESET CIRCUIT Power Up Detect VDD POR Power On Reset gt MCLR VPP pin WDT Time out RESET S Q muy 8 bit Asynch RC OSC Ripple Counter T Device Reset R Q m Timer CHIP RESET DS30453D page 20 Preliminary O 2002 Microchip Technology Inc 5 1 Power On Reset POR The PIC16C5X family incorporates on chip Power On Reset POR circuitry which provides an internal chip RESET for most power up situations To use this fea ture the user merely ties the MCLR VPP pin to VDD A simplified block diagram of the on chip Power On Reset circuit is shown in Figure 5 1 The Power On Reset circuit and the Device Reset Timer Section 5 2 circuit are closely related On power up the RESET latch is set and the DRT is RESET The DRT timer begins counting once it detects MCLR
216. um rated speed of the part limits the permissible combinations of voltage and frequency Please reference the Product Identification System section for the maximum rated speed of the parts FIGURE 17 4 PIC16LC54C 55A 56A 57C 58B VOLTAGE FREQUENCY GRAPH 40 C lt TA x 0 C 6 0 5 5 5 0 VoD 4 5 Volts 4 0 3 5 3 0 2 7 2 5 2 0 0 4 10 20 25 Frequency MHz Note 1 The shaded region indicates the permissible combinations of voltage and frequency 2 The maximum rated speed of the part limits the permissible combinations of voltage and frequency Please reference the Product Identification System section for the maximum rated speed of the parts O 2002 Microchip Technology Inc Preliminary DS30453D page 133 PIC16C5X 17 1 DC Characteristics PIC16C54C C55A C56A C57C C58B 04 20 Commercial Industrial PIC16LC54C LC55A LC56A LC57C LC58B 04 Commercial Industrial PIC16CR54C CR56A CR57C CR58B 04 20 Commercial Industrial PIC16LCR54C LCR56A LCR57C LCR58B 04 Commercial Industrial PIC16LC5X Standard Operating Conditions unless otherwise specified PIC16LCR5X Operating Temperature 0 C lt TA lt 70 C for commercial Commercial Industrial 40 C lt TA lt 85 C for industrial PIC16C5X Standard Operating Conditions unless otherwise specified PIC16CR5X Operating Temperature 0 C lt TA x 70 C for commercial Commercial Industri
217. ve SWAPF Swap Nibbles in f Syntax label SWAPF f d Operands 0 lt f lt 31 de 0 1 Operation f lt 3 0 gt gt dest lt 7 4 gt f lt 7 4 gt gt dest lt 3 0 gt Status Affected None Encoding 0011 10df ffff Description The upper and lower nibbles of register are exchanged If is 0 the result is placed in W register If d is 1 the result is placed in register f Words 1 Cycles 1 Example SWAPF REG1 0 Before Instruction REG1 OxA5 After Instruction REG1 OxA5 W 0x5A TRIS Load TRIS Register Syntax label TRIS f Operands f 5 60r7 Operation W gt TRIS register f Status Affected None Encoding 0000 0000 Offf Description TRIS register f f 5 6 or 7 is loaded with the contents of the W register Words 1 Cycles 1 Example TRIS PORTB Before Instruction W 0xA5 After Instruction TRISB 0xA5 2002 Microchip Technology Inc Preliminary DS30453D page 59 PIC16C5X XORLW Exclusive OR literal with W Syntax label XORLW k Operands 0 lt k lt 255 Operation W XOR k gt W Status Affected Z Encoding 1111 kkkk kkkk Description The contents of the W register are XOR ed with the eight bit literal k The result is placed in the W regis ter Words 1 Cycles 1 Example XORLW OXAF Before Instruction W 0xB5 After Instruction W Ox1A XORWF Exclusive OR W with
218. vice RESET The TO and PD bits can be used to determine the cause of device RESET The TO bit is cleared if a WDT time out occurred and caused wake up The PD bit which is set on power up is cleared when SLEEP is invoked The WDT is cleared when the device wakes from SLEEP regardless of the wake up source 9 4 Program Verification Code Protection If the code protection bit s have not been pro grammed the on chip program memory can be read out for verification purposes Note Microchip does not recommend code pro tecting windowed devices 9 5 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code iden tification numbers These locations are not accessible during normal execution but are readable and writable during program verify Use only the lower 4 bits of the ID locations and always program the upper 8 bits as 1 s Note Microchip will assign a unique pattern number for QTP and SQTP requests and for ROM devices This pattern number will be unique and traceable to the submitted code O 2002 Microchip Technology Inc Preliminary DS30453D page 47 PIC16C5X NOTES iP c n a O L c nt DS30453D page 48 Preliminary O 2002 Microchip Technology Inc PIC16C5X 10 0 INSTRUCTION SET SUMMARY Each PIC16C5X instruction is a 12 bit word divided into an OPCODE which specifies the instruction type

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