ANALOG DEVICES AMP04* Precision Single Supply Instrumentation Amplifier handbook
Contents
1. POA Ay RS ANALOG Precision Single Supply DEVICES Instrumentation Amplifier AMP04 FEATURES FUNCTIONAL BLOCK DIAGRAM Single Supply Operation Low Supply Current 700 pA max Wide Gain Range 1 to 1000 Low Offset Voltage 150 uV max Zero In Zero Out Single Resistor Gain Set 8 Pin Mini DIP and SO packages APPLICATIONS Strain Gages Thermocouples RTDs Battery Powered Equipment Medical Instrumentation Data Acquisition Systems PC Based Instruments Portable Instrumentation 100k INPUT BUFFERS The AMP04 is specified over the extended industrial 40 C to 85 C temperature range AMP04s are available in plastic and GENERAL DESCRIPTION ceramic DIP plus SO 8 surface mount packages The AMP04 is a single supply instrumentation amplifier Contact your local sales office for MIL STD 883 data sheet designed to work over a 5 volt to 15 volt supply range It and availability offers an excellent combination of accuracy low power con sumption wide input voltage range and excellent gain PIN CONNECTIONS performance 8 Lead Epoxy DIP 8 Lead Narrow Body SO Gain is set by a single external resistor and can be from 1 to P Suffix S Suffix 1000 Input common mode voltage range allows the AMP04 to handle signals with full accuracy from ground to within 1 volt of the positive supply And the output can swing to within 1 volt of the positive supply Gain bandwidth is over 700 kHz In addi tion to being easy2. Temperature REV A 13 AMP04 120 300 UNITS Vs 15V Vom 0V NUMBER OF UNITS 2 4 6 8 10 12 14 16 18 20 22 24 TCVoos Figure 23 Output Offset Drift TCVoos Distribution 15V OUTPUT SWING Volts OUTPUT SWING Volts 50 25 0 25 50 75 100 TEMPERATURE Figure 25 Output Voltage Swing vs Temperature 15V INPUT OFFSET CURRENT nA 50 25 0 25 50 75 100 TEMPERATURE C Figure 27 Input Offset Current vs Temperature 120 100 m 80 g z z 60 8 40 E d 2 2 E gt gt 20 9 FREQUENCY Hz FREQUENCY Hz Figure 28 Closed Loop Voltage Gain vs Frequency Figure 29 Closed Loop Output Impedance vs Frequency 120 120 25 C 15 I 100 5 110 m G 100 Vom 2Vp p 8 Z 80 100 E 9 3 60 2 90 G 10 t a a 40 2 80 z z 9 2 921 2 8 3 0 60 20 50 1 10 100 1k 10k 100k 1 10 100 1k FREQUENCY Hz VOLTAGE GAIN G Figure 30 Com
3. 300 UNITS Vs 45V 100 Vg 15V Vom 0V NUMBER OF UNITS NUMBER OF UNITS gt 20 0 0 25 0 50 0 75 1 00 1 25 1 50 1 75 2 00 2 25 2 50 0 0 25 0 50 0 75 1 00 1 25 1 50 1 75 2 00 2 25 2 50 TCVigg uV TCVigg nV C Figure 18 Input Offset Drift TCVios Distribution 5 V Figure 19 Input Offset Drift TCVios Distribution 15 V 120 BASED ON 300 UNITS 3 RUNS 1 0 BASED ON 300 UNITS 3 RUNS 100 NUMBER OF UNITS NUMBER OF UNITS 20 0 20 16 12 08 04 0 0 4 08 1 2 1 6 2 0 5 4 3 2 1 2 3 4 5 OUTPUT OFFSET mV OUTPUT OFFSET mV Figure 20 Output Offset Voos Distribution 5 V Figure 21 Output Offset Voos Distribution 15 V 12 REV 120 300 UNITS 100 Vg 45V NUMBER OF UNITS o eo TCVoos uV C Figure 22 Output Offset Drift TCVoos Distribution 5V gt gt a 2 gt OUTPUT VOLTAGE SWING Volts gt o 50 25 0 25 50 75 100 TEMPERATURE C Figure 24 Output Voltage Swing vs Temperature 5V Vg 5V 2 5 Vg 15V Voy OV 25 Vg 5V INPUT BIAS CURRENT nA 10 15 50 25 0 25 50 75 100 TEMPERATURE C Figure 26 Input Bias Current vs
4. extend to zero volts where other instrumentation amplifiers fail To il lustrate take for example the single supply gain of 100 instru mentation amplifier as in Figure 2 As the inputs approach zero volts in order for the output to go positive amplifier A s output Voa must be allowed to go below ground to 0 094 volts Clearly this is not possible in a single supply environment Con sequently this instrumentation amplifier configuration s input common mode voltage cannot go below about 0 4 volts In comparison the AMP04 has no such restriction Its inputs will function with a zero volt common mode voltage 100k Figure 1 Functional Block Diagram 094V 8 0 01V 5 2uA 47 47 21270 Figure 2 Gain 100 Instrumentation Amplifier Input Common Mode Voltage Below Ground Although not tested and guaranteed the AMP04 inputs are bi ased in a way that they can amplify signals linearly with common mode voltage as low as 0 25 volts below ground This holds true over the industrial temperature range from 40 C to 85 C Extended Positive Common Mode Range On the high side other instrumentation amplifier configura tions such as the three op amp instrumentation amplifier can have severe positive common mode range limitations Figure 3 shows an example of a gain of 1001 amplifier with an input common mode voltage of 10 volts For this circuit to function Vog must swing to 15 01 volt
5. to 10 Hz G 100 0 5 0 5 DYNAMIC RESPONSE Small Signal Bandwidth BW G 1 3 dB 700 700 kHz POWER SUPPLY Supply Current Isy 750 900 900 uA 40 C lt TA lt 85 C 1100 1100 uA Specifications subject to change without notice WAFER TEST LIMITS Vs 5 V Vem 2 5 V Ta 25 C unless otherwise noted Parameter Symbol Conditions Limit Units OFFSET VOLTAGE Input Offset Voltage Vios 300 max Output Offset Voltage Voos 3 mV max INPUT CURRENT Input Bias Current Ig 40 nA max Input Offset Current Ios 10 nA max INPUT Common Mode Rejection CMR 0V lt Vcm 3 0 V G 1 55 dB min G 10 75 dB min 100 80 1000 80 Common Mode Rejection CMR Vs 15 V 12 V lt Vem lt 12 V G 1 55 dB min G 10 75 dB min 100 80 dB min 4 REV A 04 Parameter Symbol Conditions Limit Units 1000 80 dB min Power Supply Rejection PSRR 4 0 lt lt 12V G 1 85 dB min G 10 95 dB min 100 95 dB min 1000 95 dB min GAIN G 100 K Rgam Gain Equation Accuracy G 1 to 100 0 75 max OUTPUT Output Voltage Swing High Vou 2 4 0 V min Output Voltage Swing Low Vor 2 2 5 mV max POWER SUPPLY Supply Current Igy Vs 15 900 max 700 uA max NOTE Electrical tests and wafer probe to the limits shown Due to variations in assembly methods and normal yield loss yield after packaging is not guaranteed for standard product dice Consult
6. 0 55 dB G 10 80 100 75 dB 100 90 105 80 dB G 1000 90 105 80 dB Common Mode Rejection CMR 11 V lt Vcem lt 11 V 40 C 85 G 1 55 50 dB G 10 75 70 dB 100 85 75 dB 1000 85 75 Power Supply Rejection PSRR t2 lt lt 318 40 lt 85 G 1 75 70 dB G 10 90 80 dB 100 95 85 dB G 1000 95 85 dB REV A AMP04 AMP04E AMP04F Parameter Symbol Conditions Min Typ Max Min Typ Max Units GAIN G 100 K Ream Gain Equation Accuracy G 1 to 100 0 2 0 5 0 75 G 1000 0 4 0 75 G 1 to 100 40 C lt 85 C 0 8 1 0 Gain Range G 1 1000 1 1000 V V Nonlinearity G LRL 5kQ 0 005 0 005 G 10 5 0 015 0 015 G 100 RL 5 0 025 0 025 Gain Temperature Coefficient AG AT 30 50 ppm C OUTPUT Output Voltage Swing High Vou 2 13 13 4 13 2 40 lt lt 85 12 5 12 5 Output Voltage Swing Low Vor 2 409 lt lt 85 C 14 5 14 55 V Output Current Limit Sink 30 30 mA Source 15 15 mA NOISE Noise Voltage Density RTI en f 1kHz G 1 270 270 nV VHz f 1 kHz 10 45 45 nV VHz f 100 Hz G 100 30 30 nV VHz f 100 Hz G 1000 25 25 nV VHz Noise Current Density RTI f 100 Hz G 100 4 4 pA VHz Input Noise Voltage ex 0 1 to 10 Hz G 1 5 5 p p 0 1 to 10 Hz G 10 1 1 p p 0 1
7. 00k LOAD RESISTANCE Q Figure 39 Maximum Output Voltage vs Load Resistance 04 OUTLINE DIMENSIONS Dimensions shown in inches and mm 8 Lead Plastic DIP N 8 Ji Ji Ji Ji 0 280 7 11 0 240 6 10 a 9 070 1 77 0 045 1 15 0 430 10 92 0 348 8 84 0 015 0 325 8 25 0 300 7 62 5 0 195 4 95 0 210 5 33 9381 i 0 115 02 93 Y 0 130 0 015 0 381 0 160 4 06 339 oo 8115292 m 0 008 0 204 gt je e sums OY 0 022 0 558 0100 0 1 0 014 0 356 2 54 BSC 8 Lead Cerdip Q 8 0 005 0 13 MIN 0 055 1 4 8 5 i 0 310 7 87 0 220 5 59 0 070 1 78 0 76 0 320 8 13 gt 0 405 10 29 MAX 0 290 7 37 0 200 0 060 1 52 5 08 0 015 0 38 0 150 0 200 5 08 3 81 0 015 0 38 0 125 3 18 MIN 0 008 0 20 RNV 0 023 0 58 0 100 2 54 0 15 0 014 0 36 BSC SEATING PLANE 8 Lead Narrow Body SO S0 8 0 1574 4 00 0 1497 3 80 9 1968 5 00 0 0196 0 50 0 1890 4 80 0 0688 1 75 0 0099 0 25 0 0532 1 35 gt a 0 0098 0 25 0 0040 0 10 a nd d SEATING 0098 0 25 0 0500 1 27 0 0138 0 35 EATI 0 0075 0 19 0 0160 9 41 PLANE 16 REV A C1720 24 10 92 PRINTED IN U S A
8. Conditions Min Max Min Max Units NOISE Noise Voltage Density RTI en f 1kHz G 1 270 270 nV VHz f 1kHz G 10 45 45 nV VHz f 100 Hz G 100 30 30 nV VHz f 100 Hz G 1000 25 25 nV VHz Noise Current Density RTI in f 100 Hz 100 4 4 pA VHz Input Noise Voltage ex p p 0 1 to 10 Hz 1 7 7 p p 0 1 to 10 Hz 10 1 5 1 5 p p 0 1 to 10 Hz G 100 0 7 0 7 DYNAMIC RESPONSE Small Signal Bandwidth BW G 1 3 dB 300 300 kHz POWER SUPPLY Supply Current Isy 550 700 700 uA 40 C T4 lt 85 C 850 850 uA Specifications subject to change without notice ELECTRICAL CHARACTERISTICS Vs 5 V Vem 0 V T 25 C unless otherwise noted AMP04E AMP04F Parameter Symbol Conditions Min Typ Max Min Typ Max Units OFFSET VOLTAGE Input Offset Voltage Vios 80 400 600 UV 409 85 C 600 900 pV Input Offset Voltage Drift TCVios 3 6 Output Offset Voltage Voos 1 3 6 mV 40 C TA 85 C 6 9 mV Output Offset Voltage Drift TCVoos 30 50 INPUT CURRENT Input Bias Current Ig 17 30 40 nA 409 lt 85 C 50 60 nA Input Bias Current Drift TCI 65 65 pA C Input Offset Current Tos 2 10 nA 40 C Ty 85 15 20 nA Input Offset Current Drift TClos 28 28 pA C INPUT Common Mode Input Resistance 4 4 GQ Differential Input Resistance 4 4 GQ Input Voltage Range Vin 12 12 12 12 V Common Mode Rejection CMR 12 lt lt 12 G 1 60 8
9. REV 04 Figure 7c 10 Hz Low Pass Filtered Output Power Supply Considerations In dual supply applications for example 15 V if the input is connected to a low resistance source less than 100 a large current may flow in the input leads if the positive supply is ap plied before the negative supply during power up similar condition may also result upon a loss of the negative supply If these conditions could be present in you system it is recom mended that a series resistor up to 1 kO be added to the input leads to limit the input current This condition can not occur in a single supply environment as losing the negative supply effectively removes any current return path Offset Nulling in Dual Supply Offset may be nulled by feeding a correcting voltage at the Vref pin Pin 5 However it is important that the pin be driven with a low impedance source Any measurable resistance will degrade the amplifier s common mode rejection performance as well as its gain accuracy An op amp may be used to buffer the offset null circuit as in Figure 8 0 INPUT 0 5V 50k OP 90 FOR LOW POWER 1000 P 113 FOR LOW DRIFT OP 113 FOR LO 5V ADJ RANGE gt 50k 5V Figure 8 Offset Adjust for Dual Supply Applications Offset Nulling in Single Supply Nulling the offset in single supply systems is difficult because the adjustment is made to try to attain zero volts At zero volts out the output is in saturation to th
10. adjust the LINEARITY ADJ potentiometer for a 2 000 volts at the output Repeat the full scale and the half scale adjustments as needed When properly calibrated the circuit achieves better than 0 5 C accuracy within a temperature measurement range from 0 to 400 C Precision 4 20 mA Loop Transmitter With Noninteractive Trim Figure 12 shows a full bridge strain gage transducer amplifier circuit that is powered off the 4 20 mA current loop The AMP04 amplifies the bridge signal differentially and is con verted to a current by the output amplifier The total quiescent current drawn by the circuit which includes the bridge the am plifiers and the resistor biasing is only a fraction of the 4 mA null current that flows through the current sense resistor lt The voltage across feeds back to the OP90 s in put whose common mode is fixed at the current summing reference voltage thus regulating the output current With no bridge signal the 4 mA null is simply set up by the 50 kQ NULL potentiometer plus the 976 kQ resistors that in ject an offset that forces an 80 mV drop across At a 50 mV full scale bridge voltage the AMP04 amplifies the voltage to current converter for a full scale of 20 mA at the out put Since the OP90 s input operates at a constant 0 volt common mode voltage the null and the span adjustments do 4mA NULL Ispan Figure 12 Precision 4 20 mA Loop Transmitte
11. ate Die Backside Is Connected to V soldered in circuit board for SOIC package Transistor Count 81 ORDERING GUIDE Temperature Vos 5 V Package Package Model Range Ta 25 Description Option AMPOAEP XIND 150 uV Plastic DIP N 8 AMPOAES XIND 150 uV SOIC SO 8 AMPOAFP XIND 300 uV Plastic DIP N 8 AMPOAFS XIND 300 uV SOIC SO 8 AMP04FS REEL XIND 150 uV SOIC SO 8 AMP04FS REEL7 XIND 150 uV SOIC SO 8 AMP04GBC 25 C 300 uV REV A 5 04 APPLICATIONS Common Mode Rejection The purpose of the instrumentation amplifier is to amplify the difference between the two input signals while ignoring offset and noise voltages common to both inputs One way of judging the device s ability to reject this offset is the common mode gain which is the ratio between a change in the common mode voltage and the resulting output voltage change Instrumenta tion amplifiers are often judged by the common mode rejection ratio which is equal to 20 x logjo of the ratio of the user selected differential signal gain to the common mode gain commonly called the CMRR The AMP04 offers excellent CMRR guaran teed to be greater than 90 dB at gains of 100 or greater Input offsets attain very low temperature drift by proprietary laser trimmed thin film resistors and high gain amplifiers Input Common Mode Range Includes Ground The AMP04 employs a patented topology Figure 1 that uniquely allows the common mode input voltage to truly
12. ce The AMP04 amplifies the bridge output to a 10 mV C output coefficient R9 R3 500 BALANCE 9V R8 3830 ADJ 0 gt 4 00 0 C 400 C 50k LINEARITY ADJ 91 2 FS NOTES ALL RESISTORS 0 5 25 PPM C ALL POTENTIOMETERS 25 PPM C Figure 11 Precision Single Supply RTD Thermometer Amplifier The RTD is linearized by feeding a portion of the signal back to the reference circuit increasing the reference voltage as the tem perature increases When calibrated properly the RTD s non linearity error will be canceled 35000 STRAIN GAGE BRIDGE UNLESS OTHERWISE SPECIFIED ALL RESISTORS 1 OR BETTER POTENTIOMETER TEMPCO lt 50 PPM C 10 calibrate either immerse the RTD into a zero degree ice bath or substitute an exact 100 Q resistor in place of the RTD Then adjust bridge BALANCE potentiometer R3 for a 0 volt output Note that a 0 volt output is also the negative output swing limit of the AMP04 powered with a single supply There fore be sure to adjust to first cause the output to swing positive and then back off until the output just stop swinging negatively Next set the LINEARITY ADJ potentiometer to the mid range Substitute an exact 247 04 resistor equivalent to 400 C temperature in place of the RTD Adjust the FULL SCALE potentiometer for a 4 000 volts output Finally substitute a 175 84 Q resistor equivalent to 200 C temperature and
13. e negative rail and the out put voltage is indistinguishable from the normal offset error Consequently the offset nulling circuit in Figure 9 must be used with caution REV A First the potentiometer should be adjusted to cause the output to swing in the positive direction then adjust it in the reverse direction causing the output to swing toward ground until the output just stops changing At that point the output is at the saturation limit m AMP 04 il 5 2 INPUT 5V 1000 50k Figure 9 Offset Adjust for Single Supply Applications Alternative Nulling Method An alternative null correction technique is to inject an off set current into the summing node of the output amplifier as in Figure 10 This method does not require an external op amp However the drawback is that the amplifier will move off its null as the input common mode voltage changes It is a less desirable nulling circuit than the previ ous method Figure 10 Current Injection Offsetting Is Not Recommended AMP04 APPLICATION CIRCUITS Low Power Precision Single Supply RTD Amplifier Figure 11 shows a linearized RTD amplifier that is powered off a single 5 volt supply However the circuit will work up to 36 volts without modification The RTD is excited by a 100 uA constant current that is regulated by amplifier A OP295 The 0 202 volts reference voltage used to generate the constant cur rent is divided down from the 2 500 volt referen
14. factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing ABSOLUTE MAXIMUM RATINGS DICE CHARACTERISTICS Supply Voltage sce sia e OR ae 18 V Common Mode Input Voltage 18 V Differential Input Voltage 36V Output Short Circuit Duration to GND Indefinite Storage Temperature Range ZiPack ge 2 ea eO RU ERES 65 C to 175 C PiS Package seiri inen RECS 65 C to 150 C Operating Temperature Range AMPO4A 559 to 125 C AMPOAE F nan iii 409 to 85 Junction Temperature Range N 2 Z lackage o ache in at Gee hdl EUN 65 C to 175 C P5 S Package ree ER mtm 659 to 150 6 Vour Lead Temperature Range Soldering 60 300 TENE i Package Type 0j Units 8 Pin Cerdip Z 148 16 C W 8 Pin Plastic DIP P 103 43 C W v 4 8 Pin SOIC S 158 43 C W 5 REF NOTES Absolute maximum ratings apply to both DICE and packaged parts unless otherwise noted For supply voltages less than 18 V the absolute maximum input voltage is equal to the supply voltage 4 Die Size 0 075 x 0 99 inch 7 425 sq mils is specified for the worst case conditions i e is specified for device in 2 socket for cerdip P DIP and LCC packages is specified for device Substr
15. imize coupling A major path for these error voltages will be found in the power supply lines Low impedance load re lated variations and noise levels that are completely acceptable in the high thresholds of the digital domain make the digital supply unusable in nearly all high performance analog applica tions The user is encouraged to maintain separate power and ground between the analog and digital systems wherever pos sible joining only at the supply itself if necessary and to ob serve careful grounding layout and bypass capacitor scheduling in sensitive areas Input Shield Drivers High impedance sources and long cable runs from remote trans ducers in noisy industrial environments commonly experience significant amounts of noise coupled to the inputs Both stray capacitance errors and noise coupling from external sources can be minimized by running the input signal through shielded cable The cable shield is often grounded at the analog input common however improved dynamic noise rejection and a re duction in effective cable capacitance is achieved by driving the shield with a buffer amplifier at a potential equal to the voltage seen at the input Driven shields are easily realized with the AMP04 Examination of the simplified schematic shows that the potentials at the gain set resistor pins of the AMP04 follow the inputs precisely As shown in Figure 5 shield drivers are easily realized by buffering the potential at these pins by a d
16. ly or to saturate unless given a bleed path to the analog common Again the use of equal resistance values will create a common input error voltage that is rejected by the amplifier Reference Input The Vggg input is used to set the system ground For dual sup ply operation it can be connected to ground to give zero volts out with zero volts differential input In single supply systems it could be connected either to the negative supply or to a pseudo ground between the supplies In any case the REF input must be driven with low impedance Noise Filtering Unlike most previous instrumentation amplifiers the output stage s inverting input Pin 8 is accessible By placing a capaci tor across the AMP04 s feedback path Figure 6 Pins 6 and 8 INO 2 INPUT BUFFERS IN 3 1 fet 100k Figure 6 Noise Band Limiting a single pole low pass filter is produced The cutoff frequency f follows the relationship 1 2n 100 C fire Filtering be applied to reduce wide band noise Figure 7a shows a 10 Hz low pass filter gain of 1000 for the AMP04 Fig ures 7b and 7c illustrate the effect of filtering on noise The photo in Figure 7b shows the output noise before filtering By adding a 0 15 uF capacitor the noise is reduced by about a factor of 4 as shown in Figure 7c 15V 15V Figure 7a 10 Hz Low Pass Filter Boa bn A ARAM Figure 7b Unfiltered AMP04 Output 8
17. mon Mode Rejection vs Frequency Figure 31 Common Mode Rejection vs Voltage Gain 140 140 25 Vs 15 120 120 5 g AVg 51 1 1 gt G 100 81 81 80 80 G 10 gt amp 60 a 60 a a 2 2 o o amp 40 40 XN 9 G 1 20 20 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY Hz FREQUENCY Hz Figure 32 Positive Power Supply Rejection vs Frequency Figure 33 Negative Power Supply Rejection vs Frequency 14 REV VOLTAGE NOISE nV VHz 1 10 100 1k VOLTAGE GAIN G Figure 34 Voltage Noise Density vs Gain VOLTAGE NOISE DENSITY nV Hz D Q Dx Figure 36 Voltage Noise Density vs Frequency 1200 1000 800 600 400 SUPPLY CURRENT uA 200 1 10 100 1k 10k FREQUENCY Hz 50 25 0 25 50 75 100 TEMPERATURE C Figure 38 Supply Current vs Temperature REV A VOLTAGE NOISE nV YHz OUTPUT VOLTAGE V E e 1 10 100 1 VOLTAGE GAIN G Figure 35 Voltage Noise Density vs Gain f 1 kHz Vg 15V GAIN 1000 0 1 TO 10 Hz BANDPASS Figure 37 Input Noise Voltage 10 100 1k 10k 1
18. n Amplifier Combining with the single supply ADG221 quad analog switch the AMP04 makes a useful programmable gain amplifier that can handle input and output signals at zero volts Figure 15 shows the implementation A logic low input to any of the gain control ports will cause the gain to change by shorting a gain set resistor across AMP04 s Pins 1 and 8 Trimming is required at higher gains to improve accuracy because the switch ON resistance becomes a more significant part of the gain set resistance The gain of 500 setting has two switches connected in parallel to reduce the switch resistance 5V TO 30V GAIN OF 500 GAIN OF 100 GAIN OF 10 r GAIN CONTROL 4 Figure 15 Single Supply Programmable Gain Instrumen tation Amplifier The switch ON resistance is lower if the supply voltage is 12 volts or higher Additionally the overall amplifier s tempera ture coefficient also improves with higher supply voltage 11 120 120 BASED ON 300 UNITS BASED ON 300 UNITS 100 3 RUNS 100 3 RUNS gt NUMBER OF UNITS NUMBER OF UNITS gt 20 20 0 200 160 120 80 40 0 40 80 120 160 200 05 0 4 03 0 2 01 0 01 02 03 04 05 INPUT OFFSET VOLTAGE uV INPUT OFFSET VOLTAGE mV Figure 16 Input Offset Vios Distribution 5 V Figure 17 Input Offset Distribution 15 V 120 300 UNITS
19. put is a combination of the input and output drift specifica tions Again the gain influences the input error but not the out put and the equation is TCVos RTO TCVijos X G TCVoos In some applications the user may wish to define the error con tribution as referred to the input and treat it as an input error The relationship is TCV os RTI TCVoos 6 The bias and offset currents of the input transistors also have an impact on the overall accuracy of the input signal The input leakage or bias currents of both inputs will generate an addi tional offset voltage when flowing through the signal source re sistance Changes in this error component due to variations with signal voltage and temperature can be minimized if both input source resistances are equal reducing the error to a common mode voltage which can be rejected The difference in bias cur rent between the inputs the offset current generates a differen tial error voltage across the source resistance that should be taken into account in the user s design In applications utilizing floating sources such as thermocouples transformers and some photo detectors the user must take care to provide some current path between the high impedance in puts and analog ground The input bias currents of the AMP04 although extremely low will charge the stray capacitance found in nearby circuit traces cables etc and cause the input to drift erratical
20. r Features Noninteractive Trims REV AMP04 not interact with one another Calibration is simple and easy with the NULL adjusted first followed by SPAN adjust The entire circuit can be remotely placed and powered from the 4 20 mA 2 wire loop 4 20 mA Loop Receiver At the receiving end of a 4 20 mA loop the AMP04 makes a convenient differential receiver to convert the current back to a usable voltage Figure 13 The 4 20 mA signal current passes through a 100 Q sense resistor The voltage drop is differentially amplified by the AMP04 The 4 mA offset is removed by the offset correction circuit SUPPLY Figure 13 4 to 20 mA Line Receiver Low Power Pulsed Load Cell Amplifier Figure 14 shows a 350 Q load cell that is pulsed with a low duty cycle to conserve power The OP295 s rail to rail output capa bility allows a maximum voltage of 10 volts to be applied to the bridge The bridge voltage is selectively pulsed on when a mea surement is made negative going pulse lasting 200 ms should be applied to the MEASURE input The long pulse width is necessary to allow ample settling time for the long time constant of the low pass filter around the AMP04 A much faster settling time can be achieved by omitting the filter capacitor 12V LA asus OUT REF 01 10V MEASURE O 2N3904 Figure 14 Pulsed Load Cell Bridge Amplifier REV A Single Supply Programmable Gain Instrumentatio
21. real world signals such as temperature or pressure may generate voltages that are represented by changes in polarity In a single supply system the signal input cannot be allowed to go below ground and therefore the signal must be offset to accom modate this change in polarity On the AMP04 a reference in put pin is provided to allow offsetting of the input range The gain equation is more accurately represented by including this reference input Vour Vins Vin Gain Vpgr Grounding The most common problems encountered in high performance analog instrumentation and data acquisition system designs are found in the management of offset errors and ground noise Primarily the designer must consider temperature differentials and thermocouple effects due to dissimilar metals IR voltage drops and the effects of stray capacitance The problem is greatly compounded when high speed digital circuitry such as that accompanying data conversion components is brought into the proximity of the analog section Considerable noise and error contributions such as fast moving logic signals that easily propagate into sensitive analog lines and the unavoidable noise common to digital supply lines must all be dealt with if the accu racy of the carefully designed analog section is to be preserved Besides the temperature drift errors encountered in the ampli fier thermal errors due to the supporting discrete components should be evaluated The
22. s 30 50 INPUT CURRENT Input Bias Current Ig 22 30 40 nA 409 85 50 60 nA Input Bias Current Drift TCI 65 65 pA C Input Offset Current los 1 10 409 85 10 15 nA Input Offset Current Drift TClos 8 8 pA C INPUT Common Mode Input Resistance 4 4 GQ Differential Input Resistance 4 4 GQ Input Voltage Range Vin 0 3 0 0 3 0 V Common Mode Rejection CMR 0V lt Vem lt 3 0 V G 1 60 80 55 dB G 10 80 100 75 dB G 100 90 105 80 dB G 1000 90 105 80 dB Common Mode Rejection CMR 0 lt lt 2 5 409 85 G 1 55 50 dB G 10 75 70 dB 100 85 75 dB G 1000 85 75 dB Power Supply Rejection PSRR 40V lt Vs lt 12V 409 85 C G 1 95 85 dB G 10 105 95 dB 100 105 95 dB 1000 105 95 dB GAIN 100 K Rgeam Gain Equation Accuracy G 1 to 100 0 2 0 5 0 75 G 1 to 100 40 C TA lt 85 C 0 8 1 0 G 1000 0 4 0 75 Gain Range G 1 1000 1 1000 V V Nonlinearity G 1 R 5 0 005 G 10 RL 5 0 015 G 100 5 kQ 0 025 Gain Temperature Coefficient AG AT 30 50 ppm C OUTPUT Output Voltage Swing High Vou 2 kQ 4 0 4 2 4 0 V Ry 2 40 C lt 85 3 8 3 8 V Output Voltage Swing Low Vor 2 409 lt 85 C 2 0 2 5 mV Output Current Limit Sink 30 30 mA Source 15 15 mA REV AMP04E AMP04F Parameter Symbol
23. s in order for the output to go to 10 01 volts Clearly no op amp can handle this swing range given a 15 V supply as the output will saturate long before it reaches the supply rails Again the AMP04 s topology does not have this limitation Figure 4 illustrates the AMP04 operating at the same common mode conditions as in Figure 3 None of the internal nodes has a signal high enough to cause amplifier satu ration As a result the AMP04 can accommodate much wider common mode range than most instrumentation amplifiers 10 00V 10 01V O Figure 3 Gain 1001 Three Op Amp Instrumentation Amplifier 410 00V Vour 410 01V 0 Figure 4 Gain 1000 AMP04 6 REV 04 Programming the Gain The gain of the AMP04 is programmed by the user by selecting a single external resistor Rgam Gain 100 RQ RGaIn The output voltage is then defined as the differential input volt age times the gain Vour Vin X Gain In single supply systems offsetting the ground is often desired for several reasons Ground may be offset from zero to provide a quieter signal reference point or to offset zero to allow a unipolar signal range to represent both positive and negative values In noisy environments such as those having digital switching switching power supplies or externally generated noise ground may not be the ideal place to reference a signal in a high accu racy system Often
24. to use the AMP04 draws only 700 uA of sup ply current For high resolution data acquisition systems laser trimming of low drift thin film resistors limits the input offset voltage to under 150 and allows the AMP04 to offer gain nonlinearity of 0 005 and a gain tempco of 30 ppm C proprietary input structure limits input offset currents to less than 5 nA with drift of only 8 pA C allowing direct connection of the AMP04 to high impedance transducers and other signal Sources Protected by U S Patent No 5 075 633 REV A Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A otherwise under any patent or patent rights of Analog Devices Tel 617 329 4700 Fax 617 326 8703 AMP04 SPECIFICATIONS ELECTRICAL CHARACTERISTICS 5v Ven 2 5 V T 25 C unless otherwise noted AMP04E AMP04F Parameter Symbol Conditions Min Typ Max Min Typ Max Units OFFSET VOLTAGE Input Offset Voltage Vios 30 150 300 uv 409 85 C 300 600 UV Input Offset Voltage Drift TCVios 3 6 Output Offset Voltage Voos 0 5 1 5 3 mV 40 C 85 C 3 6 mV Output Offset Voltage Drift TCVoo
25. ual single supply op amp such as the OP213 Alternatively applications with single ended sources or that use twisted pair cable could drive a single shield To minimize error contributions due to this additional circuitry all components and wiring should re main in proximity to the AMP04 and careful grounding and by passing techniques should be observed 1 2 OP 213 at Figure 5 Cable Shield Drivers 04 Compensating for Input and Output Errors To achieve optimal performance the user needs to take into account a number of error sources found in instrumentation amplifiers These consist primarily of input and output offset voltages and leakage currents The input and output offset voltages are independent from one another and must be considered separately The input offset component will of course be directly multiplied by the gain of the amplifier in contrast to the output offset voltage that is in dependent of gain Therefore the output error is the dominant factor at low gains and the input error grows to become the greater problem as gain is increased The overall equation for offset voltage error referred to the output is Vos RTO Vios x G Voos where is the input offset voltage and Voos the output offset voltage and G is the programmed amplifier gain The change in these error voltages with temperature must also be taken into account The specification TCVogs referred to the out
26. use of high quality low TC compo nents where appropriate is encouraged What is more important large thermal gradients can create not only unexpected changes in component values but also generate significant thermoelec tric voltages due to the interface between dissimilar metals such as lead solder copper wire gold socket contacts Kovar lead frames etc Thermocouple voltages developed at these junc tions commonly exceed the TCVos contribution of the AMP04 Component layout that takes into account the power dissipation at critical locations in the circuit and minimizes gra dient effects and differential common mode voltages by taking advantage of input symmetry will minimize many of these errors High accuracy circuitry can experience considerable error con tributions due to the coupling of stray voltages into sensitive areas including high impedance amplifier inputs which benefit from such techniques as ground planes guard rings and shields Careful circuit layout including good grounding and REV A signal routing practice to minimize stray coupling and ground loops is recommended Leakage currents can be minimized by using high quality socket and circuit board materials and by carefully cleaning and coating complete board assemblies As mentioned above the high speed transition noise found in logic circuitry is the sworn enemy of the analog circuit designer Great care must be taken to maintain separation between them to min
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ANALOG DEVICES AMP04* Precision Single Supply Instrumentation Amplifier handbook