MICROCHIP 28C64A handbook
Contents
1. MICROCHIP 28C64A 64K 8K x 8 CMOS EEPROM FEATURES e Fast Read Access Time 150 ns e CMOS Technology for Low Power Dissipation 30 mA Active 100 uA Standby e Fast Byte Write Time 200 us or 1 ms e Data Retention gt 200 years e High Endurance Minimum 100 000 Erase Write Cycles Automatic Write Operation Internal Control Timer Auto Clear Before Write Operation On Chip Address and Data Latches Data Polling e Ready Busy e Chip Clear Operation Enhanced Data Protection Vcc Detector Pulse Filter Write Inhibit e Electronic Signature for Device Identification e 5 Volt Only Operation e Organized 8Kx8 JEDEC Standard Pinout 28 pin Dual In Line Package 32 pin PLCC Package 28 pin Thin Small Outline Package TSOP 8x20mm 28 pin Very Small Outline Package VSOP 8x13 4mm e Available for Extended Temperature Ranges Commercial 0 C to 70 C DESCRIPTION The Microchip Technology Inc 28C64A is a CMOS 64K non volatile electrically Erasable PROM The 28C64A is accessed like a static RAM for the read or write cycles without the need of external components During a byte write the address and data are latched internally freeing the micropro cessor address and data bus for other operations Following the initiation of write cycle the device will go to a busy state and automatically clear and write the latched data using an internal control timer To determine when the write cycle is com2. Third holding WE or CE high or OE low inhibits a write cycle during power on and power off Vcc 2 4 Write Mode The 28C64A has a write cycle similar to that of a Static RAM The write cycle is completely self timed and ini tiated by a low going pulse on the WE pin On the fall ing edge of WE the address information is latched On rising edge the data and the control pins CE and OE are latched The Ready Busy pin goes to a logic low level indicating that the 28C64 lt A is in a write cycle which signals the microprocessor host that the system bus is free for other activity When Ready Busy goes back to a high the 28C64A has completed writing and is ready to accept another cycle 2 5 Data Polling The 28C64A features Data polling to signal the comple tion of a byte write cycle During a write cycle an attempted read of the last byte written results in the data complement of 1 07 I O0 to 1 06 are indetermin able After completion of the write cycle true data is available Data polling allows a simple read compare operation to determine the status of the chip eliminat ing the need for external hardware 2 6 Electronic Signature for Device Identification An extra row of 32 bytes of EEPROM memory is avail able to the user for device identification By raising A9 to 12V 0 5V and using address locations 1FEO to 1FFF the additional bytes can be written to or read from in the same manner as the regular memory array
3. A write cycle can be initiated be CE or WE going low whichever occurs last The data is latched on the pos itive edge WE whichever occurs first 2 Data must be valid within 1000ns max after a write cycle is initiated and must be stable at least until tDH after the positive edge of WE or CE whichever occurs first FIGURE 1 2 PROGRAMMING WAVEFORMS Address Data In DS11109H page 4 1996 Microchip Technology Inc 28C64A FIGURE 1 3 DATA POLLING WAVEFORMS F Last Written Address XK Address valia K Across veld OX tacc je VLMa Data In Valid 1 07 Out True Data Out FIGURE 1 4 CHIP CLEAR WAVEFORMS tw 10ms ts tH 1us VH 12 0V 0 5V TABLE 1 5 SUPPLEMENTARY CONTROL Mode CE OE WE A9 Vcc Ol Chip Clear VIL VIH VIL X Vcc Extra Row Read VIL VIL VIH A9 VH Vcc Data Out Extra Row Write VIH 2 A9 VH Vcc Data In Note VH 12 0V 0 5V Pulsed per programming waveforms 1996 Microchip Technology Inc DS11109H page 5 28C64A 2 0 DEVICE OPERATION The Microchip Technology Inc 28C64A has four basic modes of operation read standby write inhibit and byte write as outlined in the following table ee cE OE WE vo ea ad L H DOUT H Standby X X HighZ H Write Inhibit X X High Z H Wri
4. 2 7 Chip Clear All data may be cleared to 1 s in a chip clear cycle by raising OE to 12 volts and bringing the WE and CE low This procedure clears all data except for the extra row DS11109H page 6 1996 Microchip Technology Inc 28C64A 28C64A Product Identification System To order or to obtain information e g on pricing or delivery please use the listed part numbers and refer to the factory or the listed sales offices 28C64A F T 15 P Package Temperature Range peeps sales Device Access Time L Plastic Leaded Chip Carrier PLCC P Plastic DIP 600 mil SO Plastic Small Outline IC 600 mil TS Thin Small Outline Package TSOP 8x20mm VS Very Small Outline Package VSOP 8x13 4mm Blank 0 C to 70 C I 40 C to 85 C 15 150ns 20 200ns 25 250ns Blank Tube Tape and Reel L and SO Blank twc 1ms F twc 200 us 28C64A 8K x8 CMOS EEPROM 1996 Microchip Technology Inc DS11109H page 7 WORLDWIDE SALES amp SERVICE AMERICAS Corporate Office Microchip Technology Inc 2355 West Chandler Blvd Chandler AZ 85224 6199 Tel 602 786 7200 Fax 602 786 7277 Technical Support 602 786 7627 Web http www microchip com Atlanta Microchip Technology Inc 500 Sugar Mill Road Suite 200B Atlanta GA 30350 Tel 770 640 0034 Fax 770 640 0307 Boston Microchip Technology Inc 5 Mount Royal Avenue Marlbo
5. COUT 12 pF VIN OV Tamb 25 C f 1 MHz Note 2 Power Supply Current Active TTL input ICC 30 mA f 5 MHz Note 1 Vcc 5 5V Power Supply Current Standby TTL input ICC S TTL 2 mA CE VIH 0 C to 70 C TTL input ICC S TTL 3 mA CE VIH 40 C to 85 C CMOS input Icc s cMos 100 uA CE Vcc 0 3 to Vcc 1 Note 1 AC power supply current above 5MHz 2mA MHz 2 Not 100 tested DS11109H page 2 1996 Microchip Technology Inc 28C64A TABLE 1 3 READ OPERATION AC CHARACTERISTICS AC Testing Waveform VIH 2 4V VIL 0 45V VoH 2 0V VOL 0 8V Output Load 1 TTL Load 100 pF Input Rise and Fall Times 20 ns Ambient Temperature Commercial C Tamb O C to 70 C Industrial I Tamb 40 C to 85 C 28C64A 15 28C64A 20 28C64A 25 Parameter Symbol Units Conditions Min Max Min Max Min Max Address to Output Delay tACC 150 200 250 ns OE CE VIL CE to Output Delay tCE 150 200 250 ns OE VIL OE to Output Delay tOE 70 80 100 ns CE VIL CE or OE High to Output Float tOFF 0 50 0 55 0 70 ns Note 1 Output Hold from Address CE tOH 0 0 0 ns Note 1 or OE whichever occurs first Endurance 1M 1M 1M cycles 25 C Vcc 5 0V Block Mode Note 2 Note 1 Not 100 tested 2 This parameter is not tested but guaranteed by characteriz
6. V to 13 5V Output Voltage w rt VSS ee 0 6V to Vcc 0 6V Storage temperature eeeeeeeees 65 C to 125 C Ambient temp with power applied 50 C to 95 C Notice Stresses above those listed under Maximum Ratings may cause permanent damage to the device This is a stress rat ing only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied Exposure to maximum rating con ditions for extended periods may affect device reliability TABLE 1 1 PIN FUNCTION TABLE Function 1 00 1 07 RDY Busy Address Inputs Chip Enable Output Enable Write Enable Data Inputs Outputs Ready Busy 5V Power Supply Ground No Connect No Internal Connection Not Used No External Connection is Allowed TABLE 1 2 READ WRITE OPERATION DC CHARACTERISTIC Vcc 5V 10 Commercial C Tamb 0 C to 70 C Industrial I Tamb 40 C to 85 C Parameter Status Symbol Min Max Units Conditions Input Voltages Logic 1 VIH 2 0 Vec 1 V Logic 0 VIL 0 1 0 8 V Input Leakage ILI 10 10 uA VIN 0 1V to Vcc 1 Input Capacitance CIN 10 pF VIN OV Tamb 25 C f 1 MHz Note 2 Output Voltages Logic 1 VOH 2 4 V IOH 400 uA Logic 0 VOL 0 45 V IOL 2 1 mA Output Leakage ILO 10 10 uA VouT 0 1V to Vcc 0 1V Output Capacitance
7. ation For endurance estimates in a specific appli cation please consult the Total Endurance Model which can be obtained on our BBS or website FIGURE 1 1 READ WAVEFORMS VIH gt lt Address Valid VIL VIH VIL VIH VIL tOE 2 toH VOH K Valid Output VoL z VIH VIL Notes 1 toFF is specified for OE or CE whichever occurs first 25 2 OE may be delayed up to tce toE after the falling edge of CE without impact on tCE 3 This parameter is sampled and is not 100 tested 1996 Microchip Technology Inc DS11109H page 3 28C64A TABLE 1 4 BYTE WRITE AC CHARACTERISTICS AC Testing Waveform VIH 2 4V VIL 0 45V VoH 2 0V VOL 0 8V Output Load 1 TTL Load 100 pF Input Rise Fall Times 20 ns Ambient Temperature Commercial C Tamb O Cto 70 C Industrial I Tamb 40 C to 85 C Parameter Symbol Min Max Units Remarks Address Set Up Time taS 10 ns Address Hold Time tAH 50 ns Data Set Up Time tDS 50 ns Data Hold Time tDH 10 ns Write Pulse Width tWPL 100 ns Note 1 Write Pulse High Time tWPH 50 ns OE Hold Time tOEH 10 ns OE Set Up Time tOES 10 ns Data Valid Time tDV 1000 ns Note 2 Time to Device Busy tDB 2 50 ns Write Cycle Time 28C64A twc 1 ms 0 5 ms typical Write Cycle Time 28C64AF twc 200 us 100 us typical Note 1
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9. lications and the like is intended through suggestion only and may be superseded by updates No repre sentation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information or infringement of patents or other intellectual property rights arising from such use or otherwise Use of Microchip s products as critical components in life support systems is not autho rized except with express written approval by Microchip No licenses are conveyed implicitly or otherwise under any intellectual property rights The Microchip logo and name are registered trademarks of Microchip Technology Inc All rights reserved All other trademarks mentioned herein are the property of their respective companies DS11109H page 8 1996 Microchip Technology Inc WWW ALLDATASHEET COM Copyright Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 100 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
10. plete the user has a choice of monitoring the Ready Busy output or using Data polling The Ready Busy pin is an open drain output which allows easy configuration in wired or systems Alternatively Data polling allows the user to read the location last written to when the write operation is com plete CMOS design and processing enables this part to be used in systems where reduced power consumption and reli ability are required Acomplete family of packages is offered to provide the utmost flexibility in applications PACKAGE TYPES RDY BSY ONonARwWD 910S did indicator on PLCC on top of package 28 OT 26 25 24 23 22 RDY BSY 21 A12 20 A7 19 A6 S18 A5 ri 17 A4 13 16 A3 14 15 OE A11 A9 A8 NC WE Vcc RDY BSY A12 A7 A6 A5 A4 A3 NOOO OOO OOOO DOUUUOOUOUUoOoOo Data Protection Circuitry Chip Enable Output Enable Control Logic Auto Erase Write Program Voltage Generation gt 16K bit Cell Matrix gt 1996 Microchip Technology Inc DS11109H page 1 28C64A 1 00 ELECTRICAL CHARACTERISTICS 1 1 MAXIMUM RATINGS Vcc and input voltages w r t VSS 0 6V to 6 25V Voltage on OE w rt VSS n se 0 6V to 13 5V Voltage on AQ w r t VSS eee 0 6
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12. te Inhibit L X High Z H Write Inhibit X H High Z H Byte Write H L DIN L Automatic Before Each Write Byte Clear Note 1 Open drain output 2 X Any TTL level 2 1 Read Mode The 28C64A has two control functions both of which must be logically satisfied in order to obtain data at the outputs Chip enable CE is the power control and should be used for device selection Output Enable OE is the output control and is used to gate data to the output pins independent of device selection Assuming that addresses are stable address access time tACC is equal to the delay from CE to output tCE Data is available at the output toe after the fall ing edge of OE assuming that CE has been low and addresses have been stable for at least tACC tOE 2 2 Standby Mode The 28C64A is placed in the standby mode by applying a high signal to the CE input When in the standby mode the outputs are in a high impedance state inde pendent of the OE input 2 3 Data Protection In order to ensure data integrity especially during criti cal power up and power down transitions the following enhanced data protection circuits are incorporated First an internal Vcc detect 3 3 volts typical will inhibit the initiation of non volatile programming operation when Vcc is less than the Vcc detect circuit trip Second there is a WE filtering circuit that prevents WE pulses of less than 10 ns duration from initiating a write cycle
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MICROCHIP 28C64A handbook