TOSHIBA TB62200AF handbook
Contents
1. 9 1999 03 09 46 56 TOSHIBA TB62200AF OSC circuit frequency chopping frequency OSC circuit equivalent VDD VDD pin Rosc Tosc sig nal Mixed Decay signal Tosc signal 1000 pF Cosc lt 72 1 2 The external capacitor for setting the chopping frequency is connected to the CR pin It 15 charged by current flowing through the external resistor Rosc 10 11 When the voltage becomes 1 VDD R4 R2 Rg R4 R2 V Comp2 output is turned on triggering via the FF circuit This attenuates the charged current from capacitor Cosc t1 t2 When the potential of the CR pin drops Vpp x 2 Rg R2 V Compl is turned on turning off the Tr1 via the FF circuit is charged Repeating this generates saw tooth waveform The relationship between capacitance and resistance Rosc is expressed as follows 5 t1 T 2 0 7 x Cosc F X Rose 0 616 x Cosc F 1999 03 09 47 56 TOSHIBA CR 5 frequency setting 62200 e When the external capacitor connected to the CR is fixed to 1000pF the chopping frequency obtained varying the Rosc value is as shown below CR BLOCK RESISTANCE Rosc fchop e Calculation condition UM 24V ay 00 iodo fchop 50 CR EXTERNAL RESISTANCE Ros OSC frequency set2. ln STEP 17 micro step from 0 to 907 drive is possible by combining current data AB CD and phase data For input current data at that time see section on Current X in the list of the Functions We recommend Slow Decay mode when the sine wave is rising current increasing from 0 Mixed Decay mode 40 when falling current decreasing In Mixed Decay mode select either 40 or 74 depending on the load 1999 03 09 53 56 TOSHIBA TB62200AF d 2111 Por LIE LM LLA Su SENA 72 2 22545268 Lena WZ AA gt a x x 0 8 100 For data to be input see the function of Current in the list of Functions 10 page 1999 03 09 54 56 TOSHIBA TB62200AF RECOMMENDED APPLICATION CIRCUIT The values for the devices are all recommended values For values under each input condition see the above mentioned recommended operating conditions example fchop 100 kHz CR lout 0 6 A LF lout 0 9 A 3 100 osc AB 12k 8 CR AB SGND 1000pF lt o 52 07 31 5 30 29 DATA AB STEPPING MOTER 1 Q 15 22 33 05 CLK CD 26 DATA CD 08 RESET 24 STROBE CD STEPPING MOTER 2 Bg gt X a A E 143 SGND SGND SGND Wn LL LL gt 2 gt 3 SGND om I
3. o o OA 34 06 34 OA 34 06 28 05 IN zarea DERI MN ELECTRICAL CHARACTERISTICS 4 otherwise specified Ta 25 C Vpp 5V 24V CHARACTERISTIC SYMBOL TEST CONDITION pe m e UNIT CUIT 06 16 16 15 16 16 16 15 16 ae 15 16 14 16 14716 13 16 13 16 12 16 e 11 16 10 16 senem 8 10 16 9716 y S oy Reference Voltage AVRS 0 8 16 7 16 8 16 7 16 0 7 16 6 16 1116 3160 21141040 ut 1 16 0 16 1999 03 09 14 56 TOSHIBA TB62200AF AC CHARACTERISTICS 25 C 24V VDD 5V output load condition of 6 8 mH 5 7 TEST CHARACTERISTIC SYMBOL TEST CONDITION emm po UNIT CUIT 25 o tw Cl CLK ST M lock Pul Width i cocs Puise 15 See Figure 1 3 twn CLK CLK 20 2 40 M STROBE Width use soa H H 15 See Figure 1 20 ns STROBE LL _ L 20 SIN 20 _ Data Setup Time as See Figure 1 ns tsuST CLK 2 SIN y Data Hold Time 15 See Figure 1 ns thcLK ST 20 OSC Charge Delay Cosc 1000 pF Output Switching Delay fchop 100 kHz lout ns See Figure 2 300 Time Output Load 6 8mH 5 70 701 Output Transistor te see Figure 1 _ 50 Switching Character
4. TB62200 TOSHIBA 62200 TOSHIBA Bi CMOS PROCESSOR SILICON MONOLITHIC TB62200AF DUAL STEPPING MOTOR DRIVER IC USING PWM CHOPPER TYPE The 62200 is a dual stepping motor driver driven by chopper micro step pseudo sine wave To drive two phase stepping motors Two pairs of 16 bit latch and shift registers built in the The IC is optimal for driving stepping motors at high efficiency and with low torque ripple IC supports Mixed Decay mode switching the attenuation ratio at chopping The switching time for the attenuation ratio can be switched in two stages according to the load FEATURES HSOP36 P 450 0 65 Weight 0 79 Typ Chopping bipolar stepping motor driver 9 9 Two stepping motors driven micro step pseudo sine wave controlled a single driver Monolithic Bi CMOS IC Low ON resistance of RDS 0 5 OTj 25 1 0A Two pairs of built in 16 bit shift and latch registers Two pairs of built in 4 bit D A converters for micro steps Built in TSD Vpp power monitor reset circuit for protection Built in charge pump circuit two external capacitors 36 pin power flat package HSOP36 P 450 0 65 Output voltage 30 V max Output current 1 3A phase max Built in Mixed Decay mode Fast Slow at 40 74 switchable and Slow Decay mode Chopping frequency can be set by external resistors and capacitors High s
5. o 1 1 11 111111 0 51 1 1 1 o o 1 1 11111111 2 1 1 1 01010101 1 1 0 11111111 5311 1 1 1 1 o 11111111 541 1 1 1 1 1 1 0 0 551 1 1 1 1 1 1 0 0 56 1 1 1 1 01011101 1 1 01011111 0 57 1 1 1 1 11011101 1 1 0 111110111 0 58 1 1 1 10111110 1 1 o 01110111 o 9 1 11 1 1 1 o 111010111 _ oo 1 1 1 1 01010111 1 1 0 10010111 0 61 1 1 1 1 11010111 1 1 0 111111 01 0 63 1 1 1 1 11111011 11011101 0 64 1 1 1 1 00 71 1171 1 01011101 o ues 66 1 1 1 10111111 1 1 o 01110101 o 67 1 1 1 11111111 1 1 0 0 68 1 1 1 1 111111111 1 1 o 0 01010 o Data are input on the rising edge of CLK Every input of a data string 16 bit requires input of the STROBE signal For the input conditions see page 9 Functions We recommend Slow Decay mode in the ascending direction of the sine wave Mixed Decay mode 40 in the descending direction Set torque to 100 1999 03 09 52 56 TOSHIBA TB62200AF Output current waveform of pseudo sine wave 4 bit micro steps A 83 ALA 41 0 1 111
6. 1 1 I 1 I 1 I 1 i El PEO 4 5 1 cycle TO Tosc 1 174 Tost 0 Slow Decay mode waveform 1 t Fast E t Slow t Charge 1 o 4 por Mixed Decay mode waveform i Set current value pp ff 1 hea t Slow t Charge t Fast i 4 1 L 1 1 1 1 1 1 4 L TO T74 7100 Slow Decay Mode Mode changes from Charge gt Slow gt Fast In Charge mode output starts In Slow mode output gradually attenuates In Fast mode current is attenuated dropping output instantly The output fall time 15 determined by the OSC signal fall time In Slow Decay mode the advantage is that current ripple is small but attenuation capability is low The mode is used to in
7. MAXIMUM RATINGS 25 CHARACTERISTIC SYMBOL RATING UNIT Charge Pump Pin Maximum Note 1 Perform thermal calculations for instantaneous current value and the maximum current value under normal conditions Use the IC at 1 0A or less per phase Note 2 Measured for the IC only Note 3 Measured when mounted on the board 90 230 1 6mm 25 C RECOMMENDED OPERATING CONDITIONS Ta 0 to 85 C CHARACTERISTIC SYMBOL TEST CONDITION MIN UNIT Logic Supply Vokage vo AV Output Current lex 25 C per phase 10 Logic Input Voltage VN Vpp Clock Frequeny o 25 VDD 5 0V 24V 1999 03 09 11 56 TOSHIBA TB62200AF ELECTRICAL CHARACTERISTICS 1 unless otherwise specified Ta 25 C Vpp 5V 24V TEST CHARACTERISTIC SYMBOL CIR TEST CONDITION UNIT CUIT VDD Vin u Input Voltage 1 Input curret Input curret Bn Er VDD 5 STROBE RESET DATA L RESET L Power Dissipation Logic output all off Output OPEN 6 25 MHz LOGIC ACTIVE Vpp 5V Charge Pump charged Output OPEN STROBE CLK DATA 1 RESET 1 Logic output all off Charge Pump no operation Output OPEN 6 25 MHz Power Dissipation LOGIC ACTIVE VDD 5V pin VM 24 V Output off Charge Pump charge
8. 15 mA Typ because of two units 30 2 15 mA The logic block is connected to Vpp 5 V IM total of current consumed by the circuits connected to and current consumed by output switching is connected to 24 V Power dissipation is calculated as follows Logic amp 5 V x 0 004 24 V x 0 015 A 3 0 38 W Thus power dissipation for 1 unit P is determined as follows by 2 and 3 above P P out P Logic IM 1 35 W Power dissipation when output current is 0 6 is determined in the same way 0 6 P out P Logic 0 81 W Power dissipation for 1 unit at standby is determined as follows P standby 24 V x 0 015 A 5 V x 0 004 A 0 38 W Power dissipation when Motor 100 Motor 40 P TOTAL is determined as follows P TOTAL P Motor A OUT x 100 96 Duty P Motor B OUT x 60 9 Duty 0 81 W x 100 96 1 35 W x 40 96 0 38 W x 60 96 1 58 W For thermal design on the board evaluate by mounting the IC 1999 03 09 42 56 62200 TOSHIBA Power supply sequence recommended cR et Internal reset RESET INPUT TONG operable area Takes up to tone until operable IS id malfunction the IC is to avo when the value drops to or below the kewise ternally reset L In Note 1 When the Vpp value drops t
9. INPUT FUNCTION Slow Decay Mode Mixed Decay Mode 5 Mixed Decay Mode functions INPUT FUNCTION 74 Mixed Decay Mode 40 Mixed Decay Mode Note Valid only when DECAY signal is L Mixed Decay Mode 6 TORQUE functions TORQUE 0 TORQUE 1 Comparator reference voltage 7 Current Ax Bx functions SET HH 5 84 H H H EL t to I i L H L H L H L H L H L H L 201 11 1 1 1 21 OH to HH to OH ob OH to OH ob OH to By inputting the above current data A 4 bit B 4 bit 17 microstep drive is possible For 1 step fixed to 90 degrees see the section on output current vector line 54 page 1999 03 09 10 56 TOSHIBA TB62200AF 8 Serial Data Input Setting DATA STROBE Data input to the DATA pin 16 bit serial data Data transferred from DATA 0 Torque 0 to DATA 15 Phase A Data are input and transferred at the following timings falling edge data input rising edge data transfer After data are transferred all data are latched on the rising edge of the STROBE signal As long as STROBE 15 not rising the signal can be either Low or High during data transfer
10. 100 LH 85 HL 70 LL 50 74 FAST DECAY L 40 FAST DECAY Used for setting current LLLL Output ALL OFF MODE 7 6 Current By current data Steps can be divided into 16 by 4 bit data Note 1 7 8 phases Phase information H OUT B H OUTB 1 _ 229 MIXED DECAY MODE 74 FAST DECAY L 40 FAST DECAY SLOW DECAY L MIXED DECAY Used for setting current LLLL Output ALL OFF MODE 4 bit current A data Steps can be divided into 16 by 4 bit data Phase information OUT A OUT A L Note 1 Serial data input order Serial data are input the order DATA 0 TORQUE 0 gt DATA 15 PHASE 2 Serial input signal functions lo Action 20 STROBE TSD DATA RESET Nae 5 Lx x H f L change in shift H L level is input to shift register H Shift register data are latched Output off shift register data clear Output off shift register data clean H Output off shift register data hold Charge pump in operation x Don t Care Latched output level when STROBE 16 T H when TSD is in operation Note 2 and VMR H when the operable range 3 V typical or higher and L when lower 3 PHASE functions INPUT FUNCTION Positive polarity A H 1 Negative polarity A 1 A 1999 03 09 9 56 TOSHIBA TB62200AF 4 DECAY functions
11. the above figures When the current flows in the opposite direction of the arrows see the table below 1999 03 09 39 56 TOSHIBA TB62200AF Current modes O Sine wave in increasing Slow Decay mode normally used Set current value Set current value O Sine wave in decreasing Mixed Decay mode normally used Set current Fast Because current attenuates 50 quickly the current immediately value AN A follows the set current value Charge Slow Charge Fast Fast Set current value Slow Charge O Sine wave in decreasing Slow Decay mode normally used at attenuation Because current attenuates slowly it takes a long time for the current to follow the set current value or the current does not follow Set current value Charge Set current value Note The above charts are schematics The actual current transient responses are curves 1999 03 09 40 56 TOSHIBA TB62200AF Operation in Slow Decay mode tdelay tdelay Reference voltage Charge CR Osc waveform t fast 04 fast Flow chart t Compare current IM gt lre Slow Decay Start discharging CR signal Fast Decay Start charging CR signal Using the oscillator waveform on the CR pin for chopping Slow Decay mode is generated In Slow Decay mode current chopping is performed in the flow chart shown on the right In Slow Decay mod
12. 5 11 No reset at testing 5 V RESET 24 2 SGND 4 Vref Vary Vref 2 to Vpp 1 0V and confirm that output is on When VM 24V and Vpp 5V apply the specified voltage of 3V to the Vref and monitor the current flow value 1999 03 09 29 56 TOSHIBA TB62200AF 12 VDDR unit only C D unit conforms to unit Oscilloscope 5 V OV f 31 STROBE AB 55855 28 RESET SGND gt 1 o Ccp 2 9 2 reset at testing VM FN 5 RESET 1 LL y VDD Vary from OV lt SGND 42 Monitor the output pins Increase the Vpp voltage from 0 Measure the Vpp value when output starts Next decrease the Vpp voltage and measure the Vpp value when output stops Setup data H DATA 0 1 2 6 7 8 9 10 11 12 13 14 15 L A o o a H L STROBE 1999 03 09 30 56 TOSHIBA TB62200AF 13 unit only C D unit conforms to unit Oscilloscope SGND 1 gt Ccp 2 e No reset at testing Vary from OV 5 V RESET LL gt 3 SGND 2 With the CLK signal and DATA all High input increase the voltage from 0 Measure the value when output starts Next decrease the voltage and measure the value when output stops Setup data H DATA 0 1 2 6 7 8 9 10 11 12 13 14 15 L A o o a H L STROBE 1999 03 09 31 56 TOSHIBA TB62200AF 14 TjTSD ATjTSD Measure in an environment such as an constant te
13. rights of TOSHIBA CORPORATION or others The information contained herein 15 subject to change without notice 1999 03 09 1 56 TOSHIBA TB62200AF BLOCK DIAGRAM 1 Overview Power lines A B unit C D unit is the same as A B unit Block Diagram Power lines DAT OUT A circuit circuit 69 OUT A Full Bridge RRS circuit 2 OUT B 5 OUT B Current compare circuit OSC Output oscillator circuit circuit Full B RRS B RESET 2 DATA lc CLK Io Logic circuit 7 Cop A 2 5 31 circuit C 4 15 22 33 Vss Fin PGND High voltage wiring amp Low voltage wiring Vpp momom mom n GND wiring PGND 1 GND wiring Vss Control signal wiring LOGIC 1999 03 09 2 56 TOSHIBA TB62200AF BLOCK DIAGRAM 2 Overview Details STROBE AB Vref AB Output lona circuit Current B Decay B PHASE B TORQUE AB MIXED DECAY Current Decay PHASE 16 bit latch register Current D register Decay D PHASE D TORQUE CD MIXED DECAY MODE D 16 bit shift STROBE CD Vref CD 1999 03 09 3 56 TOSHIBA TB62200AF BLOCK DIAGRAM 3 Output control circuit A B unit C D unit is the same as A B unit MIXED Ccp VDD DECAY A PHASE A DECAY A A Om Damo 2S OUT CONTROL 5 TIMMING Full Bridge 4 1 Converte
14. ys and measure the output pin voltage and the STROBE signal Oscilloscope waveform example 130 us STROBE OUTPUT Voltage A OUTPUT Voltage A 1999 03 09 35 56 TOSHIBA TB62200AF 18 tgRANK unit only C D unit conforms to unit Vref 2 onitor 5 0 31 5 223 SGND Pulse 28 generator 4 1 1 S 2 gt gt reset at testing A 5 RESET LL gt VDD 17 1 SGND 12 tBRANK is the dead time band for avoiding malfunction caused by noise Apply sufficient differential voltage when Vref 3V 0 6V or higher to Viy Rs and apply duty When the pulse width reaches a certain value triggering feedback and changing the output Check the value Rs pin voltage Apply pulse to the Rs pin so that the Rs pin voltage 1 04 4 4 Measure the pulse width where output changes VoutA Setup data DATA STROBE 1999 03 09 36 56 TOSHIBA TB62200AF 19 A B unit only C D unit conforms to unit STROBE AB CLK AB DATA AB 22 SGND 0 4 u 2 3A 24V Ccp A 7 Y Monitor VDD 1 gt x SGND 1 45 Apply Vpp change RESET from L to Measure the time until the CcpA pin bec
15. 1 2 phase excitation drive in Mixed Decay mode t current waveform of 1 2 phase excitation sine wave o m hM mw e Dn 00 CO 3 coOoodo Pr EN lt o 92 100 1999 03 09 50 56 62200 TOSHIBA DOT 9 HH ojo o 1 o tj Application operation input data TT 4 bit micro steps 3 0 1 0 0 0 0 0 _ 0 9 0 0 0 0 1 0 0 0 _0 9 TORQUE IT 1999 03 09 51 56 TOSHIBA TB62200AF smo 6 s o IS IS CO A 0 T 1 020 36 1 1 1 o jijijiji o 1 1 11 010 01 0 37 1 1 1 0 01111111 o 1 1 10111001 0 38 1 1 1 0 11011111 o 1 1 0 39 1 1 1 0 01011111 o 1 1 10101101 0 aoj 1 1 1 0 11110111 o 1 1 11 011 01 0 4111 1 1 0 o 1 1 01111101 aj 1 1 1 0 o 1 1 11111101 o 431 1 1 1 0 1 1 10010111 0 aj 1 1 1 o 11111110 o 1 1 11 010111 0 45 1 1 1 0 o 1 1 01110111 461 1 1 1 o o 1 1 11110111 4 1 1 1 0 o 1 1 10011111 0 48 1 1 1 0 1111010 o 1 1 11 011111 0 49 1 1 1 0 0 1 1 01111111 o 0 1 1 1 0
16. DATA 0 1 2 4 5 6 7 8 9 W10 11 12 13 14 15 L o es umm o L STROBE 0 40 6096 100 0 40 60 Output current value set current value fast Slow Charge Slow 1999 03 09 24 56 TOSHIBA TB62200AF 7 IRS A unit only B C D unit conforms to A unit When measuring phase A IG oc pe a mi SGND 8 vo amp SGND Ccp 2 0 02 24 gt VDD 1 in Ccp 1 SGND With L input to RESET connect RRS to the power supply and measure the current input to the Rs pin Either drop all the input pins to GND level or input all Low data to the DATA pin then perform measurement At that time leave all other output pins open Setup data H mm DATA 0 1 2 6 7 8 9 10 11 12 13 14 15 L H L STROBE 1999 03 09 25 56 TOSHIBA TB62200AF 8 RON 0 5 RON 5 when measuring output A A unit only B C D unit conforms to A unit gt mm 31 STROBE Curve tracer SGND T y 1 2 2 gt No reset at testing N 5 RESET 4 2 1 1 SGND Input the current setting data HHHH signal to the DATA pin and measure the voltage between VM and OUT when IOUT 1000 mA or the voltage between OUT and GND Then change the phase and repeat measurement At that time leave the output pins whic
17. crease current sine wave 0 to 90 or to stabilize current stabilize motor rotor Mixed Decay Mode Mode changes from Charge gt Fast gt Slow Mode changes from Fast to Slow at 40 or 74 of the OSC cycle In Mixed Decay mode current ripple 16 large but attenuation capability 1 high The mode is used to attenuate current sine wave 907 to 1802 when current is unstable in Slow Decay mode 1999 03 09 18 56 TOSHIBA TB62200AF TEST CIRCUIT A B unit only C D unit conforms to A B unit 1 VIN VIN 1 IN L IDD1 pp2 osc 12k gt e A sono 1000pF R RSA 9 RRSA 1501 1202 Lf 4 31 STROBE 2 111 11 11 gt 30 CLK AB 3 5 0 Vary VIN X VM B Q IN 5 0 owl lt lt lt lt lt lt SGND 28 RESET 0V 5V 24 No reset at testing 5 V RESET VDD gt SGND 4 Test method VIN H Set RESET to High and vary the logic input voltage from 0 to 7 V Monitor Ipp and measure the change point 24 V VIN L Set RESET to High and vary the logic input voltage from 5 to OV Monitor Ipp and measure the change point Set RESET to High set the the logic input voltage to 5V and measure the input IIN H current 1501 Apply VDD input RESET and measure Ipp 1502 Input 6 25 MHz clock and measure the current when t
18. d Output OPEN 6 25 MHz LOGIC ACTIVE 100 kHz chopping emulation Output OPEN Charge Pump charged Output Standb 24V V OV Current RESET DATA ALL L Output Leakage Vrs CcpA V 24V Vref 3 0V Gain 1 5 1 Referenca TORQUE H H 100 set Vref 3 0 V Vref Gain 1 5 1 TORQUE H L 85 set TORQUE L H 70 set I 2 20 ES ES 3 3 gt gt gt gt Comparator Reference Voltage Ratio os TORQUE L L 50 set Output Current EH Differential 6 out 200 Output Current Setting E Differential 6 200 a VRS 24V VM 24V RS 7 N O UJ y O UJ O O e gt 2 1999 03 09 12 56 TOSHIBA TB62200AF ELECTRICAL CHARACTERISTICS 1 otherwise specified Ta 25 C Vpp 5V 24V CHARACTERISTIC SYMBOL CIR 5 CONDITION UNIT CUIT lout 1 0A VDD 5 0V 0 5 1 Tj 25 C Drain Source 814 Ron 5 0 2 1 212 ES ELECTRICAL CHARACTERISTICS 2 unless otherwise specified Ta 25 C Vpp 5 VM 24V TEST CHARACTERISTIC SYMBOL TEST CONDITION ve wc UNIT CUIT VM 24V V 5V V pue EZ RESET H Output off Vref Input Current lr
19. e Fast mode continues as long as the feedback time delay tdelay for current comparison from detection of motor current exceeding the reference current to output changed to Decay mode and pulls up the current to the set current value Fast mode duration can be set by combining external capacitors on the CR pin 1999 03 09 41 56 TOSHIBA TB62200AF IC power dissipation IC power dissipation is classified into two power consumed by transistors in the output block and power consumed by the logic block and the charge pump circuit e Power consumed by the output block calculated with Ron 0 6 In Charge mode Fast Decay mode or Slow Decay mode power is consumed by the upper and lower transistors of the H bridges The following expression expresses the power consumed by the transistors of a H bridge P out upper Ty lower Tr lout Vps V 2X lout x Ron 1 The average power dissipation for output under 4 bit micro step operation phase difference between phases is 90 15 determined by expression 1 Thus power dissipation for output per unit is determined as follows 2 under the conditions below lout Peak 0 9 VDD 5V P 0 9 0 97 2 e Power consumed by the logic block and IM The following standard values are used as power dissipation of the logic block and IM at operation LOGIC 4mA Typ
20. e nn es 4 H L STROBE Measuring points tw CLK 55094 in tsuST CLK twn CLK twp CLK tSTROBE tsTROBE L tSTROBE tsuCLK SIN thCLK SIN DATA 2090 MM DATA o 1999 03 09 33 56 TOSHIBA TB62200AF 16 OSC Fast Delay OSC Charge Delay unit only C D unit conforms to unit 31 STROBE 35560 No reset at testing 5 V RESET VDD A a 1 0 47 Fix the output current value Slow Decay mode and turn the output Measure the time until the output switches from the CR pin waveform and the output voltage waveform Setup data DATA CLK STROBE Top CR Bottom Osc Fast Delay e 5 Delay 50 50 VoutA VoutA Mode Charge Slow Fast Charge 1999 03 09 34 56 TOSHIBA TB62200AF 17 toHL ST ST tr tf unit only C D unit conforms to unit osc AB 12kQ CoscAB 1000pF 31 STROBE 5V OV 2 08 RESET SGND 1 2 gt gt No reset at testing a 5 RESET 4 LL V in DD 1 q 1 SGND 45 Setup data DATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L L STROBE Switch PHASE every 130
21. ef 11 24V Vpp 5V 100 Vref 3 0V VM 24V Vpp 5V Vref Vref Attenuation Ratio 5 H Output on 1 4 9 1 5 1 1 5 3 GAIN Vref 2 0 Vpp 1 0V 50 TSD J Vpp 5V Vm 24V 170 C tote 14 Yoo 54 191 1191 TSD Return AT TSD 14 T TSD 130 170 C C Temperature Difference Return Voltage VDDR VM 24 V RESET Vi Return Voltage VDD 5 RESET Note Thermal Shut Down TSD circuit When the IC junction temperature reaches the specified value the TSD circuit turns off the output block for both unit AB and CD The data latched at that time are held without change TSD circuit operates in a range from 130 to 170 The circuit halts operation of the output circuits until the temperature drops by 20 typical from the temperature at which the TSD circuit started operation V 1999 03 09 13 56 TOSHIBA TB62200AF ELECTRICAL CHARACTERISTICS 3 25 VDD 5V 24 lout 0 9 CHARACTERISTIC SYMBOL TEST CONDITION e UNIT CUIT GA 90 016 90 90 016 GA 84 84 915 DERI MN 98 A 73 73 013 68 012 68 68 012 62 62 911 arap o 56 010 56 56 010 51 51 09 Chopper Current Vector O 45 08 000 45 45 08 000 GA 40 40 07
22. h are not measured open Setup data Vary the phase data during testing H DATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L STROBE 1999 03 09 26 56 TOSHIBA TB62200AF 9 fchop Min fchop Max unit only C D unit conforms unit Oscilloscope Ccp 1 0 47 VDD 1 7 SGND Change the Rosc and Cosc values and measure the frequency on the CR pin using the oscilloscope Oscilloscope waveform example 1999 03 09 27 56 TOSHIBA TB62200AF 10 Hchop Triangular wave high value A B unit only C D unit conforms to A B unit 31 STROBE No reset at testing 5 V RESET Ccp 1 0 47 VDD in 1 With L load perform chopping in Mixed Decay mode Monitor the output current waveform and measure the current ripple width Hchop at constant current 0 9 A operation Input lout 0 9 Setup data H DATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L es ee H L STROBE m Current waveform Reference voltage 1999 03 09 28 56 TOSHIBA TB62200AF 11 Vref unit only C D unit conforms to unit Oscilloscope 5 When measuring lre fix Vref 3V and measure STROBE AB CLK AB DATA AB 55556 SGND 28
23. hannel D current pin Output D pin Power pin for output D block Power pin for output C block Output C pin Channel C current pin PGND Power GND pin OUT C Output C pin STROBE CD STROBE latch signal input pin LATCH CLK CD CD clock input pin DATA CD CD serial data signal input pin Power pin for logic block Fin Vss Logic GND pin Output reset signal input pin L RESET AB serial data signal input pin LK AB AB clock input pin TROBE STROBE latch signal input pin f LATCH UTA Output A pin Power GND pin Channel A current pin Output A pin Power pin for output A block NJ 21 Vref AB Vref CD CR CD Ccp B Ccp OUT D PGND gt W OUT D VMD VMC_ OUT gt ao eas ale 10 wl wl wl wl pol pol nod n 1 wl ols 23 70 nio gt 2 U Note How to handle GND pins All power GND pins and Vss signal GND pins must be grounded TB62200AF Since also functions as a heat sink take the heat dissipation into consideration when designing the board 1999 03 09 8 56 TOSHIBA TB62200AF SIGNAL FUNCTIONS 1 Serial input signals for A B C D is the same as A B DATA No NAME FUNCTIONS 0 TORQUEO DATA 0 1 HH
24. he logic is operating Set output to OPEN Setup data DATA A A A A H L RE m 1999 03 09 19 56 TOSHIBA TB62200AF 2 loL unit only C D unit conforms to unit 5 V OV f 31 STROBE AB No reset at testing 5 V RESET 2 El VDD 1 m 1 SGND 12 Test method With Vy 24V Vpp 5V and logic input all 0 applied set RESET connect the output pins to GND and measure the supply current With Vy 24V Vpp 5V and logic input all 0 applied set RESET connect the output pins to and measure the supply current lol With Vy 24V Vpp 5V and logic input all 0 applied set RESET connect the output pins to GND and measure the supply current Setup data DATA 0 1 2 3 48 5 6 7 8 9 10 11 12 13 14 15 L H L H m eee ee O O STROBE 1999 03 09 20 56 TOSHIBA TB62200AF 3 IM1 IM2 A B unit only C D unit conforms to A B unit gt mm 31 5565000 SGND IM T 3 1 3 Cep 2 o gt At IM1 testing RESET L 0 V 1 N At IM2 tes
25. inputting 0000 to the current data when voltage is lower than the regulated voltage 20 30 V When output circuit is stropped can fluctuate between OV to the regulated voltage 20 30 V Charge up pump rise time VDD VM VM VDD 90 VM is the time required after releasing reset until the Ccp2 capacitor capacitor used to absorb charge charges Ccp1 capacitor used to save charge to the Vpp voltage Until the Ccp1 voltage reaches the Vpp voltage the internal circuits cannot drive gates properly Be sure to drive the motors at least tone The Ccp1 capacitance can be increased Reducing the Ccp1 capacitance shortens initial charge up time but increases voltage fluctuation Depending on the combination of capacitors especially if the Ccp2 capacitance is small the voltage may not be sufficiently boosted Toshiba recommends the following combination of capacitors Recommended capacitance 1 0 47 uF 2 0 02 1999 03 09 44 56 TOSHIBA TB62200AF External capacitors for charge pumps When VDD 5V fchop 100 kHz and L 10 mH is driven with 24V lout 900 mA the theoretical values for Ccp1 and Ccp2 are as shown below Ccp1 Ccp2 T gt E 4 lt 0 01 7 i 8 aM 0 001 Ccp1 CAPACITANCE Charge pump delay time Charge pump delay time depending on set condition toNG Evaluate driving under
26. istic STROBE OUT time Output Load 6 8 5 7 Q see Figure 1 150 LIEN Noise Rejection Dead lout 0 94 100 kHz 1 1 1 2 Maximum Choppin VM 24V V 5V pPing fchop MAX M Db Frequency Output active lout 0 9 Minimum Chopping Step fixed Ccp1 0 47 uF Frequency chop MIN 2 0 02 uF 1000 12k0 h F f 5 r OSC 1 VM 24V Vpp 5V Chopping Triangular E a Mixed Decay Mode Ccp1 0 47 2 0 02 Charge Pump Rise Time tonG 19 24V Vpp 5V RESET 1 Delay Slow Decay Mode 1999 03 09 15 56 TOSHIBA 62200 tw CLK a q 50 an tsuST CLK CK OO twn CLK twp CLK 20008 tSTROBE H tSTROBE L A tSTROBE thCLK SIN MM OUTPUT Voltage A tpLH ST OUTPUT Voltage A Figure 1 Test Waveforms Timing Waveforms and Names 1999 03 09 16 56 TOSHIBA TB62200AF OSC Charge Delay OSC Fast Delay OSC Charge Delay OUTPUT Voltage A OUTPUT Voltage A L Set current Slow Decay Mode Figure 2 Test Waveforms Timing Waveforms and Names 1999 03 09 17 56 TOSHIBA TB62200AF OSC waveforms and output waveform timings OSC waveform OSC H 1 1 J zosamme E i 1
27. mperature chamber where the temperature for the IC can be freely changed A B unit only C D unit conforms to A B unit gt e A sono 5 V OV f 31 STROBE nan 5 V 0v OV Curve tracer SGND 4 1 2 gt No reset at testing 5 RESET 4 2 C m 1 SGND 4 5 TjTSD Increase the ambient temperature Measure the temperature when output stops ATjTSD Gradually decrease the temperature from that when the TSD circuit is turned off output off Measure the temperature when output restarts Setup data Vary the phase data during testing H DATA 0 1 2 3 A4 5 6 7 8 9 10 11 12 13 14 15 L eee eee ee ee ee ee ee eee ee ee ee ee 5 1999 03 09 32 56 TOSHIBA TB62200AF 15 fCLK tw CLK twp twn tSTROBE tSTOBE 1 tsuCLK SIN tsuST CLK thCLK SIN thcLK ST unit only C D unit conforms to unit 31 STROBE AB PRATS 1 No reset at testing 5 V RESET gt LL u 1 o 1 SGND 2 Input any data at max perform chopping and monitor the output waveform For the measuring points see the timing chart below Setup data H DATA 0 1 2 4 5 6 7 8 9NM10f 11 12 13 14 15 L e
28. mw 2 1 95 0 02 pF We recommend the user add bypass capacitors as required Make sure as much as possible that GND wiring has only one contact point Also make sure that the pins are connected For the data to be input see the section on the recommended input data Because there may be shorts between outputs shorts to supply or shorts to ground be careful when designing output lines Vpp lines and GND lines 1999 03 09 55 56 TOSHIBA OUTLINE DRAWING HSOP36 P 450 0 65 Unit mm 3 55 0 1 0 525 6 5 AAA E 011948 Weight 0 79 g Typ 1999 03 09 56 56
29. nsistors switching Four transistors switching in one cycle Slow 1999 03 09 22 56 TOSHIBA TB62200AF 5 VRS 1 Vref GAIN when measuring phase A after measurement A B unit only C D unit conforms to A B unit gt e A sono 5V OV 31 5 OV OV Vary between 0 and 1 SGND T 1 Ccp 2 reset at testing j 5 V RESET 1 N VoD T in 1 SGND 4 12 VRS H L Input torque data 100 HH vary the voltage between and Rs pins Measure the voltage Vrs when output changes from fixed Charge mode to another mode Also measure when torque data 85 HL 70 LH 50 LL as above and calculate the ratio using value at 100 as reference 50 when torque data 100 Vref GAIN Vref GAIN Setup data H DATA 2 3 4 5 6 7 8 9 10 11 12 13 14 15 O CD D CNEA H L STROBE 1999 03 09 23 56 TOSHIBA TB62200AF 6 4lout1 Alout2 unit only C D unit conforms to unit osc AB 12509 CoscAB Monitors current waveform 31 STROBE SR No reset at testing 5 V RESET VDD 2 a 1 With L load perform chopping in Mixed Decay mode Monitor the output current waveform and measure the various output currents at constant current 00 9 A operation Ccp 1 0 47 Setup data H
30. o Vppg or below VM Vpp we it to stabilize Wait up to iming ing on when turn id malfunction t the RESET signal at the above t It takes time for the output control charge pump circu time after power on before driv 9 gt E mE gt 9 o gt 5 E vo ing the motors ternal reset is released thus In the f 5 between 3 3 to 5 In such a case the charge pump cannot drive stably because of IS Note 2 When the value output may be on We recommend the RESET state be maintained until ient voltage ff reaches 20 V or more Note 3 Since Vpp and Vy voltage within the rating are applied output is turned Insu off by internal reset At that time a current of several mA flows due to the bus between and Vpp 1999 03 09 43 56 TOSHIBA TB62200AF Relationship between and 8 UP V 25V DD 5 Ccp1 0 47 uF RESET 0V Ccp2 0 02 uF voltage i rating 30 30 V 7 qj Ss VOLTAGE CHARGE UP VOLTAGE Van VOLTAGE ELL ELLE c t Charge up voltage 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 SUPPLY VOLTAGE Vw V Note To prevent faulty operation stop the output circuit by
31. omes Vpp 90 VDD VM VM VDD x 90 VM OV 50 1999 03 09 37 56 TOSHIBA PD Ta Package power dissipation POWER DISSIPATION Pp PD 3 5 3 0 2 5 IN 2 0 E 1 5 NL oop 11114 Tt 0 25 50 75 100 125 150 AMBIENT TEMPERATURE D Rth j a only 96 C W 2 When mounted on the board 38 1 W Board size 90 x 230 x 1 6 mm Rth 8 5 C W How to calculate set current value The set current value is calculated according to Rrs and Vref Torque RRs Ric Vref GAIN 1 5 1 Ric wiring resistance in IC 0 04 Q Example Vref 3 V Torque 100 90 To output lout 0 8 0 8 A x 3 V x 5 1 1 RRS 0 04 0 RRS 0 695 0 5 or higher is required 62200 1999 03 09 38 56 TOSHIBA Output transistor operating mode Charge mode U4 62200 Rg pin Note 2 9 Rg pin OFF OFF Fast mode Slow mode Remark In Mixed Decay mode mode changes from Fast to Slow at 40 or 74 of 1 fchop cycle after charging is complete in Charge mode Note in this IC Output transistor operation functions Although there are parasitic diodes on the dotted lines they are not normally used Note The above table is an example where current flows in the direction of the arrows in
32. peed chopping possible at 100 kHz or higher Note 1 When using the IC pay attention to thermal conditions Note 2 These devices are easy damage by high static voltage In regards to this please handle with care 980910EBA1 TOSHIBA is continually working to improve the quality and the reliability of its products Nevertheless semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress It is the responsibility of the buyer when utilizing TOSHIBA products to observe standards of safety and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life bodily injury or damage to property In developing your designs please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications Also please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook The products described in this document are subject to the foreign exchange and foreign trade laws The information contained herein is presented only as a guide for the applications of our products No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from 115 use No license is granted by implication or otherwise under any intellectual property or other
33. r 14 Bipolar es A Current A C 13 Output 12 amp 1 TORQUE 1 1 ANGLE TORQUE TORQUE 2 0 CONTROL RSA VMB Full Bridge Vref AB ex Converter Bipolar MIXED DECAY B 2 201 8363 Current PHASE DECAY Symbols Vss signal ground pin External G Serial input data Circled numbers correspond to serial data numbers at input A chopping reference oscillation waveform saw tooth wave is generated by the resistor and capacitor connected to the CR pin Current path switching timing is generated for Mixed and Slow Decay modes according to the chopping waveform The reference voltage applied to the Vref pin is attenuated by 100 85 70 or 50 according to the 2 bit torque data A reference voltage is generated by the attenuated reference voltage and 4 bit current setting data When current flows through the sense resistor connected to the Rs pin there is a potential difference between the and Rs pins The potential difference is compared by the comparator and the result fed back to the output control circuit Then chopping takes place 1999 03 09 4 56 TOSHIBA TB62200AF BLOCK DIAGRAM 4 Input A B unit C D unit is the same as A B unit 1 Logic input circuit CLK DATA STROBE To Logic To D A circuit 10k 2 3k 3k 80kQ VV N 3 CR circuit block To Mixed Decay signal COPM equivalen
34. t circuit VDD Comp IN HO 1999 03 09 5 56 TOSHIBA TB62200AF BLOCK DIAGRAM 5 Output A B unit C D unit is the same as A B unit Full Bridge converter From output bipolar control Output A circuit output 32 control Output A 69 circuit Phase A PRO Full Bridge From converter output control bipolar circuit Output B 5 Phase B 1999 03 09 6 56 TOSHIBA TB62200AF PIN ASSIGNMENT TOP VIEW VMB 01 our B 2 OUT A Rs 3 RS A PGND 4 PGND our B 5 OUT A NC 1 6 STROBE AB Cep 8 DATA AB Vref AB Y 9 RESET Vss FIN TB62200AF Vss FIN Vref CD VDD CR CD DATA CD Ccp B CLK CD Ccp STROBE CD OUT D OUT C PGND PGND Rs Rs OUT D OUT C VMD VMC RsA p Current sense resistor connecting pins PGND Power GND NC Not connected 1999 03 09 7 56 TOSHIBA PIN DESCRIPTION SYMBOL DESCRIPTION Power pin for output B block OUT B Output B pin Channel current PGND Power GND pin Note OUT B Output B pin Not connected Capacitor pin for charge pump Ccp1 External C R osc pin AB sets chopping frequency Vref Input pin Fin Vss Logic GND pin Vref input pin CD External C R osc pin CD sets chopping frequency Capacitor pin for charge pump Ccp2 Capacitor pin for charge pump Ccp2 Output D pin Power GND pin C
35. the following calculation conditions 27 V VDD 5V 150 kHz Condition E Ccp1 2 2 uF 2 0 0047 toNG 45 Condition C 200 Condition A Condition 0 47 UF Ccp1 0 22 uF 1 0 33 uF 2 0 02 uF Condition D Ccp2 0 082 uF 2 0 047 uF Ccp1 1 0 uF Ccp2 0 01 Condition A Condition B Condition Condition D Condition E Note Since the above values are theoretical use our recommended conditions of Ccp1 0 47 uF 2 0 02 1999 03 09 45 56 TOSHIBA TB62200AF Operation of charge pump circuit VM 24V VM 18 19 36 Output Output amp H switch Comparator Controller VH VM VDD charge pump voltage i1 2 charge pump current i2 gate block power dissipation Initial charging D When RESET is released is turned and turned off Ccp2 is charged from Ccp2 via Dil is turned off is turned on and Ccp1 is charged from Ccp2 Di2 When the voltage difference between and CcpA pin voltage charge pump voltage reaches Vpp or higher operation halts normal state Actual operation 4 1 charge is used at fchop switching and the potential drops Charges up by D and 2 above Output switching Initial charging Normal state 2 AGO AN AC 2 DN V V 5 VM n
36. ting Where the cycle is T s the following equation expresses the cycle T t4 gt 0 7 x Rosc 0 616 x When Rosc 13 Cosc 1000 pF T 9 7 us The chopping frequency is determined as follows fchop 1 T 1 9 7 x 10 6 103 kHz 1999 03 09 48 56 TOSHIBA TB62200AF Application operation input data example 2 Phase Excitation mode AP o DECAY prase 8 A DECAY Ao 2 PHASE Bit 0 o apela 15 ne E EE EEE Data input on the rising edge of CLK Every input of a data string 16 bit requires input of the STROBE signal For the input conditions see page 9 Functions We recommend Mixed Decay mode 40 as Decay mode Set torque to 100 Output current waveform of 2 phase excitation sine wave 100 Phase B U a Note 2 phase excitation drive usable only in Mixed Decay mode 2 phase excitation drive in Slow Decay mode is prohibited Don t use it 1999 03 09 49 56 62200 TOSHIBA 1 2 Phase Excitation mode Application operation input data example Mio it o _ TORQUE Data are input on the rising edge of CLK Every input of a data string 16 bit requires input of the For the input conditions see page 9 Functions We recommend Mixed Decay mode 40 as Decay mode Set torque to 100 STROBE signal We recommend
37. ting RESET H 5 V 1 gt 1 in lt lt p 1 SGND Le Test method IM1 Set the logic block to non active DATA all 0 5V 24V and output to open Measure the current input from supply RESET IM2 Set the logic block only to active CLK 6 25 MHz 24V and output to open Measure the current input from supply RESET H Setup data H DATA 0 1 2 6 7 8 9 10 11 12 13 14 15 L mm H L STROBE 1999 03 09 21 56 TOSHIBA TB62200AF 4 IM3 unit only C D unit conforms to unit gt 7 reset at testing gt 5 RESET VDD SGND 4 Setup data H 1 2 45 D S MASA L m Test method Set output to open change phase data from 1 0 1 0 and perform switching When testing input phase data at double the chopping frequency if fchop 100 kHz 200 kHz and measure the current value of supply Mode changes three VM VM times in one chopping cycle RRS RRS Two transistors switching Chopping cycle U4 U gt U1 U gt OFF OFF I I I Four transistors switching I Switches by phase data OFF OFF Load Load Charge Fast L1 L2 L1 L2 Two transistors 1 switching OFF OFF OFF OFF Two transistors switching Two transistors switching _ PGND Eight tra
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TOSHIBA TB62200AF handbook