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ANALOG DEVICES AD706 handbook

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1. 18V Internal Power D issipation Total Both Amplifiers 650 mW Input Voltage tVs Differential Input 0 7 Volts Output Short Circuit Duration Indefinite Storage Temperature Range 65 C to 150 Storage T emperature Range R 65 C to 125 Operating T emperature R ange POTOSI E TTC 0 to 70 AD T06AJB 2 14244 dpsed bred oed 40 C to 85 Lead T emperature Soldering 10 secs 300 NOTES Stresses above those listed under Absolute M aximum Ratings may cause perma nent damage to the device T his is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Specification is for device in free air 8 L ead Plastic Package 0 4 100 C Watt 8 L ead Cerdip Package 8 110 C W att 8 L ead Small Outline Package 155 C W att input pins of this amplifier are protected by back to back diodes If the differential voltage exceeds 0 7 volts external series protection resistors should be added to limit the input current to less than 25 mA CAUTION REV AVos 2 AVos 2 for amplifier
2. D 706 hy FA ANALOG DEVICES Dual Picoampere Input Current Bipolar Op Amp AD706 FEATURE HIGH DC PRECISION 50 uV max Offset Voltage 0 6 max Offset Drift 110 pA max Input Bias Current LOW NOISE 0 5 p p Voltage Noise 0 1 Hz to 10 Hz LOW POWER 750 pA Supply Current Available in 8 Lead Plastic Mini DIP Hermetic Cerdip and Surface Mount SOIC Packages Available in Tape and Reel in Accordance with EIA 481A Standard Single Version AD705 Quad Version AD704 PRIMARY APPLICATIONS Low Frequency Active Filters Precision Instrumentation Precision Integrators PRODUCT DESCRIPTION T heAD 706 is a dual low power bipolar op amp that has the low input bias current of a BIFET amplifier but which offers a significantly lower Ig drift over temperature It utilizes superbeta bipolar input transistors to achieve picoampere input bias cur rent levels similar to FET input amplifiers at room tempera ture while its lg typically only increases by 5x at 125 C unlike a BIFET amp for which lg doubles every 10 C for a 1000x increase at 125 C The AD 706 also achieves the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier Since it has only 1 20 the input bias current of an OP 07 the AD 706 does not require the commonly used balancing resis tor Furthermore the current noise is 1 5 that of the which makes this amplifier usable with much higher
3. 5 o 0 0 5 10 15 20 0 1 1 10 100 1k 10k 100k 1M 0 1 1 10 100 1k 10k 100k 1M SUPPLY VOLTAGE Volts FREQUENCY Hz FREQUENCY Hz Figure 14 Quiescent Supply Current Figure 15 Common M ode Rejection Figure 16 Power Supply Rejection vs Supply Voltage Ratio vs Frequency Ratio vs Frequency e Ho BRUNEE UNE 117 F WEE LL LLL FTT X PHASE SHIFT Degrees OPEN LOOP VOLTAGE GAIN OPEN LOOP VOLTAGE GAIN dB o REFERRED TO SUPPLY VOLTAGES OUTPUT VOLTAGE SWING Volts 100k 20 240 4 6 810 100 0 01 0 1 1 10 100 1k 10k100k 1M 10M 0 5 10 15 20 LOAD RESISTANCE FREQUENCY Hz SUPPLY VOLTAGE Volts Figure 17 Open Loop Gain vs Load Figure 18 Open Loop Gain and Figure 19 Output Voltage Swing vs Resistance vs Load Resistance Phase Shift vs Frequency Supply Voltage REV C 5 1 o 100 2 i x 2 lt _120 gt o O E 140 a 0 3 O 160 10 100 1 10 100 1 10 100 1 10 100k FREQUENCY Hz FREQUENCY Hz Figure 20a Crosstalk vs Frequency Figure 21 Magnitude of Closed Loop Output Impedance vs Frequency Vs 0 1 pF Rr SINE WAVE GENERATOR 20kO Figure 22a Unity Gain Follower For Large Signal Applications Resistor Re Limits the Current Vour 2 Through the Input Protection Diodes 2 Vout 2 CROSSTALK 201001 20dB Vou 1 Figure 22b Unity Gain Follower Figure 22c
4. 1 and P AV cy ppLy for amplifier 2 expressed in dB for amplifier 2 expressed in dB ORDERING GUIDE Model AD 706AN 40 to 85 C Plastic DIP AD 706 0 to 70 Plastic DIP AD 706K 0 to 70 Plastic DIP AD 706JR 0 to 70 SOIC AD 706 R REEL 0 C to 70 T ape and Reel AD706AQ 40 C to 85 C Cerdip AD 706BQ 40 C to 85 C Cerdip AD 706AR 40 C to 85 C SOIC AD 706AR REEL 40 C to 85 C N Plastic DIP Q Cerdip R Small Outline Package T ape and R eel METALIZATION PHOTOGRAPH Dimensions shown in inches and mm Contact factory for latest dimensions OUTPUT A Vs 0 118 3 00 INPUT A OUTPUT B INPUT A INPUT B INPUT B 0 074 1 88 ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although the AD 706 features proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy electrostatic discharges T herefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality WARNING red ESD SENSITIVE DEVICE 3 AD706 Typical Characteristics 25 C V 15 V unless otherwise noted 1000 NUMBER OF UNITS 200 80 40 40 80 INPUT GEESET VOLTAGE Figure 2 Typical Distribu
5. Unity Gain Follower Figure 22d Unity Gain Follower Large Signal Pulse Response Rp Small Signal Pulse Response Rr Small Signal Pulse Response Rp 10 1 000 pF 00 C 100 pF C 1000 pF 6 REV AD706 SQUARE WAVE INPUT Figure 23b Unity Gain Inverter Large Signal Pulse Response C 1 000 pF Figure 24 shows an in amp circuit that has the obvious advan tage of requiring only one AD 706 rather than three op amps with subsequent savings in cost and power consumption T he transfer function of this circuit without Rc is R3 1 4 R2 Input resistance is high thus permitting the signal source to have an unbalanced output impedance R4 Vout Viu a Vin ess O ViN 1kQ OUTPUT Rp 0 1 1kQ Vs v Vout Vins 7 Vinge 1 ET R4 ERT ane E FOR R1 R4 R2 R3 OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE Figure 24 A Two Op Amp Instrumentation Amplifier Furthermore the circuit gain may be fine trimmed using an optional trim resistor Rc Like the three op amp circuit CM R REV C Figure 23c Unity Gain Inverter Small Signal Pulse Response 100 pF Figure 23d Unity Gain Inverter Small Signal Pulse Response 1000 pF increases with gain once initial trimming is accomplished but CMR is still dependent upon the ratio matching of Resistors R1 throu
6. at high temperatures as shown by Figure 26 l o e OFFSET VOLTAGE OF FILTER CIRCUIT RTI pV 1 x o WITHOUT OPTIONAL BALANCE RESISTOR R3 WITH OPTIONAL BALANCE RESISTOR R3 480 TEMPERATURE C 120 Figure 26 Vos vs Temperature Performance of the 1 Hz Filter Table ll 1Hz 4 Pole Low Pass Filter Recommended Component Values Section 1 Section 2 Desired Low Frequency Frequency Pass Response Bessel Butterworth 0 1 dB Chebychev 0 2 dB Chebychev 0 5 dB Chebychev 1 0 dB Chebychev NOTE C4 uF 0 0616 0 0609 0 0385 0 0347 0 0290 0 0242 Specified Values are for a 3 dB point of 1 0 Hz For other frequencies simply scale capacitors C 1 through C4 directly i e for 3 Hz Bessel response C1 0 0387 uF C2 0 0357 uF 0 0533 uF C4 0 0205 uF OUTLINE DIMENSIONS Dimensions shown in inches and mm Cerdip Plastic Mini DIP SOIC 0 005 0 13 0 055 1 4 0 1968 5 00 Ps 2 0 430 10 92 ME 4 80 W 0 348 8 84 Une tb 8 5 TA B 0 310 7 87 0 220 5 59 RS 280 7 11 0 2440 6 20 0 1574 4 00 xi 0 240 6 10 0 2284 5 80 0 1497 3 80 0 325 8 25 1 SSS 0 320 8 13 tY 0 300 7 62 PIN1 0 060 1 52 MAX 10 060 1 52 0 290 7 31 0 015 ii 38 PIN 1 0 102 2 59 0 0196 0 50 35 295 0 094 2 39 00095 0 25 0 115 2 93 0 125 3 18 pile jap gt l 0 015 0 38 Mem d 0 0
7. 18 V 112 132 Vs 2 5 V to 18 V 108 126 0 3 T min to T max Tmin to T max Twin to T max Twin to T max f 10Hz Ry 2 0 8 0 8 G 1 0 15 0 15 Twin to T max 0 15 0 15 40 2 40 3002 300 2 13 5 14 13 5 14 Vem 13 5 V 110 132 114 132 T MIN to T MAX 108 128 108 128 0 1 Hzto 10 Hz 3 3 f 2 10 2 50 50 0 5 0 5 1 0 0 1 Hzto 10 Hz f 210Hz 17 17 f 1kHz 15 22 15 22 Vo tl2V RioAD 10 kQ tO T max Vo 10V RLoAD 2 kQ Twin tO T max RioAp 10 kQ 13 14 13 14 T win to T max 13 14 13 14 Short Circuit 15 15 Gain 1 10 000 10 000 uV C dB dB uV M onth MHz V us V us G O pF V dB dB pA p p fANHz uV p p nV WHz nV Hz V mV V mV V mV V mV REV C Parameter POWER SUPPLY Rated Performance Operating Range Quiescent Current T otal T min to T max TRANSISTOR COUNT of T ransistors NOTES Bias current specifications are guaranteed maximum at either input AD 709g A AD 706K B Min Typ Min Typ Max Units V V mA mA Input bias current match is the difference between corresponding inputs Ig of IN of Amplifier 1 minus 16 of IN of Amplifier 2 AVos 1 CM RR match is the difference between AV CM for amplifier 1 and Vow AVos 1 AV cy PPLY All min and max specifications are guaranteed Specifications subject to change without notice PSRR match is the difference between ABSOLUTE MAXIMUM RATINGS Supply
8. 23 0 58 0 100 0 070 1 78 SEATING 15 0 008 0 20 0 022 0 558 0 100 100 1 77 PLANE 0 008 0 204 0 0 014 0 36 2 20 0 030 0 76 0 014 0 356 3 0 045 1 15 26 0 200 5 08 0 015 0 38 ae gt 094 2 MAX Y 0 200 5 08 x 0 160 4 06 H 30 0 0098 0 25 S 0 115 2 93 lle 0 015 0 381 0 0040 0 10 gt 0 0500 0 0192 0 49 SEATING a 2n 0 0138 0 35 0 0098 0 25 PLAN 0 0075 0 19 8 0 0 0500 1 27 0 0160 0 41 REV C1429b 2 12 97 PRINTED IN U S A
9. gh R4 Resistor values for this circuit using the optional gain resistor Rc can be calculated using R1 R4 49 9kQ 49 9kQ hocque 7 096 1 99 8kQ 0 066 whereG Desired Circuit Gain T ablel provides practical 1 resistance values N ote that without resistor Rc R2 and 49 9 1 Tablel Operating Gains of Amplifiers 1 A2 and Practical 1 Resistor Values for the Circuit of Figure 24 For a much more comprehensive discussion of in amp applica tions refer to the Instrumentation A mplifier A pplications G uide available free from Analog D evices Inc AD706 R1 R2 el Vs 1MO 1MO 0 1p F INPUT O 3 R3 R4 g 1 2 1MO 1MO Vj 140706 9 5 42 2 4 y AD706 7 O OUTPUT WITHOUT THE NETWORK 6 PINS 1 amp 2 AND 6 amp 7 OF THE AD706 ARE TIED TOGETHER AAA __ CAPACITORS C1 amp C2 ARE SOUTHERN ELECTRONICS R5 C5 os C6 MPCC POLYCARB 5 50 VOLT 2MO 0 01pF 0 01pF X OPTIONAL BALANCE RESISTOR NETWORKS Figure 25 A 1 Hz 4 Pole Active Filter A 1Hz 4 Pole Active Filter Figure 25 shows the AD 706 in an active filter application An important characteristic of the AD 706 is that both the input bias current input offset current and their drift remain low over most of the op amp s rated temperature range T herefore for most applications there is no need to use the normal balancing resistor Adding the balancing resistor enhances performance
10. he L T 1024 2 The AD 706 provides both low drift and high dc precision 3 The AD 706 can be used in applications where a chopper amplifier would normally be required but without the chopper s inherent noise TYPICAL Ip nA 55 25 110 125 TEMPERATURE C Figure 1 Input Bias Current vs Temperature One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1997 AD706 SPECI FICATI ONS Ty 25 C Vow 0 Vand 15 V dc unless otherwise noted AD 706K B Min Typ Max Parameter INPUT OFFSET VOLTAGE Initial Offset O ffset vs T emp Average T C vs Supply PSRR Tin tO Tmax Long T erm Stability INPUT BIAS CURRENT vs Temp Average T C Twin to T max Twin to T max INPUT OFFSET CURRENT vs Temp Average T C Twin to T max Twin to T max MATCHING CHARACTERISTICS Offset Voltage Input Bias Current Common M ode Rejection Power Supply Rejection C rosstalk Figure 19a FREQUENCY RESPONSE U nity Gain Crossover Frequency Slew Rate INPUT IMPEDANCE D ifferential Common M ode INPUT VOLTAGE RANGE C ommon M ode Voltage Common M ode Rejection Ratio INPUT CURRENT NOISE INPUT VOLTAGE NOISE OPEN LOOP GAIN OUTPUT CHARACTERISTICS Voltage Swing Current Capacitive L oad D rive Capability 706 Min Typ 10 Tin to T max 25 0 2 Vs 2 V 0
11. source impedances At 1 6 the supply current per amplifier of the OP07 the AD 706 is better suited for today s higher density boards T he AD 706 is an excellent choice for use in low frequency active filters in 12 and 14 bit data acquisition systems in preci sion instrumentation and as a high quality integrator T he AD 706 is internally compensated for unity gain and is available in five performance grades T he AD 706 and AD 706K are rated over the commercial temperature range of 0 C to 70 C T he AD 706A and AD 706B are rated over the industrial temperature range of 40 C to 85 REV C Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices CONNECTION DIAGRAM Plastic Mini DIP N Cerdip Q and Plastic SOIC R Packages AMPLIFIER 1 AMPLIFIER 2 T he AD 706 is offered in three varieties of an 8 lead package plastic mini D IP hermetic cerdip and surface mount SOIC J grade chips are also available PRODUCT HIGHLIGHTS 1 The AD 706 is a dual low drift op amp that offers BIFET level input bias currents yet has the low lg drift of a bipolar amplifier It may be used in circuits using dual op amps such as t
12. tion of Input Offset Voltage 1 5 INPUT COMMON MODE VOLTAGE LIMIT Volts REFERRED TO SUPPLY VOLTAGES 0 5 10 15 20 SUPPLY VOLTAGE Volts Figure 5 Input Common Mode Voltage Range vs Supply Voltage 200 NUMBER OF UNITS 0 8 0 4 0 0 4 0 8 OFFSET VOLTAGE DRIFT pV C Figure 8 Typical Distribution of Offset Voltage Drift 1000 800 NUMBER OF UNITS 160 80 0 80 160 INPUT BIAS CURRENT pA Figure 3 Typical Distribution of Input Bias Current OUTPUT VOLTAGE Volts p p 1k 10k 100k 1M FREQUENCY Hz Figure 6 Large Signal Frequency Response CHANGE IN OFFSET VOLTAGE pV WARM UP TIME Minutes Figure 9 Change in Input Offset Voltage vs Warm Up Time NUMBER OF UNITS 120 60 0 120 INPUT OFFSET Figure 4 Typical Distribution of Input Offset Current FOR INDUSTRIAL TEMPERATURE RANGE OFFSET VOLTAGE DRIFT pV C SOURCE RESISTANCE Figure 7 Offset Voltage Drift vs Source Resistance POSITIVE Ip INPUT BIAS CURRENT pA 15 10 5 0 5 10 15 COMMON MODE VOLTAGE Volts Figure 10 Input Bias Current vs Common M ode Voltage REV 2 VOLTAGE NOISE nV H 1 10 100 1000 FREQUENCY Hz FREQUENCY Hz TIME Seconds Figure 11 Input Noise Voltage Figure 12 Input Noise Current Figure 13 0 1 Hz to 10 Hz Noise Spectral Density Spectral Density Voltage lt x tc tc 2 O I o o

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