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ANALOG DEVICES AD5210 Series handbook

1. speed output amplifier a channel address latch and control logic The multiplexers may be connected to the differential amplifier in either an 8 channel differential or 16 channel single ended configuration A feature of the AD362 is an internal user controllable analog switch that connects the multiplexers in either a single ended or differential mode This allows a single device to perform in either mode without hard wire programming and permits a mixture of single ended and differential sources to be interfaced by dynamically switching the input mode control DC POWER HOLD CAPACITOR BITS OUT ANALOG 1 12 INPUTS ANALOG ANALOG 16 OUT iN SAMPLE HOLD STATUS OUTPUT CHANNEL CHANNEL SELECT SELECT CONVERT DATASTROBE a LATCH START TO OUTPUT REGISTER Figure 10 High Speed 12 Bit DAS CONVERT START USING A POSITIVE EDGE In some systems it may be inconvenient to generate a negative going start convert pulse of the proper width The circuit of Figure 11 can be used to start a conversion on the AD521X series of A Ds with a positive going edge To perform a con version both the convert start signal and the E O C must be low The output of the inverter and nand gate will then be in the high state The converter will reset on the next rising clock edge Resetting brings the E O C to a high state the inverter goes low the convert start is still high so the output of the nand gate goes high allowing the
2. 78JA D5210 AD 5212 AD5215 Series hv Fi ANALOG DEVICES He FEATURES True 12 Bit Operation 1 2LSB max Nonlinearity Totally Adjustment Free Guaranteed No Missing Codes Over the Specified Temperature Range Hermetically Sealed Package Standard Temperature Range 25 C to 85 C Extended Temperature Range 55 C to 125 C Serial and Parallel Outputs Monolithic DAC with Scaling Resistors for Stability Low Chip Count for High Reliability Industry Standard Pin Out Small 24 Pin DIP GENERAL DESCRIPTION The AD52XX series devices are 12 bit successive approximation analog to digital converters The hybrid design utilizes MSI digital linear monolithic chips and active laser trimming of high stability thin film resistors to provide a totally adjustment free converter no potentiometers are required for calibration The innovative design of the AD52XX series devices incorpo rates a monolithic 12 bit feedback DAC for reduced chip count and higher reliability The exceptional temperature coefficients of the monolithic DAC guarantees 1 2LSB line arity over the entire operating temperature range of 25 C to 85 C for the BD grade and 55 C to 125 C for the TD grade The AD52XX series converters are available in 2 input voltage ranges 5V AD521X1 AD52X4 and 10V AD52X2 AD52X5 The converters are available either complete with an internal buried zener reference or with the option of an external reference for impro
3. Telex 924491 Cables ANALOG NORWOODMASS SPECIFICATIONS typical 25 C 15V and 5V unless otherwise noted INPUT INPUT RANGE IMPEDANCE 5V to 5V 5 0kQ ADS 2X1B ADS2X1T AD52X4B AD5S2X4T 10V to 10V_ 100k _AD52X2B ADS2X2T AD52X5B AD52X5T REFERENCE oo scones NIE a o a External 10 000V nun RESOLUTION 12 Bits O o o oo LINEARITY ERROR MAX 1 2LSB No Missing Codes Tmin tO Tmax Guaranteed ZERO ERROR MAX 1LSB l ZERO ERROR MAX ABSOLUTE ACCURACY MAX Tmin tO Tmax 0 4 of FSR 0 1 of FSR led CONVERSION TIME MAX Clock 1MHz 5210 Series 13us Clock 260kHz 5200 Series 50us LOGIC RATINGS Input Logic Commands Logic 0 0 8V max Logic 1 2 0V min Loading O 5TTL Load CLOCK INP T PULSE OUTPUT L GIC Logic 0 0 4V max 3 6V 2 4 min x FANOUT HIGH l e 8TTL Loads ee neen Be 2TTL Loads to o 5V 410 15V 10 Vt El o 25mA 68mA max 10mA 35mA max 20mA 28mA max AEE o E a TA nmin eee POWER SUPPLY REJECTION Vec 0 005 max Voo oo o ooo 80 005 6 max POWER CONSUMPTION aoaaa T SMW 1000MW max o 8 7 SmW 1000mW max s OPERATING TEMPERATURE RANGE 25 C to 85 C 55 Cto 125 C NOTES Same specifications as AD52X1 X2B Same specifications as AD52X1 X2T Same specifications as AD52X4 X5B 1 Other input ranges are available consult fa
4. and is guaranteed valid on negative going clock edges however serial data can be transferred quite simply by clocking it into a receiving shift register on these edges see Figure 3 An ex ternal clock of 1MHz AD5210 will yield 13s conversion time An external clock of 260kHz AD5200 will yield 50us conversion time Figure 3 Timing Diagram The analog continuum is partitioned into 2 discrete ranges for 12 bit conversion All analog values within a given quan tum are represented by the same digital code usually assigned to the nominal midrange value There is an inherent quantiza tion uncertainty of 1 2LSB associated with the resolution in addition to the actual conversion errors The actual conversion errors that are associated with A D converters are combinations of analog errors due to the linear circuitry matching and tracking properties of the ladder and scaling networks reference error and power supply rejection The matching and tracking errors in the converter have been minimized by the use of a monolithic DAC that includes the scaling network The initial gain and offset errors have been internally trimmed to provide an absolute accuracy of 0 05 Linearity error is defined as the deviation from a true straight line transfer characteristic from a zero analog input which calls for a zero digital output to a point which is defined as full scale The linearity error is unadjustable and is the most meaningf
5. conversion to continue immediately The convert start line has only to be brought back down before the conversion is complete START m lt eroek JU U UU ULPUN sant oS SIGNAL l status 1 l INVERTER NAND GATE a Lg START r CONVERT Figure 11 Convert Start Using a Positive Edge Internal AD5212 External Reference Reference AD5204 AD5211 AD5214 AD5202 AD5205 AD5215 i e the 134s conversion time 10V input external reference extended temperature unit is the AD5215TD Table ll
6. its 12 bit outputs connected both to the device bit output pins and to the corresponding bit inputs of the feedback DAC The analog input is successively compared to the feedback DAC output one bit at a time MSB first LSB last The decision to keep or reject each bit is then made at the com pletion of each bit comparison period depending on the state of the comparator at that time TIMING The timing diagram is shown in Figure 3 A conversion is initi ated by holding the start convert low during a rising edge of the clock The start convert transition must occur at a mini mum of 25ns prior to the clock transition The end of conver sion E 0 C signal will be set simultaneously with the initia START CONVERT EXTERNAL CLOCK STATUS LSB SERIAL DATA OUT tion of conversion The actual conversion will not start until the first rising edge of the clock after the start convert is again set high At time tg By is reset and B2 B412 are set uncon ditionally At ty the Bit 1 decision is made and Bit 2 is unconditionally reset At tz the Bit 2 decision is made keep and Bit 3 is reset unconditionally This sequence con tinues until the Bit 12 LSB decision keep is made at ty The STATUS flag is reset at time ty2 indicating that the conversion is complete and that the parallel output data is valid Corresponding serial and parallel data bits become valid on the same positive going clock edge Serial data does not change
7. 2XX allows accurate digit ization of high frequency signals and high throughput rates in multichannel data acquisition systems To make the AD52XX capable of full benefit from this high speed a fast sample hold amplifier such as the AD346 or ADSHC 85 is required Figures 7 and 8 show the use of an AD346 and ADSHC 85 as sample and holds in combination with the AD52XX ANALOG INPUT 10V TO 10V O viv iy 10V TO 10V BITS 1 12 AD5212 CONVERT START o oO CLOCK IN Figure 7 66 6kHz 12 Bit A D Conversion System ANALOG INPUT 10V TO 10V O vyv 10V TO 10V BITS 1 16 AD5202 CONVERT START CLOCK IN Figure 8 18 3kHz 12 Bit A D Conversion System In sampled data systems there are two limiting factors in digitizing high frequency signals The maximum value of input signal frequency that can be acquired and digitized using a sample and hold amplifier and A D converter com bination is influenced by the bandwidth of the SHA but it is also dictated by A The aperture uncertainty jitter of the sample and hold amplifier B The desired accuracy and corresponding resolution of the converter The resolution of an AD5210 is 1 part in 4096 to a tolerance of 0 012 of the full scale range the maximum value of input signal frequency which can be digitized is determined by 2 N F MAX 27 Aperture Uncertainty 1 F AD346 97 1kH MA
8. X n 4096 4 X 10 10 7 1 Fmax ADSHC 85 77 7kHz 27 4096 5 X 10719 The maximum throughput rate for each of these combinations is again different The maximum throughput rate is the sum of the sample and hold acquisition time and A D conversion time as shown in Figure 9 EXTERNAL crock UUU UUU UUU ANATA U UUU START q o CONVERT _ Tconv s gt 0 C J CONVERSION OF l J CONVERSION OF l SAMPLE 1 ACQUISTION SAMPLE 2 OF SAMPLE 2 E O C CONNECTED TO SAMPLE AND HOLD MODE CONTROL Figure 9 START E O C Timing for Sampled Data System When using an AD346 with an AD5212 the throughput rate is 2 0us acquisition time plus 134s conversion time 66 6kHz The ADSHC 85 used in combination with an AD5202 is 4 5us acquisition time plus 50us conversion time 18 3kHz To meet the requirements of the Nyquist sampling criteria the AD346 and AD5210 combination can be used for input frequencies from dc through 33 3kHz the ADSHC 85 and AD5210 combination for inputs from de through 9 2kHz Input frequencies higher than these up to the maxi mum frequency would result in under sampling of the input signal Signals up to the maximum frequency could be processed if their bandwidth is less than one half the sample frequency A fast 32kHz 12 bit DAS can be configured using the AD362 and the AD521X The AD362 contains two 8 channel multi plexers a differential amplifier a sample and hold with high
9. ctory FSR is Full Scale Range and is equal to the peak to peak input signal Specifications subject to change without notice a ABSOLUTE MAXIMUM RATINGS Storage Temperature 65 C to 150 C Positive Supply 18V START 1 Negative Supply 18V sv 2 Logic Supply O to 7V SERIAL Analog Input 25V OUT Digital Outputs Logic Supply BITE 4 Digital Inputs 5 5V Reference Supply 15V Birs 5 5V0 O GND BIT 2 8 AD52XX SERIES ANALOG GND Vref OUT 12 BIT DAC O 15V Vrer IN PIN 12 FUNCTION Vrer OUT AD52X1 AD52X2 DIVIDER ADDED FOR EXTERNAL REFERENCE MODELS ONLY Vref IN AD52X4 AD52X5 Figure 1 Burn In Circuit Figure 2 Pin Designations AD52XX SERIES ORDERING GUIDE Absolute Temperature Conversion Package Model Linearity Accuracy Range Time Option AD521 BD 1 2LSB 2LSB 25 C to 85 C 13s DH 24C AD521 TD 1 2LSB 2LSB 55 C to 125 C 13 ys DH 24C AD520 BD 1 2LSB 2LSB 25 C to 85 C 50us DH 24C AD520 TD 1 2LSB 2LSB 55 C to 125 C 50us DH 24C Insert number according to desired input voltage range as shown in Table Il CLOCK IN DIG GND EOC BIT7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 15V ANALOG IN 15V THEORY OF OPERATION On receipt of aCONVERT START command the AD52XX converts the voltage as its analog input into an equivalent 12 bit binary number This conversion is accomplished as follows the 12 bit successive approximation register SAR has
10. her within the device These grounds are usually referred to as the Digital Ground and Analog Ground Analog Power Return These grounds must be tied together at one point usually at the system power supply ground Ideally a single solid ground would be de sirable However since current flows through the ground wires and etch stripes of the circuit cards and since these paths have resistance and inductance hundreds of millivolts can be generated between the system ground point and the ground pin of the AD52 XX Separate ground returns should be provided to minimize the current flow in the path from sensitive points to the system ground point In this way sup ply currents and logic gate return currents are not summed into the same return path as analog signals where they would cause measurement errors OUTPUT REFERENCE tF INDEPENDENT OTHERWISE RETURN AMPLIFIER REFERENCE TO MECCA AT ANALOG P S COMMON Figure 5 Basic Grounding Practice Each of the AD52XX s supply terminals should be capacitively decoupled as close to the AD52XX as possible A large value capacitor such as 1uF in parallel with 0 01yF capacitor is usually sufficient Analog supplies are bypassed to the Analog Ground pin and the logic supply is bypassed to the Digital Ground pin Opp Ort 1 0 uF ANALOG 0 01pF Orr GROUND DIGITAL nT Tse 0 01 F ott ott Figure 6 Power Supply Decoupling SAMPLED DATA SYSTEMS The conversion speed of the AD5
11. ul indication of A D converter accuracy Differential nonlinearity is a measure of the deviation in the staircase step width between codes from the ideal least significant bit step size Figure 4 Monotonic behavior requires that the differential linearity error be less than 1LSB however a monotonic converter can have missing codes the AD52XX is specified as having no missing codes over the entire temperature range as specified on the data page There are three types of drift error over temperature offset gain and linearity Offset drift causes a shift of the transfer characteristic left or right over the operating temperature range Gain drift causes a rotation of the transfer characteristic about the zero or minus full scale point The worst case ac curacy drift is the summation of all three drift errors over temperature Statistically however the drift error behaves as the root sum squared RSS and can be shown as RSS Veg 07 e eg Gain Drift Error ppm C o Offset Drift Error ppm of FSR C o L Linearity Error ppm of FSR C ALL BITS ON 000 000 GAIN 2 i oO a O O 2 011 111 3 1 2LSB gt z 3 Z a 7 111 111 ALL BITS OFF _ _ d FaN ANALOG INPUT LSB 7 FSR 2 Figure 4 Transfer Characteristics for an Ideal Bipolar A D GROUNDING Many data acquisition components have two or more ground pins which are not connected toget
12. ved absolute accuracy The AD52XX series converters are available in two per formance grades the B is specified from 25 C to 85 C and the T is specified from 55 C to 125 C All units are available in a 24 pin hermetically sealed ceramic DIP Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implica tion or otherwise under any patent or patent rights of Analog Devices 12 Bit Successive Approximation High Accuracy A D Converters nadine m amimi tea tat PRODUCT HIGHLIGHTS 1 The AD52XX series devices are laser trimmed at the factory to provide a totally adjustment free converter no potenti ometers are required for 12 bit performance 2 A monolithic 12 bit feedback DAC is used for reduced chip count and higher reliability 3 The AD52XX series directly replaces other devices of this type with significant increases in performance 4 The devices offer true 12 bit accuracy and exhibits no missing codes over the entire operating temperature range 5 The fast conversion rate of the AD5210 series makes it an excellent choice for applications requiring high system throughput rates One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 617 329 4700 Twx 710 394 6577

ANALOG DEVICES AD5210 Series handbook

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