Home

ON SEMICONDUCTOR MMBV2101LT1 Series Data Sheet

1. to the device http onsemi com 4 MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board solder paste must be applied to the pads A solder stencil is required to screen the optimum amount of solder paste onto the footprint The stencil is made of brass or stainless steel with a typical thickness of 0 008 inches The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board i e a 1 1 registration TYPICAL SOLDER HEATING PROFILE For any given circuit board there will be a group of control settings that will give the desired heat pattern The operator must set temperatures for several heating zones and a figure for belt speed Taken together these control settings make up a heating profile for that particular circuit board On machines controlled by a computer the computer remembers these profiles from one operating session to the next Figure 7 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board This profile will vary among soldering systems but it is a good starting point Factors that can affect the profile include the type of soldering system in use density and types of components on the board type of solder used and the type of board or substrate material being used This profile shows temperature v
2. 5 MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 PACKAGE DIMENSIONS SOT 23 TO 236AB CASE 318 08 ISSUE AF NOTES 1 DIMENSIONING AND TOLERANCING PER ANSI Y14 5M 1982 2 CONTROLLING DIMENSION INCH 3 MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL INCHES MILLIMETERS MIN MAX MIN MAX 0 1102 0 1197 2 80 3 04 0 0472 10 0551 1 20 1 40 0 0350 10 0440 0 89 1 11 0 0150 10 0200 0 37 0 50 0 0701 10 0807 1 78 2 04 0 0005 10 0040 0 013 0 100 0 0034 10 0070 0 085 0 177 0 0140 0 0285 0 35 0 69 0 0350 10 0401 0 89 1 02 0 0830 0 1039 2 10 2 64 0 0177 0 0236 0 45 0 60 a po be ut ale ge lt o r ale o o o m gt 2 STYLE 8 PIN 1 ANODE 2 NO CONNECTION 3 CATHODE http onsemi com 6 MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 PACKAGE DIMENSIONS TO 92 226 CASE 182 06 ISSUEL NOTES 1 DIMENSIONING AND TOLERANCING PER ANSI Y14 5M 1982 SEATING 2 CONTROLLING DIMENSION INCH PLANE 3 CONTOUR OF PACKAGE BEYOND ZONE R IS UNCONTROLLED 2S D 4 LEAD DIMENSION IS UNCONTROLLED IN P AND P d BEYOND DIMENSION K MINIMUM J INCHES MILLIMETERS DIM MIN MAX MIN MAX 0 175 0205 445 521 B 0170 0 210 432 533 C 012
3. 5 0165 318 419 SECTION X X D 0016 0 021 0 407 0 533 G 0 050 5 1 27 BSC H 0 100 BSC 2 54 BSC J 0014 0016 036 041 0500 1270 L 0250 63 N 0080 0 105 203 2 66 STYLE 1 P 0 050 1 27 PIN 1 ANODE 0 115 293 2 CATHODE 0135 343 http onsemi com 7 MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 Thermal Clad is a trademark of the Bergquist Company ON Semiconductor and Lu are trademarks of Semiconductor Components Industries LLC SCILLC SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems
4. CTRICAL CHARACTERISTICS T4 25 unless otherwise noted Characteristic Symbol i Preferred devices are recommended choices for future use and best overall value Reverse Breakdown Voltage IR 10 pAdc 21 MV21xx LV22xx Reverse Voltage Leakage Current VR 25 TA 25 Diode Capacitance Temperature Coefficient VR 4 0 f 1 0 MHz Semiconductor Components Industries LLC 2001 1 Publication Order Number October 2001 Rev 3 MMBV2101LT1 D MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 pF MMBV2101LT1 MV2101 MMBV2103LT1 LV2205 MMBV2105LT1 MV2105 MMBV2107LT1 MMBV2108LT1 LV2209MMBV2109LT1 MV2109 Diode Capacitance VR 4 0 Vdc f 1 0 MHz Q Figure of Merit VR 4 0 Vdc f 50 MHz TR Tuning Ratio C2 C30 f 1 0 MHz Typ MMBV2101LT1 MMBV2103LT1 MMBV2105LT1 MMBV2107LT1 thru MMBV2109LT1 are also available in bulk Use the device title and drop the T1 suffix when ordering any of these devices in bulk PARAMETER TEST METHODS 1 DIODE CAPACITANCE CT CC CJ CT is measured at 1 0 MHz using a capacitance bridge Boonton Electronics Model 75A or equivalent 2 TR TUNING RATIO TR is the ratio of CT measured at 2 0 Vdc divided by CT measured at 30 Vdc 3 Q FIGURE OF MERIT Q is calculated by taking the G and C readings of an admittance bridge at the specified frequency and substituting in the follo
5. MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 Silicon Tuning Diodes 6 8 100 pF 30 Volts Voltage Variable Capacitance Diodes ON Semiconductor http onsemi com These devices are designed in popular plastic packages for the high volume requirements of FM Radio and TV tuning and general Cathode Anode frequency control and tuning applications They provide solid state SOT 23 reliability in replacement of mechanical tuning methods Also available in a Surface Mount Package up to 33 pF 20 16 51 Cathode Anode High Q TO 92 Controlled and Uniform Tuning Ratio Standard Capacitance Tolerance 10 MARKING e DIAGRAM Complete Typical Design Curves 3 MAXIMUM RATINGS 2 Reverse Voltage V R 30 Vdc TO 236AB SOT 23 STYLE 8 XXX mW TJ TA 25 C MV21xx 280 Derate above 25 C LV22xx 2 8 N Junction Temperature 150 XX Junction Temperature Storage Temperature Range 55 to 150 YWW DEVICE MARKING 1 MMBV2101LT1 M4G MMBV2108LT1 4X MV2109 MV2109 2 MMBV2103LT1 4H MMBV2109LT1 4J LV2205 LV2205 TO 226AC TO 92 Device Code Line 1 MMBV2105LT1 4U MV2101 MV2101 LV2209 LV2209 CASE 182 XXXX Device Code Line 2 MMBV2107LT1 4W MV2105 MV2105 STYLE 1 M Date Code See Table ZA Device Code Forward Rowe Dissipation E M Date Code TA 25 C 21 225 mW C See Table Derate above 25 1 8 ELE
6. epresentative MMBV2101LT1 D WWW ALLDATASHEET COM Copyright Each Manufacturing Company Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 10096 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
7. ersus time STEP 1 STEP 2 STEP 3 PREHEAT VENT HEATING ZONE 1 SOAK ZONES 2 amp 5 RAMP RAMP DESIRED CURVE FOR HIGH MASS ASSEMBLIES 200 C 150 C 100 C DESIRED CURVE FOR LOW MASS ASSEMBLIES The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint The two profiles are based on a high density and a low density board The Vitronics SMD310 convection infrared reflow soldering system was used to generate this profile The type of solder used was 62 36 2 Tin Lead Silver with a melting point between 177 189 C When this type of furnace is used for solder reflow work the circuit boards and solder joints tend to heat first The components on the board are then heated by conduction The circuit board because it has a large surface area absorbs the thermal energy more efficiently then distributes this energy to the components Because of this effect the main body of a component may be up to 30 degrees cooler than the adjacent solder joints STEP 4 STEP5 STEP6 STEP7 HEATING HEATING VENT COOLING ZONE ZONES 4 amp 7 ONG SPIKE 205 TO 219 C PEAK AT Hee SOLDER JOINT 160 C SOLDER IS LIQUID FOR 40 TO 80 SECONDS DEPENDING ON MASS OF ASSEMBLY TIME 3 TO 7 MINUTES TOTAL gt TMAX Figure 6 Typical Solder Heating Profile http onsemi com
8. ign when subjected to a solder reflow process 0 037 0 037 0 95 0 95 2 0 035 0 9 0 031 wr SOT 23 SOT 23 POWER DISSIPATION The power dissipation of the SOT 23 is a function of the pad size This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipa tion Power dissipation for a surface mount device is deter mined by TJ max the maximum rated junction temperature of the die RgJA the thermal resistance from the device junction to ambient and the operating temperature TA Using the values provided on the data sheet for the 5 23 package Pp be calculated as follows TJ max TA RJA The values for the equation are found in the maximum ratings table on the data sheet Substituting these values into the equation for an ambient temperature TA of 25 C one can calculate the power dissipation of the device which in this case is 225 milliwatts 150 C 25 C 225 milli BBe C W 5 milliwatts Pp The 556 C W for the SOT 23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milli watts There are other alternatives to achieving higher power dissipation from the SOT 23 package Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad Using a board material such as Thermal Clad an aluminu
9. intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer PUBLICATION ORDERING INFORMATION Literature Fulfillment Literature Distribution Center for ON Semiconductor JAPAN ON Semiconductor Japan Customer Focus Center 4 32 1 Nishi Gotanda Shinagawa ku Tokyo Japan 141 0031 Box 5163 Denver Colorado 80217 USA Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Email ONlit hibbertco com American Technical Support 800 282 9855 Toll Free USA Canada Phone 81 3 5740 2700 Email r14525 onsemi com ON Semiconductor Website http onsemi com For additional information please contact your local Sales R
10. m core board the power dissipation can be doubled using the same footprint SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device When the entire device is heated to a high temperature failure to complete soldering within a short time could result in device failure There fore the following items should always be observed in order to minimize the thermal stress to which the devices are subjected Always preheat the device The delta temperature between the preheat and soldering should be 100 C or less When preheating and soldering the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet When using infrared heating with the reflow soldering method the difference shall be a maximum of 10 C The soldering temperature and time shall not exceed 260 C for more than 10 seconds When shifting from preheating to soldering the maximum temperature gradient shall be 5 C or less After soldering has been completed the device should be allowed to cool naturally for at least three minutes Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress Mechanical stress or shock should not be applied during cooling Soldering a device without preheating can cause exces sive thermal shock and stress which can result in damage
11. ode Capacitance versus Reverse Voltage 1 040 100 2 50 M 1090 2 0 Vdc z c 20 1 020 E 10 amp 50 5 1010 Vp 4 0 Vdc c 2 20 a 1 000 VR 30 Vdc 10 T 050 0 990 S N 0 20 0 980 NORMALIZED TO CT _ amp 0 10 5 at TA 25 0 05 0 970 Vp CURVE 0 02 0 960 0 01 75 50 25 0 25 50 75 100 125 0 5 0 10 15 20 25 30 TJ JUNCTION TEMPERATURE Vp REVERSE VOLTAGE VOLTS Figure 2 Normalized Diode Capacitance versus Figure 3 Reverse Current versus Reverse Bias Junction Temperature Voltage 5000 m 5000 3000 MMBV2101LT1 MV2101 3000 2000 2000 MMBV2109LT1 p 1000 1000 MMBV2101LT1 MV2101 500 gt 500 S 300 300 B 200 B 200 8 8 100 i 100 50 50 30 30 MMBV2109LT1 MV2109 20 20 10 10 1 0 20 3 0 50 7 0 10 20 30 10 20 30 50 70 100 200 250 REVERSE VOLTAGE VOLTS f FREQUENCY MHz Figure 4 Figure of Merit versus Reverse Voltage Figure 5 Figure of Merit versus Frequency http onsemi com 3 MMBV2101LT1 Series 2105 MV2101 MV2109 LV2205 LV2209 INFORMATION FOR USING THE SOT 23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package With the correct pad geometry the packages will self al
12. wing equations _ 2nf C cin G Boonton Electronics Model 33AS8 or equivalent Use Lead Length 1 16 4 TCc DIODE CAPACITANCE TEMPERATURE COEFFICIENT TCC is guaranteed by comparing CT at Vg 4 0 Vdc f 1 0 MHz TA 65 C with CT at Vp 4 0 Vdc f 1 0 MHz 85 C in the following equation which defines _ 85 C Cr 65 C 85 65 108 25 Accuracy limited by measurement of CT to 0 1 pF http onsemi com 2 MMBV2101LT1 Series MV2105 MV2101 MV2109 LV2205 LV2209 TYPICAL DEVICE CHARACTERISTICS 1000 25 an f 1 0 MHz T 200 Lu 2 400K MMBV2109LT1 MV2109 Q 50 MMBV2105LT1 MV2105 E Q 20 MMBV2101LT1 MV2101 8 10 a E 50 2 0 1 0 0 1 0 2 0 3 0 5 1 0 2 0 3 0 5 0 10 20 30 Vp REVERSE VOLTAGE VOLTS Figure 1 Di

ON SEMICONDUCTOR MMBV2101LT1 Series Data Sheet

Contents

Download Pdf Manuals

Related Search

Related Contents