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ST LDRxxyy VERY LOW DROP DUAL VOLTAGE REGULATOR handbook

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1. Ko mm inch DIM A 330 12 992 C 12 8 13 0 13 2 0 504 0 512 0 519 D 20 2 0 795 Ao 6 80 6 90 0 2 76 Bo 10 40 10 50 0 417 Ko 2 55 2 65 2 75 0 100 0 104 0 105 Po 3 9 4 0 0 153 0 157 0 161 P 79 8 0 0 311 0 315 0 319 1 Po N C A i lj T Po Bo p Ao Note Drawing not in scale 11 13 LDRxxyy Table 6 Revision History Date Revision Description of Changes 03 Aug 2004 2 Typing correction on tables 1 3 5 and figures 3 6 10 11 14 17 22 23 12 13 4 LDRxxyy Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectroni
2. 50 e CA e T e 0 T CC 5 3 LDRxxyy Figure 16 Supply Voltage Rejection vs Vo Temperature CS18650 SVR dB 90 80 70 60 50 V 54 5 to 6 5V 40 f 120Hz lop 50mA 30 20 50 10 30 70 0 TOCC Figure 17 Supply Voltage Rejection vs Voz Temperature CS18660 SVR dB 90 80 a ZE 70 60 50 Vi2 5 3 to 7 3V 40 f 120Hz lo22 50mA 30 20 50 10 30 70 0 UEC Figure 18 Supply Voltage Rejection Vo vs Frequency CS18670 SVR dB 80 80 70 60 50 V4 5 5 to 7 3V 30 lor 180mA f 120Hz 0 20 40 60 50 100 f KHz 6 13 Figure 19 Supply Voltage Rejection Voz vs Frequency CS18680 SVR dB 90 80 70 60 50 zU Vi2 5 3 to 7 3V 30 log NO LOAD 20 0 20 40 60 f KHz Figure 20 Maximum Total Quiescent Current vs Temperature CS18690 lo mA Vi 4 5V 70 le COSA k lo 1A 50 40 30 20 10 0 50 10 30 70 110 Ty C Figure 21 Total Supply Current vs Temperature CS18700 lo mA pm Vi lt 5 5V 3 0 Vi2 4 5V 2 5 2 0 deesse IE
3. ERROR AMPLIFIER 2 DRIVER2 V2 e POWER2 August 2004 Rev 2 1 13 LDRxxyy Table 1 Absolute Maximum Ratings Symbol Parameter Value Unit Vi amp V 2 DC Input Voltage 0 3 to 15 V INH Shutdown Voltage 0 3 to 15 V lo Output Current Internally Limited ProT Power Dissipation Internally Limited TSTG Storage Temperature Range 50 to 150 C TA Operating Ambient Temperature Range 40 to 4125 C Absolute Maximum Rating are those values beyond which damage to the device may occur Functional operation under these conditions is not implied Table 2 Thermal Data PPAK SPAK 7L Junction to case thermal resistance 8 2 Unit C W Symbol Parameter RTHJ C Figure 2 Connection Diagram top view CS17620 Table 3 Pin Description Symbol A E j Ak Name and Function GND 3 4 Ground pin Vn 2 2 Input 1 Supply Pin Bypass with a 2 2uF capacitor to GND Vio 1 1 Input 2 Supply Pin Bypass with a 2 2uF capacitor to GND ViNH1 3 Enable 1 Pin Internally connected to Vj in the PPAK version VINH2 5 Enable 2 Pin Internally connected to Vio in the PPAK version Vol 4 6 Output 1 Pin Bypass with a 4 7uF capacitor to GND Port Voo 5 7 Output 2 Pin Bypass with a 4 7uF capacitor to GND Port N C Not Internally Connected Table
4. 7 13 LDRxxyy PPAK MECHANICAL DATA L6 2 8 0 110 THERMAL PAD GAUGE PANE 0078180 E ky 8 13 LDRxxyy SPAK 7L MECHANICAL DATA mm inch MIN TYP MAX MIN YP MAX DIM E A 1 78 2 03 0 070 0 080 D 1 02 1 27 0 040 0 050 D1 7 87 8 13 0 310 0 320 F 0 63 0 79 0 025 0 031 G1 7 62 0 3 H1 5 59 0 220 H2 9 27 9 52 0 365 0 375 H3 8 89 9 14 0 350 0 360 L 10 41 10 67 0 410 0 420 L1 7 49 0 295 L2 8 89 9 14 0 350 0 360 M 0 79 1 04 0 031 0 041 N 0 25 0 010 z 3 __A2 COPLANARITY eA H2 HS i L2 Lf D1 C j G m e F G1 PO13F2 A 9 13 LDRxxyy Tape amp Reel SPAK xL MECHANICAL DATA mm inch DIM D 20 2 0 795 N 60 2 362 T 14 4 0 567 Bo 10 85 10 95 11 05 0 423 0 427 0 431 Ko 2 30 2 40 2 50 0 090 0 094 0 098 Po 3 9 4 0 4 1 0 153 0 157 0 161 P 11 9 12 0 12 1 0 468 0 472 0 476 Y N C Y Y A A A T PP Po bo d Ko Ao P ml 2 am Note Drawing not in scale 10 13 ky LDRxxyy Tape amp Reel DPAK PPAK MECHANICAL DATA
5. 4 Order Codes PART NUMBERS Vol Vo2 TYPE SPAK 7L PPAK 1 8V 2 5V LDR1825 LDR1825K7 R LDR1825PT R 1 8V 3 3V LDR1833 LDR1833K7 R LDR1833PT R 2 5V 1 8V LDR2518 LDR2518K7 R LDR2518PT R 2 5V 3 3 V LDR2533 LDR2533K7 R LDR2533PT R 3 3 V 1 8 V LDR3318 LDR3318K7 R LDR3318PT R 3 3 V 2 5 V LDR3325 LDR3325K7 R LDR3325PT R 2 13 ky LDRxxyy Table 5 Electrical Characteristics Vi Vol 2V Vio Vo2 2V VINH1 ViNH2 2 5V Cl2 22uF Co12 4 7HF lo1 log 10mA Ta 40 C to 125 C unless otherwise specified Typical values are referred at TA 25 C Symbol Parameter Test Conditions Min Typ Max Unit Voi Output Voltage 1 5 VNOM1 5 V Voz Output Voltage 2 5 Vnom2 5 V VpRoP1 Dropout Voltage 1 1 lo 500mA 0 3 0 7 V Vpropz Dropout Voltage 2 1 log 1A 0 4 0 8 V AVo Line Regulation 1 Vit Vo 2V to Vo447V lo 250mA 15 30 mV AVoz Line Regulation 2 Vio Vo2 2V to Vo2 7V lo 500mA 15 40 mV AVo Load Regulation 1 V4 Vo 2V lo 10 to 500mA 10 mV AVo2 Load Regulation 2 Vio Vo2 2V loz 10mA to 1A 60 mV Istor Total Supply Current lo log NO LOAD 2 mA Is 1 Channel Supply Current NO LOAD 1 mA lamax Quiescent Current lo 500mA loo 1A 30 mA lsc1 Short Circuit Current 1 T4 25 500 800 mA Isco Short Circuit Current 2 T4 25 1 1 6 A VINH H Enable Voltage HIGH 2 4 V V NH L Enable Voltage LOW 0 8 V INH Enable Pin Current VIN
6. ER BN 1 5 1 0 0 5 50 10 30 70 10 Tec ky Figure 22 Quiescent Current Vo4 vs Output Current lo mA CS18710 14 Vit 4 5V 12 Vig 5 4V lo2 1 OmA 0 0 2 0 4 0 6 lo A Figure 23 Quiescent Current Vo2 vs Output Current la mA CS18730 18 16 0 02 04 06 08 10 lo A Figure 24 Thermal Protection vs Vo CS18740 Vo V Vi 24 5V 3 5 Vi 25 3V lo1 2 10mA 0 125 135 145 155 T CC LDRxxyy Figure 25 Load Transient Tak Fur i xare average ME Sk i ll 1 Ya Je J M Hi _ 1 chi Sume E N ra pe CA Tien thi siiri H IE imi Ci 271 HF Co 2 2 2HF ViNH1 2 2 5V VI1 4 5V Vi2 5 3V lo 5mA to 0 5A lo2 5MA to 1A tRISE tFALL 4 2Hs Figure 26 Line Transient Vol 2 Tak Fur 3 ms i iecur t ty T a kla irate Retraite Ti Fea r hui 1 V Lj j tu 4a l i EN EN Dicen Mas m Th Fee ead TTK TAT uc TIR thir TIF WIE 306v EWA 20 Der C 1 2 0 Co 2 2 2HF VI1 4 4 to 10 4V Vi2 5 3 to 11 3V lo1 0 25A lo2 0 5A tRISE tFALL 4 4Hs Figure 27 Start up Transient Vo Tak Fur 5 Emn Ta i i Lr lt c R KEK Ye T a ie T TT Tr ehl B U Chi iiy M itip Shis iW fh fev ME Ley Viq 1 1 to 8 5V Vio 1 2 to 9 8V lo1 0 25A lo2 0 5A tRISE 5Hs
7. H 5V 6 HA SVR Supply Voltage Rejection Vit2 Vo1 2 3V 1V lo1 2 10 mA 70 dB f 120Hz en RMS Output Noise Bandwidth of 10Hz to 100KHz 0 003 Vo 1 This test is not performed for Vo lt 2 5V 2 Guaranteed by design but not tested in production Figure 3 Typical Application Circuit C817860 3 13 LDRxxyy TYPICAL CHARACTERISTICS unless otherwise specified T 25 C Figure 4 Dropout Voltage Vo4 vs Temperature Figure 7 Output Voltage Vo2 vs Temperature CS18530 CS18560 Va V Vo V 0 7 3 45 0 6 3 4 lop 20 5A 0 5 3 35 0 4 3 3 0 3 3 25 0 2 3 2 Memes lo 10mA 0 1 3 15 0 3 1 50 10 30 70 110 T C 50 10 30 70 110 Ty C Figure 5 Dropout Voltage Vo2 vs Temperature Figure 8 Line Regulation Vo4 vs Temperature 18540 Line CS18570 Va V mV d RON VH 4 5 to 9 5V 02 du sn lo 0 25A 0 5 25 0 4 20 0 3 15 0 2 10 0 1 5 0 0 50 10 30 70 110 TL C 50 10 30 70 110 Tu C Figure 6 Output Voltage Vo1 vs Temperat
8. O0 EL LDR1825 O SZA LDRxxyy VERY LOW DROP DUAL VOLTAGE REGULATOR OUTPUT CURRENT 1 UP TO 500mA OUTPUT CURRENT 2 UP TO 1 0A LOW DROPOUT VOLTAGE 1 0 3V lo 500mA LOW DROPOUT VOLTAGE 2 0 4V Ig 1A VERY LOW SUPPLY CURRENT TYP 50hA IN OFF MODE 1 6mA MAX IN ON MODE LOGIC CONTROLLED ELECTRONIC SHUTDOWN OUTPUT VOLTAGE AVAILABILITY FOR EACH REGULATOR 1 8V 2 5V 3 3V INTERNAL CURRENT AND THERMAL LIMIT STABLE WITH LOW VALUE MIN 4 7pF AND LOW E S R OUTPUT CAPACITORS SUPPLY VOLTAGE REJECTION 70dB TYP TEMPERATURE RANGE 40 C TO 125 C DESCRIPTION The LDRxxyy is a Very Low Drop Dual Voltage Regulator available in PPAK for the version without inhibit and in SPAK 7L for the version with the shutdown feature The very low drop voltage Figure 1 Block Diagram 0 5V and the very low supply current make it particularly suitable for low noise and low power applications such as PDA MICRODRIVE and other data storage applications while the used high voltage technology makes this device suitable for consumer applications such as MONITORS AND SET TOP BOX For each Vo a Shutdown Logic Control function is available TTL compatible to decrease the total power consumption TART UP 1 BAND GAP 1 ERROR AMPLIFIER 1 THERMAL 1 h BAND GAP 2 INH2 O ISTART UP
9. cs All other names are the property of their respective owners 2004 STMicroelectronics All Rights Reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky 13 13
10. ure Figure 9 Load Regulation Vo4 vs Temperature Cs18550 Load CS18980 2 65 Vi 4 5V 2 Z lo 210mA to 0 5A 2 55 10 2 5 0 2 45 10 a 2 4 V lt 4 5V 20 loi 10mA 2 35 30 2 3 40 50 10 30 70 110 C 50 10 30 70 110 Tu C 4 3 ky Figure 10 Line Regulation Vo5 vs Temperature Line CS18590 mV 9 50 10 50 70 0 C Figure 11 Load Regulation Voas vs Temperature Load CS18600 mV Vie 5 3V lo 10mA to 1A 90 110 50 10 30 70 0 TL O Figure 12 Short Circuit Current Vo1 vs Drop Voltage CS18620 lsc A 0 875 0 75 0 625 0 50 0 375 0 25 T z25 C 0 5 10 15 Va V LDRxxyy Figure 13 Short Circuit Current Voas vs Drop Voltage CS18610 Isc A 1 75 8 12 14 VQ V Figure 14 Inhibit Voltage vs Temperature CS18630 Vinu V 1 25 Vu 4 5V 1 2 Vi2 5 3V lov loo 10mA 15 ON 14 05 OFF 1 0 0 95 0 9 50 0 30 70 1 0 TCC Figure 15 One Channel Inhibit Current vs Temperature CS18640 Ima uA VQ 4 5V Vip 5 3V lop lo2 1 OmA i O Az Cn eo 4 co w Vinn O

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