LINEAR LTM8032 Manual(1)(1)
Contents
1. A Linear Technology Magazine e March 2009 36 200mV DIV 200mV DIV AN122 F08 AN122 F09 2ns DIV 2ns DIV Figure 8 Diode Number 1 overshoots steady state Figure 9 Diode Number 2 peaks 750mV before settling forward voltage for 3 6ns peaking 200mV in 6ns gt 2x steady state forward voltage 200mV DIV 200mV DIV _ AN122 F10 2ns DIV 5ns DIV AN122 F11 Figure 10 Diode Number 3 peaks 1V above nominal Figure 11 Diode Number 4 peaks 750mV with lengthy 400mV VFWD a 2 5x error note horizontal 2 5x scale change tailing towards VFWD value 200mV DIV 5ns DIV 7 AN122 F12 Figure 12 Diode Number 5 peaks offscale with extended tailing note horizontal slower scale compared to Figures 8 thru 10 37 Anear Techno LI DESIGN IDEAS is deceptively simple in appearance In particular the current step must have an exceptionally fast high fidelity transition and faithful turn on time determination requires substantial measurement bandwidth Detailed Measurement Scheme Amore detailed measurement scheme appears in Figure 4 Necessary per formance parameters for various elements are called out A subnano second rise time pulse generator 1A 2ns rise time amplifier and a 1GHz oscilloscope are required These speci fications represent realistic operating conditions other currents and rise times can be selected by altering ap propriate parameter2. Ins TYPICALLY 5V TO 6V 30ns PULSE CURRENT WIDE so AMPLIFIER trise 2ns Zo PROBE DIODE UNDER gt TEST DESIGN IDEAS LY OSCILLOSCOPE 1GHz BANDWIDTH trise 350ps AN122 F04 Figure 4 Detailed measurement scheme indicates necessary performance parameters for various elements Subnanosecond rise time pulse generator 1A 2ns rise time amplifier and 1GHz oscilloscope are required EDGE PURITY PULSE W e INPUT 2pF TO 12pF EDGE PURITY LT1086 V TYPICAL 17V 22uF MINIMIZE INDUCTANCE IN ALL PATHS 2N3866 Sg 2N3375 TEN PARALLELED 50Q RESISTORS BYPASS EVERY TRANSISTOR WITH 22uF SANYO OSCON PARALLELED WITH 2 2uF MYLAR AN122 FOS Figure 5 Pulse amplifier includes paralleled darlington driven RF transistor output stage Collector voltage adjustment rise time trim peaks Q4 to Q6 Fr input RC network optimizes output pulse purity Low inductance layout is mandatory maximum allowable forward voltage The step down case limit is set by the switch pins maximum allowable reverse voltage Figure 2 indicates the diode requires a finite length of time to clamp at its forward voltage This forward turn on time permits transient excursions above the nominal diode clamp volt age potentially exceeding the IC s breakdown limit The turn on time is typically measured in nanoseconds making observation difficult A further complication is that the turn on over shoot
3. occurs atthe amplitude extreme of a pulse waveform precluding high resolution amplitude measurement These factors must be considered when designing a diode turn on test method Linear Technology Magazine e March 2009 Figure 3 shows a conceptual method for testing diode turn on time Here the test is performed at 1A although other currents could be used A pulse 1V DIV steps 1A into the diode under test via the 5Q resistor Turn on time volt age excursion is measured directly at the diode under test The figure 2ns DIV AN122 F06 Figure 6 Pulse amplifier output into 5 Rise time is 2ns with minimal pulse top aberrations 35 LI DESIGN IDEAS adodsoj I9s0 ZHNI pue aqoid gz 1egtdure astnd 10ze19u08 smd QUIT s puov soueuqns s pnjour JUSUIOSULIIL JUIUIINSLOUL UIT UO UIN PIVMIOJ porp o a duUIOD 1 IMSA YOLSISAY OS LV JGNLITdWY ASS HO JGNLITdINY HOLVHANAD ISINd LSNFAY S04 ZZLNY YVTAW JE HLIM a31311YYYd NOISO OANYS Nz HLIM YOLSISNVYL AU SSVdAd x SHOLSISAY GOS GATATIVEd NAL xx 4d09SOT110SO GLEENZ sdoge 29101 ZH9 GLAZ OLAZ 67VZ POLL XINOW DAL G00 gong VS 6evZ GcHL W Q o D o XINOYLYAL 29004 9Z o AGS aO 7 998ENZ SHLVd T1V NI J NYLINANI IZININIIN AUT 3903 suog HOA ddz OL 492 sdoog8 3818 YOLVYANID ISINd O29 YSLZ dH DO0L AUT 2007 A9 AL WIL INILISIY LSNFAY A Te 980111 fell ALL WOIdAL
4. I SWITCH ISWITCH l PIN OUTPUT VREG STEP DOWN Figure 1 Typical voltage step up step down converters Assumption is diode clamps switch pin voltage excursion to safe limits transitory overshoot voltage across the diode even when restricted to nanoseconds can induce overvoltage stress causing switching regulator IC failure As such careful testing is required to qualify a given diode for a particular application to insure reli ability This testing which assumes low loss surrounding components and layout in the final application measures turn on overshoot voltage due to diode parasitics only Improper AN122 F02 associated component selection and layout will contribute additional over stress terms Diode Turn On Time Perspectives Figure 1 shows typical step up and step down voltage converters In both cases the assumption is that the diode clamps switch pin voltage excursions to safe limits In the step up case this limit is defined by the switch pins PULSE IN trise lt 2ns AMPLITUDE 5V Vewp oF MEASUREMENT POINT DIODE UNDER TEST AN122 F03 Figure 2 Diode forward turn on time permits transient excursion above nominal diode clamp voltage potentially exceeding IC breakdown limit 34 Figure 3 Conceptual method tests diode turn on time at 1A Input step must have exceptionally fast high fidelity transition Linear Technology Magazine e March 2009 PULSE GENERATOR Joer lt
5. LI DESIGN IDEAS Diode Turn On Time Induced Failures in Switching Regulators Never Has So Much Trouble Been Had by So Many with So Few Terminals by Jim Williams and David Beebe This article is excerpted from the Linear Technology Application Note AN122 with the same title Introduction Most circuit designers are familiar with diode dynamic characteristics such as charge storage voltage dependent capacitance and reverse recovery time Less commonly acknowledged and manufacturer specified is diode forward turn on time This parameter describes the time required for a diode toturn on and clamp atits forward volt age drop Historically this extremely short time units of nanoseconds has been so small that user and vendor alike have essentially ignored it It is rarely discussed and almost never specified Recently switching regula tor clock rate and transition time have become faster making diode turn on time a critical issue Increased clock rates are mandated to achieve smaller magnetics size decreased transition times somewhat aid overall efficiency but are principally needed to minimize IC heat rise At clock speeds beyond about 1MHz transition time losses are the primary source of die heating A potential difficulty due to diode turn on time is that the resultant a oS IC BREAKDOWN LIMIT ia ON VOLTAGE DIODE TURN ON TIME AN Viy SWITCH PIN IC REGULATOR CONTROL I STEP UP IC REGULATOR 1
6. s The pulse amplifier necessitates careful attention to circuit configura tion and layout Figure 5 shows the amplifier includes a paralleled Dar lington driven RF transistor output stage The collector voltage adjustment rise time trim peaks Q4 to Q6 FT an input RC network optimizes output pulse purity by slightly retarding input pulse rise time to within amplifier passband Paralleling allows Q4 to Q6 to operate at favorable individual cur rents maintaining bandwidth When the mildly interactive edge purity and rise time trims are optimized Figure 6 indicates the amplifier produces a transcendently clean 2ns rise time output pulse devoid of ringing alien components or post transition excur sions Such performance makes diode turn on time testing practical Figure 7 depicts the complete diode forward turn on time measurement ar rangement The pulse amplifier driven by asub nanosecond pulse generator drives the diode under test AZO probe monitors the measurement point and feeds a 1GHz oscilloscope 3 Diode Testing and Interpreting Results The measurement test fixture prop erly equipped and constructed permits diode turn on time testing with excellent time and amplitude resolution Figures 8 through 12 show results for five different diodes from various manufacturers Figure 8 Diode Number 1 overshoots steady state forward voltage for 3 6ns peaking 200mV This is the best performance of the fi
7. ve Figures 9 through 12 show increasing turn on amplitude and time which are detailed in the figure captions In the worst cases turn on amplitudes exceed nominal clamp voltage by more than 1V while turn on times extend for tens of nanoseconds Figure 12 culminates this unfortunate parade with huge time and amplitude errors Such errant excursions can and will cause IC regulator breakdown and failure The lesson here is clear Diode turn on time must be characterized and measuredin any given application to insure reliability 7 Notes 1 Analternate pulse generation approach appears in Linear Technology Application Note 122 Appendix F Another Way to Do It 2 ZO probes are described in Linear Technology Ap plication Note 122 Appendix C About ZO Probes See also References 27 thru 34 3 The subnanosecond pulse generator requirement is not trivial See Linear Technology Application Note 122 Appendix B Subnanosecond Rise Time Pulse Generators For The Rich and Poor 4 See Linear Linear Technology Application Note 122 Appendix E Connections Cables Adapters Attenuators Probes and Picoseconds for relevant commentary 5 See Linear Technology Application Note 122 Ap pendix A How Much Bandwidth is Enough for discussion on determining necessary measurement bandwidth LTM8032 continued from page 33 amount of ambient noise in the room Figure 3 shows the noise spectrum in the chamber
8. without any devices run ning This can be used to determine the actual noise produced by the DUT Figure 4 shows the worst case LTM8032 emissions plot which oc curs at maximum power out 10V at 90 80 aon OGO E EMISSIONS LEVEL dBuV m o 38 8S 10 O 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz 2A from the maximum input voltage 36V There are two traces in the plot one for the vertical and horizontal orientations of the test lab s receiver antenna As shown in the figure the LTM8032 easily meets the CISPR 22 class B limits with 20db of margin for most of the frequency spectrum with either antenna orientation EN55022 CLASS B a Ki ell LI gt o LIMIT 30 na 2 lu Figure 3 The baseline measurement of ambient noise in the 5 meter chamber no devices operating 38 Conclusion The LTM8032 switching step down regulator is both easy to use and quiet meeting the radiated emissions re quirements of CISPR22 and EN55022 class B by a wide margin 7 Authors can be contacted at 408 432 1900 EN55022 cm anal B LIMIT 20 10 0 2 SS SS SS SS SS ES 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY MHz Figure 4 The LTM8032 emissions for 20W out Z Linear Technology Magazine e March 2009
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LINEAR LTM8032 Manual(1)(1)