LINEAR LT3692A Manual
Contents
1. 200ns DIV Figure 8 4 phase converter switch waveforms 14 April 2011 LT Journal of Analog Innovation LT3692A circumvents dropout limita tions by keeping the monolithic high side switch on for multiple switch cycles only terminating the extended switch cycle when the boost capacitor needs to be recharged This unique dropout switch ing technique allows the LT3692A to SW1 5V DIV SW2 5V DIV INPUT RIPPLE 472mVp_p 200mV DIV RT SYNG J x mie 400ns DIV Figure 9 Dual 14 4V 8 5V 14 4V 3 3V with standard 180 phase shift between channels achieve up to a 95 maximum duty cycle independent of switching frequency The graph in Figure 11 compares the dropout performance of a LT3692A to a similar buck converter at 200kHz and 2MHz Both converters show similar dropout performance at 200kHz however at SW 5V DIV SW2 5V DIV INPUT RIPPLE g 160mVp_p 200mV DIV RT SYNG 2V DIV Figure 10 Dual 14 4V 8 5V 14 4V 3 3V with 256 phase shift between channels shows significant reduction in input voltage ripple Phase shift is programmed by the duty cycle of the input synchronization signal design features 2MHz the LT3692A4 regulates the output to 5v at a much lower input voltage NEVER SKIP A PULSE High frequency switching permits smaller components but i2. Figure 5 RATIOMETRIC START UP VouTt 0 5V DIV PG1 VouT2 0 5V DIV PG2 10ms DIV shows various output start up wave forms and their associated schematics The ss pins also double as independent channel shutdown pins Pulling either channel s soft start pin below 115mv dis ables switching for that channel PROGRAMMING THE SWITCHING FREQUENCY Programming the LT3692A switch ing frequency could not be easier The RT SYNC pin accurately sources 12pA so only a single resistor Rcpy is required to set the pin voltage and thus the switch ing frequency as given by the following Reet kQ 1 86E fogw 0 0281 fsw 1 76 with the switching frequency fsw in kHz for frequencies between 150kHz and 2 25MHz To avoid start up problems the LT3692A limits the minimum switch ing frequency to a typical value of 110kHz This feature coupled with adding a small capacitor in parallel with the frequency programming resistor ABSOLUTE START UP 10ms DIV adds a user programmable frequency foldback function during start up ELIMINATE THE CLOCK More rails mean more converters If any of those converters are operating at dif ferent frequencies then the interference beat frequencies produce radiated and conducted EMI in addition to the switch ing fundamental and harmonic frequen cies For example
3. even its own synchronized switching frequency Referring to Figure 2 the LT3692A enters shutdown if SHDN1 is below 1 3V or Vini falls below 2 8v protecting bat tery powered systems from excessive discharge All internal regulators are controlled by channel 1 effectively shutting down the entire 1c if channel 1 enters shutdown With sufficient Vy volt age Channel 1 is allowed to operate if SHDN1 exceeds 1 3v The single voltage divider composed of the R1 R2 or R3 R4 combination controls the UVLO levels The circuit in Figure 3 shows how the LT3692A can be configured for programmable UV OVLO on one channel while utilizing the default UV ovLo pro tection on the other channel A shutdown UV OVLO or overtemperature condition causes an internal power on reset latch to be enabled discharging the soft start and Vc pin capacitors This latch remains set until the shutdown condition terminates whereupon the LT3692A initi ates a full start up sequence The soft start voltage waveforms in Figure 4 show how the calculated Uv ovLo limits in Figure 3 protect the LT3692A during undervoltage and overvoltage power supply transients Figure 3 Dual converter with default and programmable UV OVLO VIN 6V TO 36V LIF L2 UVLO 2 8V MINIMUM INPUT VOLTAGE PG 100k D1 D4 CMDSH 4E D2 D3 B340 R5 274k OVLO 28V R6 7 15k VouT2 3 3V 2A 1MHz CLOCKOUT L1 IHLP2525CZER4R7M01 Q1 2N3904 L2 IHL
4. voltage may drop close to and sometimes below the regulated output voltage During a low input voltage condition the converter should supply an output voltage as close to the regula tion voltage as possible in order to keep the output running Ideally in such cases the switching regulator would run at 100 duty cycle simply passing the input to the output but this is not possible because of the minimum switch off time which limits the switching duty cycle April 2011 LT Journal of Analog Innovation 13 Oo O The LI 3692A tolerates low line conditions as well thanks to an enhanced dropout scheme which maintains greater than 95 maximum duty cycles regardless of switching frequency VIN 5V TO 28V 2 OUF 37 4k r x4 13k D1 D4 D5 D8 CMDSH 4E D2 D3 D6 D7 B340 L1 L2 L3 L4 IHLP2525CZER2R2M01 0 22uF L2 y D8 2 24H VOUTI 100k 120 C TEMP FLAG FB1 35 7k Figure 7 3 3V 10A 4 phase converter with UVLO power good 120 C junction temperature flag and minimal input current ripple Because the minimum switch off time is a fixed value the maximum switch ing duty cycle can be increased simply by decreasing the switching frequency but a lower switching frequency neces sitates larger filter components to achieve low output voltage ripple The SW1 ait 10V DIV aaa SW2 10V DIV SW3 10V DIV sw4 10V DIV
5. 1 LT Journal of Analog Innovation design features A cascaded topology allows for increased operating frequencies while avoiding undesirable pulse skipping that can occur at high step down ratios Ripple is also reduced This allows the design to use significantly smaller inductors and capacitors o LT3692A in the QFN package _ Limiting the output current of each channel allows for the use a ST rH Pe LT3692A in the TSSOP package FBe GO AFTIR of smaller power components B Js Nim 7 bee F layout of the circuit in Figure 15 With the LT3692A s built in frequency divider each channel can easily be set to operate at an independent frequency In this design the low voltage channel operates at high frequency without worrying about pulse skipping This allows the use of small package capacitors and inductors Figure 16 Comparison of two designs for a dual output 3 3V 2 5A and 1 2V 1A converter using the LT3692A The smaller version of the circuit saves board space by taking advantage of features that the larger circuit does not including current limiting the outputs cascading the channels and running the two channels at different switching frequencies The LT3692A remedies this problem by providing an independent current limit pin ILIM If full output current capabil ity is not needed on one or both channels the user selectable current limit allows the use of smaller cheaper co
6. OS O Monolithic Dual 3A Input Output Buck with 3V 36V Operating Range simplifies and Shrinks DC DC Converters in Automotive Industrial and Distributed Power Applications Jonathan Paolucci Automotive industrial and distributed power supplies often require buck converters to step down their poorly regulated outputs to produce the plurality of rails used by low voltage mixed signal systems These supplies subject the step down converters to a vast assortment of supply voltage transients underscoring the need for rugged and efficient buck converters that provide tightly regulated outputs from a wide range of input voltages The LT3692A a monolithic dual 3A step down converter satisfies power demands imposed by these systems Its wide 3V 36V input operating range and overvoltage transient protection up to 60V allows it to easily reign in unruly automotive or industrial sources Flexible configuration options allow the designer to power the LI 3692A from one or two separate input supplies while producing two independent outputs or to parallel the outputs to create one high current supply A TRUE DUAL SWITCHER input voltages output voltages current The LT3692A simultaneously offers high limits power good outputs soft start performance high power uncompromis undervoltage lockouts and even differ ing features and high voltage operation ent synchronized switching frequencies in a dual monolithic switching converter Independent programmab
7. P2525CZER3R3M01 UNDERVOLTAGE AND OVERVOLTAGE CALCULATIONS Vint DEFAULT UV AND OV UVLO 2 8V MINIMUM INPUT VOLTAGE OVLO 38V R1 0Q R2 OPEN FIG 2 Vine Vine UVLO 8V SHUTDOWN THRESHOLD 1 3V CMPI THRESHOLD 0 72V R4 R3 R4 1 3V 8V R4 13 3k R3 68 1k OVLO 28V R6 R5 R6 0 72V 28V R6 7 15k R5 274k April 2011 LT Journal of Analog Innovation 11 INDEPENDENT START UP PROGRAMMABLE POWER GOOD AND START UP SEQUENCING The L13692A provides access to the posi tive inputs of the power good PG com parators via the cmPI pins Each negative comparator input is fixed at 0 72v to allow tying of the input to the feedback pin 806mvV reference for a standard 90 power good signal Other inputs divided down could come from the internal junction temperature pin Ty for overtemperature indication or the input voltage to indicate input power good The comparator output could be tied to one of the soft start pins to disable a chan nel the Div pin to change the frequency the ILIM pin to reduce the current or any external device to communicate informa tion These comparators are versatile and allow for custom compact solutions Start up sequencing and control is vitally important in modern electronics Complex output tracking and sequencing between channels can be implemented using the LT36924 s ss and PG pins
8. a converter switching at 1 015MHz and a converter switching at 1 005MHz combine for a beat frequency of 10kHz right in the audio band SS1 500mV DIV SS2 500mV DIV VIN 5V DIV 100ms DIV Figure 4 Soft start voltage during UVLO OVLO 12 April 2011 LT Journal of Analog Innovation design features OUTPUT SEQUENCING Vout 0 5V DIV VouT2 0 5V DIV PG1 PG2 10ms DIV Beat frequencies can easily interfere with any signal path with similar frequen cies Traditionally the solution involves synchronizing the converters by means of an external oscillator The LT3692A out puts a o to 2 5V square wave on the CLOCKOUT pin which matches its free run ning internal oscillator or the signal on the RT SYNC pin Since the LT3692A can be used as an oscillator source this eliminates the need for an external oscillator reducing cost and solution footprint The circuit in Figure 7 shows how the CLOCKOUT signal 2500 2250 2000 1750 1500 1250 1000 CLKOUT FREQUENCY kHz 0 10 20 30 40 50 60 RT SYNC RESISTANCE kQ 70 80 Figure 6 Switching frequency vs RT SYNC resistance CONTROLLED POWER UP AND DOWN 10ms DIV can synchronize two LT3692A converters operating at 1MHz A single high cur rent 3 3V 10A output rail
9. an still use a small inductor and output capacitor for that channel Here channel throughout the input range while minimizing channel 2 5V runs four times faster than channel 1 1 8V by setting the DIV pin to 1 2V component sizes on each channel e The overall solution takes much such as the inductors and diodes must be in order to ensure safe functionality By less space than multi 1c solutions sized to withstand steady state overload sizing the external components for fault conditions as well If the maximum load conditions rather than typical operatin ONE SIZE DOESN T FIT ALL i aia Tee OB an drawn from a buck output is 1A but the conditions the overall solution tends to Even if a switching regulator such as the a l l buck converter s internal current limit is be oversized and unnecessarily expensive LT3692A can safely withstand overload set to 4A then all external components conditions all the external components must be rated for the maximum 4a load Figure 15 A 3 3V and 1 2V dual 2 stage converter Figure 17 Current limit programming with ILIM voltage VIN 4 5V TO 35V D4 D3 Vout2 0 1pF L2 A IL Vouti 0 5uH VouT2 1A DIV 3 3V 2 5A ae ILIM2 550kHz 100pF A7UF at 500mvV DIV FB1 gk 10ms DIV m ms CLOCKOUT 0 1uF 33 2k D1 D4 CMDSH 4E L1 IHLP2525CZER4R7M11 D2 B340 L2 XPL2010 0 5uH D3 PD3S220L 7 16 April 201
10. dual converter at the lower frequency chosen to avoid pulse skipping on the 1 8v channel the 5v channel requires inductor and capaci tor values that are three times larger than it would if run at the higher frequency The LT3692A avoids this predicament by adding a piv pin that divides the clock by 1 2 4 or 8 allowing channel 1 to run at a lower synchronized frequency Figure 13 shows an application that runs at 250kHz and 1MHz for the low voltage and higher voltage channels respectively Figure 14 shows the switching waveforms If channel 1 Voyr 1 8V runs at 1MHz the maxi mum input voltage for constant output voltage ripple is only 15v but at 250kHz the maximum voltage for constant output ripple exceeds the LT3692A overvoltage limit of 38v Table 1 shows the maximum VouT fow 1MHz PULSE SKIPPING 20mV DIV Vout fsw 250kHz FULL FREQ 20mV DIV 2us DIV Figure 12 Many regulators will enter pulse skipping mode when they can t support the large step down ratio that occurs when the input voltage rises too high The pulse skipping solution is automatic and easy but it significantly increases output noise input voltage for constant output voltage ripple for various switching frequencies INDEPENDENT SUPPLY INPUTS Separate input supply pins Vin1 Vin2 allow the LT36924 s two channels to be operated in cascade with the out put of one buck po
11. ed frequency operation spans 250kHz to 2 25MHz and a synchronized clock output allow multiple regulators to be synchronized to the LT3692A A unique clock divide feature optimizes solution design features Figure 2 Block diagram shows undervoltage and overvoltage lockout functionality of the LT3692A size efficiency and system cost by per mitting channel 1 to operate at a syn chronized frequency 1 2 4 or 8 times slower than the master clock frequency The combination of a wide feature set and independent channel operation simpli fies complex power supply designs UNDERVOLTAGE AND OVERVOLTAGE LOCKOUT A switching regulator appears as negative impedance to the source potentially caus ing a latched fault if the source voltage drops and the regulator draws increasingly more current Programmable undervolt age lockout UVLO offers an easy way to avoid this problem by preventing the buck converter from drawing current if the input voltage is too low to support full load operation Overvoltage lock out OVLO on the other hand prevents the converter from operating above its desired range A default undervoltage and overvoltage lockout is internally set to 2 8v and 36y respectively but can be programmed to any value The two buck channels of the LTG692A are completely independent Each can have its own input voltage output voltage current limit power good output soft start ramp undervoltage lockout and
12. hic 3 8A switches into a 38 lead exposed pad TSSOP or a 5mm x 5mm 32 lead exposed pad QEN package The two channels operate independently mak ing it possible to produce two high performance buck converters with one part thus minimizing circuit size and simplifying complex designs Separate soft start current limit power good and UV OVLO features enable the designer to address unique power sharing solution area and start up sequencing require ments With a wide operating range and a rich feature set the LT3692A easily tackles a wide variety of automotive industrial and distributed supply challenges m Notes Many thanks to Scott McClusky for his assistance in producing this article D4 0 1uF D3 D4 ZETEX BAT54S Figure 21 Negative rail generated from CLOCKOUT 18 April 2011 LT Journal of Analog Innovation
13. is created by connecting the Vout FB SS and Ve pins between the two LT3692As Additionally the finite synchronization signal to switch delay allows the four channels to be synchronized with a 90 phase shift between each channel shown in Figure 8 reducing the output voltage ripple and bulk input and output capacitances LT3692A SYNCHRONIZATION The LT3692A RT SYNC input offers a unique synchronization feature the duty cycle of the input synchronization signal controls the switching phase difference between the two channels Channel 1 s rising switch edge synchronizes to the rising edge of the signal channel 2 s rising switch edge syn chronizes to the falling edge of the signal By varying the synchronization duty cycle the LT3692A dual switches can be operated anti phase and in some cases non overlap ping effectively reducing the input current ripple and required input capacitance Vout 0 5V DIV VouT2 0 5V DIV Figure 5 Soft start pin configurations For example the input ripple volt age shown in Figure 9 has a peak of 472mV for a typical anti phase dual 14 4V to 8 5V and 14 4V to 3 3v regula tor Figure 10 shows that the input ripple voltage is decreased to 160mvV by driv ing the LT3692A with a 71 duty cycle synchronization signal to generate a 256 phase shift between the channels DROPOUT ENHANCEMENT Switching regulator dropout performance is vitally important in systems where the input
14. le undervoltage The two buck channels of the LT3692A lockout permits a customizable operat shown in Figure 1 are completely inde ing range within 3v to 36v while with pendent The channels can have different standing up to 6ov input transients Figure 1 Compact dual output converter produces 5V 2A and 3 3V 2A outputs from a 6V 36V input VIN 6V TO 35V 4 7UF 5i 0 22uF A D2 E ae A 0 22uF Vourt 6 8uH D4 VouT2 3 3V 2A TTE 5V 2A 600kHz u 100pF 100pF 47yF 600kHz 100k 100k 8 06k ILIM2 CLOCKOUT 0 1 330pF 600kHz 47pF 0 1F 36 5k 49 9k D1 D4 CMDSH 4E L1 IHLP2525EZER5R6M01 D2 D3 B340 L2 IHLP2525EZER6R8M01 10 April 2011 LT Journal of Analog Innovation The LT3692 lt tolerates low line conditions as well thanks to an enhanced dropout scheme which maintains greater than 95 maximum duty cycles regardless of switching frequency Two independent programmable output current limits minimize component size and provide overload protection while independent soft start eliminates input current surges during start up Channel independent internal thermal shutdown circuitry lends additional overload protection by allowing one switcher to continue operating despite a brief overload on the other channel Programmable power good pins com bined with a die junction temperature output pin greatly simplify power sequencing and the task of monitoring the LT3692A supply Adjustable or synchro nized fix
15. mponents Each channel s current limit can be set from 2A to 4 8A by the ILIM pin volt age An accurate 12pA internal cur rent source allows the current limit to be programmed with a single external resistor or voltage on the ILIM pin The ILIM pin may be grounded as well limit ing the maximum output current to 2A This feature allows the user to imple ment current foldback during start up simply by placing a small value capaci tor in parallel with the current limit programming resistor The 12pA internal current source charges the optional ILIM cap from zero volts to its final steady state value allowing the current limit to gracefully ramp from 2A to 4 8A Board space is significantly reduced by using the ILIM feature as shown in Figure 16 By employing the ILIM pin function as well as operating the chan nels in cascade with independent switch ing frequencies the power components from the circuit in Figure 15 reduce board space 3 fold underscoring the usefulness of the ILIM pin OVERLOAD CONDITIONS If the load exceeds the maximum output current the output voltage drops below the normal regulation point The drop in output voltage activates the Vc pin clamp and discharges the ss capacitor lower ing the ss voltage The LT36924 regulates the feedback voltage to the lowest volt age present at either the ss pin or the internal 806mV reference As a result the output is regulated to the high est voltage tha
16. pera ture At a junction temperature of 25 C the Tj pin outputs 250mV and has a slope of 10mV c Without the aid of external cir cuitry the T pin output is valid from 20 C to 150 C with a maximum load of 100pA To extend the operating temperature range of the Tj output below 20 c connect a resistor from the T pin to a negative supply as shown in Figure 20 The nega tive rail voltage and Tj pin resistor may be calculated using the following equations 2 TEMPyin C Vuege lt l sk 100 Vec R1 lt 33A Vine 5V 1uF 2A MAX SHDN1 D3 0 1uF 2 2uH ae VOUTI D1 D4 D5 CMDSH 4E D2 D3 B340 Vor CLOCKOUT L1 L2 IHLP2525CZER2R2M01 2MHz 36 5k where TEMPyyn is the minimum tem perature where a valid 1 pin out put is required Vygg regulated negative voltage supply For example TEMPyqiy 40 C Vyeg lt 0 8V Veg 1 R1 lt Mves 30 2k 33A The simple charge pump circuit in Figure 21 uses the CLOCKOUT pin output to generate a negative voltage eliminat ing the need for an external regulated supply Surface mount capacitors and dual package Schottky diodes mini mize the board area needed to imple ment the negative voltage supply Figure 20 Circuit to extend Tj operating region INPUT POWER W Figure 19 Power draw from two sources for single output CONCLUSION The LT3692A squeezes two complete regulators including dual monolit
17. t also means shorter pulse widths Buck converters have inherent minimum on times that prohibit high step down ratios at high frequency When the input voltage rises too high the converter skips a pulse Though using the built in pulse skipping inherent in many buck converters sounds appeal ing the output voltage ripple suffers significantly as shown in Figure 12 Pulse skipping can be avoided by reduc ing the switching frequency but in a dual converter one channel may benefit from switching at a higher frequency than the other channel For instance consider a dual buck converter with an input volt age range of 7V to 36v and output volt ages of 5vand 1 8v At the high end of the input voltage range the switching Vout V oo 113692A 200kHz 1 We LT3692A 2MHz x BUCK 200kHz BUCK 2MHz 3 4 5 6 7 8 9 Vin V Figure 11 The LT3692A dropout enhancement feature improves dropout performance over a standard buck regulator at high switching frequencies Separate input supply pins Vin4q Vino allow the LTG692A s two channels to be operated in cascade with the output of one buck powering the input of the other A cascade configuration allows high input output ratios at high frequencies while simultaneously creating two rails frequency required to avoid pulse skip ping on the 5v channel is almost three times greater than that required by the 1 8v channel By running a
18. t the maximum output current can support Once the over load condition is removed the output soft starts from the temporary voltage level to the normal regulation point Figure 17 shows the output voltage and inductor current for the 1 2v channel in Figure 15 when loaded by a 0 20 load As the ILIM pin voltage is varied from ov to 1 5V the output voltage is regulated between o 32V and o 96v limiting the cur rent between the range of 1 6A and 4 8A WATTS FROM HERE AND WATTS FROM THERE Ever wanted to draw power from a rail but needed just a few more watts A last minute increase in power require ments leaves you stuck in a bind Now you can draw power from two different sources with programmable limits for each source The independent v y and ILIM pins allow the two independent input supplies in Figure 18 to be programmed to different current limits With the ss Vc and Voyrz pins tied together the two inputs serve a single output rail The April 2011 LT Journal of Analog Innovation 17 12V 4 7 UF 13k 0 22uF ae D1 F A 2 0 2 2uH 0 1uF Figure 18 Dual input single 3 3V output converter power drawn from each rail is shown in Figure 19 This solution provides flexibility in rail voltages and utiliza tion of available power making it easy to solve power sharing problems ALWAYS KNOW YOUR JUNCTION TEMPERATURE The LT3692A T pin outputs a voltage pro portional to the internal junction tem
19. wering the input of the other A cascade configuration allows high input output ratios at high frequencies while simultaneously creating two rails For instance the converter in Figure 15 is designed for 3 3V 2 5A at 550kHz and 1 2V 1A at 2 2MHz across the full input voltage range The benefits of cascading both convert ers on the same chip are numerous e The switching frequency is already synchronized with anti phase switching to reduce ripple e Custom start up options are readily available e Pulse skipping mode is easily avoided FREQUENCY RT SYNC VIN MAX kHz kQ V 290 9 90 36 500 13 0 30 1000 28 0 jes 1500 44 2 10 2230 69 8 6 Table 1 Maximum input voltage for constant output voltage ripple Vout 1 8V April 2011 LT Journal of Analog Innovation 15 VIN 6V TO 36V VOUTI VouT2 1 8V 2A 5V 2A 250kHz 47yp MHz 100k PG1 PG2 Swi ILIM1 10V DIV CLOCKOUT 0 1pF 1MHz 330pF 33pF 0 1uF sw2 10V DIV 36 5k l D1 D4 CMDSH 4E L1 IHLP2525CZER6R8M11 gol D2 D3 B340 L2 IHLP2525CZER3R3M01 pa Figure 13 The LT3692 can avoid pulse skipping by decreasing the operating frequency of its low voltage Figure 14 A 5V and 1 8V dual multi frequency channel while leaving the higher voltage channel at a higher frequency By running the higher voltage channel converter avoids pulse skipping mode for each at a higher switching frequency one c
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LINEAR LT3692A Manual