LINEAR LTC4425 Manual
Contents
1. scavenged from the supercapacitor If the supercapacitor is initially charged to 5v then the energy in the supercapacitor is sv 0 56F 052 6 875 The output power is 3 33V at 0 2A 0 67W so the percentage of the energy stored in the supercap that is extracted with a buck only circuit is ELOAD _ 0 67 4 68s __ 45 1 ECAP 6 875 The percentage of the energy stored in the supercap extracted when the boost regulator is enabled is ELOAD _ 0 67 7 92s _77 ECAP 6 875 The percentage of energy stored in the supercapacitor that is recovered increases from 45 1 to 77 This allows use of a smaller less expensive supercapacitor CONCLUSION The power ride through system shown here uses a 0 55F supercap to hold up power long enough for a microcon troller to complete some last gasp housekeeping tasks One way to extend the ride through time for a given super capacitor is to add a boost regulator to the system which allows for energy scavenging The run time of a given supercapacitor can be extended by gt 30 if energy scavenging is used This is particularly relevant if the superca pacitor operating voltage is reduced to ensure high temperature reliability In addition the shape of the output voltage is considerably improved as the input voltage to the output regula tor is now square in shape This results in a steady 3 3V output voltage with a sharp cutoff instead of a2. ramped volt age drop as the supercap drains m January 2012 LT Journal of Analog Innovation 31
3. PF PROG PFI PGOOD E COMPARATOR 1 2V RpF2 PFI PFI_RET COMPARATOR FB Vio a EN R J CHARGER FB2 ENABLE PFO fal GND January 2012 LT Journal of Analog Innovation 15 Ooo O The maximum working voltage on a single supercapacitor is 2 V or less Because most systems require operating voltages higher than this many supercapacitors are supplied as a pair of capacitors within a single center tapped package The LITC4425 is designed to to charge stacked supercapacitors and provide a regulated output voltage for the system load supplied as a pair of capacitors within a single center tapped package The LTC4425 is designed to charge two stacked supercapacitors and provide a regulated output voltage for the system load THE LTC4425 ARCHITECTURE The LTC4425 has two modes of operation Normal and LDO Normal Mode In Normal mode the LTC4425 can be thought of as an ideal diode with current limit and supercapacitor specific func tions see Figure 1 If we ignore everthing but the ideal diode controller MPSNS and MPSw the LTC4425 behaves like an ideal diode Mpsw is turned on whenever Voyr iS lower than vin by more than 15mv A fraction 1 1000 of the current in the Vout pin is impressed on the resistor attached to the PROG pin and the resultant voltage is compared to a reference voltage When the voltage on the PROG pin reaches the reference voltage no additional cur rent is allowed to flow out of the Voyr p
4. balanced during charging because one capacitor in the stack is larger or smaller than the other For the same charge cur rent the larger capacitor will be a lower voltage than the smaller capacitor So the smaller capacitor may activate its volt age clamp before the larger capacitor finishes charging unbalancing the stack The LTC4425 detects any imbalance in the stacked supercapacitors by comparing Vmp to Vout When the LTC4425 detects an imbalance it sinks or sources current from the Vmp pin to balance the Ssupercapacitor Figure 3 Charging 2 cell series supercapacitor from Li ion source PFO monitors Vij such that power is only switched to the supercap if Vij fails The leakage balancer will then engage and slowly bring the stack back into balance PFO Output The LTC4425 monitors and reports conditions of Vn and Voyr depending on the mode PFO goes low if the PFI pin is below 1 2v or Vin Vout gt 250mvV in Normal mode or Vpg lt 1 11V in LDO mode so PFO can be used to switch the load to the supercapacitor if there is a loss of v y see Figure 3 This is especially useful if the load cur rent is much higher than the maximum current the LTC4425 can supply PFO can be used to switch the load to the super capacitor only in the absence of viy Note that PFO monitors either an input fault or it indicates a low output voltage at the FB pin If the FB pin is grounded that is setup in LDO mode
5. design features oupercapacitor Charger and Ideal Diode for Power Supply Ride Through systems George H Barbehenn Supercapacitors capacitors with up to 100F of charge storage are emerging as an alternative to batteries in applications where the importance of power delivery trumps that of total energy storage Supercapacitors have a number of advantages over batteries that make them a superior solution when short term high power is needed such as in power ride through applications These advantages include lower effective series resistance ESR and enhanced durability in the face of repeated charging Like batteries supercapacitors have Supercapacitor technology can now capacitors is 2 7v or less Because most some specialized application needs that offer capacitors as large as 100F but systems require operating voltages higher make using a dedicated tc desirable the maximum working voltage on these than this many supercapacitors are Figure 1 Block diagram 2 of the LTC4425 MPSNS Vout lt x gt BANDGAP SNEEN Vout REFERENCE IDEAL DIODE CONTROLLER CHARGE CURRENT PROFILE GENERATOR 10X ai e a VOLTAGE CLAMP 3 CIRCUITRY EN NSHUNT CONSTANT VOLTAGE CONSTANT CURRENT CONSTANT TEMPERATURE CHARGER CIRCUITRY Ww jes GE oO Ww as jee lt a5 oO Vout 2 250mV 750mV V n VouT LEAKAGE BALANCER Vin Vout VSEL ViN COMPARATOR E VIN F Vout 250mV D OSCILLATOR Vel 2 7V 2 45V R
6. egula tor is reached One goal in the design Vsc AND k or VIN BUCK ese Veg AND 1 DIV Vin BUCK VDD 1V DIV 3V3 2V DIV 1s DIV Figure 6 If the boost regulator is disabled in the circuit of Figure 4 the ride through applications can support a 0 67W load for about 4 68s is to minimize the amount of time that the boost regulator is used in the power chain because each additional regulation step lowers the overall efficiency Here we set the boost regulator output volt age as close to the buck regulator input dropout voltage as possible or 3 4V The boost regulator must have a syn chronous output to maximize efficiency once the boost regulator engages This continued on page 31 Vsc AND VIN BUCK 1 DIV VDD 1V DIV 3V3 2V DIV 1s DIV Figure 7 With boost regulator enabled in the circuit of Figure 4 the ride through applications can support a 0 67W load for about 7 92s January 2012 LT Journal of Analog Innovation 19 design ideas Zeners in the 250mW to 500mW range are capable of absorbing the peak current generated by a 150V 10us spike Higher voltage and longer duration spikes may be accommodated by larger devices bias is conveniently obtained from the shunt regulated Vcc pin without the need for any extra components making this useful configuration a very simple modification of the basic circuit Under normal conditions the 48v inputs are at or near the V
7. in In Normal mode the regulation function is not controlled by the output voltage alone but by Vin Vout see Figure 2 Normal mode is selected by connecting the FB pin to Vix In Normal mode as long as Vin Vout IS greater than o 75v the charge current is 1 10 the programmed value As the Vin Vour voltage decreases from 0 75V to 0 25V the charge current increases linearly to the programmed value at Vin Vout 0 25V For Vix Vour voltages less than 0 25v but greater than 15mvV the Vout Current is 1000 Rproc and can be as high as 2A However the Mpsw device 1 10 CHARGE CURRENT CHARGE CURRENT A 0 0 0 2 0 4 0 6 0 8 1 Vin Vout V Figure 2 Supercapacitor charge current profile in Normal mode is designed to prevent inrush currents has an Rpgony Of approximately 50mQ so when Vyn Vout is small enough this resistance may limit the current For Vin Vout Voltages less than 15mvV the ideal diode shuts off reducing the current out of Voyr to a small leakage current LDO Mode In LDO mode the regulation function is not controlled by vin Vourn but by feedback from the output voltage LDO mode is chosen by connecting an output voltage divider to the FB pin to set the maxi mum output voltage In LDO mode the LTC4425 behaves like a voltage regulator supplying up the programmed current to the load and to charge the superca pacitor If the supercapacitor is at the desired v
8. n and feeding requirements are substantial time from input power off to output Supercapacitors on the other hand ue i gece 3 MaS waa regulator voltage dropping to 3V is 4 68s ator that produces 3 3v The LTc441 are E tee nOn PON E rovides a a o o E abla biaadial ales ride through applications Their low P a A LTC3539 boost circuit is operational Run to ensure maximum efficiency when source impedance allows them to sup ee onie ce patie time from input power off to output ply significant power for a relatively regulator dropping to 3V is 7 92s supercap The LTc3539 is a micropower 18 January 2012 LT Journal of Analog Innovation design features One way to extend the ride through time for a given Supercapacitor is to add a boost regulator to the system which allows for energy scavenging The run time of a given supercapacitor can be extended by gt 30 if energy scavenging is used When the L1c3539 boost regulator is disabled as soon as input power falls the Lt1c4416 based ideal diodes switch the input energy supply for the LTC3539 buck regulator to the super cap In Figure 6 the voltage across the supercap Vcc linearly decreases due to the constant power load of 200mA at 3 3V on the buck regulator Voyz When the input voltage to the LTc3539 reaches the dropout voltage of the regulator the output voltage is seen to track the input voltage At 4 68s after input power removal the voltage on the supe
9. n each of the stacked output supercapacitors from Vout tO Vum and from Vyp to ground The purpose of these voltage clamps is to ensure that the supercapacitors can not be charged above their rated volt ages The clamp voltage on each of the 16 January 2012 LT Journal of Analog Innovation design features stacked supercapacitors can be selected to be 2 45V or 2 70V via the SEL pin Suppose that the input voltage is 6v and the FB pin is grounded so that the LTC4425 is in LDO mode and try ing to charge the supercapacitor to the input voltage The clamps will activate whenever either of the stacked super capacitors exceed the clamp voltage To keep the power dissipation in the clamp circuitry in check the LTC4425 automatically reduces the charge cur rent to 1 10 of the programmed value whenever either of the stacked superca pacitors approaches the clamp voltage Leakage Balancer The Lrc4425 detects any imbalance in the stacked supercapacitors by comparing Vm p tO Vour When the Lrc4425 detects an imbalance it sinks or sources current from the Vmm pin to balance the supercapacitor The Lrc4425 leakage balancer is primarily intended to account for the effects of self or system leakage and so the maximum sink or source current is around 1mA Nevertheless the interaction of the volt age clamps and leakage balancer will eventually correct even quite large imbal ances The supercapacitor may become un
10. oltage the LTC4425 contin ues to supply the load current up to the programmed maximum current If the desired supercapacitor voltage is as close to Vy as possible then ground the FB pin This means that the loop will never reach regulation but the output voltage will track the input voltage within 15mV or Iyout X Rpsion Whichever is larger The Lrc4425 limits the current available to the Voyr pin Usually this current is used to charge the supercapacitor but could also go to a load In LDO mode the current is limited in two ways the PROG pin and thermal limiting The proG reference voltage used in LDO mode is 1V and the fraction of the Vour current that is impressed on the resistor attached to the PROG pin is 1 1000 So the current limit is 1000 Rproc and can be as high as 24 If one imagines charging a 100F capacitor even at 2A the voltage changes at 2omV s And during this charging process there is significant dissipation usually several watts If a portion of the Voyy current is going to a system load then the time to charge the supercapacitor is extended The LTC4425 has a linear thermal regulation loop that limits the current from Voyz such that the die temperature remains below 105 c This is a linear circuit meant for usage under normal operat ing conditions not a protection circuit that is only there to prevent damage LTC4425 FEATURES Voltage Clamps There are voltage clamps o
11. plete supercapacitor based power ride through system ICHARGE 1000 R ICHARGE 2A Csc 550mF 5 5V CAP XX HS206F x1 x2 x3 OR x4 L1 1H LPS4018 102MLC L2 2 2uH LPS4018 222MLC G1 VIN BUCK V1 E1 LTC4416 oe 10uF GND V RUN 3 3 E2 LTC3606 RLIM PGOOD 54 9k 1 21M M1B v2 Si7913DN FB GND GND1 EPAD VIN SHDN SW 267k LTC3539 MODE VOUT 22uF 2 INSERT JUMPER L T TO BYPASS BOOST CONVERTER GND PGND EPAD 1 0eM 562k Ride through applications can certainly be short time and they are consider boost regulator with output disconnect implemented with battery backup but in ably more robust than batteries This boost regulator operates down to many cases it requires a very large battery o 5V and can support loads of 1 34 x Ride Through Application Setup array to satisfy the ride through power Vout Vin at its output The supercapacitor Figure 4 shows a complete power inter l l requirements Although batteries can store ae is a CAP XX HS206F 0 55F 5 5V capacitor ruption ride through system using a lot of energy they cannot supply much the LTC4425 LTC4416 LTC3539 and Ride Through Application Measured power oc volume due Ene significant A S T cet Results and Operation Details Pu paee Batteries also nave rela T EE E Figure 6 shows the waveforms if the tively short lives 2 3 years and their care pei Tonalaieste ahiseconds 173539 boost circuit is disabled Ru
12. rcap reaches 3 ov plus the dropout voltage and Voyr drops below 3v The buck regulator continues to track the supercap voltage down until it reaches 2V whereupon the buck regulator shuts off In Figure 7 the voltage across the supercap Vcc linearly decreases due to the con stant power load of 20omA at 3 3v on the buck regulator When Vec reaches 3 4v the regulation point of the boost regulator the boost regulator begins switching This shuts off the ideal diode and disconnects the buck regulator from the supercapaci tor The energy input to the buck regula tor is now the boost regulator s output of 3 4V Voc remains at 3 4V but the supercap begins to discharge exponentially because as the input voltage of the boost regula tor drops it must draw higher and higher current to sustain its output at 3 4V Because the input of the buck regula tor remains at 3 4V its output remains in regulation When the boost regula tor reaches its input UVLO it shuts off es Pg Re ee ee a A WS lan Sill AR RARER ae gt Figure 5 Front and back board layout used to test the circuit in Figure 4 and its output immediately collapses Since its input voltage has now col lapsed the buck regulator shuts off Energy Scavenging in the Ride Through Application What voltage should the boost output be set to Clearly operation is identical with or without the boost circuit enabled until the input dropout of the buck r
13. ss potential and the small MOSFETs M3 and M4 are driven fully on as their gates are biased to 11V with respect to Vss by the Vec pin If one input rises with respect to Vgs the small MOSFET remains on and the associated drain pin tracks the input If the input continues to rise to the point where it is 210V with respect to Vss the small MOSFET turns into a source fol lower safely limiting the drain pin to about 10v with respect to Vss MOSFETs M1 and M2 can be expected to avalanche and clamp any positive going spikes exceeding 300V to less than 400V While the circuit in Figure 3 was designed for a 48v system chang ing Ryn to a 100k 1w unit allows the circuit to operate with inputs of 200V to 300v DC Higher voltage standoff is possible with appro priate selection of MOSFETs m Va 48V 300V MAX DIFFERENTIAL VOLTAGE Vg 48V Figure 3 The LTC4354 shown in a 10A 48V application handles up to 300V differential across the inputs RTN COM RIN 12k uF 16V 48COM 10A M1 M2 IXTT 1XTT88N30P M3 M4 DIODES INC ZVN0540A supercap charger continued from page 19 implies a boost regulator with a block ing output This in turn necessitates the second ideal diode to allow the supercapacitor to power the buck regu lator until the boost regulator engages The boost regulator must operate to as low a voltage as possible to ensure that the maximum amount of energy is
14. to charge the supercapaci tor to V jj then PFO is permanently asserted low masking any faults on Vy SE FROM uC EN VouT VIN To HIGH PEAK POWER LOAD SUPERCAPACITOR BASED RIDE THROUGH SYSTEM Many electronics systems require a short term power backup system that allows them to ride through brief inter ruptions in power In a similar vein some systems need time to save states or empty volatile memory or perform other housekeeping tasks when power is abruptly removed For example a hard drive may need to park the heads so that they don t land on the media sur face This is an electromechanical system that requires 2oms 100ms of continuous power before it can completely shut down Another example involves the effect of large electrical machines on power systems If a large electric motor is started such as a commercial building air conditioner or elevator the mains supply may collapse for several line cycles Usually the input supply stores only enough energy for between a half a cycle and one cycle Devices powered by the input supply need a way to oper ate normally until the mains recovers January 2012 LT Journal of Analog Innovation 17 Ooo O Supercapacitors are well suited to short power burst ride through applications Their low source impedance allows them to supply significant power for a relatively short time and they are considerably more robust than batteries Vpp ia Figure 4 Com
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LINEAR LTC4425 Manual