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DESIGN FEATURES LTJournal-V21N4-2012-01

1. VOUT6 1 2V VIN_UV_WARN_LIMIT 5 2969 V VOUT7 1 0V VIN_ON 6 5000 V VOUTS 0 8V 6 0000 aig U1 7h50 LTC2974 4 0959 V 10 0 above below VOUT 7 5 above below VOUT 5 0 above below VOUT 3 8000 5 0 above below VOUT 7 5 above below YOUT VOUT_O V_FAULT_LIMIT VOUT_OV_WARN_LIMIT VOUT_MARGIN_HIGH VOUT COMMAND YOUT_MARGIN_LOW YOUT_UY_WARN_LIMIT VOUT10 2 4V VOUT11 1 7V VOUT12 1 1V Bal U2 7h5E LTC3880 E amp Idealized On Off Waveforms VOUT14 0 5V g i U3 7h5F LTC3880 VOUT15 0 6V 61 VOUT15 0 6v 2 Zone 0 Status Summary Status Global Telemetry Plot Plot xample Read Sequence Example Code for reading the READ_VOUT register write PAGE to 0 smbus_write_byte OxSE 0x00 read READ VOUT smbus_read_ word OxSE 0x8B Figure 6 Complex multirail power systems simplified LTpowerPlay write PAGE to 0 a 16 18 TI Slave Address Wr a Command Code Al Data Byte Al puts complete power supply control at your fingertips 7b1011_110 1b0 8h00 enoo _ 7b1011_110 1 b0 8 h8B PUTTING TOGETHER A MULTIRAIL SYSTEM A large multirail power board is nor mally composed of an isolated inter mediate bus converter which converts 48V 24V or other relatively high voltage from the backplane to a lower inter mediate bus voltage IBV typically 12v which is dist
2. IN THIS ISSUE integer N synthesizer with integrated VCO ina 4mm x 5mm package 9 supercapacitor based power supply ride through system 15 ultralow EMI Module regulator is EN55022 class B certified 20 UMTS base station receiver in half inch square 23 negative voltage diode OR controller tolerates inputs beyond 300V 30 we The LTC3880 in a digitally managed power system www linear com NY Ne AO spe LINEAR TECHNOLOGY Journal of Analog Innovation Dual Output DC DC Controller Combines Digital Power System Management with Analog Control Loop for 0 5 Voy Accuracy Gregory Manlove Volume 21 Number 4 Though power management is critical to the reliable operation of modern electronic systems voltage regulators are perhaps the last remaining blind spot in today s digitally managed systems Few regulators have the means for direct configuration or monitoring of key power system operating parameters As a result power designers who want complete digital control must use a mixed bag of Sequencers microcontrollers and voltage supervisors to program basic regulator start up and safety functions Digitally programmable DC DC converters are available most notably those with VID output voltage control designed for VRM core power supplies but these specifically targeted converters do not directly communicate important operating parameters such as real time currents 33 X
3. and the voltage applied a f MM to either inout iS similarly pene Vp 48V N s a M2 limited to 100V relative to REQUIRED TO SUPPRESS PARASITIC OSCILLATIONS IN M1 AND M2 DO NOT OMIT _A8COM A careful study M1 M2 FAIRCHILD FDMS86101 of the LTC4354 data sheet reveals that the drain pin S If 1 Wen PORSI to Moraer increase the lri systems where the inputs are sub series resistance even higher voltages jected to spikes in excess of 100V DA and DB which are the could be tolerated by simply changing the MOSFET breakdown clamps the maxi only PINS exposed to high 2k resistor Unfortunately the drain pin mum voltage although admittedly bereft voltage are limited to 80V input bias current sets a practical limit of characterization and guarantee Nevertheless with a 2k of 2k so as to avoid interfering with the series limiting resistor these operation of the ideal diode function itself pins can handle up to 100V If spikes in excess of 100V are an issue the high voltage capability of the drain pins is easily extended beyond 100v by simply adding a Zener clamp as shown RTN COM in Figure 2 Input spikes above 75v are 1k clamped by the Zener with current limiting provided by the 2k resistor Figure 2 Zener clamps extend transient voltage capability to 150V and beyond Zeners in the 250mW to 500mW range are capable of absorbing the peak current generated by a 150V 101s spike Higher voltage and longer durat
4. Define the component parameter with a variable by editing the component attribute Ctrl right click on the component and entering X for the NEW LTspice IV DEMO CIRCUITS The LTspice Iv circuit collection is avail able at www linear com DemoCircuits Here are some of the new demon stration circuits now available Switching Regulators e 1163618 Dual monolithic synchro nous step down converter for DDR termination 2 25V 5 5V to Vppq at 3A VITR at 10mA VTT at 3A www linear com 3618 LTC3617 Monolithic synchronous step down regulator for DDR termi nation 2 25 5 5V to VITR at 10mA VTT at 6A www linear com 3617 LTC3536 1A low noise buck boost DC DC converter 1 8V 5 5V to 3 3V at 1 0A www linear com 3536 Battery Charger e 113652 1A solar panel pow ered 3 stage 12V lead acid fast float charger 10V 16v to 12V at understanding of a schematic review the Help Topics in LTspice IV tran 3m Step param X list 1u 2u 3u x 2 300ms y 1 035 Happy simulations SOLAR PANEL INPUT ee lt 40V OC VOLTAGE 16V PEAK POWER VOLTAGE 10uF ps k a 100k 4 7 uF 1M L1 WURTH 7447779122 1N4148 100k LT spice IV Power User Tip MBRS340 uF BZX84C6V2L 1N914 SYSTEM C 309k 10uF 100uF Hin I T 12V LEAD muRata L NCP18XH103 10k ACID BATTERY B 3380 3 The LTspice IV demonstration circuit for this 1A solar panel power
5. limiting board space power and cost There are several factors that limit the SNR in an RF system including the linearity and noise figure of the receive or transmit chain and the phase noise and spurs of the Lo Proper component selection in the RF chain limits the linearity and noise figure degradation to a tolerable level Similarly careful design decisions must be made to attain the desired phase noise and spurious level of the Lo Figure 1 Simplified LTC6946 block diagram with external reference clock and loop filter High performance systems call for an LO source with high spectral purity necessitating the use of a low in band phase noise synthesizer with an external high end vco Such a solution requires a large amount of board space an involved design process and is relatively expensive The LTCc6946 in contrast meets the requirements of high performance sys tems by integrating these components in a single 4mm x 5mm package Specifically it combines an industry leading ultralow phase noise and spurious integer N synthe sizer with a low phase noise and broad band vco Overall costs are low compared to an external vco system and integrating the LTC6946 in an RF system is straight forward as shown later in this article LOOP FILTER SS EE Tawa WHAT S INSIDE THE LTC6946 Figure 1 shows a simplified LTc6946 block diagram along with the exter nal reference clock an ocxo for exa
6. VOUT 100mV DIV AC COUPLED ANALOG CONTROL LOOP DIGITAL CONTROL LOOP 205mV Programming Board Socketed Programming or louT 10A DIV 15A LOAD STEP 100pus DIV Cour 2 x 330pF POSCAP 9mQ 2 x 100yF 200us DIV Cour 4 x 3304F POSCAP 9mQ 2 x 100pF Figure 3 Comparative responses of analog and digital control loops to a 15A transient load step The analog control loop requires only half the output the ADC quantization related errors found in products utilizing digital control The LTC3880 features an on chip regula tor for increased integration whereas the LTc3880 1 allows for an exter nal bias voltage for highest efficiency Both parts are available in a thermally enhanced 6mm x 6mm QFN 40 package with either a 40 C to 105 C operating junction temperature range E grade or a 40 C to 125 C Operating junc tion temperature range I grade In Circuit Serial Programming capacitance of the digital loop while producing far superior settling times ANALOG CONTROL LOOP ENSURES BEST IN CLASS REGULATOR PERFORMANCE The Lrc3880 1 is digitally programmable for numerous functions including the output voltage current limit set point and sequencing The control loop though remains purely analog which offers the best loop stability and transient response without the quantization effect of a digital control loop Figure 2 compares the ramp curves of a cont
7. 35dBm interfering channel gt 10MHz away The IF rejection of the Module receiver will attenuate it to an equivalent digitized signal level of 6 6dBFs peak With the Dsp post processing it amounts to 89 5dBm at the receiver input and the resulting sensitivity is 109 2dBm Out of band blockers must also be accommodated but these are at the same level as the in band blockers which have already been addressed Figure 4 Baseband frequency response 0 0 8 16 24 32 40 48 56 64 72 80 BASEBAND FREQUENCY MHz 24 January 2012 LT Journal of Analog Innovation design features In all of these cases the typical input level for 1dBFs of the LTM9004 is well above the maximum anticipated signal levels Note that the crest factor for the modulated channels will be on the order of 10dB 12dB so the largest of these will reach a peak power of approxi mately 6 5dBFs at the LTM9004 output The largest blocking signal is the 15dBm CW tone gt 20MHz beyond the receive band edges The RF front end will offer 37dB rejection of this tone so it will appear at the input of the LTMg9004 at 32dBm Here again a signal at this level must not desensitize the base band pModule receiver The equivalent digitized level is only 41 6dBFs peak so there is no effect on sensitivity Another source of undesired signal power is leakage from the transmit ter Since this is an FDD application the
8. CONTROL January 2012 LT Journal of Analog Innovation 23 Ooo O LTM9004 Here is an example of typi cal performance for such a front end Rx frequency range 1920 to 1980MHz RF gain 15dB maximum AGC range 20dB noise figure 1 6dB IIP2 50dBm IIP3 odBm Piap 9 5dBM e rejection at 20MHz 2dB rejection at Tx band 96dB Given the effective noise contribution of the RF front end the maximum allow able noise due to the LTM9004 must then be 142 2dBm Hz Typical input noise for the LTM9004 is 148 3dBm Hz which translates to a calculated system sensitivity of 116 7dBm Typically such a receiver enjoys the benefits of some psp filtering of the digitized signal after the apc In this case assume the psr filter is a 64 tap RRC lowpass with alpha equal to 0 22 To operate in the presence of co channel interfering signals the receiver must have sufficient dynamic range at maxi mum sensitivity The UMTS specification calls for a maximum co channel inter ferer of 73dBm Note the input level for 1dBFs within the IF passband of the LTM9004 is 15 1dBm for a modulated signal with a 10dB crest factor At the LTM9004 input this amounts to 53dBm or a digitized signal level of 2 6dBFs The LIM9004 is a direct conversion receiver utilizing an Q demodulator baseband amplifiers and a dual 14 bit 125Msps ADC The LTM9004 AC lowpass filter has a Q 2dB corner at 9 42MH
9. Vsc AND VIN BUCK 1 DIV VDD 1V DIV 3V3 2V DIV 1s DIV Figure 7 With boost regulator enabled in the circuit of Figure 4 the ride through applications can support a 0 67W load for about 7 92s January 2012 LT Journal of Analog Innovation 19 i Ultralow EMI 90W Step Down uModule Regulator EN55022 Class B Certified in a 15mm x 15mm Footprint Richard Ying and Willie Chan Designers of information technology and communications systems have come face to face with the difficult challenge of producing feature rich power hungry products that comply with international EMI standards Prior to sale all information technology equipment ITE commonly defined as having a regulated clock signal greater than 9kHz must meet government standards such as FCC Part 15 Subpart B in the United States and EN55022 in the European Union Both standards define maximum allowable radiated emission for industrial and commercial environments Class A and home environments Class B as shown in Figure 1 EMI RADIATION SOURCES Electromagnetic waves radiate from any The problem is that the power budgets of converter contribute to electromagnetic ITE products are increasing with perfor radiation Figure 2 presents a typical buck mance improvements so meeting EMIstan switching converter and its interface leads converter including parasitic inductors dards becomes proportionally more Pulsating voltages and currents associa
10. 448 to 748 fio MHz with O 6 373 to 623 LTC6946 VERSIONS There are three different frequency range versions of the LTC6946 summarized in Table 1 All versions offer superior in band phase noise with industry leading 1 f performance The integrated vcos achieve low phase performance and require no external components IMPORTANCE OF LOW PHASE NOISE The impact of Lo phase noise on a system can be illustrated with a simple down converting receiver Consider a perfect tone at a frequency fp downconverted by an ideal mixer with the use of a non ideal LO source at fio as shown in Figure 2 The Lo source is shown to have a prac tical phase noise profile illustrated by the surrounding skirts As can be seen at the intermediate frequency fip the down converted ideal tone is corrupted by the phase noise of the Lo source The ideal tone present at the RF port of the mixer has infinite SNR or a very large one as limited by the matching 10 January 2012 LT Journal of Analog Innovation LTC6946 2 3080 to 4910 LTC6946 3 3840 to 5 90 3080 to 4910 3840 to 5 90 1540 to 2455 1920 to 2895 1027 to 1637 1280 to 1930 1 COON 226 960 to 1448 616 to 982 768 to 1158 le Wee ie 640 to 965 system The mixer being ideal does not degrade the quality of the received signal However the IF output of the mixer has a much lower sNR compared to the received signal due to the phase noise of the Lo This example pre
11. 5700MHz e Frequency step size channel to channel spacing 5MHz e Reference clock frequency 100MHz Based on the frequency ranges in Table 1 the LTC6946 3 is suitable for covering the requested frequency band All further design choices can be made using the pLLwizard free PLL design and simulation tool found at www linear com designtools software Figure 9 Snapshot o Linear Technology PLLWizard of the PLLWizard Entering the given frequency information in PLLWizard and picking the approximate noise optimized loop bandwidth suggested by the pLLWizard tool produces the loop filter values needed to modify a DC1705A C demo board Since the LTC6946 VCO gain is nearly constant as a percentage of the fre quency the loop filter designed at any fre quency within the band works for all other frequencies Figure 9 shows a snapshot of PLLWizard used in completing this design The Dc1705a C is updated with the loop filter components as found above and its schematic is shown in Figure 10 Figure 11 verifies that the achieved phase noise matches that predicted by PLLWizard Double sideband integrated noise from 100Hz to 40MHz allows for Loop Design software tool used _ Registers l nel adj acent to the desired but weaker in designing a Part LR Loop Filter Calc d Frequencies channel as shown in Figure 8 Only one
12. Figure 1 The technology to build a receiver occupy LTM9004 AC lowpass filter has a 0 2dB cor This article presents a design analysis for ing about one half square inch just over ner at 9 42MHz allowing four WCDMA car the LIM9004 pModule receiver imple 3cm The boundaries of the receiver riers The LIM9004 can be used with menting a direct conversion receiver are the 500 RF input the 500 Lo input an RF front end to build a complete the apc clock input and the digital DESIGN TARGETS UMTS band uplink receiver An RF front ADC output This leaves the low noise The design target is a Universal Mobile end consists of a diplexer along with one amplifier LNA and RF filtering to be Telecommunications System UMTS or more low noise amplifiers LNAs and added for the input Lo and clock genera uplink Frequency Division Duplex ceramic bandpass filters To minimize tion and digital processing of the digital FDD system specifically the Medium gain and phase imbalance the baseband output Within the 15mm x 22mm pack Area Base Station in Operating Band I chain implements a fixed gain topology age is a signal chain utilizing SiGe high as detailed in the 3GPP Ts25 104 V7 4 0 so an RF VGA is required preceding the specification Sensitivity is a primary Vcc1 9V Voc3 3V Figure 1 Direct conversion architecture implemented in the LTM9004 Module receiver OVpp 0 5V TO 3 6V CLKOUT ADC CLK MUX OF DC OFFSET LO GND
13. More info at www apec conf org Advanced Automotive Battery Conference AABC 2012 Omni Orlando Resort Orlando Florida February 6 10 Booths 700 amp 601 Linear will show its LTC3300 for bidirectional mul ticell battery balancing Ltc4ooo high voltage high current controller for bat tery charging and power management LTC6803 multicell battery stack monitor and LTC4366 high voltage surge stop per with overcurrent protection More info at www advancedautobat com CAR ELE JAPAN 2012 Tokyo Big Sight Tokyo Japan January 18 20 Booth West 12 45 Linear will show automotive related products including the LTc6803 bat tery stack monitor and LTM288x iso lated pModule receivers power More info at www car ele jp en Electronica China 2012 Shanghai New International Trade Fair Center Shanghai China March 20 22 Hall W3 Booth 3312 Linear will show its LIM460x and LTM8047 8048 pModule power families LTC4270 4271 Power over Ethernet devices for PoE LTC4000 LTC3300 battery chargers unrestricted high speed ADCs LTC6803 battery stack monitor energy harvesting products TimerBlox devices and LED drivers More info at www electronicachina com m January 2012 LT Journal of Analog Innovation 3 Ooo O A principal benefit of digital power system management is reduced design cost and faster time to market The LTC3880 1 greatly simplifies the design of complex multirail systems with the free downloadable LI pow
14. a given Supercapacitor is to add a boost regulator to the system which allows for energy scavenging The run time of a given supercapacitor can be extended by gt 30 if energy scavenging is used When the L1c3539 boost regulator is disabled as soon as input power falls the Lt1c4416 based ideal diodes switch the input energy supply for the LTC3539 buck regulator to the super cap In Figure 6 the voltage across the supercap Vcc linearly decreases due to the constant power load of 200mA at 3 3V on the buck regulator Voyz When the input voltage to the LTc3539 reaches the dropout voltage of the regulator the output voltage is seen to track the input voltage At 4 68s after input power removal the voltage on the supercap reaches 3 ov plus the dropout voltage and Voyr drops below 3v The buck regulator continues to track the supercap voltage down until it reaches 2V whereupon the buck regulator shuts off In Figure 7 the voltage across the supercap Vcc linearly decreases due to the con stant power load of 20omA at 3 3v on the buck regulator When Vec reaches 3 4v the regulation point of the boost regulator the boost regulator begins switching This shuts off the ideal diode and disconnects the buck regulator from the supercapaci tor The energy input to the buck regula tor is now the boost regulator s output of 3 4V Voc remains at 3 4V but the supercap begins to discharge exponentially because as the input vol
15. for the system load THE LTC4425 ARCHITECTURE The LTC4425 has two modes of operation Normal and LDO Normal Mode In Normal mode the LTC4425 can be thought of as an ideal diode with current limit and supercapacitor specific func tions see Figure 1 If we ignore everthing but the ideal diode controller MPSNS and MPSw the LTC4425 behaves like an ideal diode Mpsw is turned on whenever Voyr iS lower than vin by more than 15mv A fraction 1 1000 of the current in the Vout pin is impressed on the resistor attached to the PROG pin and the resultant voltage is compared to a reference voltage When the voltage on the PROG pin reaches the reference voltage no additional cur rent is allowed to flow out of the Voyr pin In Normal mode the regulation function is not controlled by the output voltage alone but by Vin Vout see Figure 2 Normal mode is selected by connecting the FB pin to Vix In Normal mode as long as Vin Vout IS greater than o 75v the charge current is 1 10 the programmed value As the Vin Vour voltage decreases from 0 75V to 0 25V the charge current increases linearly to the programmed value at Vin Vout 0 25V For Vix Vour voltages less than 0 25v but greater than 15mvV the Vout Current is 1000 Rproc and can be as high as 2A However the Mpsw device 1 10 CHARGE CURRENT CHARGE CURRENT A 0 0 0 2 0 4 0 6 0 8 1 Vin Vout V Figure 2 Supercapacitor charge cu
16. frequency diversity and physical diversity to assure reliability scalability wire free power source flexibility and ease of use All motes in a SmartMesh network even the routing nodes are designed to run on batteries for years allowing ultimate flexibility in placing sensors exactly where they need to go with low cost peel and stick installations Dust Networks customers range from the world s largest industrial process automation and control providers such as GE and Emerson to innovative green companies such as Vigilent and Streetline Networks Dust Networks technology is found in a variety of monitoring and control solutions including data center energy management renewable energy remote monitoring and transportation For more information visit www dustnetworks com Linear in the news BEST ELECTRONIC DESIGN AWARD FOR BATTERY STACK MONITOR Electronic Design magazine announced that Linear Technology s LTc6803 battery stack monitor is the win ner of the Best Electronic Design award in the Automotive category Linear Technology s family of multicell high voltage battery stack monitors are complete battery monitoring Ics that include 12 bit ADCs precision voltage references a high voltage input multi plexer and a serial interface Multiple LTC6803 devices can be connected in series without opto couplers or isolators to enable monitoring of every cell in a long string of series connected batte
17. operating l l power particularly output current efficiency Finally careful pcs layout The magnitude of the voltage spike at the switching node increases as input voltages Linear regulators are the usual go to and output currents increase Likewise low EMI alternative to switching regula tors but power levels and input voltages have reached a point where linear regula Figure 4 Demonstrated EN55022 compliance LTM4613 DC1743 at 96W as conducted by mdependenite ts cal Design engineers are thus forced to tors produce too much heat to be practi overcome the EMI challenges of switching i regulators in order to meet the perfor g 60 mance requirements of today s equipment ao a EMI MITIGATION S a There are several ways to reduce the LU 30 radiated emissions from a switch mode z 20 power converter design One conventional a 45 method is to surround the entire power solution with an EMI shield essentially es oc 10 HAP f 30 170 310 450 590 730 870 1010 FREQUENCY MHz Figure 5 Radiated emission test setup January 2012 LT Journal of Analog Innovation 21 PULL UP SUPPLY lt 5V VIN 22V TO 36V Cin ON OFF 10uF 50V CERAMIC C4 TL Othe Figure 6 LTM4613 12V 8A output application circuit such as using local low ESR ceramic decoupling capacitors and minimizing PCB trace distances for high current paths can reduce the parasitic inductance as shown in Figure 2 and
18. receiver described here will be coupled with a transmitter operating simultane ously The transmitter output level is assumed to be lt 38dBm with a trans mit to receive isolation of 95dB Leakage appearing at the LTMgoo4 input is then 31 5dBm offset from the receive sig nal by at least 130MHz The equivalent digitized level is only 76 6dBFs peak so there is no desensitization One challenge of direct conversion architectures is 2nd order linearity Insufficient 2nd order linearity allows any signal wanted or unwanted to cre ate Dc offset or pseudo random noise at baseband The blocking signals detailed above will then degrade sensitivity if this The LTM9004 can be used with an RF front end to build a complete UMTS band uplink receiver pseudo random noise approaches the noise level of the receiver The system specification allows for sensitivity degra dation in the presence of these blockers in each case Per the system specification the 35dBm blocking channel may degrade sensitivity to 105dBm As we have seen above this blocker constitutes an inter ferer at 15dBm at the receiver input The 2nd order distortion produced by the LrM9004 input is about 16dB below the thermal noise and the resulting predicted sensitivity is 116 6dBm The 15dBm cw blocker also gives rise to a 2nd order product in this case the product is a Dc offset Dc offset is undesir able as it reduces the maximum signal th
19. region is discussed might also elevate the noise in this region Dining Coane A Diasec Ole if it is not properly chosen The in band iene eu EO a nae Close In Close in phase noise is ideally dominated phase noise region typically extends to The vcos integrated into the LTc6946 by the phase noise profile of the refer around the loop bandwidth of the PLL have competitive phase noise compared ence clock However the flicker or 1 f Depending on several factors such as to standalone broadband vcos ensur noise of the PLL 1c usually worsens the channel bandwidth and phase noise levels ing excellent overall performance noise here This region typically extends to the other regions in band phase noise 100s or 1000s of Hz from the Lo Close in phase noise degrades the performance of l Figure 8 Adjacent channel interference due to reference spurs complex communications schemes espe cially if they have long burst durations ADJACENT CHANNEL DESIRED CHANNEL AT IF The LTC6946 has an industry leading DESIRED ADJACENT CHANNEL AT IF 274dBc Hz normalized in band 1 f noise CHANNEL specification which is equivalent to a MIXER 134dBc Hz phase noise level for a 100MHz RF IF reference clock at an offset of 100Hz CHANNEL SPACING LO crystal oscillators available on the market IRF fir REFERENCE SPUR This number challenges the best 100MHz As a result and unlike other PLL Ics the LTC6946 does not ty
20. sepa iia ane ero osa forward conduction resistance of 50m0 SW1B H The diode voltage drops are regulated Vouti to 15mV during forward conduction 0 8A 1 0M 68 1k i L at low currents extending the power a i sinaia 4 7yH Vour3 supply operating range and ensuring no 221k ON 1 2V oscillations during supply switchover Less OFF a 0 6A than 1A of reverse current flows from E PWM ANN ap A BURST OUT to IN making this device well suited BURST PGND1A PGOOD3 100k for power supply ORing applications i PGND1B GND PGND2 circuits linear com 518 O n d 15V OV TO 5V R3 TORQUE STALL Dk CURRENT CONTROL ry FAULT STALL FWD Pu iik MOTOR SPEED STOP CONTROL OV SIMPLE BIDIRECTIONAL DC MOTOR SPEED REV CONTROLLER WITHOUT A TACHOMETER Here is one approach for motor speed control without PE using a tachometer Using the enable feature of the MOTOR LT1970A the drive to the motor can be removed al periodically With no drive applied the spinning motor presents a back EMF voltage proportional to its rotational speed The LT1782 is a tiny rail to rail amplifier with a shutdown pin The amplifier is enabled during this interval to sample the back EMF voltage across the motor This voltage is then buffered by one half of an LT1638 dual op amp and used to provide the feedback to the LT1970A integrator When re enabled the LT1970A will adjust the drive to the motor until 12V the speed feedback voltage compared to the spe
21. the LTC2978 make it easy to program power up and power down sequencing for any number of supplies By using a time based algorithm users can dynami cally sequence rails on and off in any order with simple programmable delays Sequencing across multiple chips is made possible using the 1 wire SHARE_CLK bus January 2012 LT Journal of Analog Innovation 7 Ooo O PMBus chips can be added later without having to worry about system constraints such as a limited number of connector pins Multiple addresses are supported in PMBus allowing over 100 unique devices on the same C bus and one or more of the bidirectional general purpose 10 GPIO pins This greatly simplifies system design because rails can be sequenced in any order Additional PMBus chips can be added later without having to worry about system constraints such as a limited number of connector pins Multiple addresses are supported in PMBus allowing over 100 unique devices on the same I c bus Rail sequencing to the on state can be triggered in response to a variety of conditions For example the LTC3880 and LTC2978 can auto sequence when the intermediate bus voltage exceeds a pro grammed threshold Vion Alternatively rail on sequencing can be initiated in response to the rising edge of the RUN CONTROL pin Rail on sequencing can also be initiated by a PMBus command The GPIO pins on the LTc3880 can be shared with fault pins from LTC PMBus companio
22. 100Hz This number challenges the best 100MHz crystal oscillators available on the market leak into the weaker desired one and is often the most significant contributer to severely limit its SNR The same concepts signal sNR degradation due to phase noise apply whether the mixer is used to down ae The Lrc6946 boasts an impressive convert or upconvert the incoming signal 226dBc Hz normalized in band phase THE ANATOMY OF PHASE NOISE AND LTC6946 PERFORMANCE So how does the LTc6946 stack up noise floor that keeps the plateau AMPLITUDE area as low as possible This figure allows the Lrc6946 to be used in the CLOSE IN IN BAND WIDEBAND against synthesizer performance met most demanding applications rics To illustrate this the phase noise l _ FREQUENCY OFFSET FROM CARRIER profile of a given LO is subdivided into vco four approximate regions as one of the Figure 7 Single sideband phase noise anatomy vco phase noise as the name implies is LO sidebands shows in Figure 7 It is mainly contributed by the vco Depending on the PLL loop bandwidth and channel assumed that this Lo source is produced In Band by a PLL ic that locks a high frequency In band phase noise is usually dictated wide dig phase foe ae ueoto a lower T E E E T mineant contributor to signal SNR eee aaa clock The performance of the LTc6946 in the loop filter The reference clock a ens ae pependie in each distinct
23. 2 785 fsec Residual FM 6 19535 kHz 60 00 70 00 80 00 90 00 100 0 110 0 120 0 130 0 140 0 150 0 160 0 170 0 ue Phase Noise Meas Ctrl 0y fPow OV 14 January 2012 LT Journal of Analog Innovation 100MHz REFERENCE SPI BUS 0 1uF 3 3V R 20 fPFD 5MHz N 940 to 1140 O 1 D m e e e e e eee eee ee ee i ee ee l Figure 10 Schematic of the 4700MHz to 5700MHz LO synthesizer circuit 68nH 3 3V 100pF fLO 4700MHz TO 5700MHz LOOP FILTER IN 5MHz STEPS Figure 11 Phase noise 0 Bake ie at 5500MHz 20 2 40 a gt 60 ed l A 2 80 100 Figure 12 Spectrum i0 at SDE Mz 5475 5485 5495 5505 FREQUENCY MHz Stop Svc 2011 10 14 15 24 5515 5525 design features oupercapacitor Charger and Ideal Diode for Power Supply Ride Through systems George H Barbehenn Supercapacitors capacitors with up to 100F of charge storage are emerging as an alternative to batteries in applications where the importance of power delivery trumps that of total energy storage Supercapacitors have a number of advantages over batteries that make them a superior solution when short term high power is needed such as in power ride through applications These advantages include lower effective series resistance ESR and enhanced durability in the face of repeated charging Like batteries supercapacitors have Supercapacitor technology can now capacitors is 2 7v or less Because
24. SS SENSOR NETWORKING CAPABILITIES Linear Technology has announced the acquisition of Dust Networks Inc a leading provider of low power wireless sensor network wsn technology The acquisition of Dust Networks enables Linear to offer a complete high performance wireless sensor networking solution Dust Networks low power radio and software technology complements Linear s strengths in industrial instrumentation power management and energy harvesting technology Dust Networks proven low power wireless sensor network technology extends Linear s product portfolio into key growth areas in industrial process control data acquisition and energy harvesting in applications where measurement of physical parameters has traditionally been impractical or impossible With the growing importance of machine to machine communications to enable remote data acquisition low power wireless sensing is an emerging solution for many end markets including industrial process control building automation and data center energy management Dust Networks pioneered SmartMesh networks that comprise a self forming mesh of nodes or motes which collect and relay data and a network manager that monitors and manages network performance and sends data to the host application This technology is now the basis for a number of seminal networking standards Dust Networks technology combines low power standards based radio technology time diversity
25. The Lrc 3880 1 solves the problem of complex a power system management by combining a dual out lt put synchronous step down DC DC controller with A a comprehensive power management feature set accessed via the 1 c based PMBus PMBus can be used to set the output voltage margin voltages switching frequency sequencing and a number of other oper ating parameters see PMBus Control below continued on page 4 LI MYR Ooo O COVER STORY Dual Output DC DC Controller Combines Digital Power System Management with Analog Control Loop for 0 5 Voy Accuracy Gregory Manlove DESIGN FEATURES Integer N Synthesizer with Integrated VCO Yields Top Notch PLL Performance in a 4mm x 5mm Package Michel Azarian Supercapacitor Charger and Ideal Diode for Power Supply Ride Through Systems George H Barbehenn Ultralow EMI 96W Step Down uModule Regulator EN55022 Class B Certified ina 15mm x 15mm Footprint Richard Ying and Willie Chan UMTS Base Station Receiver Fits in Half Inch Square Douglas Stuetzle and Todd Nelson DESIGN IDEAS What s New with LTspice IV Gabino Alonso system Monitor with Instrumentation Grade Accuracy Used to Measure Relative Humidity Leo Chen Negative Voltage Diode OR Controller Tolerates Inputs to 300V and Beyond Mitchell Lee back page circuits 2 January 2012 LT Journal of Analog Innovation Linear in the News LINEAR TECHNOLOGY ACQUIRES DUST NETWORKS EXTENDS WIRELE
26. WITH QuikEval Il PRESSURE SENSOR SOFTWARE NOVASENSOR NPP301S8 INCLUDING PSYCHROMETER EASTER EGG barometric pressure sensor measured by channel x configured for a differen tial input Full scale output is zomv per volt of excitation voltage at 100kPa barometric pressure pressure at sea level is approximately 101 325kPa The LTc2991 can also measure its own supply voltage which in our circuit is the same supply rail used to excite the pressure sensor Thus it is easy to calculate a ratiometric result from the pressure sensor removing the error contribution of the excitation voltage ERROR BUDGET The LTc2991 remote temperature mea surements are guaranteed to be accurate to 1 c Figure 2 shows the error in indicated humidity that results from a 0 7 C error in the worst case direction and the error in indicated humidity that results from a 0 7 C error in the worst case direction combined with worst case error from the pressure sensor This error falls within the range of accuracy of the psychrometric equations themselves Should higher accuracy be required a lookup table with the psychrometric charts would need to be implemented An inexpensive NPN transistor is an ideal temperature sensor for applications calling for disposable sensors or those that require a large number of sensors Zz POSITIVE ae Ye ERROR OF RELATIVE HUMIDITY WET BULB TEMPERATURE C Figure 2 Worst case erro
27. broadband LO from VCO Params VCONoise DW Kveo Fofa ee 4700MHz to 5700MHz Gode ee N _ J n2 Fvco 5500 00 of the Lo reference spurs is shown EE n oa 0 Div Frf 5500 00 p Design Goals FILT Fstep 5 00000 spacing Fstep 5 0000 MHz LKWIN y 10ns Bandwidth 64 6 In an integer N PLL fppp is usually cho B Cnt v 24 208 3 Frf 5500 000 MHz Fcal 3 Compute Design Plot DSB Noise 40 09 dBc 0 57 deg 0 286 ps sen to be equal to the channel spacing ee Engin Design Params i which means that the reference spurs are Simulate X Axis Start positioned at channel spacing from the Cnt CO i NOE ETT Lo These spurs translate all adjacent and sien Ref CO RF l Ref RF l i l nearby channels to the center of the IF Ni Points i IST TN TIN o C SS ao A T NTT RSN FTN E N N a __ Ea X Scale along with the Lo translating the desired rat Tota channel to the same exact frequency TT Divs These undesired channels being uncor Y Scale Man v Plot Open Loop Bode Closed Loop xfer Ref Noise VCO Noise Total Noise related to the signal in the desired channel appear as an elevated noise floor to the 10000 100000 1e 006 Offset Frequency Hz 1e 007 1e 008 desired signal and limit its SNR Hence it is important to keep r
28. cases it requires a very large battery o 5V and can support loads of 1 34 x Ride Through Application Setup array to satisfy the ride through power Vout Vin at its output The supercapacitor Figure 4 shows a complete power inter l l requirements Although batteries can store ae is a CAP XX HS206F 0 55F 5 5V capacitor ruption ride through system using a lot of energy they cannot supply much the LTC4425 LTC4416 LTC3539 and Ride Through Application Measured power oc volume due Ene significant A S T cet Results and Operation Details Pu paee Batteries also nave rela T EE E Figure 6 shows the waveforms if the tively short lives 2 3 years and their care pei Tonalaieste ahiseconds 173539 boost circuit is disabled Run and feeding requirements are substantial time from input power off to output Supercapacitors on the other hand ue i gece 3 MaS waa regulator voltage dropping to 3V is 4 68s ator that produces 3 3v The LTc441 are E tee nOn PON E rovides a a o o E abla biaadial ales ride through applications Their low P a A LTC3539 boost circuit is operational Run to ensure maximum efficiency when source impedance allows them to sup ee onie ce patie time from input power off to output ply significant power for a relatively regulator dropping to 3V is 7 92s supercap The LTc3539 is a micropower 18 January 2012 LT Journal of Analog Innovation design features One way to extend the ride through time for
29. cations calling for disposable sensors or those that require a large number of sensors A PSYCHROMETER NOT NEARLY AS OMINOUS AS IT SOUNDS A psychrometer is a type of hygrometer a device that measures relative humidity It uses two thermometers one dry dry bulb and one covered in a fabric satu rated with distilled water wet bulb Air is passed over both thermometers either by a fan or by swinging the instrument as in a sling psychrometer A psychrometric chart is then used to calculate humidity from the dry and wet bulb temperatures Alternatively a number of equations exist for this purpose The following equa tions are used in testing this circuit WET wet bulb temperature in Celcius DRY dry bulb temperature in Celcius P pressure in kPa Figure 1 Simple psychrometer using the LTC2991 28 January 2012 LT Journal of Analog Innovation A 6 6010 40 1 1 115010 3 e WET eee ED ESWB AeP DRY WET te eee ED HUMIDITY EDSB WET BULB L SS COVERED WITH DAMP FABRIC Figure 1 shows the Lrc2991 based psy chrometer The two transistors provide the wet bulb and dry bulb tempera ture readings when connected to the appropriate inputs of the LTc2991 The equations include atmospheric pres sure as a variable which is determined here via a Novasensor NPP301 100 Voc DC590B QuikEval Il DEMONSTRATION CIRCUIT Q1 Q2 MMBT3904 PC
30. ck boost DC DC converter at www linear com 3536 HOW TO USE THE STEP COMMAND TO PERFORM REPEATED ANALYSIS Value where X is a user defined rj LTspice IY StepParam raw Eile View Plot Settings Simulation Tools Window Help Aad pr QQQR EKETE BEA OSE There are two ways to examine a circuit by changing the value for a particular parameter you can either manually enter each value and then resimulate the circuit to view the response or use the step command to sweep across a range of values in a single simulation run The step command causes an analysis to be repeatedly performed while stepping through a model parameter global parameter or independent source Here is an example waveform response of an RC circuit for which the capacitance is stepped through three values To implement this in LTspice IV perform the following steps variable name The addition of the curly braces around the variable is important as it tells LTspice IV that X is a parameter Add a step command via a SPICE directive that specifies the steps for the parameter X by a linear logarithmic or list of values Example A step param X list 1u 2u 3u steps the parameter X through each value listed Example B step param X 1u 3u 1u steps the parameter X from 0 1u to 0 3u in 0 1u increments For more information on how to use PULSE 0 1 0 1u 1u 5m 1m i the step command to improve your
31. diated emissions 30MHz tO 1000MHz test setup using the standard LTM4613 demonstration board Dc1743 in TUV Rheinland s 10 meter semi anechoic chamber as specified by EN55022 EMI compliance is worthless if the regula tor can t meet other stringent space and performance requirements That s where the LTM4613 excels This nearly com plete converter comes in a space saving 15mm x 15mm package that requires only input capacitance output capacitance and a few other small components to make a step down regulator Performance is optimized to minimize power dissipation maximize efficiency and assure tight regu lation The LTM4613 accepts input voltages from 5v to 36v and delivers a regulated output voltage from 3 3V to 15v with 2 0 maximum total DC error over line load and temperature A 24V input to 12V output conversion reaches peak operating efficiencies of around 95 CONCLUSION The LrM4613 delivers high output power and efficiency with demonstrated EMI performance that complies with EN55022 Class B With carefully designed integrated filter meticulous internal layout shielded inductor internal snub ber circuitry and power transistor driver the LTM4613 achieves a perfect balance between the size output power efficiency and emission The LTM4613 eliminates the need for external filters magnetic shields and ferrite beads for a trouble free design process making it easy to design safe EMI compliant powe
32. e A D converter can process The one sure way to alleviate the effects of Dc offset is to ensure the 2nd order linearity of the baseband pModule receiver is high enough The predicted Dc offset due to this signal is lt 1mvV at the input of the ADC Note that the transmitter leakage is not included in the system specification so the sensitivity degradation due to this signal must be held to a minimum The transmitter output level is assumed to be lt 38dBm with a transmit to receive isolation of 95dB The 2nd order distor tion generated in the LrTM9004 is such that the loss of sensitivity is lt o 1dB There is only one requirement for 3rd order linearity in the specification In the presence of two interferers the sensitivity must not degrade below 115dBm The interferers are a CW tone and a WCDMA channel at 48dBm each These appear at the LTM9004 input at 28dBm each Their frequencies are such that they are 10MHz and 20MHz away from the desired channel so the 3rd order intermodulation product falls at baseband Here again this product appears as pseudo random noise and thus reduces the signal to noise ratio The 3rd order distortion produced in the LrM9004 is about 20dB below the thermal noise floor and the predicted sensitivity degradation is lt o 1dB MEASURED PERFORMANCE Using the evaluation boards shown in Figure 2 the LTM9004 AC achieved excellent results as shown in Figures 3 and 4 The test se
33. e phase noise must stay at or below the level of SNR degradation acceptable in the system ADJACENT CHANNEL AT IF AT IF CHANNEL SPACING Figure 6 Reciprocal mixing due to LO phase noise QUADRATURE IN PHASE Figure 5 64 QAM constellation corrupted by white noise Effect of Phase Noise on Adjacent Channel Another reason for requesting low phase noise is to avoid or reduce the effects of reciprocal mixing It is common in communications systems with multiple channels in a certain band to have large variations in signal strength between two adjacent channels If a weak signal located next to a much stronger adjacent chan nel is to be properly downconverted and demodulated the Lo used with the mixer must have low phase noise It must be low enough to prevent the spectral leak age from the larger signal from seriously degrading the desired channel s snr Assume that in Figure 2 two ideal tones are received at the RF port of the mixer and that the Lo has the phase noise profile shown in the same fig ure Figure 6 depicts the new system and illustrates reciprocal mixing As seen at the IF the phase noise of the LO makes the stronger adjacent channel January 2012 LT Journal of Analog Innovation 11 Ooo O The LTC6946 has an industry leading 274dBc Hz normalized in band 1 f noise specification which is equivalent to a 134dBc Hz phase noise level for a 1OOMHz reference clock at an offset of
34. ed set input voltage settles the output to a fixed value A OV to 5V signal for the motor speed input controls both rotational speed and direction The other half of the LT1638 is used as a simple pulse oscillator to control the periodic sampling of the motor back EMF R8 circuits linear com 516 n 12V R9 20k R10 82 5k 1N4148 C3 D2 0 1uF R11 9 09k 1N4148 12V 47 LT LTC LTM Linear Technology the Linear logo LTspice TimerBlox and uModule are registered trademarks and LTPowerPlay PLLWizard PowerPath and QuikEval are trademarks of Linear Technology Corporation All other trademarks are the property of their respective owners 2012 Linear Technology Corporation Printed in U S A 54K Linear Technology Corporation Mixed Sources 1630 McCarthy Boulevard Milpitas CA 95035 Fee ipa a TECHNOLOGY 408 432 1900 www linear com BSC fie
35. ed 3 stage 12V lead acid fast float charger is available at www linear com 3652 Linear Regulators 113032 Dual 150mA Positive Negative Low Noise LDO Linear Regulator 5V to 3 3V at 0 15A amp 5V to 3 3V at 0 15A www linear com 3032 e 1173029 Dual soomA soomA LDO low noise ppower linear regulator 113015 1 54 low noise nega tive linear regulator with preci sion current limit 7v to 5 ov at 1 5A www linear com 3015 E 1A www linear com 3652 3V to 1 8vat o 5A amp 3V to 1 5Vat o 5A www linear com 3029 10uF NENP uk VIN Vout The demonstration circuit for this1 5A low noise negative linear regulator 5 5V TO 5 with precision current limit is available at www linear com 3015 30V 1 5A January 2012 LT Journal of Analog Innovation 27 ee system Monitor with Instrumentation Grade Accuracy Used to Measure Relative Humidity Leo Chen The LTC2991 is designed to measure supply voltages currents and temperatures on large circuit boards when used in system monitor applications It is also capable of delivering 1 C accuracy when using a 1 cent MMBIT3904 transistor as a temperature sensor making It suitable for many instrumentation applications Temperature is the most measured physical parameter with sensor selection a function of accuracy requirements durability cost and compatibility with the medium being measured An inexpensive NPN transistor is an ideal sensor for appli
36. eference spurs at bay LTC6946 3 gt Comm Enabled Plotting January 2012 LT Journal of Analog Innovation 13 Spurious performance at 5500MHZ is impressive with the tallest reference spurs around 9 7dBc which is phenomenal at an LO frequency this high These spurs are unlikely to contribute to any noticeable adjacent channel interference close to 40dB of sNR sufficient to meet most demanding application requirements Figure 12 shows the spurious performance at 5500MHz The tallest reference spurs are about 97dBc which is phenomenal at an Lo frequency this high and are unlikely to contribute to any notice able adjacent channel interference After following the quick and straight forward steps summarized above the circuitry is ready to be deployed in a real life point to point radio application CONCLUSION The LTc6946 simplifies frequency synthe sis by integrating an integer N synthesizer with a vco without sacrificing perfor mance It is ideal for many demanding applications where low phase noise is essential To top it off designing with the LTc6946 is a breeze when combined with the pLLWwizard tool available at www linear com designtools software m Camier 5 499967729 GHz 1 ee 1 40 00 HeH 4 5 a An 1 MHz 50 00 40 MHz 1s Analysis Range X Full rk Analysis Range Y Band Marker Intg Noise 42 0612 dBc 40 MHz RMS Noise 12 2546 mrad 639 111 mdeg RMS Jitter 32
37. eport go to certified uModule DC DC converters cds linear com docs 39787 download the uModule Power Products brochure at cds linear com docs 39823 Figure 2 Buck switching regulator with parasitic inductor and capacitors Figure 3 Typical switch node voltage spike and ringing ee ee _ 2 amp in a 12V input buck e e E ee o a switching regulator a PARASITIC CAPACITANCE PARASITIC eae ae en EE 8 25V Vn me rrr p VouT 2 i ee BV DIV Ppor scfm Cae a ri 20ms DIV the parasitic capacitor tends to increase the higher the output current the larger containing the EMI field within a metal as well The switching action also pulses the pulsating current generated inside the enclosure The obvious problem is that the input current and the current flow circuit loop In the end radiated emis a metal box adds significant complexity ing through both top MOSFET Irop and sion is highly dependent on the operating size and cost Alternatively an RC snub bottom MOSFET Igor This pulsating condition of the device so testing should ber circuit at the switching node Vow current generates electrical waves on the take into account worst case conditions can reduce the voltage spike and subse input supply cable and on the pcs board In general radiated EMI increases with quent ringing but adding an Rc snubber traces which act as transmitting antennae higher input voltage and higher output circuit significantly reduces
38. erPlay software a comprehensive PC based develooment environment LTC3880 continued from page 1 The LTc388o also allows monitoring of the supplies via a 16 bit data acquisition system which supplies digital read back of input and output voltages and cur rents duty cycle and temperature includ ing peak values of important parameters The LTc3880 also includes extensive fault logging capability via an interrupt flag along with a nonvolatile memory black box recorder which stores the state of the converter s operating condi tions immediately prior to a fault Figure 1 Dual output regulator using external power MOSFETs A principal benefit of digital power system management is reduced design cost and faster time to market The Lrc3880 1 greatly simplifies the design of complex multirail systems with the free download able LIpowerPlay development software a comprehensive pc based development environment see Figure 6 In circuit testing ICT and board debug require only a few clicks of the mouse no need to solder in white wire fixes The results of your design are immediately accessible thanks to the availability of real time telemetry data making it possible to predict power system failures and imme diately implement preventive measures Perhaps most significantly DC DC convert ers with digital management function ality allow designers to develop green power systems that optimize e
39. help reduce EMI Overall a power engineer must apply years of experience to evaluate tough trade offs when designing a power sup ply that meets stringent size efficiency heat and EMI specifications especially in high input voltage high output power applications Often a huge amount of time and energy are spent evaluat ing the trade offs inherent in designing an EMI compliant power converter Ideally extensive design experience and best practices could be prepack aged into a converter that complies with EMI standards while minimizing performance trade offs Fortunately that ideal is achieved by the LTM4613 GUARANTEED EMI COMPLIANCE The LTM4613 8A pModule step down regulator is certified by an indepen dent test laboratory TUV Rheinland to meet EN55022 Class B EMI emissions limits at up to 96w of output power Figure 4 TUV Rheinland is Iso 17025 22 January 2012 LT Journal of Analog Innovation CLOCK SYNC VOUT T 12V Couri Cout2 8A 22pF 180uF 22uF 16V 16V EFFICIENCY 20Vin 12VouT 24Vin 12VouT 28Vin 12VouT 36Vin 12VouT 3 4 5 6 7 8 LOAD CURRENT A Figure 7 LTM4613 efficiency vs load current with 12V output accredited by the u s National Institute of Standards and Technology NIST in North America and the Notified Bodies on the European Union the most meticu lous and recognized certifying labs in the industry Figure 5 shows a complete ra
40. hird party SUBCKT statement NEW LTspice DEVICE MACRO MODELS To update your installation of LTspice Iv with the latest models choose Sync Release from the Tools menu You can review the changelog txt after Sync Release for the complete list of new mod els Here is a list of some new models uModule Regulators e LTM8048 3 1V to 32V input isolated uModule DC DC converter with LDO post regulator www linear com 8048 4 7uH VIN 1 8V TO 5 5V PWM BURST 10uF OFF ON e LTM8047 3 1V to 32V isolated pModule DC DC converter www linear com 8047 Switching Regulators e 1103765 Active clamp forward controller and gate driver www linear com 3765 e 1103766 High efficiency second ary side synchronous forward controller www linear com 3766 e 1T 3759 Wide input voltage range boost sEPIc inverting controller www linear com 3759 e 1163536 1A low noise buck boost DC DC converter www linear com 3536 e 1T3507A Triple monolithic step down reg ulator with LDO www linear com 3507A Linear Regulators e 113015 1 5A low noise nega tive linear regulator with precision current limit www linear com 3015 Amplifiers amp Comparators e 116108 High side current sense amplifier with reference and comparator www linear com 6108 LTC6360 Very low noise single ended SAR ADC driver with true zero output www linear com 6360 Download the LTspice IV demonstration circuit for this 1A low noise bu
41. ia a single K statement in your LTspice Iv simulations Two new LTspice IV how to videos are now available mi EEE Sie m Transformers 3rd Party Models m F What is LT spice IV LTspice IV is a high performance SPICE simulator schematic capture and waveform viewer specifically designed to speed up the process of power supply design LTspice IV adds enhancements and models to SPICE significantly reducing simulation time compared to typical SPICE simulators allowing one to view waveforms for most switching regulators in minutes compared to hours for other SPICE simulators LTspice IV is available free from Linear Technology at www linear com LTspice Included in the download is a complete working version of LTspice IV macro models for Linear Technology s power products over 200 op amp models as well as models for resistors transistors and MOSFETs 26 January 2012 LT Journal of Analog Innovation Adding Third Party Models to LTspice IV video linear com 97 LTspice Iv includes models for many dis crete components such as transistors and MOSFETs but many component manufac turers make additional models that you can add to your LTspice IV circuit simula tions These third party sPIcE models are described in MODEL and SUBCKT state ments This video provides an overview of how to add a third party MODEL state ment for an intrinsic SPICE device and how to add and create a symbol for a t
42. il in red and any affected rails in yellow LTpowerPlay is available as a free down load at www linear com Itpowerplay LTpowerPlay works in conjunction with other Linear Technology controller and companion ICs in order to quickly and eas ily configure multiple rail power systems CONCLUSION The LTc3880 1 combines best in class analog switching regulators with preci sion data conversion and a flexible digital interface for unsurpassed performance Multiple Lrc388o0s can be used with other LTC products to create optimized multi rail digital power systems All Linear Technology PMBus products are supported by the easy to use LTpowerPlay software development system Digital control over analog power sup plies enables designers to get their systems up and running quickly providing an easy way to monitor control and adjust supply voltages limits and sequencing Production margin testing is easily performed using a couple of standard PMBus commands Debug is also simplified because the rail status is Communicated over the bus Power system data can be sent back to the OEM providing information about the power supplies health and energy consumption If a board is returned the fault log can be read to determine which fault occurred the board temperature and the time of the fault as well as historical data leading up to the fault This data can be used to quickly determine root cause whether the system was operated ou
43. ion spikes may be accommodated by larger devices For sustained conditions a simple Zener clamp is made untenable by the dis 2k o 15A We sipation in both the resistor and Zener Va 48V S o 48COM 10A cans oo 10us 150V MAX 7 M1 The circuit shown in Figure 3 uses DIFFERENTIAL SPIKE 15A o Vg 48V No small high voltage MOsFETs for limit M2 REQUIRED TO SUPPRESS PARASITIC OSCILLATIONS IN M1 AND M2 DO NOT OMIT ing and can handle up to 400V 11V gate M1 M2 FAIRCHILD FDMS86101 30 January 2012 LT Journal of Analog Innovation design ideas Zeners in the 250mW to 500mW range are capable of absorbing the peak current generated by a 150V 10us spike Higher voltage and longer duration spikes may be accommodated by larger devices bias is conveniently obtained from the shunt regulated Vcc pin without the need for any extra components making this useful configuration a very simple modification of the basic circuit Under normal conditions the 48v inputs are at or near the Vss potential and the small MOSFETs M3 and M4 are driven fully on as their gates are biased to 11V with respect to Vss by the Vec pin If one input rises with respect to Vgs the small MOSFET remains on and the associated drain pin tracks the input If the input continues to rise to the point where it is 210V with respect to Vss the small MOSFET turns into a source fol lower safely limiting the drain pin to about 10v wi
44. lay f i J a tions allow monitoring of power supply operation including E RAIL 3 e output input voltage e output input current RAIL 4 internal die temperature RAIL 5 l e external inductor temperature RAIL 6 e part status RAIL 7 RAIL 8 e fault status RAIL 9 system status RAIL 10 e peak output current RAIL 11 e peak output voltage eave e peak internal external temperature RAIL 13 e fault log status RAIL 14 RAIL 15 6 January 2012 LT Journal of Analog Innovation design features Linear Technology PMBus controllers such as the LTC3880 and companion ICs such as the LTC2978 make it easy to program power up and power down sequencing for any number of supplies By using a time based algorithm users can dynamically sequence rails on and off in any order with simple programmable delays LT UTpowerPlay v1 0 154 3 LTC3880 File View Configuration Utilities Help wBAeeaD J 2 Contig A el CL X i Telemetry ip Dashboard U2 7 h5E LTC38 E a System ESA U0 7h5C LTC2978 VOUT1 3 3V VOUT2 2 5V Config VOUT13 3 8V Paged Global Telemetry VOUT 13 3 8V Paged Global Lookup VOUT3 2 0V _Al Global AllPaged Addressing WP General Config On Off Margin Voltage Temperature VOUT4 1 8v Timing Watchdog PGOOD Fault Responses Fault Sharing Scratchpad Identification VOUTS 1 5V VIN_OV_FAULT_LIMIT 15 5000 V Telemetry PWM ENCY EAD _DUTY_ l i
45. most some specialized application needs that offer capacitors as large as 100F but systems require operating voltages higher make using a dedicated tc desirable the maximum working voltage on these than this many supercapacitors are Figure 1 Block diagram 2 of the LTC4425 MPSNS Vout lt x gt BANDGAP SNEEN Vout REFERENCE IDEAL DIODE CONTROLLER CHARGE CURRENT PROFILE GENERATOR 10X ai e a VOLTAGE CLAMP 3 CIRCUITRY EN NSHUNT CONSTANT VOLTAGE CONSTANT CURRENT CONSTANT TEMPERATURE CHARGER CIRCUITRY Ww jes GE oO Ww as jee lt a5 oO Vout 2 250mV 750mV V n VouT LEAKAGE BALANCER Vin Vout VSEL ViN COMPARATOR E VIN F Vout 250mV D OSCILLATOR Vel 2 7V 2 45V RPF PROG PFI PGOOD E COMPARATOR 1 2V RpF2 PFI PFI_RET COMPARATOR FB Vio a EN R J CHARGER FB2 ENABLE PFO fal GND January 2012 LT Journal of Analog Innovation 15 Ooo O The maximum working voltage on a single supercapacitor is 2 V or less Because most systems require operating voltages higher than this many supercapacitors are supplied as a pair of capacitors within a single center tapped package The LITC4425 is designed to to charge stacked supercapacitors and provide a regulated output voltage for the system load supplied as a pair of capacitors within a single center tapped package The LTC4425 is designed to charge two stacked supercapacitors and provide a regulated output voltage
46. mple and loop filter components In a nutshell the phase frequency detector PFD of Figure 1 compares the phase and frequency of the reference clock fgpp after its division by R to produce fppp to those of the vco following an integer division of N The PFD then controls the current sources of the charge pump to ensure that the vco runs at a rate such that when it is divided by n its frequency is equal to fppp and its phase is in sync with the reference clock This describes a negative feedback mechanism with the external loop filter components stabilizing the loop and setting the control bandwidth The O divider increases the output frequency range by dividing down the vco output to create more frequency bands than just that of the vco The following equation relates the output frequency to frgr per N fp PE eX o January 2012 LT Journal of Analog Innovation 9 Ooo O The LTC6946 meets the requirements of high performance systems by integrating components in a single 4mm x 5mm package Specifically tt combines an industry leading ultralow phase noise and spurious integer N synthesizer with a low phase noise and broadband VCO Overall costs are low compared to an external VCO system Table 1 LTC6946 versions LTC6946 1 VCO Range MHz 2240 to 3 740 fto MHz with O 1 2240 to 3740 fio MHz with O 2 1120 to 1870 fLo MHz with O 3 747 to 1247 fio MHz with O 4 560 to 935 fLo MHz with O 5
47. n ICs to control fault response dependencies between rails For example the system can be configured such that a fault on one rail can initiate the shut down of any number of rails If the fault response is configured for immediate off no retry and a fault occurs the host must take action for the rails to be restarted Alternatively if the fault response is set to immediate off infinite retry and a fault occurs the rail attempts to power up autonomously with a user program mable delays in a hiccup mode The fault response can also be set to ignore where the ALERT pin is pulled low in response to a fault to alert the host of an issue but the power supply continues to deliver power to the load The GPIO pins can also be configured as power good status pins or as the fast Uv compara tor output for event based sequencing LTpowerPlay DEVELOPMENT SYSTEM Control of the LTc3880o is fully supported by the LTpowerPlay pc based software development system which allows a designer to modify the configuration settings for all Linear Technology PMBus products in real time no need to manu ally rewire the board Figure 6 shows LTpowerPlay in action controlling a number of functions for multiple devices such as the output voltage protection limits and on off ramps Some waveforms are displayed including the sequencing of multiple rails and telemetry plots A fault condition is indicated with the offending ra
48. n engage and slowly bring the stack back into balance PFO Output The LTC4425 monitors and reports conditions of Vn and Voyr depending on the mode PFO goes low if the PFI pin is below 1 2v or Vin Vout gt 250mvV in Normal mode or Vpg lt 1 11V in LDO mode so PFO can be used to switch the load to the supercapacitor if there is a loss of v y see Figure 3 This is especially useful if the load cur rent is much higher than the maximum current the LTC4425 can supply PFO can be used to switch the load to the super capacitor only in the absence of viy Note that PFO monitors either an input fault or it indicates a low output voltage at the FB pin If the FB pin is grounded that is setup in LDO mode to charge the supercapaci tor to V jj then PFO is permanently asserted low masking any faults on Vy SE FROM uC EN VouT VIN To HIGH PEAK POWER LOAD SUPERCAPACITOR BASED RIDE THROUGH SYSTEM Many electronics systems require a short term power backup system that allows them to ride through brief inter ruptions in power In a similar vein some systems need time to save states or empty volatile memory or perform other housekeeping tasks when power is abruptly removed For example a hard drive may need to park the heads so that they don t land on the media sur face This is an electromechanical system that requires 2oms 100ms of continuous power before it can completely shut down A
49. nergy usage while meeting system performance targets compute speed data rate etc Optimization can be implemented at the point of load at the board rack and even at installation levels reducing L1 0 56uH 0 22uF 1 98k DO D1 CMDSH 3TR VOUTI 1 8V 20A Court 530uF Couto CouT1 C330uF SANYO 4TPF330ML PLUS 2x 100pF AVX 12106D107KAT2A T LO L1 VISHAY IHLP 4040DZ 11 14H 0 56uH M1 M2 RENESAS RJK0305DPB M3 M4 RENESAS RJK0330DPB 4 January 2012 LT Journal of Analog Innovation design features ANALOG CONTROL LOOP ANALOG CURRENT WAVEFORM J JL J JL lt gt FIXED fsw DIGITAL CONTROL LOOP DIGITAL RAMP lt gt FIXED fsw Figure 2 The LTC3880 s analog control loop vs a digital control loop infrastructure costs and the total cost of ownership over the life of the product To provide best performance regulation the LTc3880 sticks to a precision reference and temperature compensated analog current mode control loop to produce a tight 0 5 DC output voltage accuracy The analog control loop makes for easy compensation which is calibrated to be independent of operating conditions yields cycle by cycle current limit and produces a fast and accurate response to line and load transients without any of Figure 4 It s easy to set up a complete development platform with LTpowerPlay software USB DC1613A USB to PMBus Controller 0C O Demonstration Kit or
50. noise to that of white noise on the demodulator s ability to deduce the message correctly Assume that the system and signals in Figure 2 are all ideal MIXER flo Figure 2 An ideal mixer downconverting an ideal tone with the use of a real life LO design features LU oc lt oc Co T IN PHASE Figure 3 Ideal constellation of a 64 QAM signal except that the mixer has a non zero noise figure such that it adds white noise to the received signal The constellation of the IF signal in this case is shown in Figure 5 Once again the symbols are offset from their ideal spots causing errors in the received signal The ultimate conse quence of white noise on the system is very similar to that of phase noise DESIRED ADJACENT CHANNEL CHANNEL RF CHANNEL SPACING LO TRF flo DESIRED CHANNEL MIXER All LTC6946 versions offer Superior in band phase noise with industry leading 1 f performance The integrated VCOs achieve low phase performance and require no external components FAHEFA QUADRATURE IN PHASE Figure 4 64 QAM constellation corrupted by phase noise In a practical situation the received signal at the RF port of the mixer has a limited SNR which is already inadequate for error free demodulation at the IF port A real mixer worsens the situation due to its own impairments The phase noise of the Lo further harms the snr if it is not carefully designed Accordingly th
51. nother example involves the effect of large electrical machines on power systems If a large electric motor is started such as a commercial building air conditioner or elevator the mains supply may collapse for several line cycles Usually the input supply stores only enough energy for between a half a cycle and one cycle Devices powered by the input supply need a way to oper ate normally until the mains recovers January 2012 LT Journal of Analog Innovation 17 Ooo O Supercapacitors are well suited to short power burst ride through applications Their low source impedance allows them to supply significant power for a relatively short time and they are considerably more robust than batteries Vpp ia Figure 4 Complete supercapacitor based power ride through system ICHARGE 1000 R ICHARGE 2A Csc 550mF 5 5V CAP XX HS206F x1 x2 x3 OR x4 L1 1H LPS4018 102MLC L2 2 2uH LPS4018 222MLC G1 VIN BUCK V1 E1 LTC4416 oe 10uF GND V RUN 3 3 E2 LTC3606 RLIM PGOOD 54 9k 1 21M M1B v2 Si7913DN FB GND GND1 EPAD VIN SHDN SW 267k LTC3539 MODE VOUT 22uF 2 INSERT JUMPER L T TO BYPASS BOOST CONVERTER GND PGND EPAD 1 0eM 562k Ride through applications can certainly be short time and they are consider boost regulator with output disconnect implemented with battery backup but in ably more robust than batteries This boost regulator operates down to many
52. pically degrade the reference dominated close in phase noise CHANNEL SPACING 12 January 2012 LT Journal of Analog Innovation design features Wideband Wideband phase noise is dominated by the buffering present at the output of the vco Like vco noise and due to reciprocal mixing wideband phase noise affects adjacent chan nels Even far out channels experience a rise in their noise floor due to a distant strong channel commonly referred to as a blocker The Lrc6946 has a superior 157dBc Hz wideband phase noise floor that matches the performance of standalone broadband vcos thus minimizng blocking effects THE IMPORTANCE OF LOW SPURS An integer N PLL produces spurs around the Lo offset at its PED update rate fppp and at the har monics of this rate These are com monly referred to as reference spurs Consider a typical scenario in a multi channel wireless communications system that carries a stronger chan The LTC6946 boasts an impressive 226dBc Hz normalized in band phase noise floor that keeps the plateau area as low as possible This figure allows use of the LTC6946 in the most demanding applications LTC6946 DESIGN EXAMPLE To appreciate the simplicity of the design process with the LTc6946 a complete design example for the Lo of a wide band point to point radio for wire less access is shown here The design assumes the following frequency plan e LO frequency band 4700MHz to
53. r TRY IT OUT A psychrometer readout is imple mented as an Easter egg in the LTC2991 DC1785A demonstration soft ware available as part of the Linear Technology QuikEval software suite The demo board should be connected as shown in Figure 1 To access the read out simply add a file named tester txt without the quotes in the install directory of your DC1785A software The contents of this file do not mat ter On software start up the message Test mode enabled should be shown in the status bar and a Humidity option will appear in the Tools menu Relative humidity readings can then be compared to sensors of similar accuracy grade such as resistive and capacitive film m fel Humidity E S Wet Bulb 19 1257 Figure 3 A psychrometer readout is implemented as an Easter egg in the LTC2991 DC1785A demonstration software available as part of Linear s QuikEval software suite January 2012 LT Journal of Analog Innovation 29 Ooo O Negative Voltage Diode OR Controller Tolerates Inputs to 300V and Beyond Mitchell Lee i Figure 1 The LTC4354 shown in a RTN COM The LTC4354 negative 10A 48V application handles up to voltage diode OR controller 100V differential across the inputs i is designed to operate with inputs of up to 100V As shown in Figure 1 the maximum voltage between 48V Va and oo 16V 2k 15A 10Q Va 48V 48COM 10A 48V Ve Is limited to 100V
54. r real time control management parameters including capacitance of the digital controller and monitoring of critical point of load e output voltage and margin voltages converter functions Configurations are The LTC3880 is designed so the loop gain e temperature compensated current limit downloaded to internal EEPROM via the does not change when its configuration threshold based on inductor temperature 1 C serial interface supported by Linear file is modified When the output volt Technology s LIpowerPlay pc based switching frequency development software Figure 4 shows the e overvoltage and undervoltage high speed LTpowerPlay development platform with supervisor thresholds a USB to I C SMBus PMBus adapter After age or the current limit is modified the transient response is unaffected and the compensation loop needs no adjustment e output voltage on off time delays the configuration file is stored on chip in P 5 y nonvolatile memory the controller powers Output voltage rise fall times up autonomously without burdening the e input voltage on off thresholds host Configuring a board is a simple task e output rail on off that requires zero firmware development output rail margin hi margin lo responses to internal external faults Figure 5 LTpowerPlay and e fault propagation PMBus used to control 15 SYSTEM HOST I C PMBUS RAIL 1 PROCESSOR y or more rails WITH In addition PMBus func LTpowerP
55. r supplies When comparing products be certain the EN55022 certification was performed under similar conditions as EMI field strength and the ability to pass EMI regu lations is highly dependent on factors such as the input voltage output cur rent output voltage and pcs layout All LTM4613 test operating conditions and design files are freely available Designers using the LTM4613 can be confident that it will perform as certified m UMTS Base Station Receiver Fits in Half Inch Square Douglas Stuetzle and Todd Nelson How much integration is possible while still meeting consideration for the receiver the macrocell base station performance requirements Process tequirement is lt 111dBm for an input technology dictates that certain key functions are produced SNP of 19 8dB smrtz That means the in specific processes GaAs and SiGe in the RF realm fine line CMOS for high speed ADCs and high Q filters cannot be implemented well in semiconductor materials Yet the market continues to demand higher integration effective noise floor at the receiver input must be lt 158 2dBm Hz DESIGN ANALYSIS ZERO IF OR DIRECT CONVERSION RECEIVER The LTM 9004 is a direct conversion receiver utilizing an 1 Q demodulator With that in mind Linear Technology frequency components discrete pas baseband amplifiers and a dual 14 bit has applied system in package sip sive filtering and fine line CMOS ADCs 125Msps ADC as shown in
56. racted when the boost regulator is enabled is ELOAD _ 0 67 7 92s _77 ECAP 6 875 The percentage of energy stored in the supercapacitor that is recovered increases from 45 1 to 77 This allows use of a smaller less expensive supercapacitor CONCLUSION The power ride through system shown here uses a 0 55F supercap to hold up power long enough for a microcon troller to complete some last gasp housekeeping tasks One way to extend the ride through time for a given super capacitor is to add a boost regulator to the system which allows for energy scavenging The run time of a given supercapacitor can be extended by gt 30 if energy scavenging is used This is particularly relevant if the superca pacitor operating voltage is reduced to ensure high temperature reliability In addition the shape of the output voltage is considerably improved as the input voltage to the output regula tor is now square in shape This results in a steady 3 3V output voltage with a sharp cutoff instead of a ramped volt age drop as the supercap drains m January 2012 LT Journal of Analog Innovation 31 highlights from circuits linear com WALL ADAPTER DUAL BATTERY LOAD SHARING WITH MP1 J IRF5305 AUTOMATIC SWITCHOVER TO A WALL ADAPTER The LTC4415 contains two monolithic aie BATI ATF a a PowerPath ideal diodes each capable a5 4 7uH 4 7uH Vours of supplying up to 4A with typical j SW1A SW2 1 8V
57. ributed around a Prc card Individual point of load POL DC DC con verters step down the IBv to the required rail voltages which normally range from o 5V to 5V with output currents ranging from o 5A to 120A Figure 5 shows how a multi rail system can be controlled with various Linear Technology controllers and DC DC converters PMBus devices The 7 b1011_110 1 b1 point of load DC DC converters can be self contained modules monolithic devices or solutions comprising DC DC control ler ICs associated inductors capacitors and MOSFETs These rails normally have strict requirements for sequencing volt age accuracy overcurrent and overvolt age limits margining and supervision The sophistication of power management is increasing It is not uncommon for circuit boards to have over 30 rails These boards are already densely populated so adding digital power system management circuitry must require minimal board space and external pins The system must be easily modified by the user or a sys tem host processor The LTc3880 works seamlessly with other Linear Technology PMBus supervisors Companion ICs and Linear Technology regulators for optimal control of complex boards These systems Operate autonomously after initial configu ration or communicate with the host for command control and to report telemetry Linear Technology PMBus controllers such as the LTc3880 and companion Ics such as
58. ries Applications include electric and hybrid electric vehicles high power portable equipment battery backup systems and high voltage data acquisition systems ENERGY HARVESTING AND UMODULE PRODUCTS NAMED ELEKTRA AWARD FINALISTS Electronics Weekly in the ux has selected two Linear Technology products as final ists for the Elektra European Electronics Industry Awards The LTC3105 400mA syn chronous step up DC DC converter for energy harvesting is a finalist for the Renewable Energy Design Award The LTC3105 incorporates maximum power point control Mppc and starts up with inputs as low as 250mV Because the LTC3105 can operate over an extremely wide input range of 0 225V to 5V it is ideal for harvesting energy from high impedance alternative power sources including single dual or multiple pho tovoltaic cells thermoelectric genera tors TEGs and fuel cells The LTC3105 is ideally suited to power wireless sen sors and data acquisition applications A second Linear Technology prod uct the LTM 4611 pModule switch mode DC DC regulator is a finalist for Power System Product of the Year It is a complete switchmode DC DC system in a package point of load regulator capable of generating its own 5v N channel MOSFET gate drive for very efficient voltage conversion from 3 3v or less to loads as low as 0 8v at up to 15A Applications include systems with only 3 3V 2 8V or 2 5V as the main power bu
59. roller Ic with an analog feedback control loop to one with a digital feedback control loop The analog loop has a smooth ramp whereas the digital loop has discrete steps that can result in stability problems slower transient response more required output capaci tance in some applications and higher output ripple and jitter on the pwM control signals due to quantization effects In fact when put up against a compa rable ic with a digital control loop the LTC3880 s analog control loop using 50 less output capacitance has better stability with a shorter settling time Additionally the digital control transient response has an oscillation prior to settling due to the quantization effects caused by its finite ADC resolution Figure 3 shows the transient response of the LTC3880 s analog control loop compared to that of January 2012 LT Journal of Analog Innovation 5 Ooo O Configurations are downloaded to internal EEPROM via the C serial interface supported by Linear Technology s LT powerPlay PC based development software After the configuration file is stored on chip in nonvolatile memory the controller powers up autonomously without burdening the host a competitor s digital control loop Note PMBus CONTROL PMBus functions include the abil that the LTc3880 yields cleaner results The Lrc3880 1 features digital program ity to program specific power supply with approximately half the output ming and read back fo
60. rrent profile in Normal mode is designed to prevent inrush currents has an Rpgony Of approximately 50mQ so when Vyn Vout is small enough this resistance may limit the current For Vin Vout Voltages less than 15mvV the ideal diode shuts off reducing the current out of Voyr to a small leakage current LDO Mode In LDO mode the regulation function is not controlled by vin Vourn but by feedback from the output voltage LDO mode is chosen by connecting an output voltage divider to the FB pin to set the maxi mum output voltage In LDO mode the LTC4425 behaves like a voltage regulator supplying up the programmed current to the load and to charge the superca pacitor If the supercapacitor is at the desired voltage the LTC4425 contin ues to supply the load current up to the programmed maximum current If the desired supercapacitor voltage is as close to Vy as possible then ground the FB pin This means that the loop will never reach regulation but the output voltage will track the input voltage within 15mV or Iyout X Rpsion Whichever is larger The Lrc4425 limits the current available to the Voyr pin Usually this current is used to charge the supercapacitor but could also go to a load In LDO mode the current is limited in two ways the PROG pin and thermal limiting The proG reference voltage used in LDO mode is 1V and the fraction of the Vour current that is impressed on the resistor a
61. s such as in very compact data storage and RAID systems ATCA and networking cards as well as medi cal and industrial equipment ANALOG CIRCUIT DESIGN BOOK IN SECOND PRINTING The 960 page hardcover book Analog Circuit Design A Tutorial Guide to Applications and Solutions edited by Bob Dobkin and Jim Williams sold out of its first printing in only three weeks The good news is that the publisher Elsevier Science amp Technology Books expedited a second printing so you can now order the book from either Elsevier or Amazon For more information or to purchase the book go to www linear com designtools acd_book php Electronic Design magazine announced that Linear Technology s battery stack monitor is the winner of the Best Electronic Design award in the Automotive category CONFERENCES amp EVENTS APEC 2012 The Applied Power Electronics Conference amp Exposition Disney s Coronado Springs Resort Orlando Florida February 5 9 Booths 1100 amp 132 Linear will showcase its latest power products including the LTC3300 for bidirectional multicell battery balancing LTc4000 high volt age high current controller for battery charging and power management and LTC6803 multicell battery stack monitor Sam Nork Director of Linear s Boston Design Center will make a presentation on Active Cell Balancing featuring the LTC3300 on Wednesday February 8 at 10 30 AM as part of Session 5 in Fiesta 1 2
62. sents a simple way for describing the importance of low phase noise in preserving signal quality Effect of Phase Noise on Digitally Modulated Signals Complex digital modulation schemes make efficient use of limited channel bandwidth in wireless communications but tend to put pressure on the phase noise requirements used to generate the LO in these systems To further clarify the effect of phase noise on such an approach assume that the RF port of the mixer in Figure 2 receives a 64 quadrature amplitude modulated 64 QAM signal Figure 3 shows the IF signal constella tion diagram a 2 dimensional scatter plot of the demodulated signal at sym bol sampling instants assuming both the mixer and the Lo source are ideal Because each of the dots is distinct and centered exactly within the deci sion boundary a proper demodu lation scheme will decipher the received message with zero errors Going back to the system given in Figure 2 and assuming the phase noise of the Lo as the only non ideal element in the system the constellation of the IF signal becomes that shown in Figure 4 The landing locations of the sampled symbols are skewed by the Lo phase noise Consequently the symbols are not as easily intelligible by the demodula tor As such phase noise alone is capable of making the demodulator s job tricky causing errors in the interpreted message To put this into perspective compare the effect of phase
63. tage of the boost regula tor drops it must draw higher and higher current to sustain its output at 3 4V Because the input of the buck regula tor remains at 3 4V its output remains in regulation When the boost regula tor reaches its input UVLO it shuts off es Pg Re ee ee a A WS lan Sill AR RARER ae gt Figure 5 Front and back board layout used to test the circuit in Figure 4 and its output immediately collapses Since its input voltage has now col lapsed the buck regulator shuts off Energy Scavenging in the Ride Through Application What voltage should the boost output be set to Clearly operation is identical with or without the boost circuit enabled until the input dropout of the buck regula tor is reached One goal in the design Vsc AND k or VIN BUCK ese Veg AND 1 DIV Vin BUCK VDD 1V DIV 3V3 2V DIV 1s DIV Figure 6 If the boost regulator is disabled in the circuit of Figure 4 the ride through applications can support a 0 67W load for about 4 68s is to minimize the amount of time that the boost regulator is used in the power chain because each additional regulation step lowers the overall efficiency Here we set the boost regulator output volt age as close to the buck regulator input dropout voltage as possible or 3 4V The boost regulator must have a syn chronous output to maximize efficiency once the boost regulator engages This continued on page 31
64. ted and parasitic capacitors of the MOSFETs difficult see sidebar Enter the LTM 4613 with the switching action of all switch During MOSFET switching the ener mode converters from ideal sources gener 8 amp 8y 8a pModule step down regulator which saves significant design time by squeezing guaranteed EMI compliance and high per formance into a single compact package ate and directly influence the strength of radiated electromagnetic waves Furthermore parasitic devices within the Electromagnetic Theory and EMI Switch Mode Regulators A short reflection on electromagnetic theory can help one understand the EMI implications of high current high power DC DC step down converters Gauss law states that the strength of an electric field in a given area over an enclosed volume is proportional to the total charge inside it f FedA 2 0 Consider this law as applied to a circuit board A PCB trace is simply a volume of charge where the amount of charge in it is proportional to the amount of current passing through it specifically one ampere equals one coulomb of charge per second So higher currents create stronger electric fields Additionally in a switch mode regulator these fields vary in strength as currents change throughout the 20 January 2012 LT Journal of Analog Innovation switching cycle Maxwell s equations tell us that a constantly varying electric field creates a self sustaining elec
65. th respect to Vss MOSFETs M1 and M2 can be expected to avalanche and clamp any positive going spikes exceeding 300V to less than 400V While the circuit in Figure 3 was designed for a 48v system chang ing Ryn to a 100k 1w unit allows the circuit to operate with inputs of 200V to 300v DC Higher voltage standoff is possible with appro priate selection of MOSFETs m Va 48V 300V MAX DIFFERENTIAL VOLTAGE Vg 48V Figure 3 The LTC4354 shown in a 10A 48V application handles up to 300V differential across the inputs RTN COM RIN 12k uF 16V 48COM 10A M1 M2 IXTT 1XTT88N30P M3 M4 DIODES INC ZVN0540A supercap charger continued from page 19 implies a boost regulator with a block ing output This in turn necessitates the second ideal diode to allow the supercapacitor to power the buck regu lator until the boost regulator engages The boost regulator must operate to as low a voltage as possible to ensure that the maximum amount of energy is scavenged from the supercapacitor If the supercapacitor is initially charged to 5v then the energy in the supercapacitor is sv 0 56F 052 6 875 The output power is 3 33V at 0 2A 0 67W so the percentage of the energy stored in the supercap that is extracted with a buck only circuit is ELOAD _ 0 67 4 68s __ 45 1 ECAP 6 875 The percentage of the energy stored in the supercap ext
66. tromagnetic wave If currents change rapidly as is the case in a switch mode regulator some of the electromagnetic energy is radiated into the environment which can cause electromagnetic interference EMI EMI is produced by all of the current loops within a step down regulator In general EMI mitigation becomes increasingly important and difficult as power consumption goes up While this short description is incomplete leaving out for example the implications of the magnetic component surrounding the current paths and the rapid polarity changes on the inductor it shows the relationship between a regulator s increasing output power and radiated EMI which must be addressed with good design practices stored in the parasitic inductor reso nates with the energy stored in the parasitic capacitor When the energy is released the resulting voltage spike at the switch node Vey can be as large as twice of the input voltage as shown in Figure 3 As the current capability of the MOSFET increases the energy stored in Figure 1 FCC radiated limits USA and EN55022 class B radiated limit European Union FCC PART 15 CLASS A T n Mca oo al cof emerson PCr COPE COP 0 30 130 230 330 430 530 630 730 830 9301030 FREQUENCY MHz RADIATED FIELD STRENGTH dByV m design features for more information To view the complete LTM4613 EMI For information about other EN55022B certification test results and r
67. try in check the LTC4425 automatically reduces the charge cur rent to 1 10 of the programmed value whenever either of the stacked superca pacitors approaches the clamp voltage Leakage Balancer The Lrc4425 detects any imbalance in the stacked supercapacitors by comparing Vm p tO Vour When the Lrc4425 detects an imbalance it sinks or sources current from the Vmm pin to balance the supercapacitor The Lrc4425 leakage balancer is primarily intended to account for the effects of self or system leakage and so the maximum sink or source current is around 1mA Nevertheless the interaction of the volt age clamps and leakage balancer will eventually correct even quite large imbal ances The supercapacitor may become unbalanced during charging because one capacitor in the stack is larger or smaller than the other For the same charge cur rent the larger capacitor will be a lower voltage than the smaller capacitor So the smaller capacitor may activate its volt age clamp before the larger capacitor finishes charging unbalancing the stack The LTC4425 detects any imbalance in the stacked supercapacitors by comparing Vmp to Vout When the LTC4425 detects an imbalance it sinks or sources current from the Vmp pin to balance the Ssupercapacitor Figure 3 Charging 2 cell series supercapacitor from Li ion source PFO monitors Vij such that power is only switched to the supercap if Vij fails The leakage balancer will the
68. tside of its specified operating limits or to improve the design of future products Power consumption data can be used to reduce overall power use in real time Digital power is a rapidly growing field driven by customer demand for ever more complex boards The Lrc3880 and other Linear Technology PMBus prod ucts work together to give flexible digital control to high performance supplies Board designers now have the tools to streamline the process of bringing best in class performance quickly to market m 8 January 2012 LT Journal of Analog Innovation Integer N Synthesizer with Integrated VCO Yields Top Notch PLL Performance ina 4mm x 5mm Package Michel Azarian High data throughput requirements in high bandwidth communications systems make the phase purity of the local oscillator critical to reliable performance One way to conserve space and cost in such systems is to use an IC that combines the PLL and the VCO without sacrificing signal quality The LTC6946 does just that by integrating a world class frequency synthesizer a low phase noise VCO and top shelf performance allowing designers to meet stringent RF system performance goals LTC6946 SAVES TIME AND SPACE In either an RF receiver or transmitter system the local oscillator LO plays a key role in achieving the desired system speci fications The main goal in such systems is to maximize the signal to noise ratio SNR of the received or transmitted signal while
69. ttached to the PROG pin is 1 1000 So the current limit is 1000 Rproc and can be as high as 24 If one imagines charging a 100F capacitor even at 2A the voltage changes at 2omV s And during this charging process there is significant dissipation usually several watts If a portion of the Voyy current is going to a system load then the time to charge the supercapacitor is extended The LTC4425 has a linear thermal regulation loop that limits the current from Voyz such that the die temperature remains below 105 c This is a linear circuit meant for usage under normal operat ing conditions not a protection circuit that is only there to prevent damage LTC4425 FEATURES Voltage Clamps There are voltage clamps on each of the stacked output supercapacitors from Vout tO Vum and from Vyp to ground The purpose of these voltage clamps is to ensure that the supercapacitors can not be charged above their rated volt ages The clamp voltage on each of the 16 January 2012 LT Journal of Analog Innovation design features stacked supercapacitors can be selected to be 2 45V or 2 70V via the SEL pin Suppose that the input voltage is 6v and the FB pin is grounded so that the LTC4425 is in LDO mode and try ing to charge the supercapacitor to the input voltage The clamps will activate whenever either of the stacked super capacitors exceed the clamp voltage To keep the power dissipation in the clamp circui
70. tup consisted of two Rohde amp Schwarz SMA 100A sig nal generators for RF and Lo a Rohde amp Schwarz smy o1 generator for the ADC clock and TTE inline filters The LIM9004 AC consumes a total of 1 83 w from 5v and 3v supplies AC performance includes SNR of 72 dB 9 42MHz and SFDR of 66dB CONCLUSION The trMgoog exhibits the high perfor mance necessary for UMTS base station applications yet offers the small size and integration necessary for very compact designs By utilizing sip technology the uModule receiver utilizes components made on optimum processes SiGe CMOS and passive filter elements m January 2012 LT Journal of Analog Innovation 25 ee What s New with LI spice IV Gabino Alonso twitter Follow LTspice on Twitter for Up to date information on models demo circuits events and user tips www twitter com LITspice NEW HOW TO VIDEOS Using Transformers in LTspice IV video linear com 93 Transformers and coupled inductors are key components in many switch ing regulator designs including flyback forward and sEPIC converters Although it is possible to make a dedicated subcir cuit for a specific transformer it is often better in LTspice Iv to define a separate inductor for each transformer winding and then couple them all together mag netically via a single mutual inductance K statement This video shows how to define a transformer using inductors and specify the mutual inductance v
71. z allowing four WCDMA carriers LTnsee4 0c15136 M 14BIT BIT DIRECT CONVERSION RECEIVER SUSSYSEM DEMO BOARD a 0 IN w wo LTM9004 2234567890122456 408 432 1900 uuu l near com Figure 2 Minimal external required circuitry is required to build a complete receiver With the RF automatic gain control AGC set for minimum gain the receiver must be able to demodulate the largest antici pated desired signal from the handset This requirement ultimately sets the maximum signal the LTM9004 must accommodate at or below 1dBFs The minimum path loss called out in the specification is 53dB and assumes a handset average power of 28dBm The maximum signal level is then 25dBm at the receiver input This is equivalent to 14 6dBFs peak Figure 3 Single tone FFT AMPLITUDE dBFS a ATT 0 10 20 30 40 50 60 FREQUENCY MHz Wm There are several blocker signals detailed in the UMTS system specification Only a specified amount of desensitization is allowed in the presence of these signals the sensitivity specification is 115dBm The first of these is an adjacent channel 5MHz away at a level of 42dBm The level of the digitized signal is 11 6dBFs peak The psr post processing adds 51dB rejec tion so this signal is equivalent to an inter ferer at 93dBm at the input of the receiver The resulting sensitivity is 112 8dBm The receiver must also contend with a

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DESIGN FEATURES LTJournal V21N4 2012 01

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