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ATMEL Bluetooth/ISM 2.4-GHz Front-End IC T7024 Manual

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1. 15 a KJ a 10 5 0 2000 2200 2400 2600 2800 3000 Frequency MHz Figure 9 2 LNA N20 Gain and Noise Figure versus Frequency 25 5 20 4 Gain E 15 3 3 m NF S3 S uw 2 2 5 1 0 0 2000 2200 2400 2600 2800 3000 Frequency MHz Figure 9 3 LNA NF and Gain versus Temperature Relative gain relative NF dB Temperature C 6 T7024 4533H BLURF 07 07 Figure 9 4 LNA Typical Switch out Current versus Ryan 20 I MA Dy 1 10 100 1000 10000 100000 1000000 10000000 R with Figure 9 5 PA PSSO20 Output Power and PAE versus Supply 250 220 190 ls rx MA 160 Pout dBm PAE 130 Supply Voltage V Figure 9 6 PA PSSO20 Output Power and PAE versus Ramp Voltage Pout dBm 96 0 dBm inPA 4533H BLURF 07 07 EE AMEL Figure 9 7 PA PSSO20 Output Power and PAE versus Input Power Is rx mA A Pout dBm Gp dB 40 30 20 10 0 10 Input Power dBm Figure 9 8 PA PSSO20 Output Power and PAE versus Frequency Is rx mA Pout
2. Parameters Test Conditions Symbol Min Typ Max Unit Power Amplifier Supply voltage Pins V1_PA V2_PA V3_PA_OUT Vs 2 7 3 0 4 6 V TX PSSO20 ls Tx 190 mA Supply current TX QFN20 ls tx 165 mA RX PA off Va up x 0 1V ls Rx 10 HA Standby current Standby 5 standby 10 HA Freguency range f 2 4 2 5 GHz Gain control range TX AGp 60 42 dB Power gain maximum TX pin PA_IN to V3_PA_OUT Gp 28 30 33 dB Power gain minimum TX pin PA IN to V3_PA_OUT Gp 40 17 dB Ramping voltage maximum Us AME gain maximum VRAMP max 1 7 1 75 1 83 V Ramping voltage minimum Ei power gain minimum VRAMP min 0 1 V in RAMP Ramping current maximum TX Vaamp 1 75V pin RAMP IRAMP max 0 5 mA Power added efficiency TX PS55020 PAE S9 ls TX QFN20 PAE 35 40 Saturated output power Ee Psat 22 23 24 dBm Input matching TX pin PA IN VEU lt 1 511 Output matching TX pins V3 PA OUT a lt 1 5 1 TX pins V8 PA OUT 2 fo 30 dBc Harmonics at P 4 23 dBm TX pins V3 PA OUT 3 fo 30 dBc T R Switch Driver Current Programming by External Resistor from R_SWITCH to GND Standby pin SWITCH_OUT Is O standby 1 HA ls Rx 1 Switch out current output Es 9 100 su DE TX at 1 2 ls 1e 7 mA TX at 38 ls ask 17 mA TX at oo ls oR 19 mA Low noise Amplifier Supply voltage All pin VS_LNA Vs 2 7 3 0 5 5 V Supply current RX ls 8 9 mA Notes 1 Power amplifier shall b
3. Figure 10 10 Typical Application T7024 QFN20 Package LNA OUT PA IN O PA ramp harm termination R1 is selected R1 with DIL switch Var LNA IN V3_PA Switch Out VS_LNA PA OUT Pin diode replaced by ii alti LED on application board _ blocking capacitors _ depending on application 11 Ordering Information Extended Type Number Package Remarks MOQ T7024 TRSY PSSO20 Tube Pb free 830 pcs T7024 TRQY PSSO20 Taped and reeled Pb free 4000 pcs Taped and reeled T7024 PGPM QFN20 Pb free halogen free 1500 pcs Taped and reeled T7024 PGQM QFN20 Pb free halogen free 6000 pcs Demoboard T7024 PGM QFN20 Evaluation board QFN 1 Demoboard T7024 TR PSSO20 Evaluation board PSSO 1 AMEL 4533H BLURF 07 07 AMEL 12 Package Information Package PSSO20 Dimensions in mm 6 75 max 6 45 0 15 ETER ar 6 7 max e baal g 3 0 25 A e m co 8 3 5 4 0 2 20x 0 65 oy fed cee 5 85 ce technical drawings according to DIN specifications Drawing No 6 543 5078 01 4 Issue 1 05 06 01 16 4533H BLURF 07 07 13 Package Information PB Free Package QFN 20 5 x 5 Exposed pad 3 1 x 3 1 Dimensions in mm Not indicated tolerances 0 05 0 901 5 0 0 05 0 05 20 ce technical drawings Y according to DIN 5 i sp
4. 0 Pins QFN20 Symbol Function 1 4 R_SWITCH Resistor to GND sets the PIN diode current 2 5 SWITCH_OUT Switched current output for PIN diode 3 6 GND Ground 4 7 LNA_IN Low noise amplifier input 5 9 VS_LNA Supply voltage input for low noise amplifier 6 8 GND Ground 7 11 V3_PA_OUT Inductor to power supply and matching network for power amplifier output 8 12 V3_PA_OUT Inductor to power supply and matching network for power amplifier output 9 13 V3 PA OUT Inductor to power supply and matching network for power amplifier output 10 10 GND Ground 11 15 RAMP Power ramping control input 12 16 V2 PA Inductor to power supply for power amplifier 13 17 V2_PA Inductor to power supply for power amplifier 14 14 GND Ground 15 19 V1_PA Supply voltage for power amplifier 16 20 PA_IN Power amplifier input 17 18 GND Ground 18 1 LNA_OUT Low noise amplifier output 19 2 RX_ON RX active high 20 3 PU Power up active high Slug Slug GND Ground 2 4533H BLURF 07 07 3 Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Parameters Symbol Value Unit Supp
5. Features Single 3 V Supply Voltage High Power added Efficient Power Amplifier Typically 23 dBm Ramp controlled Output Power Low noise Preamplifier NF Typically 2 1 dB Biasing for External PIN Diode T R Switch Current saving Standby Mode Few External Components Packages PSSO20 QFN20 with Extended Performance 1 Description The T7024 is a monolithic SiGe transmit receive front end IC with power amplifier low noise amplifier and T R switch driver It is especially designed for operation in TDMA systems like Bluetooth and WDCT Due to the ramp control feature and a very low quiescent current an external switch transistor for Vs is not required Figure 1 1 Block Diagram RX ON PU VS Il xxl TX RX standby Control J SWITCH_OUT R_SWITCH AMEL T O Bluetooth ISM 2 4 GHz Front End IC 7024 4533H BLURF 07 07 2 Pin Configuration AMEL Figure 2 1 Pinning PSSO20 Figure 2 2 Pinning QFN20 R_SWITCH 1 20 PU SWITCH_OUT 2 O 19 RX_ON GND 3 18 LNA OUT LNA_IN 4 17 GND n V3 PA OUT SWITCH OUT VS LNA 5 16 PA IN V3 PA OUT R SWITCH mE T7024 V3 PA OUT PU GND 6 15 VI PA GND RX ON ma RAMP LNA OUT V3 PA OUT 7 14 GND V3 PA OUT 8 13 2 PA V3 PA OUT 9 12 V2 PA GND 10 11 RAMP Table 2 1 Pin Description Pins PSSO2
6. SO20 QFN20 Pout versus Vaayp and Temperature 30 f 2 4 GHz Vs 3V P 0 dBm 20 5 E Q 10 S 8 25 80 15 10 40 C 20 1 0 1 2 1 4 1 6 1 8 Vamp V 10 T7 024 OIOI ea 4533H BLURF 07 07 Figure 9 16 855020 QFN20 LNA Gain dB versus RX_ON V Gain dB RX_ON V 10 Input Output Circuits Figure 10 1 Input Circuit PA_IN V1_PA V1 PA Figure 10 2 Input Circuit RAMP V1 PA V1 PA RAMP AMEL 11 4533H BLURF 07 07 LEEF 12 Figure 10 3 Input Circuit V2_PA V2_PA GND Figure 10 4 Input Output Circuit V PA OUT V3 PA OUT GND Figure 10 5 Input Circuit SWITCH OUT R SWITCH V1 PA SWITCH OUT R_SWITCH GND 4533H BLURF 07 07 Figure 10 6 Input Circuit LNA_IN VS_LNA VS_LNA LNA_IN GND Figure 10 7 Input Circuit PU RX_ON VS_LNA IN PU Figure 10 8 Output Circuit OUT VS LNA LNA OUT GND AMEL 13 4533H BLURF 07 07 AMEL Figure 10 9 Typical Application T7024 PSSO20 Package LNAOUT PAIN O 5 6nH _ 3 9nH a ee RX ON O 3p3 NE TTA O V2 PA PUO T O PA ramp harm termination PS PA OUT 1 8p 0p8 R1 Le p R1 is selected L with DIL switch i na N Pin diode replaced F oN by LED on O O O Pa application board LNA IN V3_PA Ness Switch Out VS LNA Blocking capacitors depending on application 14 T7 02 4 a 4533H BLURF 07 07
7. al Support Sales Contact www atmel com bluetooth rf atmel 8 hno atmel com www atmel com contacts Literature Requests www atmel com literature Disclaimer The information in this document is provided in connection with Atmel products No license express or implied by estoppel or otherwise to any intellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH IN ATMEL S TERMS AND CONDI TIONS OF SALE LOCATED ON ATMEL S WEB SITE ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice Atmel does not make any commitment to update the information contained herein Unless specifically provided otherwise Atmel products are not suitable for a
8. dBm Frequency MHz Figure 9 9 PA QFN20 Output Power and versus Supply Voltage l5 rx mA Pout dBm 96 Supply Voltage V 8 T7024 4533H BLURF 07 07 T7024 Figure 9 10 PA QFN20 Output Power and PAE versus Ramp Voltage 250 x 200 lt x 150 E x TD FR gt 100 uw 8 a 50 0 Figure 9 11 PA QFN20 Output Power and versus Input Power amp 50 300 z PAE 40 250 5 Gain amp 30 200 E n 20 LS TX 150 pe K E Vs 3V o 10 122 4 GHz 100 w Vamp 18V 3 Ppa 0 dBm 50 Pout 10 0 40 30 20 10 0 10 Input Power dBm Figure 9 12 PA QFN20 Output Power and PAE versus Frequency 250 S 200 lt a 150 x amp E D B 100 2 a 50 0 2400 2420 2440 2460 2480 2500 Frequency MHz 4533H BLURF 07 07 EE AMEL Figure 9 13 LNA Supply Current versus Temperature Supply current mA 40 20 0 20 40 60 80 Temperature C Figure 9 14 PA PSSO20 Supply Current versus lamp and Temperature 200 Supply current mA 0 1 1 0 10 0 100 0 1000 0 tramp LA Figure 9 15 PA PS
9. e unconditionally stable maximum duty cycle 100 true CW operation maximum load mismatch and duration load VSWR 10 1 all phases 10s Ze 500 arf D With external matching network load impedance 500 Low noise amplifier shall be unconditionally stable With external matching components LNA gain can be adjusted with RX_ON voltage according to Figure 9 16 on page 11 Please note that for RX_ON below 1 4V the T R switch driver switches to TX mode 4533H BLURF 07 07 7 Electrical Characteristics Continued Test conditions unless otherwise specified Vs 3 0V Tan 25 C Parameters Test Conditions Symbol Min Typ Max Unit Supply current TX control logic active 05 m LNA and control logic Pin V8 LNA 5 Standby current Standby pin VS_LNA 5 standby 1 10 HA Freguency range RX f 2 4 2 5 GHz Power gain RX pin LNA IN to LNA OUT Gp 15 16 19 dB Noise figure RX PSSO20 NF 2 5 2 8 dB RX QFN20 NF 2 1 2 9 dB Gain compression RX referred to pin LNA_OUT O1dB 9 7 6 dBm 3rd order input interception point RX IIP3 16 14 13 dBm Input matching RX pin LNA_IN VSWRin 2 1 Output matching RX pin LNA_OUT VSWRout 2 1 Logic Input Levels RX_ON PU 9 High input level 1 pins RX_ON and PU Vin 2 4 Vs LNA V Low input level Vi 0 0 5 V High input current 1 Vi 2 4V liu 40 60 HA Low input current 0 liL 0 2 HA Notes 1 L
10. ecifications CO N o Drawing No 6 543 5094 01 4 E 2 6 Issue 1 19 12 02 AMEL 17 4533H BLURF 07 07 AMEL 14 Recommended PCB Land Pattern Figure 14 1 Recommended PCB Land Pattern gt OG 6 9 Table 14 1 Recommended PCB Land Pattern Signs Sign Description Size A Distance of vias 1 6 mm B Size of slug pattern 3 1 mm C Distance slug to pins 0 33 mm D Diameter of vias 1 mm E Width of pin pattern 0 3 mm F Distance of pin pattern 0 33 mm 15 Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned not to this document Put datasheet in a new template 4533H BLURF 07 07 Page 1 Block diagram changed Page 13 Figure 10 8 changed 18 T7 02 4 4533H BLURF 07 07 AMEL T Headquarters International Atmel Corporation Atmel Asia Atmel Europe Atmel Japan 2325 Orchard Parkway Room 1219 Le Krebs 9F Tonetsu Shinkawa Bldg San Jose CA 95131 Chinachem Golden Plaza 8 Rue Jean Pierre Timbaud 1 24 8 Shinkawa USA 77 Mody Road Tsimshatsui BP 309 Chuo ku Tokyo 104 0033 Tel 1 408 441 0311 East Kowloon 78054 Japan Fax 1 408 487 2600 Hong Kong Saint Quentin en Yvelines Cedex Tel 81 3 3523 3551 Tel 852 2721 9778 France Fax 81 3 3523 7581 Fax 852 2722 1369 Tel 33 1 30 60 70 00 Fax 33 1 30 60 71 11 Product Contact Web Site Technic
11. ly voltage V 6 V Pins VS LNA V1 PA V2 PA V8 PA OUT 5 Junction temperature T 150 C Storage temperature 40 to 125 C RF input power LNA Pint NA 5 dBm RF input power PA PinpA 10 dBm Electrostatic sensitive device A Observe precautions for handling dr 4 4 Thermal Resistance Parameters Symbol Value Unit Junction ambient PSSOP20 slug soldered on PCB Rinsa 19 K W Junction ambient QFN20 slug soldered on PCB Rinsa 27 K W 5 Handling Do not operate this part near strong electrostatic fields This IC meets class 1 ESD test require ment HBM in accordance to EIA JESD22 A114 A October 97 and class A ESD test requirement MM in accordance to EIA JESD22 A115A 6 Operating Range All voltages are referred to ground pins GND and slug Power supply points are VS LNA V1_PA V2_PA V3 PA OUT The table represents the sum of all supply currents depending on the TX RX mode Parameters Symbol Min Typ Max Unit Supply voltage Pins V1_PA V2_PA and V3 PA OUT Vs at vM K9 M Supply voltage pin VS LNA Vs 2 7 3 0 5 5 V Supply current TX PSSO20 ls 190 mA QFN20 ls 165 mA Supply current RX ls 8 mA Standby current PU 0 ls standby 10 HA Ambient temperature Tamb 25 25 85 C AMEL s 4533H BLURF 07 07 AMEL 7 Electrical Characteristics Test conditions unless otherwise specified Vs 3 0V Tamb 25 C
12. nd shall not be used in automotive applications Atmel s products are not intended authorized or warranted for use as components in applications intended to support or sustain life 2007 Atmel Corporation All rights reserved Atmel logo and combinations thereof and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries Other terms and product names may be trademarks of others 4533H BLURF 07 07
13. ow noise amplifier shall AR D be unconditionally stable With external matching components LNA gain can be adjusted with RX_ON voltage according to Figure 9 16 on page 11 Please note that for RX_ON below 1 4V the T R switch driver switches to TX mode 8 Control Logic PA and LNA Antenna Switch Driver Power amplifier shall be unconditionally stable maximum duty cycle 100 true CW operation maximum load mismatch and duration load VSWR 10 1 all phases 105 Ze 500 With external matching network load impedance 500 PU RX_ON Ramp PA LNA Antenna Switch Driver Operation Mode 0 0 0 off off off standby 0 0 1 on off off 2 0 1 0 off on off 3 0 1 1 on on off 4 1 0 0 off off on 4 1 0 1 on off on TX 1 1 0 off on off RX 1 1 1 on on off 5 Notes 1 0 Vaamp lt 0 1V 1 VRamp typically 1 75V 1 3V lt Vaamp lt 1 83V controls gain and output power compare Figure 9 6 on page 7 and Figure 9 10 on page 9 2 Only for special operation e g only PA operation no LNA switch driver operation 3 Only for special operation e g no switch driver operation 4 Only for special operation 5 Only for special operation e g separate TX RX antennas TX and RX operation at the same time 4533H BLURF 07 07 AMEL i ee A D AMEL 9 Typical Operating Characteristics Figure 9 1 LNA PSSO20 Gain and Noise Figure versus Frequency 20

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