MAXIM MAX8667/MAX8668 handbook
Contents
1. LX1 LX2 Current LX1 LX2 to GND Note 1 leas 0 3V to 0 3V 0 3V to VIN12 0 3V Continuous Power Dissipation TA 70 C 16 Pin 3mm x 3mm Thin QFN derate 20 8mW C above 70 1667mW Operating Temperature Range 40 C to 85 C Junction Temperature esee 150 C Storage Temperature Range 65 C to 150 C Lead Temperature soldering 105 300 C Note 1 LX has internal clamp diodes to GND and IN12 Applications that forward bias these diodes should take care not to exceed the IC s package dissipation limits Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS ViN34 VIN12 3 6V TA 40 C to 85 C unless otherwise noted Typical values are at TA 25 C Note 1 PARAMETER CONDITIONS IN34 Supply Range IN12 Supply Range N12 2 VIN34 MAX8668 VIN12 gt VIN34 IN12 Suppy Range AX8667 VIN12 gt ViN34 Shutdown Supply Current liN12 lIN2. MA AALMI 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables General Description The MAX8667 MAX8668 dual step down converters with dual low dropout LDO linear regulators are intended to power low voltage microprocessors or DSPs in portable devices They feature high efficiency with small external component size The step down converters are adjustable from 0 6V to 3 3V MAX8668 or factory preset MAX8667 with guaranteed output current of 600mA for OUT1 and 1200mA for OUT2 The 1 5MHz hysteretic PWM control scheme allows for tiny external components and reduces no load operating current to 100 with all outputs enabled Dual low qui escent current low noise LDOs operate down to 1 7V supply voltage The MAX8667 MAX8668 have individ ual enables for each output maximizing flexibility The MAX8667 MAX8668 are available in the space saving 3mm x 3mm 16 pin thin QFN package Applications Cell Phones Smartphones PDA and Palmtop Computers Portable MP3 and DVD Players Digital Cameras Camcorders PCMCIA Cards Handheld Instruments Typical Operating Circuit 2 6V TO 5 5V 10uF IN12 1 34 EN3 EN2 EN4 REF OUT3 OUT4 GND MAXIM MAX8667 600mA 2 2uH OUT1 OUT2 PGND1 PGND2 MAKIM Features Tiny Thin QFN 3mm x 3mm Package Individual Enables Step Down Converters 600mA Guaranteed Output Current on OUT1 1200mA Guaranteed Output Current on OUT2
3. MOSF ifier valley current 750 1000 OSFE i ILIMP2 1667 2000 MOSFI ifier valley current 1500 1800 i LX1 400mA 1 1 400mA ILx2 400 ifier I x2 400mA FB1 FB2 Regulation Voltage OUT2 Regulation Voltage FB2 Bias Current T1 Current Limi T2 Current Limi T1 On Resistance OUT2 On Resistance Rectifier Off Current Threshold ILXOFF LX Leakage Current Minimum On Time Minimum Off Time LDO REGULATORS Supply Current Each LDO 1mA load Ta 25 C 1mA to 300mA load Line Regulation VIN34 3 6V to 5 5V 1mA load Dropout Voltage VIN34 1 8V 300mA load Current Limit VouT3 VouTA 90 of nominal value Soft Start Ramp Time To 90 of final value Output Noise 100Hz to 100kHz 30mA load VouT3 and VouT4 2 8V Power Supply Rejection Ratio f 1kHz 30mA load Shutdown Output Resistance TIMING See Figure 2 Output Voltage Accuracy Power On Time tPwRON Enable Time tEN Note 1 All devices are 100 production tested at TA 25 C Limits over the operating temperature range are guaranteed by design 3 8998XVW Z998XVIN MAX8667 MAX8668 18 MAX 8667 EMA 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Typical Operating Characteristics ViN12 ViN34 3 6V cir
4. Tiny Size 2 2uH Chip Inductor 0805 Output Voltage from 0 6V to 3 3V MAX8668 Ultra Fast Line and Load Transients Low 25 Supply Current Each LDOs 300mA Guaranteed Low 1 7V Minimum Supply Voltage Low Output Noise Ordering Information PART MAX8667ETEAA MAX8667ETEAB MAX8667ETEAC MAX8667ETECQ Note All MAX8667 MAX8668 parts are in a 16 pin thin QFN 3mm x 3mm package and operate in the 40 C to 85 C extended temperature range Denotes a lead free package PKG CODE TOP MARK T1633 4 AEQ T1633 4 Ordering Information continued at the end of data sheet Selector Guide appears at the end of data sheet Pin Configuration TOP VIEW 13 ig FB2 om FET 5o xA 11 REE 4 i MAX667 EM 15 5 J GND 16 THIN QFN 3mm x 3mm ARE FOR THE MAX8668 Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Dallas Direct at 1 888 629 4642 or visit Maxim s website at www maxim ic com 8998XVW Z998XVIN MAX8667 MAX8668 8 MAX8667 Bav rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables ABSOLUTE MAXIMUM RATINGS IN34 FB1 FB2 EN1 EN2 ENG EN4 OUT1 2 BEEF TOGIND u aide rtt nette tenen 0 3V to 6 0V OUT4 to GND 0 3V to the lesser of 6V or VIN34 0 3V PGND1 PGND GND
5. LDOs and Individual Enables Pin Description NAME MAX8667 MAX8668 FUNCTION Enable Input for Regulator 3 Drive EN3 high or connect to IN34 to turn on regulator 3 Drive low o turn off regulator 3 and reduce input quiescent current Output of Regulator Bypass OUTS with a 4 7uF ceramic capacitor to GND OUTS is discharged to GND through an internal 1kQ in shutdown Input Voltage for LDO Regulators 3 and 4 Supply voltage range is from 1 7V to 5 5V This supply voltage must not exceed ViN12 Connect a 4 7uF or larger ceramic capacitor from IN34 to ground Output of Regulator 4 Bypass OUTA with a 4 7yF ceramic capacitor to GND OUT4 is discharged to GND through an internal 1kQ in shutdown Enable Input for Regulator 4 Drive EN4 high or connect to IN34 to turn on regulator 4 Drive low o turn off regulator 4 and reduce input quiescent current Ground Reference Output Bypass REF with a 0 01uF ceramic capacitor to GND Feedback Input for Regulator 2 Connect FB2 to the center of a resistor feedback divider between the output of regulator 2 and ground to set the output voltage See the Setting the Output Voltages and Voltage Positioning section Power Ground for Step Down Regulator 2 nductor Connection for Regulator 2 nput Voltage for Step Down Regulators 1 and 2 Supply voltage range is from 2 6V to 5 5V This IN12 IN12 supply voltage must not be less than ViN34 Connect a 10pF or
6. RISING 255 10 0 2 50 0 2 3 4 5 25 30 35 40 45 50 55 0 100 200 300 SUPPLY VOLTAGE V INPUT VOLTAGE V LOAD CURRENT mA SUPPLY CURRENT vs SUPPLY VOLTAGE ENABLE WAVEFORMS 1 000 MAX8667 88 toc14 IN12 IN34 0 2 49 LOAD ON OUTI ENT E Ph 800 LOAD ON OUT2 42 ENS E 2V div NO LOAD ON OUT3 NO LOAD ON OUT4 SUPPLY CURRENT mA 9 40 45 50 55 PPLY VOLTAGE V SHUTDOWN WAVEFORMS EN1 EN2 EN3 EN4 Vouti Voura VouT4 MAX8667 88 toc15 40us div Vou Vou 1 12 11 40us div OUT1 LOAD TRANSIENT MAX8667 88 toc16 10us div 2V div 2V div 2V div 2A div 2A div a 2A div 100mV div AC COUPLED 200mA div 200mA div 8998XVW Z998XVIN MAX8667 MAX8668 A MAX 86674 Ny RS 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Typical Operating Characteristics continued OUT2 LOAD TRANSIENT MAX8667 88 toct7 200mV div AC COUPLED 500mA div 500mA div 10us div OUT4 LOAD TRANSIENT MAX8667 88 toc19 50mV div Voura AC COUPLED 100 4 200mA div 10us div OUT2 LIGHT LOAD SWITCHING WAVEFORMS MAX8667 88 toc21 20mV div Vo 2V div 40us div ViN12 ViN34 3 6V circuit of Figure 4 VouT1 1 2V VouT2 1 8V Vours 2 8V VouT4 2 8V TA 25 C unless otherwise noted OUT3 LOAD TRANSIENT MAX86
7. capacitors have very low ESR and are commonly available Connect these capacitors as close as possible to the IC s pins to minimize PCB trace inductance Thermal Considerations The maximum package power dissipation of the MAX8667 MAX8668 is 1667mW Make sure the power dissipated by the MAX8667 MAX8668 does not exceed this rating The total IC power dissipation is the sum of the power dissipation of the four regulators Pp Pp1 Pp2 Pp3 Pp4 Estimate the OUT1 and OUT2 power dissipations as follows Pp1 louTi x VOUT4 Pp2 loUT x VOUT2 x where RL is the inductor s DC resistance and is the efficiency see the Typical Operating Characteristics section Calculate the OUT3 and OUT4 power dissipations as follows lout x Mwa4 VouT3 Pp4 lour4 x MNa4 Vour4 The maximum junction temperature of the MAX8667 MAX8668 is 150 C The junction to case thermal resistance of the MAX8667 MAX8668 is 6 9 C W When mounted on a single layer PCB the junction to ambient thermal resistance 0JA is about 64 C W Mounted on a multilayer PCB 0JA is about 48 C W Calculate the junction temperature of the MAX8667 MAX8668 as follows TJ TA where TA is the maximum ambient temperature sure the calculated value of Ty does not exceed the 150 C maximum PCB Layout High switching frequencies and relatively large peak currents make PCB layout a very importa
8. larger ceramic capacitor from N12 to ground LX1 LX1 nductor Connection for Regulator 1 Power Ground for Step Down Regulator 1 Feedback Input for Regulator 1 Connect OUT1 directly to the output of step down regulator 1 Feedback Input for Regulator 1 Connect FB1 to the center of a resistor feedback divider between the output of regulator 1 and ground to set the output voltage See the Setting the Output Voltages and Voltage Positioning section Enable Input for Regulator 1 Drive EN1 high or connect to IN12 to turn on step down regulator 1 Drive low to turn off the regulator and reduce input quiescent current Enable Input for Regulator 2 Drive EN2 high or connect to IN12 to turn on step down regulator 2 Drive low to turn off the regulator and reduce input quiescent current Exposed Paddle Connect to GND PGND1 PGND2 and circuit ground 8 MAXIM BS if MAX 86674 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables IN34 1 7V TO 5 5V UVLO REF AND BIAS STEP DOWN IN 1 PWRON LOGIC AND ENABLES N STEP DOWN ARE FOR THE 8668 Figure 1 Functional Diagram IN12 2 8V TO 5 5V 2 6V TO 5 5V 8998XVW Z998XVM MAX8667 MAX8668 218 MAX 8667 EMA
9. 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Detailed Description The MAX8667 MAX8668 dual step down converters with dual low dropout LDO linear regulators are intended to power low voltage microprocessors or DSPs in portable devices They feature high efficiency with small external component size The step down out puts are adjustable from 0 6V to 3 3V MAX8668 or factory preset MAX8667 with guaranteed output cur rent of 600mA for OUT1 and 1200mA for OUT2 The 1 5MHz hysteretic PWM control scheme allows for tiny external components and reduces no load operating current to 100uUA typ with all regulators enabled Dual low quiescent current low noise LDOs operate down to 1 7V supply voltage The MAX8667 MAX8668 have individual enable inputs for each output to facilitate any supply sequencing Step Down DC DC Regulators OUT1 OUT2 Step Down Regulator Architecture The MAX8667 MAX8668 step down regulators are opti mized for high efficiency voltage conversion over a wide load range while maintaining excellent transient response minimizing external component size and minimizing output voltage ripple The DC DC convert ers OUT1 OUT2 also feature an optimized on resis tance internal MOSFET switch and synchronous rectifier to maximize efficiency The MAX8667 MAX8668 utilize a proprietary hysteretic PWM control scheme that switches with nearly fixed frequency at up to 1 5MHz allowing for ultra
10. 30 105 1 65 20 100 18 0 200 400 600 800 1000 1200 25 30 35 40 45 50 55 25 30 35 40 45 50 55 LOAD CURRENT mA INPUT VOLTAGE V INPUT VOLTAGE V SWITCHING FREQUENCY NO LOAD SUPPLY CURRENT vs SUPPLY NO LOAD SUPPLY CURRENT vs LOAD CURRENT VOLTAGE ALL REGULATOR ENABLED vs SUPPLY VOLTAGE OUT1 AND OUT2 ONLY 3500 5 120 z 120 2 900 E 100 100 E E a PPLY VOLTAGE gt 2500 E 2 LLING 80 Et e TAGE a 2000 gl B a 0072 5 60 60 22 1500 2 a SUPPLY VOLTAGE ae a a 2 10 a 40 PPLY VOLTAGE a 4 cane LLING 500 QUT1 E 20 0 0 0 0 30 600 900 1200 1500 1800 15 20 25 30 35 40 45 50 55 15 20 25 30 35 40 45 50 55 LOAD CURRENT mA SUPPLY VOLTAGE V SUPPLY VOLTAGE V 4 MAKII BS if MAX 8667 hv FS 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Typical Operating Characteristics continued ViN12 ViN34 3 6V circuit of Figure 4 VouT1 1 2V VouT2 1 8V VouT3 2 8V VouT4 2 8V TA 25 C unless otherwise noted NO LOAD SUPPLY CURRENT vs SUPPLY OUT3 OUTPUT VOLTAGE OUT3 DROPOUT VOLTAGE VOLTAGE OUT3 AND OUT4 ONLY vs INPUT VOLTAGE 300mA LOAD vs LOAD CURRENT 120 3 00 E 80 5 5V 295 100 f 2 90 E E 5 85 gt 60 E 80 Tn 60 VIN34 VOLTAGE 275 4 2 FALLIN E S E on T 8 265 z 20 VOLTAGE 2 60
11. 34 No Load Supply Current liN12 liN34 N12 VIN34 4 2V VEN OV AX8667ETEJS all regulators enabled UNDERVOLTAGE LOCKOUT IN12 UV N12 rising N12 hysteresis IN34 UV THERMAL SHUTDOWN N34 rising eresis Threshold TA rising Hysteresis REFERENCE Reference Bypass Output Voltage REF Supply Rejection LOGIC AND CONTROL INPUTS 2 6V lt ViN12 VIN34 5 5V EN Input Low Level EN Input High Level 1 7V ViN34 5 5V 2 6V ViN12 5 5V 1 7V ViN34 5 5V 2 6V ViN12 5 5V EN Input Leakage Current STEP DOWN CONVERTERS ViN12 ViN34 5 5V inimum Adjustable Output Voltage MAX8668 MAXUM BS if MAX 8667 hv rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables ELECTRICAL CHARACTERISTICS continued ViN34 VIN12 3 6V TA 40 C to 85 C unless otherwise noted Typical values are at TA 25 C Note 1 PARAMETER CONDITIONS Maximum Adjustable Output Voltage AX8668 3 3 AX8668 no load TA 25 C 0 600 0 612 FB falling TA 40 C to 85 C 0 600 0 618 AX8667ETEJS no load Vout_ 25 C 1 300 1 326 falling Ta 40 C to 85 C 1 800 1 339 FB2 Line Regulation AX8668 VIN12 2 6V to 5 5V 0 01 T2 Line Regulation AX8667 12 2 8V to 5 5V 0 05 AX8668 shutdown mode 0 1 AX8668 0 5V 0 01 OSFE itch ILIMP1 900 1100
12. 67 88 toc18 50mV div Voura AC COUPLED loura 200mA div T 1 I 1 1 i 1 i x 1 1 i i 1 i i 1 i 1 a i 1 i Ex a n t i 1 i 10us div OUT1 LIGHT LOAD SWITCHING WAVEFORMS MAX8667 88 toc20 20mV div 2V div 100mA div 10us div OUT1 HEAVY LOAD SWITCHING WAVEFORMS MAX8667 88 toc22 20mV div 2V div 500mA div 500mA LOAD 400ns div MAXIM BS if MAX 86674 hv rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Typical Operating Characteristics continued ViN12 ViN34 3 6V circuit of Figure 4 VouT1 1 2V VouT2 1 8V VouT3 2 8V VouT4 2 8V TA 25 C unless otherwise noted OUT2 HEAVY LOAD SWITCHING POWER SUPPLY REJECTION RATIO WAVEFORMS vs FREQUENCY MAX8667 88 toc23 70 3 Voura 2 80V 100 12 60 47uF WE 20mV div Cours 7uF 8 50 amp 40 2V div 0 30 500mA div 20 10 500mA LOAD 0 400ns div 0 01 0 1 1 0 100 000 FREQUENCY kHz OUT3 NOISE OUT4 NOISE MAX8667 88 toc25 MAX8667 88 toc26 100uV div 100uV div Voura 2 80V Voura 3 30V 1002 1002 1ms div 1ms div 7 8998XVW Z998XVIN MAX8667 MAX8668 8 MAX8667 Bav rg 1 5MHz Dual Step Down DC DC Converters with Dual
13. 67 MAX8668 parts are in a 16 pin thin QFN 3mm x AX8668ETET A A A AX8668E AX8668ETEQ AX8668ETEU AX8668ETEV DJ ADJ AX8668ETEW ADJ AX8668ETEX ADJ A A Chip Information PROCESS BiCMOS MAXUM 218 MAX 8667 EMA 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Package Information The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages MARKING 12x16L QFN THIN EPS A 5 9010 s PIN 1 ID BOTTOM VIEW R IS OPTIONAL HeH xN TERMINAL TIP di HeH EVEN TERMINAL ODD TERMINAL DETAIL A DDALLAS AALAXL VI 8 12 16L THIN QFN 3x3x0 8mm APPROVAL DOCUMENT CONTROL NO 1 DRAWING NOT TO SCALE Coe 21 0136 t 4 17 8998XVW Z998XVIN MAX8667 MAX8668 8 MAX866r RN 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Package Information continued The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages mu EE 290 20 3 10 290 3 10 eas ea Eee fia ue ue ps EE Eo Ls CET 110 E Pe foas des Tos NOTES 1 DIMENSIONING amp TOL
14. ERANCING CONFORM TO ASME Y14 5M 1994 2 ALL DIMENSIONS ARE IN MILLIMETERS ANGLES ARE IN DEGREES 3 NIS THE TOTAL NUMBER OF TERMINALS THE TERMINAL 1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95 1 SPP 012 DETAILS OF TERMINAL 1 IDENTIFIER ARE OPTIONAL BUT MUST BE LOCATED WITHIN THE ZONE INDICATED THE TERMINAL 1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0 20 mm AND 0 25 mm FROM TERMINAL TIP A ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY 7 DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION A COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS 9 DRAWING CONFORMS TO JEDEC M0220 REVISION C MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY 11 NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY 12 WARPAGE NOT TO EXCEED 0 10mm TUE PACKAGE OUTLINE 8 12 16L THIN QFN 3x3x0 8mm APPROVAL DOCUMENT CONTROL NO 2 DRAWING NOT TO SCALE me 21 0136 EE Revision History Pages changed at Rev 1 1 12 14 18 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time 18 Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 2007 Maxim Integrated Pr
15. ally smaller but require faster switching resulting in some efficiency loss The induc tor s DC current rating must be high enough to account 13 8998XVW Z998XVM MAX8667 MAX8668 218 MAX 8667 EMA 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Table 1 Recommended Inductors L pH RL mQ CURRENT RATING A LxWxH mm FDK MIPF2016 MANUFACTURER INDUCTOR 2 2 LQH32CN2R2M5 110 1 1 2 0x 1 6x 1 0 FDK MIPF2520D 22 13 25x 20x 1 0 2 2 2 2 3 2x 2 5 x 1 55 LQM31P 3 2 x 1 6 x 0 95 CDRH2D09 GLF251812T 3 2x3 2x 1 0 2 5 x 1 8x 1 35 D2812C 2 8 x 2 8 x 1 2 MDT2520 CR TPC Series TPC Series Wurth 2 5 x 2 0 x 1 0 4 0 x 4 0 x 1 1 4 0 x 4 0 x 1 1 Taiyo Yuden CB2518T for peak ripple current and load transients The step down converter s unique architecture has minimal cur rent overshoot during startup and load transients and in most cases an inductor capable of 1 3x the maximum load current is acceptable For output voltages above 2V when light load efficiency is important the minimum recommended inductor is 2 2uH For optimum voltage positioning load transients choose an inductor with DC series resistance in the 50mQ to 150 range For higher efficiency at heavy loads above 200mA and minimal load regulation keep the inductor resistance as small as possible For light load applications up to 200m4A higher resistanc
16. ature of 150 C See the Thermal Considerations sec tion for more information IN12 tpwron IS THE PERIOD REQUIRED TO ENABLE FROM SHUTDOWN 718 H ten IS THE ENABLE TIME FOR SUBSEQUENT ENABLE SIGNALS FOLLOWING THE FIRST ENABLE ENx ENy ARE ANY COMBINATION OF EN1 EN4 Figure 2 Timing Diagram AVLAZCLA 8998XVW Z998XVIN MAX8667 MAX8668 8 MAX8667 Bt rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables INPUT 2 8V TO 5 5V 1 7V TO 5 5V IN12 1 34 EN3 EN2 EN4 REF OUT3 OUT4 cit 0 01uF T GND AVLAXL VI MAX8667 D Ut OUT2 OUTI PGND2 PGND1 INPUT 2 6V TO 5 5V IN12 1 34 ENS EN2 EN4 REF 0073 300mA OUT4 300mA C9 GND MAXIM MAX8668 0072 As QUTI 06V 33V 12A 4 LXI 0 6V TO 3 3V 600mA C7 2 2uF for Vout lt 1 8V 4 7uF for Vout2 gt 1 8V FB2 FB1 PGND1 PGND2 C10 R5 AND R6 ARE OPTIO Figure 4 MAX8668 Typical Application Circuit 12 MAXIM BS if MAX 8667 hv FS 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Applications Information Setting the Output Voltages and Voltage Positioning The LDO output voltages of the MAX8667 MAX8668 and the step down outputs of the MAX8667 are factory preset See the Selector Guide to find the part number corresponding to the desired output voltages The OUT1 and OUT2 outpu
17. cuit of Figure 4 VouT1 1 2V VouT2 1 8V VouT3 2 8V VouT4 2 8V TA 25 C unless otherwise noted OUT1 EFFICIENCY vs LOAD CURRENT Vout 1 2V OUT2 EFFICIENCY vs LOAD CURRENT Vout2 1 8V OUT1 LOAD REGULATION 90 9 125 80 8 80 A 1 20 8 70 2 1 15 E 60 60 ww 1 10 oy 2 5 50 e 5 105 amp amp 40 4 5 1 00 ru m 30 3 2 095 20 20 0 90 10 1 0 85 ONLY OUTI ENABLED ONLY OUT2 ENABLED 01 10 100 00 1 10 100 1000 000 0 100 200 300 400 500 60 LOAD CURRENT mA LOAD CURRENT mA LOAD CURRENT mA OUT1 OUTPUT VOLTAGE OUT2 OUTPUT VOLTAGE OUT2 LOAD REGULATION vs INPUT VOLTAGE 600mA LOAD vs INPUT VOLTAGE 1200mA LOAD 90 1 40 2 0 180 B 135 1 95 B E 8 5 zin 130 ERE Lu Lu 12 185 160 5 2 S 120 5 1 8 5 150 5 5 E 1 15 E 1 75 e m 140 3 1 10 17 1
18. e is acceptable with very little impact on performance Capacitor Selection Input Capacitors The input capacitor for the step down converters C2 in Figures 3 and 4 reduces the current peaks drawn from the battery or input power source and reduces switch ing noise in the IC The impedance of C2 at the switch ing frequency should be very low Surface mount ceramic capacitors are a good choice due to their small size and low ESR Make sure the capacitor main tains its capacitance over temperature and DC bias Ceramic capacitors with X5R or X7R temperature char acteristics generally perform well A 10uF ceramic capacitor is recommended A 4 7yF ceramic capacitor is recommended for the LDO input capacitor C3 in Figure 3 Step Down Output Capacitors The step down output capacitors C6 and C7 in Figures 3 and 4 are required to keep the output voltage ripple 14 25x1 8x2 0 small and to ensure regulation loop stability These capacitors must have low impedance at the switching frequency Surface mount ceramic capacitors are a good choice due to their small size and low ESR Make sure the capacitor maintains its capacitance over tem perature and DC bias Ceramic capacitors with X5R or X7R temperature characteristics generally perform well The output capacitance can be very low For most appli cations a 2 2uF ceramic capacitor is sufficient For C7 of the MAX8668 a 2 2yF VoUT2 1 8V or a 4 7UF VoUT2 1 8V cera
19. he value of Reo the equivalent parallel resistance of R1 and R6 as follows EQ 5077 1 xR2 VFB 20 where Vrg is the feedback regulation voltage 0 6 OPTIONAL Figure 5 MAX8668 Feedback Network Calculate the factor m based on the desired load regu lation improvement TN IOUT MAX x DCR AVOUT DESIRED where lOUT MAX is the maximum output current DCR is the inductor series resistance and AVOUT DESIRED is the maximum allowable droop in the output voltage at full load The calculated value for m must be between 1 1 and 2 m 2 results in a 2x improvement in load regulation Now calculate the values of R1 and R6 as follows R1 REQ xm m REQ x mel The value of R1 should always be lower than the value of R6 Power Supply Sequencing The MAX8667 MAX8668 have individual enable inputs for each regulator to allow complete control over the power sequencing When all EN inputs are low the IC is in low power shutdown mode reducing the supply current to less than 1 After one of the EN_ inputs asserts high the corresponding regulator begins soft start after a delay of ten see Figure 2 The first output enabled from shutdown mode or initially powering up the IC has a longer delay tPWRON as the IC exits the low power shutdown mode Inductor Selection The MAX8667 MAX8668 step down converters operate with inductors between 2 2uH and 4 7uH Low induc tance values are physic
20. mic capacitor is recommended For opti mum load transient performance and very low output rip ple the output capacitor value in uF should be equal to or greater than the inductor value in uH Feed Forward Capacitor The feed forward capacitors on the MAX8668 C4 and C5 in Figure 4 set the feedback loop response control the switching frequency and are critical in obtaining the best efficiency possible Small X7R and COG ceramic capacitors are recommended For OUT1 calculate the value of C4 as follows C4 1 2 x 10 s V x VouT R1 For OUT2 calculate the value of C5 and C10 as fol lows Cff 1 2 x 10 5 s V x Vour Cff C5 C10 2 C10 C5 1 VouT VFB where Vra is O 6V Rearranging the formulas C10 2x Cff x VOUT VFB Vour VFB C5 Cff C10 2 MAXIM BS if MAX 8667 hv rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables C10 is needed if VouT gt 1 5V or ViN12 can be less than Vour 0 65 LDO Output Capacitor and Stability Connect a 4 7yF ceramic capacitor between OUTS and GND and a second 4 7yF ceramic capacitor from OUTA to GND For a constant loading above 10mA the output capacitors can be reduced to 2 2uF The equiv alent series resistance ESR of the LDO output capaci tors affects stability and output noise Use output capacitors with an ESR of 0 1 or less to ensure stable operation and optimum transient response Surface mount ceramic
21. nput supply voltage is too low to guarantee proper operation When ViN34 falls below 1 5V typ OUT3 and OUT4 are shut down OUT3 and OUTA turn on and begin soft start when V N34 rises above 1 6V typ Soft Start When initially powered up or enabled with EN the LDOs soft start by gradually ramping up the output voltage This reduces inrush current during startup The TPWRON soft start ramp time is typically 100us from the start of the soft start ramp to the output reaching its nominal regulation voltage Current Limit The OUTS and OUT4 output current is limited to 375mA min If the output current exceeds the current limit the corresponding LDO output voltage drops Dropout The maximum dropout voltage for the linear regulators is 250mV at 300mA load To avoid dropout make sure the IN34 supply voltage is at least 250mV higher than the highest LDO output voltage Thermal Overload Protection Thermal overload protection limits the total power dissi pation in the MAX8667 MAX8668 Thermal protection circuits monitor the die temperature If the die tempera ture exceeds 160 C the IC is shut down allowing the IC to cool Once the IC has cooled by 15 C the IC is enabled again This results in a pulsed output during continuous thermal overload conditions The thermal overload protection protects the MAX8667 MAX8668 in the event of fault conditions For continuous operation do not exceed the absolute maximum junction temper
22. nt aspect of design Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane both of which can result in instability or regula tion errors Connect the input capacitors as close as possible to the IN and PGND_ pins Connect the inductor and output capacitors as close as possible to the IC and keep the traces short direct and wide The feedback network traces are sensitive to inductor magnetic field interference Route these traces away from the inductors and noisy traces such as LX Keep the feedback components close to the FB_ pin Connect GND and PGND to the ground plane Connect the exposed paddle to the ground plane with one or more vias to help conduct heat away from the IC Refer to the MAX8668 evaluation kit for a PCB layout example 8998XVW Z998XVM MAX8667 MAX8668 8 MAX8667 Bav rg 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables Ordering Information continued Selector Guide PART PKG CODE TOP MARK PART AX8667ETEHR T1633 4 AX8667ETEJS T1633 4 MAX8668ETEA AX8667ETEAA AX8667ETEAB AX8668ETEP AX8667ETEAC AX8668ETEQ AX8668 AX8667ETECQ AX8667ETEHR AX8667 AX8668 AX8668E AX8668 AX8668 3mm package and operate in the 40 C to 85 C extended temperature range Denotes a lead free package 16 A A All MAX86
23. oducts MAXIM is registered trademark of Maxim Integrated Products Inc
24. small external components The step down converter output current is guaranteed up to 600mA for OUT1 and 1200mA for OUT2 When the step down converter output voltage falls below the regulation threshold the error comparator begins a switching cycle by turning the high side p channel MOSFET switch on This switch remains on until the mini mum on time ton expires and the output voltage is in regulation or the current limit threshold ILIMP_ is exceeded Once off the high side switch remains off until the minimum off time torr expires and the output voltage again falls below the regulation threshold During this off period the low side synchronous rectifi er turns on and remains on until either the high side switch turns on or the inductor current reduces to the rectifier off current threshold li xorr 60mA typ The internal synchronous rectifier eliminates the need for an external Schottky diode Input Supply and Undervoltage Lockout The input voltage range of step down regulators OUT1 and OUT2 is 2 6V to 5 5V This supply voltage must be greater than or equal to the LDO supply voltage VIN34 10 A UVLO circuit prevents step down regulators OUT1 and OUT2 from switching when the supply voltage is too low to guarantee proper operation When V N12 falls below 2 4V typ OUT1 and OUT2 are shut down OUT1 and OUT2 turn on and begin soft start when VIN12 rises above 2 5V typ Soft Start When initially powered up or enabled
25. t voltages of the MAX8668 are set by a resistor network connected to FB_ as shown in Figure 5 With this configuration a portion of the feedback signal is sensed on the switched side of the inductor LX and the output voltage droops slightly as the load current is increased due to the DC resis tance of the inductor DCR This allows the load regu lation to be set to match the voltage droop during a load transient voltage positioning reducing the peak to peak output voltage deviation during a load tran sient and reducing the output capacitance requirements For the simplest method of setting the output voltage R6 is not installed Choose the value of R2 a good starting value is 100k and then calculate the value of R1 as follows 1 1 VFB where Vrg is the feedback regulation voltage 0 6V With the voltage set in this manner the voltage posi tioning depends only on the DCR and the maximum output voltage droop is AVOUT MAX x loUT MAX Setting the Output Voltages with Reduced Voltage Positioning To obtain less voltage positioning than described in the previous section use the following procedure for set ting the output voltages The OUT1 and OUT2 output voltages and voltage positioning of the MAX8668 are set by a resistor network connected to FB_ as shown in Figure 5 To set the output voltage VOUT first select a value for R2 a good starting value is 100k Then calculate t
26. this state the p channel MOSFET is turned on con stantly not switching and the dropout voltage is the voltage drop due to the output current across the on resistance of the internal p channel MOSFET and the inductor s DC resistance RL Voo Loap RecH 1 LDO Linear Regulators OUT3 OUT4 The MAX8667 MAX8668 contain two low dropout linear regulators LDOs OUT3 and OUT4 The LDO output voltages are factory preset and each LDO supplies MAXIM BS if MAX 86674 1 5MHz Dual Step Down DC DC Converters with Dual LDOs and Individual Enables loads up to 300mA The LDOs include an internal refer ence error amplifier p channel pass transistor and internal voltage dividers Each error amplifier compares the reference voltage to the output voltage divided by the internal voltage divider and amplifies the differ ence If the divided feedback voltage is lower than the reference voltage the pass transistor gate is pulled lower allowing more current to pass to the outputs and increasing the output voltage If the divided feedback voltage is too high the pass transistor gate is pulled up allowing less current to pass to the output Input Supply and Undervoltage Lockout The input voltage range of LDO regulators OUT3 and OUTA is 1 7V to 5 5V This supply voltage must be less than or equal to the voltage applied to IN12 ViN34 lt VIN12 An undervoltage lockout circuit turns off the LDO regula tors when the i
27. with EN the step down regulators soft start by gradually ramping up the output voltage This reduces inrush current dur ing startup See the startup waveforms in the Typical Operating Characteristics section Current Limit The MAX8667 MAX8668 limit the peak inductor current of the p channel MOSFET ILimp_ A valley current limit is used to protect the step down regulators during severe overload and output short circuit conditions When the peak current limit is reached the internal p channel MOSFET turns off and remains off until the output drops below regulation the inductor current falls below the valley current limit threshold and the mini mum off time has expired Voltage Positioning The OUT1 and OUT2 output voltages and voltage posi tioning of the MAX8668 are set by a resistor network connected to FB With this configuration a portion of the feedback signal is sensed on the switched side of the inductor and the output voltage droops slightly as the load current is increased due to the DC resistance of the inductor This output voltage droop is known as voltage positioning Voltage positioning allows the load regulation to be set to match the voltage droop during a load transient reducing the peak to peak output volt age deviation during a load transient and reducing the output capacitance requirements Dropout As the input voltage approaches the output voltage the duty cycle of the p channel MOSFET reaches 10096 In
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MAXIM MAX8667/MAX8668 handbook