Home

MAXIM MAX522 handbook

image

Contents

1. DAC CONTENTS ANALOG B7 B6 B5 B4 B3 B2 B1 Bo OUTPUT 255 4REF x 29 1 1 1 1 1 11 1 x E 129 REF x 129 1 0 0 0 0 00 1 E 1 0 0 0 0 0 0 0 ner x E EF 256 2 0 3 1 1 1 1 1 1 REF x ES 256 ololololojojo 1 ner Lais 256 olololololololol ov Note 1LSB REF x 28 REF x 256 ANALOG OUTPUT REF x H where D Decimal 256 Value of Digital Input dl d Slab Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Applications Information The MAX522 is specified for single supply operation with Vpp ranging from 2 7V to 5 5V covering all com monly used supply voltages in 3V and 5V systems Initialization There is no internal power on reset Therefore at power up perform an initial write operation to set the outputs to the desired voltage Power Supply and Ground Management GND should be connected to the highest quality ground available Bypass Vpp with a 0 1uF to 0 22uF capacitor to GND The reference input can be used without bypassing For optimum line load transient response and noise performance bypass the refer ence input with 0 1uF to 4 7uF to GND Careful PC board layout minimizes crosstalk among DAC outputs the reference and digital inputs Separate analog lines with ground traces between them Make sure that high frequency digital lines are not routed in parallel to ana log lines MAKIAN e TI CCSXVIA MAX522 Dual
2. 0 60 40 20 0 20 40 60 80 100120140 TEMPERATURE C OUTPUT VOLTAGE vs OUTPUT SOURCE CURRENT Vpp 5V 5 2 DACA E 50 1 48 i am DACB 44 E 4 2 REF Vpp 5V ae OODE ALL 1s 3 8 0 0001 0 001 0 01 0 1 1 10 100 QUTPUT SOURCE CURRENT mA POSITIVE SUPPLY CURRENT vs SUPPLY VOLTAGE MAXS22 TOC REF VoD ALL LOGIC INPUTS GROUN E 25 30 35 40 45 5 0 5 5 Voo V REFERENCE FEEDTHROUGH vs FREQUENCY MAXS22 TOC 08 001 0 1 1 10 100 OUTPUT VOLTAGE vs OUTPUT SINK CURRENT 900 s Vpp 3 B 800 F CODE ALL ts DACA T 700 E rj 600 d Ka DACH 5 400 300 a 200 100 0 0 0001 0 001 0 01 04 1 10 100 OUTPUT SINK CURRENT mA POSITIVE SUPPLY CURRENT vs TEMPERATURE 1 370 8 B 3 1 365 1 360 E 5 1 355 a 1 350 Vpp 5V PS ALL
3. 65 C to 165 C Lead Temperature soldering 10sec Note 1 The outputs may be shorted to Vpp or GND if the package power dissipation is not exceeded Typical short circuit current to GND is 50mA Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS Vpp 2 7V to 5 5V REF Vpp Ta Twin to Tmax unless otherwise noted Typical values are at T4 25 C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 8 Bits Differential Nonlinearity DNL Guaranteed monotonic 1 LSB Integral Nonlinearity INL Note 2 15 LSB Total Unadjusted Error TUE Note 2 1 LSB RM Temperature 100 viet 4 5V Vpp lt 5 5V REF 4 096V 0 01 Power Supply Rejection Ratio PSRR Al 2 7V Vpp lt 3 6V REF 2 4V 0 015 REFERENCE INPUTS Reference Input Voltage Range GND VDD V Reference Input Capacitance 25 pF Reference Input Resistance Rner Note 3 8 kQ Reference Input Resistance shutdown geg Me DAC OUTPUTS Output Voltage Range 0 REF V Capacitive Load at
4. 0 1uF ALL BITS OFF TO ALL BITS ON A CS 2V div B OUTA 20mV div 20us div Vpp 3V REF Vpp RL 1k Q C 0 1pF DAC LOADED WITH ALL 1s A CS 2V div B OUTA 1V div POSITIVE SETTLING TIME DAC B A B 20us div Vpp 3V REF Vpop D 10k Q C 0 01uF ALL BITS OFF TO ALL BITS ON A CS 2V div B OUTB 20mV div OUTPUT VOLTAGE NOISE DC TO 1MHz KN OUTA 200uV div 2ms div DIGITAL CODE 80 REF Von NO LOAD MAALM Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Pin Description PIN NAME FUNCTION 1 cs Chip Select active low Enables data to be shifted into the 16 bit shift register Programming commands are executed at the rising edge of CS 2 SCLK Serial Clock Input Data is clocked in on the rising edge of SCLK 3 VDD Positive Power Supply 2 7V to 5 5V Bypass with 0 22uF to GND 4 GND Ground 5 OUTA DAC A Output Voltage Buffered Connect 0 1p0F capacitor or greater to GND 6 OUTB DAC B Output Voltage Buffered Connect 0 01pF capacitor or greater to GND jf REF Reference Input for DAC A and DAC B 8 DIN Serial Data Input of the 16 bit shift register Data is clocked into the register on the rising edge of SCLK Detailed Description Analog Section The MAX522 contains two 8 bit voltage output digital to analog converters DACs The DACs are inverted R 2R ladder networks using complementary switches that conv
5. LOGICINPUTS 5V ALL DACs SET TOALL 1s 1 340 60 40 20 0 20 40 60 80 100120140 MAX522 TOC 09 TEMPERATURE C REFERENCE LARGE SIGNAL FREQUENCY RESPONSE 5 0 S 5 5 Bn S c d 15 D 20 Vop 3V Vre OV TO Vpp SINE WAVE 25 0 001 0 01 0 1 1 10 100 FREQUENCY kHz MAXIM Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Typical Operating Characteristics continued TA 25 C unless otherwise noted REFERENCE SM ALL SIGNAL FREQUENCY RESPONSE o MAXS22 TOC 10 VRE 1 5V DC WITH 40mVp p SINE WAVE SUPERIMPOSED Dik 1 10k 100k 1M 10M FREQUENCY Hz LINE TRANSIENT RESPONSE OUTA CLOCK FEEDTHROUGH OUTA 20us div 1us div REF 2 56V NO LOAD CODE ALL 1s CS HIGH A Vpp 100mV div A SCLK 333kHz OV TO 2 9V 2V div B OUTA 500uV div B OUTA 2mV div MAKTA ees 0 CCSXVIA MAX522 Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Typical Operating Characteristics continued TA 25 C unless otherwise noted POSITIVE SETTLING TIME DAC A 20us div Vp 3V REF Vpp RL 1k Q C
6. MAXIM is a registered trademark of Maxim Integrated Products
7. 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Package Information INCHES MILLIMETERS MIN MIN MAX SS 2 Plastic DIP INCHES MILLIMETERS MIN MAX MIN MAX PLASTIC 0 348 0 390 8 84 9 91 DUAL IN LINE 0 735 0 765 18 67 19 43 PACKAGE 0 745 0 765 18 92 19 43 0 885 0 915 22 48 23 24 0 300 in 1 015 1 045 25 78 26 54 0 8 1 14 INCHES 1 265 28 96 32 13 MILLIMETERS MIN MAX Ik L La Narrow SO SMALL OUTLINE PACKAGE 0 150 in rromiol oZ INCHES MILLIMETERS MIN MAX MIN 0 189 0 197 4 80 0 337 0 344 8 55 0 386 0 394 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time 12 Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 1995 Maxim Integrated Products Printed USA
8. OUT_ DACA 24 uF DAC B 0 01 Output Resistance DAGA a Q DAC B 500 DIGITAL INPUTS Input High Voltage Vin 0 7 Vpp V Input Low Voltage Vit 0 3 Vpp V Input Current liN Vin OV or Vpp 0 1 10 UA Input Capacitance Cin Notes 4 5 10 pF MAXIM Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package ELECTRICAL CHARACTERISTICS continued Vpp 2 7V to 5 5V REF Vpp Ta Twin to Tmax unless otherwise noted Typical values are at TA 25 C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage Output Slew Rate SR CL 0 1pF DAC A CL 0 01uF DAC B 0 1 V us CL 0 1uF DAC A 70 Voltage Output Settling Time To 14LSB E Es us CL 0 01uF DAC B 70 Digital Feedthrough and Crosstalk All Os to all 1s 10 nV s POWER SUPPLIES Supply Voltage Range Von 2 7 5 5 V Vpp 5 5V 1 3 2 8 Supply Current I All inputs OV mA ERI ap VDD 3 6V 09 25 Shutdown Supply Current Vpp 5 5V 0 1 yA TIMING CHARACTERISTICS Note 4 Vpp 2 7V to 5 5V Ta Tmi to Tmax unless otherwise noted PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SERIAL INTERFACE TIMING CS Fall to SCLK Rise Setup Time tess 150 ns SCLK Rise to CS Rise Setup Time tCSH 150 ns DIN to SCLK Rise Setup Time tps 50 ns DIN to SCLK Rise Hold Time tpH 50 ns SCLK Pulse Width High tcH 100 ns SCLK Pulse Width Low tcL 100 ns CS Pu
9. The DAC outputs are internally divided by two and the buffer is set to a gain of two eliminating the need for a buffer input voltage range to the positive supply rail DAC A s output amplifier can source and sink up to 5mA of current 0 5mA for DAC B s buffer See the Total Unadjusted Error vs Digital Code graph in the Typical Operating Characteristics The amplifier is unity gain stable with a capacitive load of 0 1uF 0 01uF for DAC B s buffer or greater The slew rate is limited by the load capacitor and is typically 0 1V us with a 0 1uF load 0 01uF for DAC B s buffer Shutdown Mode When programmed to shutdown mode the outputs of DAC A and DAC B go into a high impedance state Virtually no current flows into or out of the buffer ampli fiers in that state In shutdown mode the REF inputs are high impedance 2M9 typical to conserve current drain from the system reference therefore the system reference does not have to be powered down Coming out of shutdown the DAC outputs return to the values kept in the registers The recovery time is equiv alent to the DAC settling time CCSXVIA MAX522 Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package ap amp 4 SHOWN FOR ALL 1s ON DAC Figure 1 DAC Simplified Circuit Diagram Serial Interface An active low chip select CS enables the shift register to receive data from the serial data input Data is clocked into the shift register
10. ZiSMAXS2ME NTS 01 Fv MA d al dd Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package General Description Features The MAX522 contains two 8 bit buffered voltage output Operates from a Single 2 7V to 45 5V Supply digital to analog converters DAC A and DAC B in small Dual Buffered Volt Output 8 pin SO and DIP packages DAC A s buffer can source uat Buriered voltage upu and sink 5mA and DAC B s output can source and sink Low Power Consumption 500pA both to within 0 5V of ground and Vpp The 1mA Operating Current MAX522 operates with a single 2 7V to 5 5V supply 1pA Shutdown Current The device utilizes a 3 wire serial interface which oper ates at clock rates up to 5MHz and is compatible with SPI QSPI and Microwire interface standards The serial input shift register is 16 bits long and con sists of eight bits of DAC input data and eight bits for DAC selection and shutdown control DAC registers can be loaded independently or in parallel at the posi Independently Programmable Shutdown Mode 5MHz 3 Wire Serial Interface SPI QSPI and Microwire Compatible Space Saving 8 Pin SO Package 9 9 9 tive edge of CS Ordering Information The MAX522 s ultra low power consumption and small 8 pin SO package make it ideal for portable and bat PART TEMP RANGE PIN PACKAGE tery powered applications Supply current is less than MAX522CPA 0 C to 70 C 8 Plastic DIP 1mA and drops be
11. ert 8 bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage The MAX522 has one reference input which is shared by DAC A and DAC B The device includes output buffer amplifiers for both DACs and input logic for sim ple microprocessor uP and CMOS interfaces The power supply range is from 5 5V down to 2 7V Reference Input and DAC Output Range The voltage at REF sets the full scale output of the DACs The input impedance of the REF input is code dependent The lowest value approximately 8kQ occurs when the input code is 01010101 55hex The maximum value of infinity occurs when the input code is zero In shutdown mode the selected DAC output is set to zero while the value stored in the DAC register remains unchanged This removes the load from the reference input to save power Bringing the MAX522 out of shut down mode restores the DAC output voltage Because the input resistance at REF is code dependent the DAC s reference sources should have an output impedance of no more than 5Q The input capacitance at the REF pin is also code dependent and typically does not exceed 25pF dl d Slab The reference voltage on REF can range anywhere from GND to Vpp See the Output Buffer Amplifier section for more information Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered The buffer amplifiers have a rail to rail GND to Vpp output voltage range
12. g and shutting down the DACs and programming the logic can be combined in a single command Table 3 Example of a 16 Bit Input Word Loaded Loaded in First in Last UB1 UB2 UB3 SB SA UB4 LB LA B7 B6 B5 B4 B3 B2 B1 BO X X 1 0 0 0 1 1 1 0 0 0 0 0 0 0 MAXIM 9 CCSXVIA MAX522 Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package i i f i i i MT i i CSPWH 1 Jeu Lg 2 a a cc SE ZE pm MONN NV N RRR Xu AM OK AAKNANN MOO UX XARA AAD DIN MAM SONS OKAY MARIA NL RU RONG Figure 3 MAX522 Detailed Serial Interface Timing Diagram Digital Inputs The digital inputs are compatible with CMOS logic Supply current increases slightly when toggling the logic inputs through the transition zone between 0 3 Vpp and 0 7 Vpp Microprocessor Interfacing The MAX522 serial interface is compatible with Microwire SPI and QSPI For SPI clear the CPOL and CPHA bits CPOL 0 and CPHA 0 CPOL 0 sets the inactive clock state to zero and CPHA 0 changes data at the falling edge of SCLK This setting allows SPI to run at full clock speeds 0 5MHz If a serial port is not available on your uP three bits of a parallel port can be used to emulate a serial port by bit manipulation Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary 10 Table 4 Code Table
13. low 1pA in shutdown mode In addi tion the reference input is disconnected from the REF Meee E 1o ne 890 o pin during shutdown further reducing the system s total MAXS22EPA 40 C to 85 C 8 Plastic DIP power consumption The software format is compatible MAXS22ESA 40 C to 85 C 8 SO with the MAX512 MAX513 triple 8 bit DACs Applications Functional Diagram Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source 0 1pF OPTIONAL Power Amp Bias Control VCO Tuning Pin Configuration TOP VIEW ZH EL a E E 5 MAXIM MAX522 CONTROL 8 DIP SO SPI and QSPI are trademarks of Motorola Inc Microwire is a trademark of National Semiconductor Corp dl d Lab Maxim Integrated Products 1 Call toll free 1 800 998 8800 for free samples or literature CCSXVIN MAX522 Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package ABSOLUTE MAXIMUM RATINGS Mecki es AR ROS 0 3V 6V 0 3V Vpp 0 3V 0 3V Vpp 0 3V CLA AAA Vpp Digital Inputs and Outputs to GND REF EE OUTA OUTB Note 1 Continuous Power Dissipation TA 70 C Plastic DIP derate 9 09mW C above 70 C SO derate 5 88mW C above 70 C MAX522E_A Operating Temperature Ranges MAX522C_A PM 0 C to 70 C 40 C to 85 C Storage Temperature Range
14. lse Width High tCSPWH 200 ns Note 2 Reduced digital code range code 24 through code 232 is due to swing limitations of the output amplifiers See Typical Operating Characteristics Note 3 Reference input resistance is code dependent The lowest input resistance occurs at code 55hex Refer to the Reference Input section in the Detailed Description Note 4 Guaranteed by design Not production tested Note 5 Input capacitance is code dependent The highest capacitance occurs at code O0hex MAKI ee A CCSXVIA MAX522 Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package Typical Operating Characteristics TA 25 C unless otherwise noted OUTPUT VOLTAGE vs OUTPUT SOURCE CURRENT Vpp 3V 85 3 DACA 3 0 2 25 515 3 10 EF Vpp 3V 0 5 oopE ALL ts 0 0001 0 001 0 01 0 1 1 10 100 OUTPUT SOURCE CURRENT mA TOTAL UNADJUSTED ERROR vs DIGITAL CODE DACA LOADED WITH MAX22 TOC 04 0 32 64 96 128 160 192 224 255 DIGITAL CODE SHUTDOWN SUPPLY CURRENT vs TEMPERATURE REF Vpp 5V ALL LOGIC INPUTS 5V L DACs SET TOALL 1s A E o MAXS22 TOC 07 SHUTDOWN SUPPLY CURRENT uA
15. on every rising edge of the serial clock signal SCLK The clock frequency can be as high as 5MHz Data is sent MSB first and can be transmitted in one 16 bit word The write cycle can be segmented when CS is kept active low to allow for example two 8 bit wide transfers After clocking all 16 bits into the input shift register the rising edge of CS updates the DAC outputs and the shutdown status Because of their single buffered structure DACs cannot be simultaneously updated to different digital values Table 1 Input Shift Register Dr DAC Data Bit 0 LSB B1 DAC Data Bit 1 o B2 DAC Data Bit 2 m B3 DAC Data Bit 3 S B4 DAC Data Bit 4 a B5 DAC Data Bit 5 B6 DAC Data Bit 6 B7 DAC Data Bit 7 MSB LA Load Reg DAC A Active High 9 LB Load Reg DAC B Active High t UB4 Uncommitted Bit 4 d SA Shut Down DAC A Active High E SB Shut Down DAC B Active High 6 UB3 Uncommitted Bit 3 UB2 Uncommitted Bit 2 UB1 Uncommitted Bit 1 Clocked in last Clocked in first Serial Input Data Format and Control Codes Table 2 lists the serial input data format The 16 bit input word consists of an 8 bit control byte and an 8 bit data byte The 8 bit control byte is not decoded inter nally Every control bit performs one function Data is clocked in starting with UB1 Uncommitted Bit fol lowed by the remaining control bits and the data byte The LSB of the data byte BO is
16. the last bit clocked into the shift register Figure 2 Table 3 is an example of a 16 bit input word It per forms the following functions 80hex 128 decimal loaded into DAC registers A and B DAC A and DAC B are active dl d Slab Dual 8 Bit Voltage Output Serial DAC in 8 Pin SO Package INSTRUCTION EXECUTED Up UB2 UB3 SB SA UB4 LB LA D7 D6 D5 D4 D3 D2 Di DO CONTROL BYTE DATA BYTE Figure 2 MAX522 3 Wire Serial Interface Timing Diagram Table 2 Serial Interface Programming Commands CONTROL DATA FUNCTION UB1 UB2 UB3 SB SA UB4 LB LA B7 B6 B5 B4 B3 B2 B1 BO MSB LSB xX X 1 ig 0 0 0 xX X X X X X X X No Operation to DAC Registers xX X 1 0 0 0 Unassigned Command XIX 1 2 0 1 0 8 Bit DAC Data Load Register to DAC B xX X 1 7 0 0 1 8 Bit DAC Data Load Register to DAC A X X 1 t 0 1 1 8 Bit DAC Data Load Both DAC Registers X X 1 0 0 0 i X X X X X X X X All DACs Active X X 1 0 0 0 g i x X X X X X X X Unassigned Command X X 1 1 0 0 n il X X X X X X X X Shut Down DAC B X X 1 0 1 0 2 e X X X X X X X X Shut Down DAC A X X 1 1 1 0 i P X X X X X X X X Shut Down All DACs X Dont care Not shown for the sake of clarity The functions of loadin

Download Pdf Manuals

image

Related Search

MAXIM MAX522 handbook

Related Contents

NAVIGON 92 Plus NAVIGON 92 Premium NAVIGON 92 Premium Live User manual        ROHM EMB6/UMB6N handbook    ASROCK Z68 Extreme4 User Manual  COMPUTER IEEE-1394 FIREWIRE CABLES      

Copyright © All rights reserved.
DMCA: DMCA_mwitty#outlook.com.