TEXAS INSTRUMENTS TPS2220A handbook
Contents
1. Y Seating Plane 2 00 MAX 0 05 MIN E 20 10 PINS 4040065 E 12 01 NOTES A Alllinear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion not to exceed 0 15 Falls within JEDEC MO 150 Dou 35 TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or custom2. www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 xVCC SWITCH VOLTAGE DROP 3 3 V INPUT xVCC SWITCH VOLTAGE DROP 5 V INPUT vs vs LOAD CURRENT LOAD CURRENT 0 12 0 14 gt gt 3 5 0 12 E 9 T 100 gt gt Ty 100 C 9 om 0 1 008 Ty 0 g 8 a a 25 o 0 08 Ei 0 06 2 gt 0 06 40 5 0 04 t 0 04 o 9 Ty 85 C 0 02 0 02 p gt 0 0 0 0 2 0 4 0 6 0 8 1 0 0 2 0 4 0 6 0 8 1 Il Load Current A 11 Load Current A Figure 29 Figure 30 xVPP SWITCH VOLTAGE DROP 12 V INPUT SHORT CIRCUIT CURRENT LIMIT 3 3 V TO xVCC vs vs LOAD CURRENT JUNCTION TEMPERATURE 0 14 1 395 gt I 5 0 12 1 39 gt gt 1 385 e 0 1 Ty 100 C n e 8 E 1 38 0 08 Ty 0 C 3 8 Ty 25 C s 9 0 06 5 1 37 E 8 0 04 s Ty 40 C Q 1 365 a t 8 lt 0 02 Ty 85 1 36 2 0 1 355 0 0 01 0 02 0 03 0 04 0 05 50 20 10 40 70 100 I Load Current A T Junction Temperature Figure 31 Figure 32 TPS2220A TPS2223A X3 Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 SHORT CIRCUIT CURRENT LIMIT 5 V TO xVCC SHORT CIRCUIT CURRENT LIMIT 12 V TO xVPP vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE 1 435 0 208 lt lt Q 1 43
3. 0 10 20 30 40 t Time ms Figure 5 50 TEXAS INSTRUMENTS www ti com SHORT CIRCIUT RESPONSE SHORT APPLIED TO POWERED ON 12 V xVPP SWITCH OUTPUT 2 Vidiv lo xvPP 2 A div t Time ms Figure 4 OC RESPONSE WITH RAMPED OVERCURRENT LIMIT LOAD ON 12 V xVPP SWITCH OUTPUT 5 Vidiv lo xvPP 100 mA div 0 2 4 6 8 t Time ms Figure 6 4i TEXAS INSTRUMENTS www ti com t pd on Turnon Propagation Delay Time xVCC ms t pd on Turnon Propagation Delay Time xVPP ms TURNON PROPAGATION DELAY TIME xVCC vs JUNCTION TEMPERATURE 0 50 20 10 40 70 100 T Junction Temperature Figure 7 TURNON PROPAGATION DELAY TIME xVPP vs JUNCTION TEMPERATURE 3 xVPP 12V lo 0 05 A 2 5 10 uF 2 1 5 1 0 5 0 50 20 10 40 70 100 Ty Junction Temperature C Figure 9 t pd off Turnoff Propagation Delay Time xVCC ms t pd off Turnoff Propagation Delay Time xVCC ms TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 TURNOFF PROPAGATION DELAY TIME xVCC VS JUNCTION TEMPERATURE 2 6 2 55 2 5 2 45 2 4 2 35 2 3 2 25 50 20 10 40 70 100 Ty Junction Temperature
4. www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 RISE TIME xVCC FALL TIME xVCC vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE 1 22 2 41 1 2 2 4 1 18 E 239 1 16 gt gt g 114 256 E o 112 2 37 2 144 E 2 36 1 08 2 35 1 06 1 04 2 34 50 20 10 40 70 100 50 20 10 40 70 100 T Junction Temperature T Junction Temperature Figure 15 Figure 16 RISE TIME xVPP FALL TIME xVPP vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE 0 605 4 15 xVPP 12V xVPP 12 V lo 0 05 A lo 0 05 U 0 6 CL 10uF 4 1 C 10uF o E a 0 595 405 0 z 0 59 d 4 BC 9 c 1 0 585 3 95 0 58 3 9 0 575 3 85 50 20 10 40 70 100 50 20 10 40 70 100 T Junction Temperature T Junction Temperature Figure 17 Figure 18 TPS2220A TPS2223A X3 Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 RISE TIME xVCC FALL TIME xVCC vs vs LOAD CAPACITANCE LOAD CAPACITANCE ao a E E 8 8 gt gt gt d E E E tc L 0 1 1 10 100 1000 0 1 1 10 100 1000 C Load Capacitance uF Load Capacitance uF Figure 19 Figure 20 RISE TIME xVPP FALL TIME xVPP vs vs LOAD CAPACITANCE LOAD CAPACITANCE xVPP 12 V xVPP 12 V lo 0 05 A lo 0 05 A T
5. Vigewsws 3v 5 3 3 Vo xvPP 90 10 GND 10 GND Rise Fall Time xVPP Rise Fall Time xVCC s 6 i let Mi 12V 5V 3 3V 3 Vo xvPP 9096 90 10 GND 10 GND Turnon off Time xVPP Turnon off Time xVCC VOLTAGE WAVEFORMS Figure 1 Test Circuits and Voltage Waveforms Data Setup Time Data Hold iq Latch Delay Time LATCH gt 4 Clock Delay Time NOTE Data is clocked in the positive edge of the clock The positive edge of the latch signal should occur before the next positive edge of the clock For definition of DO to D10 see the control logic table Figure 2 Serial Interface Timing for TPS2226A 10 3 TEXAS INSTRUMENTS www ti com TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 PARAMETER MEASUREMENT INFORMATION continued Table of Graphs FIGURE Short circuit response short applied to powered on 5 V xVCC switch output vs Time 3 Short circuit response short applied to powered on 12 V xVPP switch output vs Time 4 OC response with ramped overcurrent limit load on 5 V xVCC switch output vs Time 5 response with ramped overcurrent limit load on 12 V xVPP switch output vs Time 6 xVCC Turnon propagation delay time C 150
6. vs Junction temperature 7 xVCC Turnoff propagation delay time C 150 vs Junction temperature 8 xVPP Turnon propagation delay time C 10 uF vs Junction temperature 9 xVPP Turnoff propagation delay time C 10 pF vs Junction temperature 10 xVCC Turnon propagation delay time Ty 25 C vs Load capacitance 11 xVCC Turnoff propagation delay time Ty 25 C vs Load capacitance 12 xVPP Turnon propagation delay time Ty 25 C vs Load capacitance 13 xVPP Turnoff propagation delay time Ty 25 C vs Load capacitance 14 xVCC Rise time C 150 vs Junction temperature 15 xVCC Fall time C 150 vs Junction temperature 16 xVPP Rise time C 10 uF vs Junction temperature 17 xVPP Fall time C 10 uF vs Junction temperature 18 xVCC Rise time Tj 25 C vs Load capacitance 19 xVCC Fall time Ty 25 vs Load capacitance 20 xVPP Rise time Tj 25 C vs Load capacitance 21 xVPP Fall time Ty 25 vs Load capacitance 22 12 TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 SHORT CIRCIUT RESPONSE SHORT APPLIED TO POWERED ON 5 V xVCC SWITCH OUTPUT Vo oc 5 Vidiv 5 2 Vidiv lo vcc 5 0 100 200 300 400 t Time us Figure 3 OC RESPONSE WITH RAMPED OVERCURRENT LIMIT LOAD ON 5 V xVCC SWITCH OUTPUT 500 5 Vidiv lo xvco 1 A div
7. C Figure 8 TURNON PROPAGATION DELAY TIME xVPP VS JUNCTION TEMPERATURE xVCC 12 V lo 0 05 A C 10 uF 50 20 10 40 70 100 Ty Junction Temperature C Figure 10 TPS2220A TPS2223A X3 Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 TURNON PROPAGATION DELAY TIME xVCC TURNON PROPAGATION DELAY TIME xVCC vs VS LOAD CAPACITANCE LOAD CAPACITANCE 2 55 2 5 2 45 2 4 2 35 2 3 2 25 0 1 1 10 100 1000 C Load Capacitance uF t pd on Turnon Propagation Delay Time xVCC ms t pd off Turnoff Propagation Delay Time xVCC ms 0 1 1 10 100 1000 C Load Capacitance uF Figure 11 Figure 12 TURNON PROPAGATION DELAY TIME xVPP TURNON PROPAGATION DELAY TIME xVPP vs vs LOAD CAPACITANCE LOAD CAPACITANCE 2 25 xVPP 12 V lo 0 05 25 xVPP 12V lo 0 05 A 22 Ty 25 C 2 15 2 1 2 05 t pd on Turnon Propagation Delay Time xVPP ms t pd off Turnoff Propagation Delay Time xVPP ms 0 1 1 10 C Load Capacitance uF 0 1 1 10 C Load Capacitance uF Figure 13 Figure 14 14 33 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A
8. 0 6 Latch to xVCC 5V paor todo 2 5 1 0 5 Latch to xVCC 3 3V pdon todo 2 6 Refer to Parameter Measurement Information in Figure 1 card inserted assumes a 0 1 pF output capacitor see Figure 1 Specified by design not tested in production Not applicable for TPS2223A annann BRON 3 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 FUNCTIONAL BLOCK DIAGRAM OF TPS2223A TPS2224A and TPS2226A see Note A Ve meu iem di vivum ig ml a PETI Qm VEN M ei 1 2 Power 33v 131 e cs lo AVCC Inputs 14 55 See Note 10 3 33V 33V 06 51 53 5V H o0 xs Input 5v S6 TA D 5v zn 0 6 5 17_ See Note 54 18 H 5 rh See Note C S8 See Note B 5 se Er cs avPP S9 Power 06 67 Inputs 10 ale 12V 9 See Note D an See Note BL M 12V 4 5 BVPP See Note C 13 i e 511 Discharge S14 Element 5 d NOTES Diagram shown for 24 pin DB package Current sense The two 12 V pins must be externally connected No connections for TPS2223A com TPS2220A TPS2223A Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY
9. 2002 REVISED SEPTEMBER 2004 FUNCTIONAL BLOCK DIAGRAM OF TPS2220A 5V S4 See Note A 9 NO oe 12V See Note B 12V See Note B Control Logic SHDN RESET DATA CLOCK LATCH E s 5V 0 57 GND NOTES Current sense B The two 12 V pins must be externally connected PIN ASSIGNMENTS TPS2226A TPS2220A DB PACKAGE DB OR PWP PACKAGE TOP VIEW TOP VIEW 5V NC NC NC NC SHDN 12V BVPP BVCC BVCC BVCC NC OC 3 3V 3 3V 1 2 3 4 5 6 7 8 9 NC No internal connection 3 TEXAS TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 Terminal Functions TERMINAL NAME NO yo DESCRIPTION TPS2220A TPS2223A TPS2224A TPS2226A 3 3V 13 13 14 13 14 15 16 17 3 3 V input for card power and chip power 5V 1 2 1 2 24 1 2 24 1 2 30 5 Vinput for card power 12 V input for card power xVPP The two 12 V pins must be TEN 7 20 d 7 20 fred externally connected AVCC 9 10 9 10 9 10 9 10 11 o output that delivers 3 3 V 5 V ground or high impedance to Switched output that delivers 3 3 V 5 V 12 V ground or high mee 8 B 2 S 9 impedance to card 12 V not applicable to TPS2223A BVCC a 17 18 17 18 20 21 22 o ARS output that delivers 3 3 V 5 V ground or high impedan
10. 5 0 7 1 ko resistance Discharge at xVPP loidisc 1 MA 0 2 0 4 0 5 Limit steady state value output pow 1 1 4 2 ered into a short circuit losavpP 120 200 300 mA los oulput current Limit steady state value output pow 1214 2 ered into a short circuit Ty 100 C losvPP 120 200 300 mA Thermal shutdown Thermal trip point Rising temperature 135 6 temperature Hysteresis 10 72 5V to xVCC 5 V with 100 short to GND 10 Current limit response time 3 4 us 5V to xVPP 5 V with 100 mQ short to GND 3 lis av 140 200 Normal Vo xVCC Vo xVPP 3 3 V and 8 12 operation 67 also for RESET 0 V 12 100 180 1 Input current quiescent lig av 0 3 2 Shutdown mode liy Vo xVCC Vo xVPP Hi z 0 1 2 12 0 3 2 Vi 5V V Vi 0v VI 5V Vi t2V Leakage current Ty 100 C 50 lig output off state Shutdown mode 19 12 V 0 V T 100 C E 1 Pulse testing techniques maintain junction temperature close to ambient temperature thermal effects must be taken into account separately TPS2223A TPS2224A TPS2226A two switches on TPS2220A one switch on 3 Specified by design not tested in production From application of short to 110 of final current limit 33 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A www ti com SLVS428B MAY 2002 REVISED SEPTE
11. IC from overheating beyond the package power dissipation ratings During power up the devices control the rise times of the xVCC and xVPP outputs and limit the inrush current into a large load capacitance faulty card or connector 12 V SUPPLY NOT REQUIRED Some PC Card switches use the externally supplied 12 V to power gate drive and other chip functions which requires that power be present at all times The TPS2220A TPS2224A and TPS2226A offer considerable power savings by using an internal charge pump to generate the required higher gate drive voltages from the 3 3 V input Therefore the external 12 V supply can be disabled except when needed by the PC Card in the slot thereby extending battery lifetime A special feature in the 12 V circuitry actually helps to reduce the supply current demanded from the 3 3 V input When 12 V is supplied and requested at the VPP output a voltage selection circuit draws the charge pump drive current for the 12 V FETs from the 12 V input This selection is automatic and effectively reduces demand fluctuations on the normal 3 3 V VCC rail For proper operation of this feature a minimum 3 3 V input capacitance of 4 7 uF is recommended and a minimum 12 V input ramp up rate of 12 V 50 ms 240 V s is required Additional power savings are realized during a software shutdown in which quiescent current drops to a maximum of 1 uA VOLTAGE TRANSITIONING REQUIREMENT PC Cards like portables are migrating from 5 V
12. TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 A AVAILABLE OPTIONS TEXAS INSTRUMENTS www ti com These devices have limited built in ESD protection The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates PACKAGED DEVICES TA PLASTIC SMALL OUTLINE PowerPAD PLASTIC SMALL OUTLINE DB 24 DB 30 PWP 24 1 TPS2223ADB TPS2224ADB TPS2226ADB ane 5 TPS2216 TPS2223APWP 40 C to 85 C Pin TPS2214 TPS2220ADB Pin DEOS ick TPSo2 4Apwp TPS2220APWP compatibles TPS2214A compatibles TPS2206 1 PWP packages also available taped and reeled R suffix to device type e g TPS2223APWPR for taped and reeled LEAD PB FREE ORDERING INFORMATION Ta SSOP DB STATUS 1 HTSSOP PWP STATUS ECO STATUS 2 TPS2220ADBG4 Active TPS2220APWPRG4 Active TPS2223ADBG4 Active TPS2223APWPRG4 Preview 40 to 85 C Green TPS2224ADBG4 Active TPS2224APWPRG4 Preview TPS2226ADBG4 Active TPS2226APWPRG4 Preview 1 The marketing status values are defined as follows e ACTIVE This device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in product
13. 3 3 V 5 V Viag 12 V not applicable for TPS2223A all outputs unloaded unless otherwise noted PARAMETER LOAD CONDITION TEST CONDITIONS 2 MIN MAX UNIT Ci vco 0 1 0 1 pF 5 V 0 9 0 A 0 Vi 12V 0 26 t Output rise times 9 8 d ms Ci 150 UF CL amp vpp 10 5 V 14 0 75 A logypp 50 mA 12 V 0 6 5 V 0 5 Ci voco 0 1 0 1 Discharge switches ON 0 A lover 0 A Vowvpp 12 V ty Output fall times 9 Discharge switches ON Oe ms Ci avoo 150 UF 10 5 V 2 35 0 75 A 50 mA Vowvep 12 V 3 9 t 2 Latch to xVPP 12v 4 Pden in 0 62 t 0 77 Latch to xVPP 5V poon bio 0 51 t 0 75 0 1 HF Cave 0 1 HF Latch to xVPP 3 3V 2 ms O xVCO O xVPP todo 0 52 1 0 3 Latch to xVCC 5V poon ti 2 5 1 0 3 Latch to xVCC 3 3V paor Propagation delay todo 2 8 ba times tod 2 2 LatchT to xVPP 12V 4 todo 0 8 t 0 8 Latch to xVPP 5V paon todo 0 6 Civec 150 10 4 todon 0 8 LatchT to xVPP 3 3V lo vco 0 75 A 50 mA 8550 todo 0 6 TS 1
14. 8 0 206 9 2 1 425 2 2 0 204 gt n 142 0 202 t 1 415 t xVPP 12V 3 02 1 41 t E 0 198 8 1 405 8 5 5 0 196 14 e 4 o lt 0 194 1 395 S 1 39 0 192 8 8 1 385 0 1 50 20 10 40 70 100 0 350 20 10 40 70 100 Ty Junction Temperature C T Junction Temperature Figure 33 Figure 34 20 33 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 APPLICATION INFORMATION OVERVIEW PC Cards were initially introduced as a means to add flash memory to portable computers The idea of add in cards quickly took hold and modems wireless LANs global positioning satellite system GPS multimedia and hard disk versions were soon available As the number of PC Card applications grew the engineering community quickly recognized the need for a standard to ensure compatibility across platforms Therefore the PCMCIA Personal Computer Memory Card International Association was established comprising members from leading computer software PC Card and semiconductor manufacturers One key goal was to realize the plug and play concept so that cards and hosts from different vendors would be transparently compatible PC CARD POWER SPECIFICATION System compatibility also means power compatibility The most current set of specifications PC Card Standard set forth by the PCMCIA committee states that power is to be transfe
15. CHANICAL DATA PWP R PDSO G PowerPAD PLASTIC SMALL OUTLINE PACKAGE 20 PIN SHOWN Thermal Pad See Note D 0 15 NOM T Gage Plane 4 Y Seating Plane L_ 1 20 MAX 015 1 005 0 0 PINS DIM 4073225 G 08 03 NOTES A All linear dimensions are in millimeters B This drawing is subject to change without notice C Body dimensions do not include mold flash or protrusions D This package is designed to be soldered to a thermal pad on the board Refer to Technical Brief PowerPad Thermally Enhanced Package Texas Instruments Literature No SLMA002 for information regarding recommended board layout This document is available at www ti com lt http www ti com gt E Falls within MO 153 PowerPAD is a trademark of Texas Instruments 435 TEXAS INSTRUMENTS www ti com MECHANICAL DATA MSSO002E JANUARY 1995 REVISED DECEMBER 2001 DB R PDSO G PLASTIC SMALL OUTLINE 28 PINS SHOWN 08 Gage Plane Y 0
16. MBER 2004 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC SECTION CLOCK DATA LATCH RESET SHDN OC 9 PEE 5 RESET 0 V 30 20 10 SHDN 5 5 V 1 1 l Input current logic SHDN 0 V 50 3 pA LATCH 5 5 V 50 LATCH 0 V 4 1 IcLOCK DATA OVto55V 4 1 Vin High level input voltage logic 2 V Vit Low level input voltage logic 0 8 V Vo sat Output saturation voltage at OC lo 2 2 mA 0 14 0 4 V lig Leakage current at OC 5 5 V 0 1 UVLO AND POR POWER ON RESET Input voltage at 3 3V pin UVLO 3 3 V level below which all switches are Hi Z 2 4 2 7 2 9 V Vnys 3 3v UVLO hysteresis voltage at VA 100 mV Vi sv Input voltage at 5V pin UVLO 5 V level below which only 5V switches are Hi Z 2 3 2 5 V UVLO hysteresis voltage at 5V 9 3 Vto 23 V to 100 mV tat Delay time for falling response UVLO 9 4 us 3 3 V voltage below which POR is asserted causing a Vi PoR Input voltage power on reset RESET internally with all line switches open and all 1 7 V discharge switches closed 5 LATCH has low current pulldown RESET and SHDN have low current pullup 6 Specified by design not tested in production TPS2220A TPS2223A Texas TPS2224A TPS2226A INSTRUMENTS SLVS428B MAY 2002 REVISED SEPTEMBER 2004 bo SWITCHING CHARACTERISTICS Voc 5 V Ta 25 Vis ay
17. See Dissipation Rating Table i Ouigut ieri lovec Internally Limito lO xVPP Internally Limited Ty Operating virtual junction temperature range 40 to 100 Storage temperature range 55 to 150 Lead temperature 1 6 mm 1 16 inch from case for 10 seconds 260 sink current 10 mA 1 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability 2 Not applicable for TPS2223A DISSIPATION RATING TABLE PACKAGE lt 25 DERATING FACTOR TA 70 C 85 C POWER RATING ABOVE T 25 C POWER RATING POWER RATING DB 24 890 mW 8 9 mW C 489 mW 356 mW 30 1095 mW 10 95 mw C 602 mW 438 mW PWP 24 3322 mW 33 22 mW C 1827 mW 1329 mW 1 These devices are mounted on an JEDEC low k board 2 oz traces on surface RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT Input voltage Viv is required for all circuit Viga 3 6 operations 5V and 12V are only required for Viv 5 5 V their respective functions Vam 13 5 lo Output current at Ty 100 C at 100 C 100 mA ficlock Clo
18. Temperature C Figure 23 T Junction Temperature TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 I Input Current xVPP 12V LA DS on Static Drain Source On State Resistance 5 V to xVCC Switch Q 18 INPUT CURRENT xVPP 12 V vs JUNCTION TEMPERATURE 120 100 80 60 40 20 0 50 20 10 40 70 100 Ty Junction Temperature C Figure 25 STATIC DRAIN SOURCE ON STATE RESISTANCE 5 V TO xVCC SWITCH vs JUNCTION TEMPERATURE 0 14 0 12 0 1 0 08 0 06 0 04 0 02 0 50 20 10 40 70 Ty Junction Temperature C Figure 27 100 Ds on Static Drain Source On State Resistance Ds on Static Drain Source On State Resistance 3 3 V to x VCC Switch Q 12 V to x VPP Switch 0 04 2 6 INSTRUMENTS www ti com STATIC DRAIN SOURCE ON STATE RESISTANCE 3 3 V TO xVCC SWITCH VS JUNCTION TEMPERATURE 0 12 0 1 0 08 0 06 0 02 20 10 40 70 Ty Junction Temperature 100 Figure 26 STATIC DRAIN SOURCE ON STATE RESISTANCE 12 V TO xVPP SWITCH VS JUNCTION TEMPERATURE 2 5 1 5 0 5 50 20 10 40 70 Ty Junction Temperature C 100 Figure 28 33 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A
19. The serial interface consists of the DATA CLOCK and LATCH leads The data is clocked in on the positive edge of the clock see Figure 2 The 11 bit 00 010 serial data word is loaded during the positive edge of the latch signal The positive edge of the latch signal should occur before the next positive edge of the clock occurs The serial interface of the device is compatible with serial interface PCMCIA controllers An overcurrent output OC is provided to indicate an overcurrent or overtemperature condition in any of the xVCC and xVPP outputs as previously discussed 23 TPS2220A TPS2223A 3 TEXAS TPS2224A TPS2226A INSTRUMENTS SLVS428B MAY 2002 REVISED SEPTEMBER 2004 TPS2220A TPS2223A TPS2224A and TPS226A CONTROL LOGIC xVPP AVPP CONTROL SIGNALS OUTPUT BVPP CONTROL SIGNALS OUTPUT D8 SHDN DO D1 D9 V AVPP D8 SHDN D4 D5 D10 V_BVPP 1 0 0 X 0v 1 0 0 X 0v 1 0 1 0 3 3 V 1 0 1 0 3 3 V 1 0 1 1 5V 1 0 1 1 5V 1 1 0 X 12 V0 1 1 0 X 12 V0 1 1 1 X Hi Z 1 1 1 X Hi Z 0 X X X Hi Z 0 X X X Hi Z 1 The output V xVPP is Hi Z for 52223 xVCC AVCC CONTROL SIGNALS BVCC CONTROL SIGNALS T OUTPUT OUTPUT SHDN D3 D2 V_AVCC D8 SHDN D6 D7 V BVCC 1 0 0 0v 1 0 0 OV 1 0 1 3 3 V 1 0 1 3 3 V 1 1 0 1 1 0 5V 1 1 1 0v 1 1 1 0v 0 X X Hi Z 0 X X Hi Z 24 4i TEXAS INSTRUMENTS www ti com ESD PROTECTIONS see F
20. ce to Switched output that delivers 3 3 V 5 V 12 V ground or high BVEP 13 19 23 9 impedance to card 12 V not applicable for TPS2223A GND 11 11 11 12 Ground Open drain overcurrent reporting output that goes low when an oc 18 12 18 18 9 overcurrent condition exists An external pullup is required SHDN Hi Z open all switches Identical function to serial D8 Asynchronous TON 2 2l A s active low command internal pullup RESET Logic level RESET input active low Asynchronous active low com BESET 12 ie 12 14 internal pullup CLOCK 4 4 4 4 Logic level clock for serial data word DATA 3 3 3 3 Logic level serial data word LATCH 5 5 5 5 Logic level latch for serial data word internal pulldown 6 14 16 6 13 19 NC Cera a ON No internal connection 22 23 24 E 29 TPS2220A TPS2223A X3 Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 PARAMETER MEASUREMENT INFORMATION xVPP e xVCC e Ov lo xvPP T OF lo xvcc LOAD CIRCUIT xVPP LOAD CIRCUIT xVCC GENERIS DR Vpp 0000 7 LATCH 50 LATCH 50 GND GND ois gt HN 6 gt pd on pd on RE Vi 12v 5V 3 3V SS Vi sv 3 3V 90 4 90 10 GND ios GND Propagation Delay xVPP Propagation Delay xVCC et p gt Mt y L
21. ck frequency 2 5 MHz Data 200 7 Latch 250 tw Pulse duration ns Clock 100 Reset 100 th Data to clock hold time see Figure 2 100 ns teu Data to clock setup time see Figure 2 100 ns latlatch Latch delay time see Figure 2 100 ns la clock Clock delay time see Figure 2 250 ns T ien virtual junction temperature maximum to be calculated at worst case Pp at 85 240 100 1 It is understood that for Via lt 3 V voltages within the absolute maximum ratings applied to pin 5V or pin 12V do not damage the IC 2 Not applicable for TPS2223A TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 ELECTRICAL CHARACTERISTICS Ty 25 C Visy 5 V Vig ay 3 3 V 12 V not applicable for 52223 all outputs unloaded unless otherwise 9 6 INSTRUMENTS www ti com noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SWITCH lo 750 mA each 85 110 3 3V to xVCC 2 lo 750 mA each Ty 100 C 110 140 m lo 500 mA each 95 130 5V to x VCC Static drain source lo 500 mA each Ty 100 C 120 160 DS on on state resistance lo 50 mA each 0 8 1 3 3V or 5V to xVPP 2 lo 50 mA each Ty 100 C 1 1 3 lo 50 mA each 2 2 5 12V to xVPP 2 lo 50 mA each T 100 C 2 5 3 4 Output discharge Discharge at x VCC lo disc 1 mA 0
22. e voltage drop across the 5 V switch The specification for output voltage regulation of the 3 3 V output is 300 mV therefore using the same equation by deducting the voltage drop percentages 296 for power supply regulation and PCB resistive loss 196 the allowable voltage drop for the 3 3 V switch is 200 mV The voltage drop is the output current multiplied by the switch resistance of the device Therefore the maximum output current lo max that can be delivered to the PC Card in regulation is the allowable voltage drop across the IC divided by the output switch resistance Vos DS on The xVCC outputs have been designed to deliver the peak and average currents defined by the Card specification within regulation over the operating temperature range The xVPP outputs of the device have been designed to deliver 100 mA continuously OVERCURRENT AND OVERTEMPERATURE PROTECTION PC Cards are inherently subject to damage that can result from mishandling Host systems require protection against short circuited cards that can lead to power supply or PCB trace damage Even extremely robust systems can undergo rapid battery discharge into a damaged PC Card resulting in the sudden and unacceptable loss of system power In comparison the reliability of fused systems is poor because blown fuses require troubleshooting and repair usually by the manufacturer The TPS2220A TPS2223A TPS2224A and TPS2226A take a two prong
23. ed approach to overcurrent protection which is designed to activate if an output is shorted or when an overcurrent condition is present when switches are powered up First instead of fuses sense FETs monitor each of the xVCC and xVPP power outputs Unlike 21 TPS2220A TPS2223A Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 APPLICATION INFORMATION continued sense resistors or polyfuses these FETs do not add to the series resistance of the switch therefore voltage and power losses are reduced Overcurrent sensing is applied to each output separately Excessive current generates an error signal that limits the output current of only the affected output preventing damage to the host Each xVCC output overcurrent limits from 1 A to 2 2 A typically around 1 6 A the xVPP outputs limit from 100 mA to 250 mA typically around 200 mA Second when an overcurrent condition is detected the TPS2220A TPS2223A TPS2224A and TPS2226A assert an active low OC signal that can be monitored by the microprocessor or controller to initiate diagnostics and or send the user a warning message If an overcurrent condition persists causing the IC to exceed its maximum junction temperature thermal protection circuitry activates shutting down all power outputs until the device cools to within a safe operating region which is ensured by a thermal shutdown hysteresis Thermal limiting prevents destruction of the
24. er product design Customers are responsible for their products and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI produc
25. i O vis TEXAS N TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 CARDBUS POWER INTERFACE SWITCHES FOR SERIAL PCMCIA CONTROLLERS FEATURES APPLICATIONS e Single Slot Switch TPS2220A e Notebook and Desktop Computers Dual Slot Switches TPS2223A TPS2224A e Bar Code Scanners TPS2226A Digital Cameras e Fast Current Limit Response Time Set Top Boxes e Fully Integrated VCC and VPP Switching for e PDAs 3 3 V 5 V and 12 V no 12 V on TPS2223A e Meets Current PC Card Standards Output Selection Independent of Vcc TOP VIEW e 12 and 5 V Supplies Can Be Disabled e TTL Logic Compatible Inputs e Short Circuit and Thermal Protection 24 HTSSOP 24 or 30 Pin SSOP e 140 yA Typical Quiescent Current from 3 3 V Input Break Before Make Switching e Power On Reset e 40 C to 85 C Operating Ambient Temperature Range NC No internal connection t Pin 7 and 20 are NC for TPS2223A 1 2 3 4 5 6 7 8 9 DESCRIPTION The TPS2223A TPS2224A and TPS2226A CardBus power interface switches provide an integrated power management solution for two PC Card sockets The TPS2220A is a single slot option for this family of devices These devices allow the controlled distribution of 3 3 V 5 V and 12 V to each card slot The current limiting and thermal protection features eliminate the need for fuses Current limit reporti
26. igure 35 TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 All inputs and outputs of these devices incorporate ESD protection circuitry designed to withstand a 2 kV human body model discharge as defined in MIL STD 883C Method 3015 The xVCC and xVPP outputs can be exposed to potentially higher discharges from the external environment through the PC Card connector Bypassing the outputs with 0 1 uF capacitors protects the devices from discharges up to 10 kV TPS2226A AVCC AVCC 12V 9 e 5V e 3 3 V System RST Vcc Vcc PC Card Connector A Vpp2 Vcc Vcc PC Card Connector B Vpp2 Controller DATA CLOCK LATCH t Maximum recommended output capacitance for xVCC is 220 uF including card capacitance and for xVPP is 10 uF without OC glitch when Switches are powered on Figure 35 Detailed Interconnections and Capacitor Recommendations 25 TPS2220A TPS2223A Texas TPS2224A TPS2226A INSTRUMENTS www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 12 V FLASH MEMORY SUPPLY The TPS6734 is a fixed 12 V output boost converter capable of delivering 120 mA from inputs as low as 2 7 V The device is pin for pin compatible with the MAX734 regulator and offers the following advantages lower supply current wider operating inp
27. ion to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available e OBSOLETE TI has discontinued production of the device 2 Eco Status Information Additional details including specific material content can be accessed at www ti com leadfree e Not yet available Lead Pb free for estimated conversion dates go to www ti com leadfree Pb Free TI defines Lead Pb Free or Pb Free to mean RoHS compatible including a lead concentration that does not exceed 0 196 of total product weight and if designed to be soldered suitable for use in specified lead free soldering processes e Green TI devices Green to mean Lead Pb Free and in addition uses package materials that do not contain halogens including bromine Br or antimony Sb above 0 196 of total product weight ki TEXAS INSTRUMENTS www ti com ABSOLUTE MAXIMUM RATINGS over operating free air temperature range unless otherwise noted TPS2220A TPS2223A TPS2224A TPS2226A SLVS428B MAY 2002 REVISED SEPTEMBER 2004 TPA222xA UNIT Vi 3 3v 0 3 to 5 5 V Vi Input voltage range for card power 0 3 to 5 5 V Vide 0 3 to 14 Logic input output voltage 0 3 to 6 V Vo Output voltage VoyxveP 0 3 to 14 V Continuous total power dissipation
28. ng helps the user isolate a system fault The switch rpgion and current limit values have been set for the peak and average current requirements stated in the PC Card specification and optimized for cost A faster maximum current limit response time is the only difference between the TPS2223A TPS2224A and TPS2226A and the TPS2223 TPS2224 and TPS2226 Like the TPS2214 and TPS2214A and the TPS2216 and TPS2216A this family of devices supports independent VPP VCC switching however the standby and interface mode pins are not supported Shutdown mode is now supported independently on SHDN as well as in the serial interface Optimized for lower power implementation the TPS2223A does not support 12 V switching to VPP See the available options table for pin compatible device information Please be aware that an important notice concerning availability standard warranty use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet PC Card CardBus are trademarks of PCMCIA Personal Computer Memory Card International Association PowerPAD is a trademark of Texas Instruments PRODUCTION DATA information is current as of publication date Copyright 2002 2004 Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters
29. r output current Unless all pins are connected in parallel the series resistance is higher than that specified resulting in increased voltage drops and power loss It is recommended that all input and output power pins be paralleled for optimum operation To increase the noise immunity of the TPS2220A TPS2223A TPS2224A and TPS2226A the power supply inputs should be bypassed with at least a 4 7 uF electrolytic or tantalum capacitor paralleled by 0 047 LF to 22 3 Texas TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A www ti com SLVS428B MAY 2002 REVISED SEPTEMBER 2004 APPLICATION INFORMATION continued 0 1 ceramic capacitor It is strongly recommended that the switched outputs be bypassed with a 0 1 uF or larger ceramic capacitor doing so improves the immunity of the IC to electrostatic discharge ESD Care should be taken to minimize the inductance of PCB traces between the devices and the load High switching currents can produce large negative voltage transients which forward biases substrate diodes resulting in unpredictable performance Similarly no pin should be taken below 0 3 V RESET INPUT To ensure that cards are in a known state after power brownouts or system initialization the PC Cards should be reset at the same time as the host by applying low impedance paths from xVCC and xVPP terminals to ground A low impedance output state allows discharging of residual voltage remaining on PC Card filter capaci
30. rred between the host and the card through eight of the 68 terminals of the PC Card connector This power interface consists of two Vcc two and four ground terminals Multiple and ground terminals minimize connector terminal and line resistance The two Vpp terminals were originally specified as separate signals but are normally tied together in the host to form a single node to minimize voltage losses Card primary power is supplied through the Vcc terminals flash memory programming and erase voltage is supplied through the terminals Cardbus cards of today typically do not use 12 V which is now more of an optional requirement in the host DESIGNING FOR VOLTAGE REGULATION The current PCMCIA specification for output voltage regulation of the 5 V output is 5 250 mV In a typical PC power system design the power supply has an output voltage regulation Vpgireg of 2 100 mV Also a voltage drop from the power supply to the PC Card results from resistive losses Vpcp in the PCB traces and the PCMCIA connector A typical design would limit the total of these resistive losses to less than 1 50 mV of the output voltage Therefore the allowable voltage drop Vps for the TPS2220A TPS2223A TPS2224A and TPS2226A would be the PCMCIA voltage regulation less the power supply regulation and less the PCB and connector resistive drops Vps Vo reg PS reg V PCB Typically this would leave 100 mV for the allowabl
31. t or service and is an unfair and deceptive business practice is not responsible or liable for any such statements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security Telephony www ti com telephony Video amp Imaging www ti com video Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2004 Texas Instruments Incorporated WWW ALLDATASHEET COM Copyright Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 100 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
32. tance permitting the system host and PC Cards to be powered up concurrently The active low RESET input closes internal ground switches S1 S4 S7 and S11 with all other switches left open The TPS2220A TPS2223A TPS2224A and TPS2226A remain in the low impedance output state until the signal is deasserted and further data is clocked in and latched The input serial data cannot be latched during reset mode RESET is provided for direct compatibility with systems that use an active low reset voltage supervisor The RESET pin has an internal 150 kQ pullup resistor CALCULATING JUNCTION TEMPERATURE The switch resistance rpgion is dependent on the junction temperature Tj of the die The junction temperature is dependent on both rps on and the current through the switch To calculate first find rpgion from Figure 26 through Figure 28 using an initial temperature estimate about 30 C above ambient Then calculate the power dissipation for each switch using the formula 2 Pp DS on Next sum the power dissipation of all switches and calculate the junction temperature Tj Pp A Rosa where Rega is the inverse of the derating factor given in the dissipation rating table Compare the calculated junction temperature with the initial temperature estimate If the temperatures are not within a few degrees of each other recalculate using the calculated temperature as the initial estimate LOGIC INPUTS AND OUTPUTS
33. to 3 3 V to minimize power consumption optimize board space and increase logic speeds The TPS2220A TPS2223A TPS2224A and TPS2226A meet all combinations of power delivery as currently defined in the PCMCIA standard The latest protocol accommodates mixed 3 3 V 5 V systems by first powering the card with 5 V then polling it to determine its 3 3 V compatibility The PCMCIA specification requires that the capacitors on 3 3 V compatible cards be discharged to below 0 8 V before applying 3 3 V power This action ensures that sensitive 3 3 V circuitry is not subjected to any residual 5 V charge and functions as a power reset PC Card specification requires that Vcc be discharged within 100 ms PC Card resistance cannot be relied on to provide a discharge path for voltages stored on PC Card capacitance because of possible high impedance isolation by power management schemes The devices include discharge transistors on all xVCC and xVPP outputs to meet the specification requirement SHUTDOWN MODE In the shutdown mode which can be controlled by SHDN or bit D8 of the input serial DATA word each of the xVCC and xVPP outputs is forced to a high impedance state In this mode the chip quiescent current is reduced to 1 or less to conserve battery power POWER SUPPLY CONSIDERATIONS These switches have multiple pins for each 3 3 V except for TPS2220A and 5 V power input and for the switched xVCC outputs Any individual pin can conduct the rated input o
34. ut voltage range and higher output currents As shown in Figure 36 the only external components required are an inductor a Schottky rectifier an output filter capacitor an input filter capacitor and a small capacitor for loop compensation The entire converter occupies less than 0 7 in of PCB space when implemented with surface mount components An enable input is provided to shut the converter down and reduce the supply current to UA when 12 V is not needed The TPS6734 is a 170 kHz current mode PWM pulse width modulation controller with an n channel MOSFET power switch Gate drive for the switch is derived from the 12 V output after start up to minimize the die area needed to realize the 0 7 Q MOSFET and improve efficiency at input voltages below 5 V Soft start is accomplished with the addition of one small capacitor A 1 22 V reference pin 2 of TPS6734 is brought out for external use For additional information see the TPS6734 data sheet SLVS127 TPS2226A 3 3Vor5V or Avcct Ri TPS2224A AVCC Enable 10 ka TPS6734 see Note A vcc L1 AVCC 18 uH AVPP FB sur ae 20V L 33 uF 20 V c2 ok 4 IN C4 5V e 33V e e e t Not on TPS2224A NOTE A The enable terminal can be tied to a general purpose I O terminal on the PCMCIA controller or tied high Figure 36 TPS2224A and TPS2226A with TPS6734 12 V 120 mA Supply 26 ME
35. y 25 o E a n a gt n 5 E E o 2 16 0 1 1 10 0 1 1 10 C Load Capacitance uF C Load Capacitance uF Figure 21 Figure 22 3 TEXAS TPS2220A TPS2223A INSTRUMENTS TPS2224A TPS2226A SL S 4288 MAY 2002 REVISED SEPTEMBER 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Input current xVCC 3 3 V 23 Input current xVCC 5 V vs Junction temperature 24 Input current xVPP 12 V 25 Static drain source on state resistance 3 3 V to xVCC switch 26 Static drain source on state resistance 5 V to xVCC switch vs Junction temperature 27 Static drain source on state resistance 12 V to xVPP switch 28 xVCC switch voltage drop 3 3 V input 29 Vo xVCC switch voltage drop 5 V input vs Load current 30 xVPP switch voltage drop 12 V input 31 Short circuit current limit 3 3 V to VCC 32 los Short circuit current limit 5 V to xVCC vs Junction temperature 33 Short circuit current limit 12 V to xVPP 34 INPUT CURRENT xVCC 3 3 V INPUT CURRENT xVCC 5 V vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE 180 14 5 160 12 822100 T gt z 10 S 120 8 8 100 x t 80 2 6 8 60 5 4 40 1 2 20 0 0 50 20 10 40 70 100 50 20 70 Ty Junction
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