Micrel 4-BIT D FLIP-FLOP SY10E131 SY100E131 Manual
Contents
1. control that passes the Cc signal to the flip flop Data is clocked into the flip flop on the rising edge of the output of the logical OR operation between CE and Cc data enters the master when both Cc and CE are LOW and data transfers to the slave when either CE or Cc or both go HIGH Asynchronous set and reset controls are provided The reset controls are individual and the set controls are pairwise Pn iYCtion i Rev E Issue Date November 1998 Amendment 0 Micrel SY10E131 SY100E131 BLOCK DIAGRAM TRUTH TABLE D3 CE3 R3 D2 CE2 R2 S03 S12 Cc R1 CE1 D1 Ro CEo Do Pin Site ode Common clocking with Cc Q1 QO SY10E131 Micrel SY100E131 DC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc VCco GND Input HIGH Current Power Supply Current 10E 100E AC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc VCco GND Ta 40 C Symbol Parameter Max Toggle Frequency 1100 tPLH Propagation Delay to tPHL Output A fo fo 4 lt TS NN NJN ag Rise Fall Time 20 to 80 NOTES 1 Within device skew is defined as identical transitions on similar paths through a device 2 Set up hold times guaranteed for both Cc and CE PRODUCT ORDERING CODE Operating Ordering Package Operating Range Code Type Range SY100E131JI J28 1 Indust2. ZIT 351 C e a iu MICHEL The Infinite Bandwidth Company FEATURES E 1100MHz min toggle frequency E Extended 100E VEE range of 4 2V to 5 5V E Differential output E Individual and common clocks E Individual asynchronous reset E Paired asynchronous sets E Fully compatible with Industry standard 10KH 100K ECL levels E Internal 75KQ input pulldown resistors E Fully compatible with Motorola MC10E 100E131 E Available in 28 pin PLCC package PIN CONFIGURATION S 8 oO oO edabcoe sSas 25 24 23 22 21 20 19 N CE3 26 18 1Q2 D3 27 17 Q2 S12 28 PLCC 16 Voc VEE TOP VIEW 15 Q1 Cc 2 eee 14 Q1 So3 l3 13 Qo Do 4 12 Qo 5 6 7 8 9 101 Oe ee a crog See 8 gt 4 BIT D FLIP FLOP SY10E131 SY100E131 DESCRIPTION The SY10 100E131 are high speed quad master slave D type flip flops with differential outputs designed for use in new high performance ECL systems The flip flops may be individually clocked by holding Cc Common Clock at a logic LOW and then using the four individual CE Clock Enable CEo CE3 inputs to accomplish such clocking Alternatively all four flip flops can be clocked in common by holding the CE inputs LOW and then using Cc to clock the data In the common clock mode the CE input acts as a
3. crel for its use nor for any infringement of patents or other rights of third parties resulting from its use No license is granted by implication or otherwise under any patent or patent right of Micrel Inc 2000 Micrel Incorporated 4
4. rial SY100E131JITR J28 1 Industrial SY10E131 Micrel SY100E131 28 LEAD PLCC J28 1 TOP VIEW SIDE VIEW eg 0048 1 22 0 042 1 07 0 048 1 22 BOTTOM VIEW 0 042 1 07 as eBOTTOM lt ME 5213 SEO A LG m GN iaiatatagta A L 4 E T TE ae 0 490 28985 g 5 Noe lV g eas 12 454613 r SRS 5 o g mrn 7 EA J z yo Syy 0 452 08 0 D 11 48 2882 o T Ee g 0 OOo LL Cy LAE Ee 0 452 1338 AA 0 172 19088 11 48 2898 4 372878 Bs 0 49078 602 zi 0 004 0 10 12 452813 me NOTES 1 DIMENSIONS ARE IN INCHES MM 2 CONTROLLING DIMENSION INCHES 0 0125 0 32 ZA DIMENSION DOES NOT INCLUDE MOLD FLASH 0 0075 0 19 OR PROTRUSIONS EITHER OF WHICH SHALL NOT 1 EXCEED 0 008 0 203 eee l ZX LEAD DIMENSION DOES NOT INCLUDE DAMBAR 0 020 0 51 7 PROTRUSION MIN 0 101 8989 5 MAXIMUM AND MINIMUM SPECIFICATIONS AR IHI J 2 561223 INDICATED AS FOLLOWS MAX MIN i ey JA PACKAGE TOP DIMENSION MAY BE SLIGHTLY SMALLER THAN BOTTOM DIMENSION Y I ooie vos 0 050 1 27 0 46 10 13 BSC L 0032 0 81 A 0 026 0 66 a Rev 03 DETAIL A MICREL SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA TEL 1 408 980 9191 Fax 1 408 914 7878 wee http www micrel com This information is believed to be accurate and reliable however no responsibility is assumed by Mi
Download Pdf Manuals
Related Search
Micrel 4 BIT D FLIP FLOP SY10E131 SY100E131 Manual