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MICREL SY10E111AE/LE SY100E111AE/LE handbook

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1. TOP VIEW SIDE VIEW 0 048 1 22 este a ote 0 042 1 07 Eee 0 048 1 22 BOTTOM VIEW 0 042 1 07 oot 47 3 24 2 A A ai fit 1r C vA ay N ae nT ALL VA NG UUU i D i ja o B I E cms o g i iS EE oes 0 490238 a E oe v E am g 5 0 13 a im E oe by r 12 454813 AAL g cat E ee 0 452908 0 pret 11 48 38 Sl E ao a P go g ES D L_ 4 L LLL LIS i COI TOIL LI v J Li at Lia 0 452 1908 A A 0 172 880 11 48 2883 4 372358 0 49078 bee 0 004 0 70 12 452813 NOTES 1 DIMENSIONS ARE IN INCHES MM 2 CONTROLLING DIMENSION INCHES 0 0125 0 32 DIMENSION DOES NOT INCLUDE MOLD FLASH 0 0075 0 19 OR PROTRUSIONS EITHER OF WHICH SHALL NOT i EXCEED 0 008 0 203 TENN l N LEAD DIMENSION DOES NOT INCLUDE DAMBAR Q 020L0 Si i PROTRUSION MIN 0 101 8989 5 MAXIMUM AND MINIMUM SPECIFICATIONS AR IHI J 2 561223 INDICATED AS FOLLOWS MAX MIN k W l PACKAGE TOP DIMENSION MAY BE SLIGHTLY SMALLER THAN BOTTOM DIMENSION a I oors o3 0 050 1 27 0 467513 BSC z L 0032 0 81 A 0 026 0 66 iota Rev 03 DETAIL A MICREL SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA TEL 1 408 980 9191 Fax 1 408 914 7878 wes http www micrel com This information is believed to be accurate and reliable however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other
2. rights of third parties resulting from its use No license is granted by implication or otherwise under any patent or patent right of Micrel Inc 2000 Micrel Incorporated 6
3. voltage is less than 1 0V and greater than or equal to VPP min For PECL operation Vcmr max VCC Vcmr max and Vemr min Vcc VcmR min S H R PP r f ClockWorks SY10E111AE LE Micrel SY100E111AE LE TIMING DIAGRAMS IN IN IN IN N _ IN ts 2 x _ th__ tr EN 50 50 J 50 EN 75 mV 75 mV a _s _ ae Q SS Q Wy aE X oa N a Q 75 mV 75 mV Figure 1 Set up Time Figure 2 Hold Time Figure 3 Release Time PRODUCT ORDERING CODE 5V 5V Ordering Package Operating VEE Range Ordering Package Operating VEE Range Code Type Range V Code Type Range V SY10E111AEJC J28 1 4 75 to 5 5 SY10E111AEuJI J28 1 Industrial 4 75 to 5 5 SY100E111AEJC J28 1 4 2 to 5 5 SY100E111AEJI J28 1 Industrial 4 2 to 5 5 SY100E111AEJCTR J28 1 4 2 to 5 5 SY100E111AEJITR J28 1 Industrial 4 2 to 5 5 3 3V 3 3V SY10E111LEJC J28 1 3 010 3 8 SY10E111LEJI J28 1 3 0 to 3 8 SY10E111LEJCTR J28 1 3 0 to 3 8 SY10E111LEJITR J28 1 3 0 to 3 8 SY10E111AEJCTR J28 1 4 75 to 5 5 SY10E111AEJITR J28 1 Industrial 4 75 to 5 5 SY100E111LEJC J28 1 3 0 t0 3 8 SY100E111LEJI J28 1 3 0 to 3 8 SY100E111LEJCTR J28 1 3 0 to 3 8 SY100E111LEJITR J28 1 3 0 to 3 8 ClockWorks SY10E111AE LE Micrel SY100E111AE LE 28 LEAD PLCC J28 1
4. 0 point of a negative transition on EN to the 50 point of a positive transition on Q or a negative transition on Q Disable is defined as the propagation delay from the 50 point of a positive transition on EN to the 50 point of a negative transition on Q or a positive transition on Q 5 The within device skew is defined as the worst case difference between any two similar delay paths within a single device 6 The set up time is the minimum time that EN must be asserted prior to the next transition of IN IN to prevent an output response greater than 75mV to that IN IN transition see Figure 1 7 The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going N to prevent an output response greater than 75mV to that IN IN transition see Figure 2 8 The release time is the minimum time that EN must be de asserted prior to the next IN IN transition to ensure an output response that meets the specified IN to Q propagation delay and output transition times see Figure 3 9 VPP min is defined as the minimum input differential voltage which will cause no increase in the propagation delay The Ver min is AC limited for the E111AE LE as a differential input as low as 50mV will still produce full ECL levels at the output 10 Vcmp is defined as the range within the VIH level may vary with the device still meeting the propagation delay specification the ViL level must be such that the peak to peak
5. IN CONFIGURATION PPINNAMES Vcco Q1 Q2 Q2 oS E a r O O O 25 24 23 22 21 20 19 VEE 26 18 Q3 EN 27 17 2103 IN 28 PLCC 16 Q4 Vec O TOP VIEW 15 Veco INC 2 J28 1 14 Qa VBB 3 13 Q5 NC 4 12 Q5 5 6 7 8 9 10011 Vcco Q7 Qe Qe ECL DC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc GND Output HIGH Voltage 10EL 100EL Output LOW Voltage 10EL 100EL Input HIGH Voltage 10EL 100EL Input LOW Voltage 10EL 100EL Power Supply Current 10EL 100EL NOTE 1 Parametric values specified at 5 volt Power Supply Range 100E111AE Series 4 2V to 5 5V 10E111AE Series 4 75V to 5 5V 3 volt Power Supply Range 10 100E111LE Series 3 0V to 3 8V ClockWorks SY10E111AE LE Micrel SY100E111AE LE 3 3V PECL DC ELECTRICAL CHARACTERISTICS Vcc 3 0V to 3 8V VEE ae P Ta 40 c O Ta 25 C Ta 85 C Symbol Parameter win Typ max win Typ max win Typ max win Typ max Output HIGH voltage mV 10EL 2220 2110 2280 2460 2320 2490 2390 2580 100EL 2215 2120 2275 2420 2275 2420 2275 2420 Output LOW Voltage mV 10EL 1350 1650 1350 1670 1350 1670 1350 1705 100EL 1470 1750 1490 1680 1490 1680 1490 1680 Input HIGH ee 10EL 2070 100E
6. L 2135 mV 2410 2130 2460 2170 2490 2240 2580 2420 2135 2420 2135 2420 2135 2420 mV 1800 1350 1820 1350 1820 1350 1855 1825 1490 1825 1490 1825 1490 1825 2 00 1 92 2 03 1 95 2 05 1 99 2 11 Ea z EA aon 1 92 2 04 Output Reference Voltage 10EL 100EL FH Input HIGH Current 1 87 1 EF Input LOW Current 10EL 0 5 100EL 0 5 Pal 0 5 0 5 0 3 0 5 0 5 0 5 66 66 66 66 66 66 66 78 NOTES 1 Parametric values specified at 3 volt Power Supply Range 10 100E111LE Series 3 0V to 3 8V 2 These values are for Vcc 3 3V Level specifications will vary 1 1 with Vcc Power Supply Current 10EL 100EL Input LOW Voltage 10EL 100EL 5V PECL DC ELECTRICAL CHARACTERISTICS Vcc Vcc Min to Vcc Max VEE a Symbol Parameter E E A A Output HIGH yoia mV 10EL oe 4110 3980 4160 4020 4190 4090 4280 100EL 391 4120 3975 4120 3975 4120 3975 4120 Output LOW ei mV 10EL 3050 3350 3050 3370 3050 3370 3050 3405 100EL 3170 3450 3190 3380 3190 3380 3190 3380 Input HIGH RRI mV 10EL 3770 4110 3830 4160 3870 4190 3940 4280 100EL 3 4120 3835 4120 3835 4120 3835 4120 mV 3500 3050 3520 3050 3520 3050 3555 3525 3190 3525 3190 3525 3190 3525 Output Heterenge Voltage 10EL 3 57 100EL a 62 FH Input HIGH Current Input LOW Current res 10EL 0 5 100EL 0 5 Power Supply Current 10EL 100EL 1 Parametric values specified at 5 vol
7. ZIT 341 C MICAEL The Infinite Bandwidth Company FEATURES E 5V and 3 3V power supply options E 200ps part to part skew E 50ps output to output skew E Differential design E VBB output E Enable Input E Voltage and temperature compensated outputs E 75KQ input pulldown resistors E Fully compatible with Motorola MC10 100E111 E Available in 28 pin PLCC package BLOCK DIAGRAM Qo Qo Q1 E Q1 Q2 gt Q2 Q3 o Q3 Q4 5V 3 3V 1 9 DIFFERENTIAL CLOCK DRIVER w ENABLE ClockWorks SY10E111AE LE SY100E111AE LE DESCRIPTION The SY10 100E111AE LE are low skew 1 to 9 differential drivers designed for clock distribution in mind The SY10 100E111AE LE s function and performance are similar to the popular SY10 100E111 with the improvement of lower jitter and the added feature of low voltage operation It accepts one signal input which can be either differential or single ended if the VBB outputis used The signal is fanned out to 9 identical differential outputs An enable input is also provided such that a logic HIGH disables the device by forcing all Q outputs LOW and all Q outputs HIGH The E111AE LE is specifically designed modeled and produced with low skew as the key goal Optimal design and layout serve to minimize gate to gate skew within a device and empirical modeling is used to determine process control limits that ensure consistent tpd dist
8. ributions from lot to lot The net result is a dependable guaranteed low skew device To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50Q even if only one side is being used In most applications all nine differential pairs will be used and therefore terminated In the case where fewer that nine pairs are used it is necessary to terminate at least the output pairs on the same package side as the pair s being used on that side in order to maintain minimum skew Failure to do this will result in small degradations of propagation delay on the order of 10 20ps of the output s being used which while not being catastrophic to most designs will mean a loss of skew margin The E111AE LE as with most other ECL devices can be operated from a positive Vcc supply in PECL mode This allows the E111AE LE to be used for high performance clock distribution in 5V 3 3V systems Designers can take advantage of the E111AE LE s performance to distribute low skew clocks across the backplane or the board In a PECL environment series or Thevenin line terminations are typically used as they require no additional power supplies For systems incorporating GTL parallel termination offers the lowest power by taking advantage of the 1 2V supply as terminating voltage Rev D Rev Date Amendment 0 October 1998 ClockWorks SY10E111AE LE Micrel SY100E111AE LE P
9. t Power Supply Range 100E111AE Series 4 2V to 5 5V 10E111AE Series 4 75V to 5 5V 3 62 3 73 3 65 3 75 3 69 3 81 a 3 74 E 3 74 A 3 74 150 150 150 3 a 3 7 150 E 0 5 0 5 0 3 0 5 0 5 0 5 mA 66 66 66 66 66 78 835 Input LOW S 10EL 3050 100EL 3190 NOTES 2 These values are for Vcc 5V Level specifications will vary 1 1 with Vcc 3 ClockWorks SY10E111AE LE Micrel SY100E111AE LE AC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc GND Symbol tPLH Propagation Delay to Output tPHL IN differential IN single ended Enable 4 Disable tskew Within Device Skew Part to Part Skew Diff Set up Time EN to IN 250 ts t Hold Time INtoEN CE t t t V vee e Minimum Input Swing Common Mode Range 0 4 50 t Rise Fall Times 200 6 t 20 to 80 NOTES 1 Parametric values specified at 5 volt Power Supply Range 100E111AE Series 4 2V to 5 5V 10E111AE Series 4 75V to 5 5V 3 volt Power Supply Range 10 100E111LE Series 3 0V to 3 8V 2 The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals 3 The single ended propagation delay is defined as the delay from the 50 point of the input signal to the 50 point of the output signal 4 Enable is defined as the propagation delay from the 5

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