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Micrel ClockWorks SY10E111 SY100E111 Manual

1. SY10E111 Micrel SY100E111 TOP VIEW SIDE VIEW LL LL 0 048 1 22 Sterns 0 042 1 07 sits 0 048 1 22 BOTTOM VIEW 0 042 1 07 da PESE 35 2 1 28 DAE x md fit LCi f TE vA E N DER nT ALL 4 O NA du i 5 1 L H v eo c C 0 08 eae I i D AS i eei m MEN VN i E co 0 452 888 O i 1 48 88 O T T g E E t Ko CJ 4 C ILTLILELELILTI I ETE FEL LT d Li oi Lia 0 452 7200 AA 0 172 088 11 485885 4 37 8 8 5 o 004 0 10 ES EI NOTES 1 DIMENSIONS ARE IN INCHES MM 2 CONTROLLING DIMENSION INCHES 0 0125 0 32 A DIMENSION DOES NOT INCLUDE MOLD FLASH 0 0075 0 18 OR PROTRUSIONS EITHER OF WHICH SHALL NOT EXCEED 0 008 0 203 Heater l AN LEAD DIMENSION DOES NOT INCLUDE DAMBAR i PROTRUSION MIN 0 101 5289 5 MAXIMUM AND MINIMUM SPECIFICATIONS AR Il J 2 562023 INDICATED AS FOLLOWS MAX MIN vw o JA PACKAGE TOP DIMENSION MAY BE SLIGHTLY SMALLER THAN BOTTOM DIMENSION sd M 7o13 0 050 1 27 0 46703 BSC 0 032 0 81 0 026 0 66 DETAIL A Rev 03 MICREL SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA TEL 1 408 980 9191 Fax 1 408 914 7878 wes http www micrel com This information is believed to be accurate and reliable however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights
2. 6GiG 8 846 gt Qe DC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc Vcco GND TA 2 O C TA 25 C TA 85 C Output Reference Voltage Power Supply Current Figure 1 Set up Time Figure 2 Hold Time Figure 3 Release Time ClockWorks SY10E111 Micrel SY100E111 AC ELECTRICAL CHARACTERISTICS VEE VEE Min to VEE Max Vcc Vcco GND Parameter Propagation Delay to Output IN differential IN single ended Enable Disable 27 o wo eo AR C1 O1 CO ooo e eo t t t 25 0 200 100 6 BEBREDEEE B O1 O71 C wo ojo OOoOooco lt I P VCMR Common Mode Range tr Rise Fall Times 20 to 80 l o 2 88 P oo e e E LM ol NOTES 1 The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals 2 The single ended propagation delay is defined as the delay from the 50 point of the input signal to the 50 point of the output signal 3 Enable is defined as the propagation delay from the 50 point of a negative transition on EN to the 50 point of a positive transition on Q or a negative transition on Q Disable is defined as the propagation delay from the 50 point of a positive transition on EN to the 50 point of a negative transition on Q or a positive transition on Q 4 The
3. within device skew is defined as the worst case difference between any two similar delay paths within a single device 5 The set up time is the minimum time that EN must be asserted prior to the next transition of IN IN to prevent an output response greater than 75mV to that IN IN transition see Figure 1 6 The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response greater than 75mV to that IN IN transition see Figure 2 7 Therelease time is the minimum time that EN must be de asserted prior to the next IN IN transition to ensure an output response that meets the specified IN to Q propagation delay and output transition times see Figure 3 8 VPP min is defined as the minimum input differential voltage which will cause no increase in the propagation delay The VPP min is AC limited for the E111 as a differential input as low as 50mV will still produce full ECL levels at the output 9 Vcwr is defined as the range within which the ViH level may vary with the device still meeting the propagation delay specification The ViL level must be such that the peak to peak voltage is less than 1 0V and greater than or equal to VPP min PRODUCT ORDERING CODE Ordering Package Operating Code Type Range J28 1 J28 1 SY100E111JC J28 1 Commercial SY100E111JCTR J28 1 Commercial ClockWorks
4. E MICAEL The Infinite Bandwidth Company FEATURES E Low skew E Extended 100E VEE range of 4 2V to 5 5V E Guaranteed skew limits E Differential design E VBB output B Enable input B Fully compatible with industry standard 10KH 100K I O levels B 75KQ input pulldown resistors B Fully compatible with Motorola MC10E 100E111 B Available in 28 pin PLCC package BLOCK DIAGRAM o o Ol eo e vy Ql e O w Ol wo zi o Ol o A A o a Ol c o J Ol N O VBB O Vevey 1 9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE ClockWorks SY10E111 SY100E111 DESCRIPTION The SY10 100E111 are low skew 1 to 9 differential drivers designed for clock distribution in new high performance ECL systems They accept one differential or single ended input with VBB used for single ended operation The signal is fanned out to nine identical differential outputs An enable input is also provided such that a logic HIGH disables the device by forcing all Q outputs LOW and all Q outputs HIGH The device is specifically designed and produced for low skew The interconnect scheme and metal layout are carefully optimized for minimal gate to gate skew within the device Wafer characterization and process control ensure consistent distribution of propagation delay from lot to lot Since the E111 shares a common set of basic processing with
5. of third parties resulting from its use No license is granted by implication or otherwise under any patent or patent right of Micrel Inc 2000 Micrel Incorporated 4
6. the other members of the ECLinPS family wafer characterization at the point of device personalization allows for tighter control of parameters including propagation delay To ensure that the skew specification is met it is necessary that both sides of the differential output are terminated into 50Q even if only one side is being used In most applications all nine differential pairs will be used and therefore terminated In the case where fewer than nine pairs are used it is necessary to terminate at least the output pairs on the same package side i e sharing the same VCcco as the pair s being used on that side in order to maintain minimum skew The VBB output is intended for use as a reference voltage for single ended reception of ECL signals to that device only When using VBB for this purpose it is recommended that VBB is decoupled to Vcc via a 0 01uF capacitor Rev B Amendment 2 Issue Date February 1998 ClockWorks SY10E111 Micrel SY100E111 PIN CONFIGURATION PIN NAMES N eO oo N N O O IO O H IN IN Differential Input Pair EN Enable Input 25 24 23 22 21 20 19 T 26 18L 1Q3 Q0 Q0 Q8 Q8 Differential Outputs L27 17L Q3 VBB VBB Output IN 28 PLCC 16 Q4 Vcco Vcc to Output QD 2 3 4 Vcco TOP VIEW 15 Vcco J28 1 14 Q4 5 6 7 8 9 1011 7 co

Micrel ClockWorks SY10E111 SY100E111 Manual

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