ANALOG DEVICES AD8336 English products handbook Rev C
Contents
1. 100 Vean 0 7V Vour 2V p p Voain 0V f 5MHz Ey o z 2 10 z INPUT REFERRED NOISE g 8 ti 1 Rs THERMAL NOISE ALONE E a lt z 0 1 3 8 10 100 1k 10k 3 0 5 10 15 20 25 30 3 40 45 50g SOURCE RESISTANCE LOAD CAPACITANCE pF Figure 33 Input Referred Noise vs Source Resistance Figure 36 Harmonic Distortion vs Load Capacitance See Figure 72 See Figure 64 70 20 f 10MHz Vout 1V OUTPUT SWING OF PREAMP LIMITS Vgain TO 400mV 60 30 o m 50 s z e 40 e o o 50 2 a u 30 9 60 20 E 70 HD2 1MHz 10 HD2 10MHz HD3 1MHz E HD3 10MHz 800 600 400 200 0 200 400 600 800 600 400 200 0 200 400 600 800 Veain mV Veain mV 8 Figure 34 Noise Figure vs VGAIN Figure 37 Second and Third Harmonic Distortion vs Vean at 1 MHz and 10 MHz See Figure 63 See Figure 64 OUTPUT SWING OF PREAMP LIMITS Vean LEVELS Vout 2V p p VoaiN 0V f 5MHz HARMONIC DISTORTION dBc HARMONIC DISTORTION dBc Vout 0 5 Vout 1V Vout 2V p p Vout 4V p p 0 0 200 400 600 800 1 0k 1 2k 1 4k 1 6k 1 8k 2 0k 2 2k 600 400 200 0 200 400 600 s00 LOAD RESISTANCE 3 Veain mV 8 Figure 35 Harmonic Dis2. 0 5 MM 5 10 8 9 100k 1M 10M 100M 200M 1M m 100M FREQUENCY Hz 8 FREQUENCY Hz Figure 22 Frequency Response for Various Values of Load Capacitance Figure 25 Group Delay vs Frequency for Preamp Gains of 4x and 20x See Figure 57 See Figure 59 30 1k GAIN 20x 25 100 20 amp 8 zd GAIN 4x 10 m 5 o z 10 a 5 5 n E 2 0 0 1 5 Vs 12 Vs 5V Vs 3V _10 g 0 01 8 100k 1M 10M 100M 500M 3 100k 1M 10M 100M 500M 3 FREQUENCY Hz 8 FREQUENCY Hz 8 Figure 23 Preamp Frequency Response for Three Values of Supply Voltage Vs Figure 26 Output Resistance vs Frequency of the Preamp When the Preamp Gain is 4x or 20x See Figure 61 See Figure 58 Rev C Page 10 of 28 AD8336 1k 1k f 5MHz 100 x PREAMP GAIN 4 100 10 o OUTPUT RESISTANCE Q INPUT REFERRED NOISE nV Hz PREAMP GAIN 20x 1 800 600 400 200 0 200 400 600 800 1M 10M 100M 500M 2 FREQUENCY Hz 8 Veain mV Figure 27
3. 100k 1M 10M 100M 200M FREQUENCY Hz 06228 018 06228 019 Figure 19 Frequency Response for Various Values of Vsa Low Power Mode GAIN dB Rev C Page 9 of 28 See Figure 57 100k 1M 10M 100M 200M FREQUENCY Hz Figure 20 Frequency Response for Various Values of Vea When the Preamp Gain is 20x See Figure 57 06228 020 AD8336 50 T 30 Vean 0 40 0 5V 25 30 20 GAIN 19x 0 2V 20 15 z iU m 5 GAIN 3x z 10 z 10 5 0 2V 0 5 0 5V 0 7V 20 PREAMP GAIN 3x 30 100k 1M 10M 100M 200M 1M 10M 100M 500M 2 FREQUENCY Hz 8 FREQUENCY Hz Figure 21 Frequency Response for Various Values of Vea Figure 24 Preamp Frequency Response for Three Values of Supply Voltage Vs When the Preamp Gain is 3x When the Inverting Gain Value is 3x or 19x See Figure 69 and Figure 57 See Figure 69 25 20 PREAMP GAIN 20x PREAMP GAIN 4x 20 15 15 vo amp 10 x 5 d z 10 4 5 2 S o
4. sse 6 4 11 Rev A to Rev B Change to Table 2 eene er itio rers 5 Changes to Figure 77 and Preamplifier Section 20 Changes to Evaluation Board Section Optional Circuitry Section and Board Layout Considerations Section 24 pct a Sei Ra AEN ct eode 24 Deleted Figure 83 Renumbered Figures Sequentially 24 Changes to Figure 82 Figure 83 and Figure 84 24 Changes to Figure 85 Figure 86 Figure 87 and Figure 88 25 Deleted 26 see Re eee e es 20 Setting the Gras 21 NOISE X 21 Offset Voltage det b et petet nie 21 Applications Information eene 22 Amplifier Configuration eee 22 Pr amplifier i dn aspa qunas bate ritibus 22 Using the Power Adjust Feature sse 23 Driving Capacitive Loads see 23 Evaluation Board iet RERUMS 24 Optional GITCUILEy ttt 24 Board Layout Considerations see 24 Outline Dimensions Ordering Guide sciis 9 08 Rev 0 to Rev A Change to General Description Section sss 1 Deleted Input Capacitance Parameter Table 1 3 Added Exposed Pad Notation to Figure 2 sss 6 Changes to Figure Lirarna
5. qu I Wea H q H I AAR ED B M Jn Figure 83 Component Side Copper Figure 84 Secondary Side Copper 06228 083 06228 084 06228 085 VNEG E a ros 903 qn Qe PNR R15 a R16 RU Qa VOUT VOUTD G x2 NORM RI 3 5 M RB VOUTL Cl m R10 R2 VIN PRVG C as 06228 087 Figure 86 Internal Ground Plane Copper GND GND1 GND2 GND3 VOUT NC NC NC VPOS R16 4 99kO VOUT T GNEG Fox O PWRA GPOS AD8336 VCOM VNEG VIN INPP VGAI R INPN NC NC PRAO 7 49 90 NC NO CONNECT DO NOT CONNECT TO THIS PIN Figure 87 Internal Power Plane Copper O GNEG O GPOS 06228 082 Figure 88 AD8336 EVALZ Schematic Shown as Shipped Configured for a Noninverting Gain of 4x Rev C Page 25 of 28 AD8336 06228 088 AD8336 OUTLINE DIMENSIONS PIN 1 INDICATOR PLANE SEATING as 0 25 COMPLIANT STANDARDS MO H 0 60 MAX BOTTOM VIEW PIN 1 I INDICATOR FOR PROPER C
6. 5 30 100 50 0 50 100 150 200 250 300 350 2 100 50 0 50 100 150 200 250 300 350 TIME ns a TIME ns Figure 47 Large Signal Pulse Response for Both Power Levels Figure 50 Large Signal Pulse Response for Various Values of Load See Figure 65 Capacitance Using 5 V Power Supplies See Figure 65 Rev C Page 14 of 28 06228 049 06228 050 AD8336 PSRR Vpos VNEG ot Z Yean 07V 20 Vean 0V 7 0 7V 10 10 5 t g g 0 E 2 3 w gt 2 30 C 0pF 10 C 10 C 22pF 40 CL 47 20 120 WITH 200 RESISTOR IN SERIES WITH OUTPUT 30 5 60 100 50 0 50 100 150 200 20 300 350 100k 1M 5M TIME ns FREQUENCY Hz 8 Figure 51 Large Signal Pulse Response for Various Values of Load Figure 54 PSRR vs Frequency for Three Values of Capacitance Using 12 V Power Supplies See Figure 71 See Figure 65 40 e VOLTAGE V L8 ES QUIESCENT SUPPLY CURRENT mA N Vs 12V Vs 5 Vs 0 65 45 25 5 15 35 55 75 95 115 135 06228 052 06228 055 TIME gt TEMPERATURE C Figure 52 Gain Response Figure 55 lo vs Temperature for Three Values of Supply Voltage See Figure 66 and High and Low Power See Figure 68 1 m 4 2
7. e GAIN ERROR dB Figure 12 Gain Error Histogram 60 UNITS 0 3V lt S 0 3V 49 6 49 7 49 8 49 9 50 0 50 1 50 2 GAIN SCALING dB V Figure 13 Gain Scaling Factor Histogram T 125 485 C T 25 T 40 C T 55 C 0 8 0 6 0 4 0 2 0 0 2 0 4 0 6 0 8 Vean V Figure 14 Output Offset Voltage vs Vean for Various Values of Temperature T 06228 012 06228 013 06228 014 OF UNITS OUTPUT OFFSET VOLTAGE mV Vs 412V 180 Vs 5V V5 43V 0 8 0 6 0 4 0 2 0 0 2 0 4 0 6 Vean V Figure 15 Output Offset Voltage vs Vaaw for Three Values of Supply Voltage Vs SAMPLE SIZE 60 UNITS Vear 9 7V 0 8 240 200 160 120 80 OUTPUT OFFSET nin 24 20 16 12 8 0 4 OUTPUT OFFSET mV Figure 16 Output Offset Histogram 50 60 UNITS 40 30 OF UNITS 20 10 16 25 16 30 16 35 1640 4645 4650 16 55 INTERCEPT dB Figure 17 Intercept Histogram 06228 015 06228 017 06228 016 GAIN dB GAIN dB AD8336 50 40 e N o 30 100k 1M 10M 100M 200M FREQUENCY Hz Figure 18 Frequency Response for Various Values of Vea See Figure 57 T LL
8. 3 4 3 TIME ia INPUT VOLTAGE V OUTPUT VOLTAGE V Vin V Vout V 06228 053 Figure 53 VGA Overdrive Recovery See Figure 67 Rev C Page 15 of 28 AD8336 TEST CIRCUITS NETWORK ANALYZER Figure 56 Gain vs Veaw and Gain Error vs Vea NETWORK ANALYZER H l OPTIONAL CL VGAIN Figure 57 Frequency Response NETWORK ANALYZER NC NO CONNECT Figure 58 Frequency Response of the Preamp 06228 056 06228 057 06228 058 Rev C Page 16 of 28 NETWORK ANALYZER Figure 59 Group Delay AD8336 Figure 60 Offset Voltage NETWORK ANALYZER MEASURE NC NO CONNECT Figure 61 Output Resistance vs Frequency CONFIGURE TO 06228 059 06228 060 Z CONVERTED 22 06228 061 AD8336 OSCILLOSCOPE PULSE SPECTRUM ANALYZER POWER GENERATOR SPLITTER NES 06228 062 06228 065 Figure 62 Input Referred Noise and Output Referred Noise Figure 65 Pulse Response OSCILLOSCOPE FUNCTION PULSE POWER GENERATOR GENERATOR SPLITTER NOISE FIGURE METER NOISE SOURCE DRIVE NOISE SOURCE AD8336 NC NO CONNECT 06228 063 1 06228 066 Figure 63 Noise Figure vs Vean Figure 66 Gain Response OSCILLOSCOPE ARBITRARY WAVEFORM GENERATOR SPECTRUM ANALYZER SIGNAL GENERATOR LOW PASS FILTER NC NO CONNECT 06228 064 06228 067 Figure 64 Harmonic Distortion Figure 67 VG
9. ete etes 8 Changes to Figure 55 15 Change to Preamplifier Section sse 20 Changes to Noise Section serene 21 Change to Circuit Configuration for Noninverting Gain e a E E S 22 Changes to Table 5 oett EGERET 22 Changes to Figure 89 and Table 6 sss 26 Updated Outline Dimensions seen 27 Changes to Ordering Guide 10 06 Revision 0 Initial Version Rev C Page 2 of 28 SPECIFICATIONS AD8336 Vs 5 V T 25 gain range 14 dB to 46 dB preamp gain 4x f 1 MHz Ci 5 500 O PWRA GND unless otherwise specified Table 1 Parameter Test Conditions Comments Min Typ Max Unit PREAMPLIFIER 3 dB Small Signal Bandwidth Vour 10 mV p p 150 MHz 3 dB Large Signal Bandwidth Vout 2 V p p 85 MHz Bias Current Either Input 725 nA Differential Offset Voltage 600 uV Input Resistance 900 kQ Input Capacitance 3 pF PREAMPLIFIER VGA 3 dB Small Signal Bandwidth Vour 10 mV p p 115 MHz Vour 10 mV p p PWRA 5 V 40 MHz Vour 10 mV p p PrA gain 20x 20 MHz Vour 10 mV p p PrA gain 3x 125 MHz 3 dB Large Signal Bandwidth Vout 2 V p p 80 MHz Vout 2 V p p PWRA 5 V 30 MHz Vour 2 V p p PrA gain 20x 20 MHz Vout 2 V p p PrA gain 3x 100 MHz Slew Rate Vout 2 V p p 550 V us Short Circuit Preamp Input Voltage
10. z PREAMP GAIN 20x PREAMP GAIN 4x amp 20 u z lt 10 0 10 20 0 2 800 600 400 200 0 200 400 600 800 600 400 200 0 200 400 600 800 7 VoaiN mV Veain mV 3 Figure 5 Gain vs Vauw for Preamp Gains of 4x and 20x Figure 8 Gain Error vs Vsa for Preamp Gains of 4x and 20x See Figure 56 See Figure 56 Rev C Page 7 of 28 AD8336 GAIN ERROR dB o 2 0 PREAMP GAIN 4x f 1MHz PREAMP GAIN 4x f 10MHz PREAMP GAIN 20x f 1MHz PREAMP GAIN 20x f 10MHz 800 600 400 200 0 200 400 600 800 0 5 GAIN ERROR dB e 2 0 Veain mV Figure 9 Gain Error vs at 1 MHz and 10 MHz and for Preamp Gains of 4x and 20x See Figure 56 PREAMP GAIN 3x f 1MHz PREAMP GAIN 3 f 10MHz PREAMP GAIN 19x f 1MHz PREAMP GAIN 19x f 10MHz 800 600 400 200 0 200 400 600 800 GAIN dB Veain mV Figure 10 Gain Error vs at 1 MHz and 10 MHz and for Inverting Preamp Gains of 3x and 19x See Figure 56 HE 15 10 5 0 5 10 15 COMMON MODE VOLTAGE Vear V Figure 11 Gain vs Common Mode Voltage at Vea 06228 011 06228 009 06228 010 Rev C Page 8 of 28 OF UNITS OF UNITS OUTPUT OFFSET VOLTAGE mV 60 UNITS Veain 0 3V Vean 0 3V co
11. Output Resistance vs Frequency of the VGA Figure 30 Input Referred Noise vs for Preamp Gains of 4x and 20x for Three Values of Supply Voltage Vs See Figure 62 See Figure 61 1000 6 f 5MHz Vean 0 7V 900 5 800 z 700 gt o u 4 O 600 z o 9 2 500 3 x x 400 x ul ul L 2 u 2 300 72 2 T 125 C 2 5 200 T 85 C Ea o T 25 m Vs 12vV 100 40 Vs 5 55 Vs 3 0 g 0 800 600 400 200 0 200 400 600 800 5 100k 1M 10M 100M Veain mV FREQUENCY Hz Figure 28 Output Referred Noise vs at Various Temperatures T Figure 31 Short Circuit Input Referred Noise vs Frequency at Maximum Gain See Figure 62 for Three Values of Supply Voltage Vs See Figure 62 6 f 5MHz Veain 0 7V PREAMP GAIN 20x PREAMP GAIN 3x 5 N N u 4 2 2 2 9 9 3 x 4 x x u ui In x 2 5 5 T 125 s 2 T 85 Z1 o T 25 T 40 C T 55 C 800 600 400 200 0 200 400 600 800 2 100k cm 10M 100M Vean mV a Hz 8 Figure 29 Output Referred Noise vs Vcaw at Various Temperatures T Figure 32 Short Circuit Input Referred Noise vs Frequency When the Preamp Gain is 20x at Maximum Inverting Gain See Figure 62 See Figure 73 Rev C Page 11 of 28 AD8336
12. POWER SUPPLY Supply Voltage Operating Range 3 12 V Quiescent Current Vs 3V 22 25 30 55 C lt T lt 125 C 23 to 31 mA PWRA 3V 10 14 18 Vs 5V 22 26 30 55 C lt T lt 125 23 to 31 mA PWRA 5V 10 14 18 Vs 12V 23 28 31 55 C lt T lt 125 C 24to 33 mA PWRA 5V 16 Power Dissipation Vs 3V 150 mW Vs 5V 260 mW Vs 12V 672 mW PSRR Vean 0 7 V f 1 MHz 40 dB 1 All dBm values are calculated with 50 Q reference unless otherwise noted Conformance to theoretical gain expression see the Setting the Gain section Rev C Page 4 of 28 ABSOLUTE MAXIMUM RATINGS AD8336 Stresses above those listed under the Absolute Maximum Table 2 Parameter Rating Supply Voltage VPOS VNEG 15V Input Voltage INPP INPN VPOS VNEG Gain Voltage GPOS GNEG VPOS VNEG PWRA 5V GND VGAI VPOS 0 6 V VNEG 0 6 V Power Dissipation Vs lt 5V 0 43 W 5V lt Vs lt 12V 1 12 W Operating Temperature Range 3 lt Vs lt 10V 55 C to 125 C 10V lt Vs lt 12 V 55 C to 85 C Storage Temperature Range Lead Temperature Soldering 60 sec Thermal Data Vy V jg 65 C to 150 C 300 C 58 2 C W 35 9 C W 9 2 C W 1 1 C W 34 5 C W Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this spec
13. 26 dB and choosing appropriate feedback resistors For the nominal preamp gain of 4x the overall gain range is 14 dB to 46 dB In critical applications the quiescent power can be reduced by about half by using the power adjust pin PWRA This is especially useful when operating with high supply voltages of up to 12 V or at high temperatures The operating temperature range is 55 C to 125 C The AD8336 is available in a 16 lead LFCSP 4 mm x 4 mm One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2006 2011 Analog Devices Inc All rights reserved AD8336 TABLE OF CONTENTS Features aaa ayay yaaa qay qawa 1 Applications u u uu a 1 Functional Block Diagram sse 1 General Description eec oe RE ayka aqa 1 REVISION HistOby sas aaa Die sed MEE 2 Sp cifications seen E eere 3 Absolute Maximum Ratings sentent 5 ESD Cautions 5 Pin Configuration and Function 6 Typical Performance Characteristics sse 7 Test Circuits e rp etos 16 Theory 20 OVERVIEW Preamplifier REVISION HISTORY 5 11 Rev B to Rev Change to Figure 2 and Table 3
14. 3 V lt Vs lt 12 V 3 0 nV 4Hz Noise Spectral Density Input Current Noise Spectral Density 3 0 pA VHz Output Referred Noise Vean 0 7 V gain 4x 600 nV 4Hz Vean 0 7 V gain 4x 190 nV 4Hz Vean 0 7 V PrA gain 20x 2500 nV JHz Vean 0 7 V gain 20x 200 nV 4Hz Vean 0 7 V 55 C lt T lt 125 C 700 nV 4Hz Vean 0 7 V 55 C lt T lt 125 C 250 nV 4Hz DYNAMIC PERFORMANCE Harmonic Distortion Vean 0 V Vout 1 V p p HD2 f 1 MHz 58 dBc HD3 f 1 MHz 68 dBc HD2 f 10 MHz 60 dBc HD3 10 MHz 60 dBc Input 1 dB Compression Point Vean 0 7 V 11 dBm Vean 40 7 V 23 dBm Two Tone Intermodulation Vean 0 V Vout 1 V p p 0 95 MHz f2 1 05 MHz 71 dBc Distortion IMD3 Vaan 0 V Vout 1 V p p fi 9 95 MHz f 10 05 MHz 69 dBc Vean 0 V Vout 2 V p p 0 95 MHz f2 1 05 MHz 60 dBc VGAIN OV Vout 2V p p f 9 95 MHz f 10 05 MHz 58 dBc Output Third Order Intercept Vean OV Vout 1 V p p f 1 MHz 34 dBm Vean OV Vout 1 V p p f 10 MHz 32 dBm Vean OV Vout 2 V p p f 1 MHz 34 dBm Vean OV Vout 2 V p p f 10 MHz 33 dBm Overdrive Recovery Vean 0 7 V 100 mV p p to 5 mV p p 50 ns Group Delay Variation 1 MHz lt f lt 10 MHz full gain range 1 ns PrA Gain 20x 1 MHz lt f lt 10 MHz full gain range t3 ns Rev C Page3 of 28 AD8336 Parameter Test Conditions Comments Min Typ Max Unit
15. differential gain control interface provides precise linear in dB gain scaling of 50 dB V over the temperature span of 55 C to 125 C The differential gain control is easy to interface with a variety of external circuits within the common mode voltage limits of the AD8336 Rev C Information fumished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners FUNCTIONAL BLOCK DIAGRAM PRAO VGAI i ATTENUATOR T E i 60dB TO 0dB 34dB 1 vouT INPN 5 GAIN CONTROL 4 amp 4 VNEG VPOS VCOM GPOS GNEG 06228 001 Figure 1 The large supply voltage range makes the AD8336 particularly suited for industrial medical applications and for video circuits Dual supply operation enables bipolar input signals such as those generated by photodiodes or photomultiplier tubes The fully independent voltage feedback preamp allows both inverting and noninverting gain topologies making it a fully bipolar VGA The AD8336 can be used within the specified gain range of 14 dB to 60 dB by selecting a preamp gain between 6 dB and
16. output voltage swings very large gain ranges extreme temperature variations or a combination thereof The simplified block diagram is shown in Figure 77 The AD8336 includes a voltage feedback preamplifier an amplifier with a fixed gain of 34 dB a 60 dB attenuator and various bias and interface circuitry The independent voltage feedback op amp can be used in noninverting and inverting configurations and functions as a preamplifier to the variable gain amplifier VGA If desired the op amp output PRAO and VGA input VGAT pins provide for connection of an interstage filter to eliminate noise and offset The bandwidth of the AD8336 is dc to 100 MHz with a gain range of 60 dB 14 dB to 46 dB For applications that require large supply voltages a reduction in power is advantageous The power reduction pin PWRA permits the power and bandwidth to be reduced by about half in such applications PRAO VGAI 60dB TO 0dB ATTENUATOR AND GAIN 1 28kQ CONTROL INTERFACE 4 48kQ PWRA VPOS VNEG GPOS GNEG VCOM OPTIONAL DEPEAKING CAPACITOR SEE TEXT 06228 077 Figure 77 Simplified Block Diagram To maintain low noise the output stages of both the preamplifier and the VGA are capable of driving relatively small load resistances However at the largest supply voltages the signal current may exceed safe operating limits for the amplifiers and therefore the load current must not exceed 50 mA With a 12 V supply and
17. 10 V output voltage at the preamplifier or VGA output load resistances as low as 200 Q are acceptable For power supply voltages gt 10 V the maximum operating temperature range is derated to 85 C because the power may exceed safe limits see the Absolute Maximum Ratings section Because harmonic distortion products may increase for various combinations of low impedance loads and high output voltage swings it is recommended that the user determine load and drive conditions empirically PREAMPLIFIER The gain of the uncommitted voltage feedback preamplifier is set with external resistors The combined preamplifier and VGA gain is specified in two ranges 14 dB to 46 dB and 0 dB to 60 dB Since the VGA gain is fixed at 34 dB 50x the preamp gain is adjusted for gains of 12 dB 4x and 26 dB 200x With low preamplifier gains between 2x and 4x it may be desirable to reduce the high frequency gain with a shunt capacitor across Rr to ameliorate peaking in the frequency domain see Figure 77 To maintain stability the gain of the preamplifier must be 6 dB 2x or greater Typical of voltage feedback amplifier configurations the gain bandwidth product of the AD8336 is fixed at 600 therefore the bandwidth decreases as the gain is increased beyond the nominal gain value of 4x For example if the preamp gain is increased to 20x the bandwidth reduces by a factor of 5 to about 20 MHz The 3 dB bandwidth of the preamplifie
18. A Overdrive Recovery Rev C Page 17 of 28 AD8336 POWER SUPPLIES CONNECTED TO NETWORK ANALYZER BIAS NETWORK ANALYZER BENCH POWER SUPPLY BYPASS CAPACITORS REMOVED FOR MEASUREMENT DIFFERENTIAL FET PROBE 06228 068 Figure 68 Supply Current Figure 71 Power Supply Rejection Ratio NETWORK ANALYZER SPECTRUM ANALYZER 06228 069 06228 072 Figure 69 Frequency Response Inverting Gain Figure 72 Input Referred Noise vs Source Resistance SPECTRUM ANALYZER OSCILLOSCOPE PULSE GENERATOR 06228 070 06228 073 Figure 70 Pulse Response Inverting Gain Figure 73 Short Circuit Input Referred Noise vs Frequency Rev C Page 18 of 28 06228 071 AD8336 SPECTRUM ANALYZER SIGNAL GENERATOR OPTIONAL 20dB ATTENUATOR 06228 074 Figure 74 IP1dB vs Vea SPECTRUM ANALYZER SIGNAL GENERATOR 06228 075 Figure 75 IP1dB vs Vcam High Signal Level Inputs SPECTRUM ANALYZER 2208 6dB SIGNAL GENERATOR 4530 SIGNAL GENERATOR 06228 076 Figure 76 IMD and OIP3 Rev C Page 19 of 28 AD8336 THEORY OF OPERATION OVERVIEW The AD8336 is the first VGA designed for operation over exceptionally broad ranges of temperature and supply voltage Its performance has been characterized from temperatures extending from 55 C to 125 C and supply voltages from 3 V to 12 V It is ideal for applications requiring dc coupling large
19. ABSOLUTE GAIN ERROR 0 7 V lt Vean lt 0 6 V 0 1to5 6 dB 0 6 V lt Veain lt 0 5 V 0 0 5 to 1 5 3 dB 0 5 V lt Vean lt 0 5 V 1 25 02 41 25 dB 0 5 V lt Vaan lt 40 5 V 3 V lt Vs lt 12 V 0 5 1 25 dB 0 5 V lt Vaga lt 0 5 V 55 C lt T 125 0 5 dB 0 5 V lt Veain lt 0 5 V gain 3x 0 5 dB 0 5 V lt Vean lt 0 6 V 4 0 1 5 to 3 0 0 dB 0 6 V lt Vaan lt 0 7 V 9 0 1to 5 0 dB GAIN CONTROL INTERFACE Gain Scaling Factor 48 49 9 52 dB V Intercept Preamp VGA 16 4 dB VGA only 4 5 dB Gain Range 58 60 62 dB Input Voltage Vean Range No foldover Vs Vs V Input Current 1 uA Response Time 60 dB gain change 300 ns OUTPUT PERFORMANCE Output Impedance DC to 10 MHz 3V lt Vs lt 12V 2 5 Q Output Signal Swing R 500 Q for Vs lt 5 V R gt 1 above that Vs 1 5 V Ri gt 1 kO for Vs 12 V Vs 2 25 V Output Current Linear operation minimum discernable distortion 20 mA Short Circuit Current Vs 3V 123 72 mA Vs 5 V 123 72 mA Vs 12V 72 73 mA Output Offset Voltage Vaan 0 7 V gain 200x 50 125 150 mV 3V lt Vs lt 12V 200 mV 55 C lt T lt 125 C 200 mV PWRA PIN Normal Power Logic Low Vs 3V 0 7 V Low Power Logic High Vs 3V 1 5 V Normal Power Logic Low Vs 5 V 1 2 V Low Power Logic High Vs 5 V 2 0 V Normal Power Logic Low Vs 12 V 3 2 V Low Power Logic High Vs 12 V 4 0 V
20. ANALOG DEVICES General Purpose 55 C to 125 C Wide Bandwidth DC Coupled VGA AD8336 FEATURES Low noise Voltage noise 3 nV VHz Current noise 3 pA VHz Small signal BW 115 MHz Large signal BW 2 V p p 80 MHz Slew rate 550 V us 2V p p Gain ranges specified 14 dB to 46 dB O dB to 60 dB Gain scaling 50 dB V DC coupled Single ended input and output Supplies 3 V to 12 V Temperature range 55 C to 125 C Power 150 mW 43 V 55 C lt T lt 125 C 84 mW 3 V PWRA 3V APPLICATIONS Industrial process controls High performance AGC systems I Q signal processing Video Industrial and medical ultrasound Radar receivers GENERAL DESCRIPTION The AD8336 is a low noise single ended linear in dB general purpose variable gain amplifier usable over a large range of supply voltages It features an uncommitted preamplifier preamp with a usable gain range of 6 dB to 26 dB established by external resistors in the classical manner The VGA gain range is 0 dB to 60 dB and its absolute gain limits are 26 dB to 34 dB When the preamplifier gain is adjusted for 12 dB the combined 3 dB bandwidth of the preamp and VGA is 100 MHz and the amplifier is fully usable to 80 MHz With 5 V supplies the maximum output swing is 7 V p p Thanks to its X Amp architecture excellent bandwidth uni formity is maintained across the entire gain range of the VGA Intended for a broad spectrum of applications the
21. ONNECTION OF THE EXPOSED PAD REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET 220 VGGC Figure 89 16 Lead Lead Frame Chip Scale Package LFCSP VO 4mm x 4mm Body Very Thin CP 16 4 Quad Dimensions shown in millimeters 072808 A ORDERING GUIDE Model Temperature Range Package Description Package Option AD8336ACPZ R7 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_VQ CP 16 4 AD8336ACPZ RL 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_VQ CP 16 4 AD8336ACPZ WP 40 C to 85 C 16 Lead Lead Frame Chip Scale Package LFCSP_VQ CP 16 4 AD8336 EVALZ Evaluation Board 17 RoHS Compliant Part Rev C Page 26 of 28 AD8336 NOTES Rev C Page 27 of 28 AD8336 NOTES 2006 2011 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners D06228 0 5 11 C DEVICES www analo g com Rev C Page 28 of 28
22. amp gain is 12 dB is 12 dB 0 V x 49 9 dB V 4 4 dB 16 4 dB Figure 3 is a plot of gain in decibels vs Vcaw in millivolts when the preamp gain is 12 dB 4x Note that the computed result closely matches the plot of actual gain In Figure 3 the gain slope flattens at the limits of the Vea input The gain response is linear in dB over the center 8096 of the control range of the device Figure 78 shows the ideal gain characteristics for the VGA stage gain the composite gain and the preamp gain GAIN CHARACTERISTICS COMPOSITE GAIN VGA STAGE GAIN ds PREAMP GAIN 26dB GAIN RANGE OF FOR PREAMP GAIN 12 FOR PREAMP GAIN 6dB 0 7 0 5 0 3 0 1 0 1 0 3 0 5 0 7 Vean V Figure 78 Ideal Gain Characteristics of the AD8336 06228 078 AD8336 NOISE The noise of the AD8336 is dependent on the value of the VGA gain At maximum the dominant noise source is the preamp but it shifts to the VGA as Vean diminishes The input referred noise at the highest VGA gain and a preamp gain of 4x with 100 Q and Rre 301 is 3 nV VHz and is determined by the preamp and its gain setting resistors See Table 4 for the noise components for the preamp Table 4 AD8336 Noise Components for Preamp Gain 4x Noise Component Noise Voltage nV VHz Op Amp Gain 2 4x 2 6 Ree 100 Q 0 96 Rra2 301 0 55 VGA 0 77 Using the valu
23. e considerations regarding total resistance vs distortion noise and power that were noted in the noninverting case also apply in the inverting case except that the amplifier can be operated at unity inverting gain The signal gain is reduced while the noise gain is the same as for the noninverting configuration Signal Gain Ern FBI and R Noise Gain 82 1 FBI AD8336 USING THE POWER ADJUST FEATURE The AD8336 has the provision to operate at lower power with a trade off in bandwidth The power reduction applies to the preamp and the VGA sections and the bandwidth is reduced equally between them Reducing the power is particularly useful when operating with higher supply voltages and lower values of output loading that would otherwise stress the output amplifiers When Pin PWRA is grounded the amplifiers operate in their default mode and the combined 3 dB bandwidth is 80 MHz with the preamp gain adjusted to 4x When the voltage on Pin PWRA is between 1 2 V and 5 V the power is reduced by approximately half and the 3 dB bandwidth reduces to approximately 35 MHz The voltage at Pin PWRA must not exceed 5 V DRIVING CAPACITIVE LOADS The output stages of the AD8336 are stable with capacitive loads up to 47 pF for a supply voltage of 3 V and with capacitive loads up to 10 pF for supply voltages up to 8 V For larger combined values of load capacitance and or supply voltage a 20 series resistor is recommended fo
24. es listed in Table 4 the total noise of the AD8336 is slightly less than 3 nV NHz referred to the input Although the input noise referred to the VGA is 3 1 nV NHz the input referred noise at the preamp is 0 77 nV NHz when divided by the preamplifier gain of 4x At other than maximum gain the noise of the VGA is determined from the output noise The noise in the center of the gain range is about 150 nV VHz Because the gain of the fixed gain amplifier that is part ofthe VGA is 50x the VGA input referred noise is approximately 3 nV VHz the same value as the preamp and VGA combined This is expected since the input referred noise is the same at the input of the attenuator at maximum gain However the noise referred to the VGAI pin the preamp output increases by the amount of attenuation through the ladder network The noise at any point along the ladder network is primarily composed of the ladder resistance noise the noise of the input devices and the feedback resistor network noise The ladder network and the input devices are the largest noise sources At minimum gain the output noise increases slightly to about 180 nV VHz because of the finite structure of the X AMP OFFSET VOLTAGE Extensive cancellation circuitry included in the variable gain amplifier section minimizes locally generated offset voltages However when operated at very large values of gain dc voltage errors at the output can still result from small dc input volta
25. gative Gain Control Input 13 VPOS Positive Supply 14 NC No Connect 15 NC No Connect 16 NC No Connect Rev C Page 6 of 28 AD8336 TYPICAL PERFORMANCE CHARACTERISTICS Vs 5 V T 25 gain range 14 dB to 46 dB preamp gain 4x f 1 MHz Ci 5 500 O PWRA GND unless otherwise specified 50 T 125 C T 25 T 55 C T 125 C T 25 40 T 55 G 30 N o 10 GAIN dB GAIN ERROR dB 10 20 2 800 600 400 200 0 200 400 600 800 800 600 400 200 0 200 400 600 800 Veain mV 8 Vean mV Figure 3 Gain vs Veaw for Three Values of Temperature T Figure 6 Gain Error vs Vea for Three Values of Temperature T See Figure 56 See Figure 56 2 0 Vs 12V Vs 12V Vs 5 Vs 5V 1 5 Vs 43V 1 0 o5 8 x z 2 o lt PL ul Z 05 1 0 10 1 5 20 2 0 5 800 600 400 200 0 200 400 600 800 800 600 400 200 0 200 400 600 800 Veain mV P Veain mV Figure 4 Gain vs Vau for Three Values of Supply Voltage Vs Figure 7 Gain Error vs Vean for Three Values of Supply Voltage Vs See Figure 56 See Figure 56 70 PREAMP GAIN 20x PREAMP GAIN 4x 60 50 40 m x 5 30
26. ges When configured for the nominal gain range of 14 dB to 46 dB the maximum gain is 200x and an offset of only 100 uV at the input generates 20 mV at the output The primary source for dc offset errors is the preamplifier ac coupling between the PRAO and VGAI pins is the simplest solution In applications where dc coupling is essential a compensating current can be injected at the INPN input Pin 5 to cancel preamp offset The direction of the compensating current depends on the polarity of the offset voltage Rev C Page 21 of 28 AD8336 APPLICATIONS INFORMATION AMPLIFIER CONFIGURATION The AD8336 amplifiers can be configured in various options In addition to the 60 dB gain range variable gain stage an uncommit ted voltage gain amplifier is available to the user as a preamplifier The preamplifier connections are separate to enable noninverting or inverting gain configurations or the use of interstage filtering The AD8336 can be used as a cascade connected VGA with pre amp input as a standalone VGA or as a standalone preamplifier This section describes some of the possible applications PRAO VGAI i ATTENUATOR TN VOUT 60dB TO 0dB GAIN CONTROL INTERFACE VNEG VPOS VCOM GPOS GNEG 06228 079 Figure 79 Application Block Diagram PREAMPLIFIER While observing just a few constraints the uncommitted voltage feedback preamplifier of the AD8336 can be connected in a variety of standard high frequency op am
27. gure 74 and Figure 75 VOLTAGE V 1 3 100 0 100 200 300 TIME ns Figure 44 Large Signal Pulse Response of the Preamp See Figure 65 06228 042 06228 043 Figure 43 Input P1dB IP1dB vs at Three Power Supply Values Vs 06228 044 AD8336 Vear 9 7V PREAMP GAIN 3x Vout mV Vin mV Vout mV 0 N INPUT OUTPUT WHEN PWRA 0 20 OUTPUT WHEN PWRA 1 100 50 50 100 150 200 250 300 350 100 50 0 50 100 150 200 250 30 350 TIME ns TIME ns 8 Figure 45 Noninverting Small Signal Pulse Response for Both Power Levels Figure 48 Inverting Gain Large Signal Pulse Response See Figure 65 See Figure 70 60 OUTPUT 40 Vean 0 7V PREAMP GA 20 0 2 o gt 20 40 60 100 50 0 50 100 150 200 250 300 350 400 TIME ns Figure 49 Large Signal Pulse Response for Various Values of Load Capacitance Using 3 V Power Supplies See Figure 65 100 50 50 100 150 200 250 300 350 TIME ns 06228 046 Figure 46 Inverting Gain Small Signal Pulse Response See Figure 70 Vour mV Vin mV Vout mV 10 10 22pF 47pF OUTPUT WHEN PWRA OUTPUT WHEN PWRA
28. ification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ESD CAUTION ta ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge without detection Although this product features patented or proprietary protection circuitry damage may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality 44 board no airflow exposed pad soldered to printed circuit board Rev C Page 5 of 28 AD8336 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR NOTES 1 NC NO CONNECT 2 THE EXPOSED PAD IS NOT CONNECTED INTERNALLY FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY IT IS RECOMMENDED THAT THE PADDLE BE SOLDERED TO THE GROUND PLANE 06228 002 Figure 2 Pin Configuration Table 3 Pin Function Descriptions Pin No Mnemonic Description 1 VOUT Output Voltage 2 PWRA Power Control Normal power when grounded power reduced by half if PWRA is pulled high 3 VCOM Common Mode Voltage Normally GND when using a dual supply 4 INPP Positive Input to Preamp 5 INPN Negative Input to Preamp 6 NC No Connect 7 NC No Connect 8 PRAO Preamp Output 9 VGAI VGA Input 10 VNEG Negative Supply 11 GPOS Positive Gain Control Input 12 GNEG Ne
29. n VGAI is connected to the input of the ladder attenuator The ladder ratio is R 2R and the nominal resistance is 320 O To reduce preamp loading and large signal dissipation the input resistance at Pin VGAI is 1 28 Safe current density and power dissipation levels are maintained even when large dc signals are applied to the ladder The tap resistance of the resistors within the R 2R ladder is 640 0 3 or 213 3 O and is the Johnson noise source of the attenuator Rev C Page 20 of 28 SETTING THE GAIN The overall gain of the AD8336 is the sum in decibels or the product magnitude of the preamp gain and the VGA gain The preamp gain is calculated as with any op amp as seen in the Applications Information section It is most convenient to think of the device gain in exponential terms that is in decibels since the VGA responds linearly in decibels with changes in control voltage at the gain pins The gain equation for the VGA is 50 dB VGA Gain dB x 4 44 where Varos The gain and gain range of the are both fixed at 34 dB 60 dB respectively thus the composite device gain is changed by adjusting the preamp gain For a preamp gain of 12 dB 4x the composite gain is 14 dB to 46 dB Therefore the calculation for the composite gain in decibels is Composite Gain V x 49 9 dB V 4 4 dB For example the midpoint gain when the pre
30. on AD8336 PREAMPLIFIER 1 VOUT VGAI PWRA VNEG VCOM VPOS OQO 5V 5V GAIN 12dB 06228 080 Figure 80 Circuit Configuration for Noninverting Gain The preamplifier output reliably sources and sinks currents up to 50 mA When using 5 V power supplies the suggested sum of the output resistor values is 400 Q total for the optimal trade off between distortion and noise Much of the low gain value device characterization was performed with resistor values of 301 and 100 resulting in a preamplifier gain of 12 dB 4x With supply voltages between 5 V and 12 V the sum of the output resistance should be increased accordingly a total resistance of 1 is recommended Larger resistance values subject to a trade off in higher noise performance can be used if circuit power and load driving is an issue When considering the total power dissipation remember that the input ladder resistance of the VGA is part of the preamp load Table 5 Gain and Bandwidth for Noninverting Preamplifier Configuration Preamp Gain Preamp BW Composite Numerical dB MHz Gain dB 4x 12 150 14 to 46 8x 18 60 8to 52 16x 24 30 2 to 58 20x 26 25 0 to 60 Rev C Page 22 of 28 Circuit Configuration for Inverting Gain The preamplifier can also be used in an inverting configuration as shown in Figure 81 06228 081 Figure 81 Circuit Configuration for Inverting Gain Th
31. or voltage reference Optional resistor networks R15 R17 and R13 R14 provide fixed gain bias voltages at Pin GNEG and Pin GPOS for non zero common mode voltages The gain control can also be driven with an active input such as a ramp Provision is made for an optional SMA connector at PRVG for monitoring the preamp output or for driving the VGA from an external source Remove the 0 Q resistor at R9 to isolate the preamp from an external generator The capacitor at Location C1 limits the bandwidth of the preamplifier BOARD LAYOUT CONSIDERATIONS The evaluation board uses four layers with power and ground planes located between two conductor layers This arrangement is highly recommended for customers and several views of the board are provided as reference for board layout details When laying out a printed circuit board for the AD8336 remember to provide a pad beneath the device to solder the exposed pad of the matching device The pad in the board should have at least five vias to provide a thermal path for the chip scale package Unlike leaded devices the thermal pad is the primary means to remove heat dissipated within the device Rev C Page 24 of 28 Figure 82 AD8336 Evaluation Board
32. p configurations The amplifier is optimized for a gain of 4x 12 dB and has a gain bandwidth product of 600 MHz At a gain of 4x the bandwidth is 150 MHz The preamplifier gain can be adjusted to a minimum gain of 2x however there will be a small peak in the response at high frequencies At higher preamplifier gains the bandwidth diminishes proportionally in conformance to the classical voltage gain amplifier GBW relationship While setting the overall gain of the AD8336 the user needs to consider the input referred offset voltage of the preamplifier Although the offset of the attenuator and postamplifier are almost negligible the preamplifier offset voltage if uncorrected is increased by the combined gain of the preamplifier and post amplifier Therefore for a maximum gain of 60 dB an input offset voltage of only 200 uV results in an error of 200 mV at the output Circuit Configuration for Noninverting Gain The noninverting configuration is shown in Figure 80 The preamp gain is described by the classical op amp gain equation Gain The practical gain limits for this amplifier are 6 dB to 26 dB The gain bandwidth product is about 600 MHz so at 150 MHz the maximum achievable gain is 12 dB 4x The minimum gain is established internally by fixed loop compensation and is 6 dB 2x This amplifier is not designed for unity gain operation Table 5 shows the gain and bandwidth for the noninverting gain configurati
33. r stability The influence of capacitance and supply voltage are shown in Figure 50 and Figure 51 where representative combinations of load capacitance and supply voltage requiring a 20 Q resistor are marked with an asterisk No resistor is required for the 3 V plots in Figure 49 but a resistor is required for most of the 12 V plots in Figure 51 Rev C Page 23 of 28 AD8336 EVALUATION BOARD An evaluation board AD8336 EVALZ is available online for the AD8336 Figure 82 is a photo of the board The board is shipped from the factory configured for a non inverting preamp gain of 4x To change the value of the gain of the preamp or to change the gain polarity to inverting alter the component values or install components in the alternate locations provided All components are standard 0603 size and the board is compliant with RoHS requirements Table 6 shows the components to be removed and added to change the amplifier configuration to inverting gain Table 6 Component Changes for Inverting Configuration Remove Install R4 R7 R5 R6 OPTIONAL CIRCUITRY The AD8336 features differential inputs for the gain control permitting nonzero or floating gain control inputs To avoid any delay in making the board operational the gain input circuit is shipped with Pin GNEG connected to ground via a 0 O resistor in the R17 location The user can adjust the gain of the device by driving the GPOS test loop with a power supply
34. r with a gain of 4x is about 150 MHz and for the 20x gain is about 30 MHz The preamp gain diminishes for an amplifier configured for inverting gain using the same value of feedback resistors as for a noninverting amplifier but the bandwidth remains unchanged For example if the noninverting gain is 4x the inverting gain is 3x but the bandwidth stays the same as in the noninverting gain of 4x However because the output referred noise of the preamplifier is the same in both cases the input referred noise increases as the ratio ofthe two gain values increases For the previous example the input referred noise increases by a factor of 4 3 The output swing of the preamplifier is the same as for the VGA VGA The architecture of the variable gain amplifier VGA section of the AD8336 is based on the Analog Devices Inc X AMP exponential amplifier found in a wide variety of Analog Devices variable gain amplifiers This type of VGA combines a ladder attenuator and interpolator followed by a fixed gain amplifier The gain control interface is fully differential permitting positive or negative gain slopes Note that the common mode voltage of the gain control inputs increases with increasing supply The gain slope is 50 dB V and the intercept is 16 4 dB when the nominal preamp gain is 4x 12 dB The intercept changes with the preamp gain for example when the preamp gain is set to 20x 26 dB the intercept becomes 30 4 dB Pi
35. tortion vs Load Resistance Figure 38 Second Harmonic Distortion vs VGAIN See Figure 64 for Four Values of Output Voltage Vout See Figure 64 Rev C Page 12 of 28 HARMONIC DISTORTION dBc HARMONIC DISTORTION dBc IMD3 dBc AD8336 20 OUTPUT SWING OF PREAMP LIMITS 1MHz 500mV MINIMUM USABLE V aiN LEVELS MHz 1V 30 10MHz 500mV 10MHz 1V 40 m amp 50 20 2 n 5 60 o Z Vout 0 5V p p 1V p p M 2V p E m oup es Veain 0V E OUT COMPOSITE INPUTS SEPARATED BY 100kHz 600 400 200 0 200 400 600 800 800 600 400 200 0 200 400 600 800 Veain mV 06228 039 Figure 39 Third Harmonic Distortion vs Vean for Four Values of Output Voltage Vour See Figure 64 Vout 2V p p OV 1M 10M 50M FREQUENCY Hz 06228 040 Figure 40 Harmonic Distortion vs Frequency See Figure 64 Vout 1V p p Vean OV TONES SEPARATED BY 100kHz 1M 10M 100M FREQUENCY Hz 06228 041 Figure 41 IMD3 vs Frequency see Figure 76 Rev C Page 13 of 28 IP1dB dBm Veain mV Figure 42 Output Referred IP3 OIP3 vs VGAIN at Two Frequencies and Two Input Levels see Figure 76 INPUT LEVEL LIMITED BY GAIN OF PREAMP 10 30 800 600 400 200 0 200 400 600 800 Veain mV see Fi
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ANALOG DEVICES AD8336 English products handbook Rev C