TEXAS INSTRUMENTS - DAC7512 Low-Power Rail-to-Rail Output 12-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER handbook
Contents
1. LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE 40 C 25 C 16 0 16 0 12 0 12 0 8 0 80 8 40 8 40 2 20 4 4 Z 80 280 12 0 12 0 16 0 16 0 1 0 1 0 om 0 5 om 0 5 8 2 uy 0 0 uy 0 0 05 05 1 0 1 0 0 200 400 600 800 A00 C00 E00 FFF 0 200 400 600 800 A00 C00 00 FFF CODE CODE LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE 105 C ie TYPICAL TOTAL UNADJUSTED ERROR 16 0 12 0 8 0 00 40 8 8 0 i 16 2 1 0 g 05 P a 8 ui 0 0 0 5 1 0 16 0 200 400 600 800 A00 C00 00 FFF 200 400 600 800 A00 C00 E00 FFF CODE m ZERO SCALE ERROR vs T FULL SCALE ERROR vs TEMPERATURE 20 20 10 10 0 0 e e wi wi 10 10 20 20 80 30 40 0 40 80 120 40 0 40 80 120 Temperature C Temperature C 45 TEXAS DAC7512 INSTRUMENTS SBAS156B www ti com TYPICAL CHARACTERISTICS Vp 5V Cont At T4 25 C Vpp 5V unless otherwise noted Ibo HISTOGRAM 5 2500 4 2000 gt 2 9 1500 E 9 8 gt 2 1000 i 500 0 0 D tC O UO O 9 00O D2. 1 4 5 10 2 90 Y EEE 210 L 110 MAX Bi ES 4073329 D 12 03 NOTES All linear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion Falls within MO 187 variation AA 3 TEXAS INSTRUMENTS www ti com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to TI s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their prod
3. Gage Plane 4 Seating Plane 0 05 MIN 0 10 4073253 5 G 01 02 NOTES A All linear dimensions in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion Leads 1 2 3 may be wider than leads 4 5 6 for package orientation com Wy TEXAS 16 INSTRUMENTS DAC7512 www ti com SBAS156B 9 TEXAS PACKAGE ADDENDUM INSTRUMENTS www ti com 30 Mar 2005 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead Ball Finish MSL Peak Temp Type Drawing Qty DAC7512E 250 ACTIVE MSOP DGK 8 250 TBD CU NIPDAU Level 3 220C 168 HR DAC7512E 2K5 ACTIVE MSOP DGK 8 2500 TBD CU NIPDAU Level 3 220C 168 HR DAC7512N 250 ACTIVE SOT 23 DBV 6 250 Green RoHS amp NIPDAU Level 2 260C 1 YEAR no Sb Br DAC7512N 250G4 ACTIVE SOT 23 DBV 6 250 Green RoHS amp NIPDAU Level 1 260C UNLIM no Sb Br DAC7512N 3K ACTIVE SOT 23 DBV 6 3000 Green RoHS amp NIPDAU Level 2 260C 1 YEAR no Sb Br DAC7512N 3KG4 ACTIVE SOT 23 DBV 6 3000 Green RoHS amp NIPDAU Level 1 260C UNLIM no Sb Br 0 The marketing status values are defined as follows ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new desig
4. Thermal Impedance Lead Temperature Soldering Vapor Phase 60s Infrared 15s 0 3V to 6V 0 3V to Vpp 0 3V 0 3V to Vpp 0 3V 40 to 105 C 65 C to 150 C NOTE 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device Exposure to absolute maximum conditions for extended periods may affect device reliability PACKAGE ORDERING INFORMATION MINIMUM RELATIVE ACCURACY DIFFERENTIAL NONLINEARITY PRODUCT DAC7512E MSOP 8 DAC7512N SOT23 6 PACKAGE PACKAGE LEAD DESIGNATOR RANGE ELECTROSTATIC T DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD Texas Instru ments recommends that all integrated circuits be handled with appropriate precautions Failure to observe proper handling and installation procedures can cause damage ESD damage can range from subtle performance degradation to complete device failure Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications SPECIFIED TEMPERATURE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA QUANTITY DAC7512E 250 DAC7512E 2K5 DAC7512N 250 DAC7512N 3K Tape and Reel 250 Tape and Reel 2500 Tape and Reel 250 Tape and Reel 3000 40 to 105 C 40 C to 105 C NOTES 1 For the most current specifications and packa
5. 2 a 8 1000 500 0 0 1 2 3 4 5 FULL SCALE SETTLING TIME Full Scale Code Change FFF to 000 Output Loaded with 2kQ and 200pF GND Time 1us div HALF SCALE SETTLING TIME Half Scale Code Change C00 to 400 Output Loaded with 2kQ and 200pF to GND Time 1us div 10 INSTRUMENTS FULL SCALE SETTLING TIME Full Scale Code Change 000 to FFF Output Loaded with 2 and 200pF to GND Time 1us div HALF SCALE SETTLING TIME Half Scale Code Change 400 to C00 Output Loaded with 2 and 200pF to GND Time 1us div POWER ON RESET to 0V Loaded with 2kQ to Vpp p 1V div HEE ETE EE Time 20us div DAC7512 SBAS156B TYPICAL CHARACTERISTICS Vpp 2 7V Cont At T4 25 C Vpp 2 7V unless otherwise noted EXITING POWER DOWN 800 Loaded CLK 2 7V div Z Time 5us div THEORY OF OPERATION DAC SECTION The DAC7512 is fabricated using a CMOS process The architecture consists of a string DAC followed by an output buffer amplifier Since there is no reference input pin the power supply Vpp acts as the reference Figure 1 shows a block diagram of the DAC architecture Resi DAC Register 55291 String REF Output Amplifier FIGURE 1 DAC7512 Architecture The input cod
6. TI is not responsible or liable for any such statements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security Telephony www ti com telephony Video amp Imaging www ti com video Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2005 Texas Instruments Incorporated
7. Output Loaded with 2 and 200pF to GND 2 and 200pF to GND Time 1us div Time 1us div HALF SCALE SETTLING TIME POWER ON RESET TO 0V Half Scale Code Change Loaded with 2kQ to Vp C00 to 400 Output Loaded with 2kQ and 200pF to GND Vour 1V div Time 1us div Time 20ps div BT 49 Texas DAC7512 INSTRUMENTS SBAS156B www ti com TYPICAL CHARACTERISTICS Vp 5V Cont At T4 25 C Vpp 5V unless otherwise noted EXITING POWER DOWN 800 Loaded CODE CHANGE GLITCH Loaded with 2kQ and 200pF to GND h Code Change 800 10 7FF 5 gt n 5 gt Time 5us div Time 0 5us div TYPICAL CHARACTERISTICS Vpp 2 7V At T4 25 C Vpp 2 7V unless otherwise noted LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE 40 C 25 C 16 0 16 0 12 0 12 0 80 80 m 40 D 40 00 d u 40 ul g0 8 0 12 0 12 0 16 0 16 0 1 0 1 0 m 05 Tm 05 a ul 0 0 m 0 0 05 05 1 0 1 0 0 200 4004 600 800 A00 C00 00 FFF 0 200 400 600 800 A00 C00 E00 FFF CODE CODE LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE 105 C i TYPICAL
8. 65 QO ioe lpp HA SUPPLY CURRENT CODE 500 300 2 400 50 200 300 lt 3 150 Q 200 100 100 Y ILL LLLI 0 0 0 200 400 600 800 A00 C00 E00 FFF CODE SUPPLY CURRENT vs SUPPLY VOLTAGE 300 100 90 250 80 70 200 _ 60 lt 3 150 50 zB 40 100 30 20 3 10 0 0 27 3 2 3 7 4 2 4 7 5 2 5 7 Vpp V i X3 Texas 6 INSTRUMENTS www ti com SOURCE AND SINK CURRENT CAPABILITY DAC Loaded with FFF DAC Loaded with 000 0 5 10 15 Isourcevsink MA SUPPLY CURRENT vs TEMPERATURE 40 0 40 80 120 Temperature C POWER DOWN CURRENT vs SUPPLY VOLTAGE 2 7 3 2 3 7 4 2 4 7 5 2 5 7 Voo V DAC7512 SBAS156B TYPICAL CHARACTERISTICS Vp 5V Cont At T4 25 C Vpp 5V unless otherwise noted Sem SUPPLY CURRENT vs LOGIC INPUT VOLTAGE FULL SCALE SETTLING TIME 2000 1500 T B 1000 Full Scale Code Change 500 000 to Output Loaded with Z 2kQ 200pF to GND 0 i 0 1 2 3 4 5 Time 1us div Vioaic V FULL SCALE SETTLING TIME HALF SCALE SETTLING TIME CLK 5V div Full Scale Code Change Half Scale Code Change FFF to 000 400 10 COO Output Loaded with
9. Burr Brown Products from Texas Instruments DAC7512 C e SBAS156B JULY 2002 Low Power Rail to Rail Output 12 Bit Serial Input DIGITAL TO ANALOG CONVERTER FEATURES microPOWER OPERATION 135pA at 5V POWER DOWN 200nA at 5V 50nA at 3V POWER SUPPLY 2 7V to 5 5V TESTED MONOTONIC BY DESIGN POWER ON RESET TO 0V THREE POWER DOWN FUNCTIONS LOW POWER SERIAL INTERFACE WITH SCHMITT TRIGGERED INPUTS ON CHIP OUTPUT BUFFER AMPLIFIER RAIL TO RAIL OPERATION SYNC INTERRUPT FACILITY SOT23 6 AND MSOP 8 PACKAGES APPLICATIONS PORTABLE BATTERY POWERED INSTRUMENTS DIGITAL GAIN AND OFFSET ADJUSTMENT PROGRAMMABLE VOLTAGE AND CURRENT SOURCES DAC Register O O O SYNC SCLK Diy DESCRIPTION The DAC7512 is a low power single 12 bit buffered voltage output Digital to Analog Converter DAC Its on chip preci sion output amplifier allows rail to rail output swing to be achieved The DAC7512 uses a versatile three wire serial interface that operates at clock rates up to 30MHz and is compatible with standard SPI QSPI Microwire and DSP interfaces The reference for the DAC7512 is derived from the power supply resulting in the widest dynamic output range possible The DAC7512 incorporates a power on reset circuit that ensures that the DAC output powers up at and remains there until a valid write takes place in the device The DAC7512 contains a powe
10. TOTAL UNADJUSTED ERROR 16 12 gi N 0 8 u 8 12 16 9 1 0 P a 05 3 p 8 4 05 1 0 16 000 200 400 600 800 A00 C00 E00 FFF 0 200 400 600 800 A00 C00 E00 FFF CODE CODE 9 Texas DAC7512 8 INSTRUMENTS www ti com SBAS156B TYPICAL CHARACTERISTICS Vp 2 7V Cont At T4 25 C Vpp 2 7V unless otherwise noted ZERO SCALE ERROR vs TEMPERATURE FULL SCALE ERROR vs TEMPERATURE 30 30 20 20 10 10 FREE xX 0 e e ui ui 10 10 20 20 80 30 40 0 40 80 120 40 0 40 80 120 Temperature C Temperature C HISTOGRAM SOURCE AND SINK CURRENT CAPABILITY 3000 3 Veer tied to Vpp DAC Loaded with 2 a gt 5 gt 1 DAC Loaded with 000 0 0 5 10 15 Isourcersink MA SUPPLY CURRENT vs CODE SUPPLY CURRENT vs TEMPERATURE 500 300 250 400 200 300 2 T lt 150 8 200 100 100 50 0 0 O 200 400 600 800 A00 C00 E00 FFF 40 0 40 80 120 CODE Temperature C 49 T EXAS DAC7512 INSTRUMENTS SBAS156B www ti com TYPICAL CHARACTERISTICS Vpp 2 7V Cont At T4 25 C Vpp 2 7V unless otherwise noted SUPPLY CURRENT vs LOGIC INPUT VOLTAGE Wy TEXAS 2500 2000 _ 1500 lt
11. ane or trace that is separate from the connection for digital logic until they are connected at the power entry point In addition the 1uF to 10uF and O 1uF bypass capacitors are strongly recommended In some situ ations additional bypassing may be required such as a 100 electrolytic capacitor or even a Pi filter made up of inductors and capacitors all designed to essentially low pass filter the 5V supply removing the high frequency noise DAC7512 Three Wire Serial Interface FIGURE 10 Bipolar Operation with the DAC7512 OPA703 Wy TEXAS 14 INSTRUMENTS DAC7512 www ti com SBAS156B PACKAGE DRAWINGS MPDS028B JUNE 1997 REVISED SEPTEMBER 2001 DGK R PDSO G8 PLASTIC SMALL OUTLINE PACKAGE 0 15 NOM Gage Plane 2 95 Y Seating Plane 1 07 MAX 5 7 4073329 08 01 NOTES A Alllinear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion Falls within JEDEC MO 187 oou TEXAS DAC7512 INSTRUMENTS 15 SBAS156B www ti com PACKAGE DRAWINGS Cont MPDS026D FEBRUARY 1997 REVISED FEBRUARY 2002 DBV R PDSO G6 PLASTIC SMALL OUTLINE 0 15 NOM
12. belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by to Customer on an annual basis Addendum Page 1 MECHANICAL DATA DBV 50 66 PLASTIC SMALL OUTLINE PACKAGE Seating Plane AO 0 10 1 4073253 5 H 10 2003 NOTES All linear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion Leads 1 2 5 may be wider than leads 4 5 6 for package orientation Falls within JEDEC 0 178 Variation AB except minimum lead width oon 435 TEXAS INSTRUMENTS www ti com MECHANICAL DATA DGK S PDSO G8 PLASTIC SMALL OUTLINE PACKAGE
13. er The setup for the inter face is as follows TXD of the 8051 drives SCLK of the DAC7512 while RXD drives the serial data line of the part The SYNC signal is derived from a bit programmable pin on the port In this case port line P3 3 is used When data is to be transmitted to the DAC7512 P3 3 is taken LOW The 8051 transmits data only in 8 bit bytes thus only eight falling clock edges occur in the transmit cycle To load data to the DAC P3 3 is left LOW after the first eight bits are transmitted and a second write cycle is initiated to transmit the second byte of data P3 3 is taken HIGH following the completion of this cycle The 8051 outputs the serial data in a format which has the LSB first The DAC7512 requires its data with the MSB as the first bit received The 8051 transmit routine must therefore take this into account and mirror the data as needed 80C51 80L51 9 DAC7512 P3 3 SYNC TXD SCLK RXD Din NOTE 1 Additional pins omitted for clarity FIGURE 6 DAC7512 to 80C51 80L51 Interface DAC7512 TO MICROWIRE INTERFACE Figure 7 shows an interface between the DAC7512 and any Microwire compatible device Serial data is shifted out on the falling edge of the serial clock and is clocked into the DAC7512 on the rising edge of the SK signal DAC7513 cs SYNC Microwire SK SO NOTE 1 Additional pins omitted for clarity Microwire is a registered trademark of National Semicond
14. ge information refer to our web site at www ti com 2 Models with a slash are available only in Tape and Reel in the quantities indicated e g 2K5 indicates 2500 devices per reel Ordering 2500 pieces of DAC7512E 2K5 will get a single 2500 piece Tape and Reel PIN CONFIGURATIONS Top View SOT23 6 NC No Internal Connection DAC7512N LOT TRACE LOCATION Top View PIN DESCRIPTION SOT23 6 Analog output voltage from DAC The output ampli fier has rail to rail operation Ground reference point for all circuitry on the part Power Supply Input 2 7V to 5 5V Serial Data Input Data is clocked into the 16 bit input shift register on the falling edge of the serial clock input Serial Clock Input Data can be transferred at rates up to 30MHz Level triggered control input active LOW This is the frame sychronization signal for the input data When SYNC goes LOW it enables the input shift register and data is transferred in on the falling edges of the following clocks The DAC is updated following the 16th clock cycle unless SYNC is taken HIGH before this edge in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC7512 Bottom View Lot Trace Code vy TEXAS 2 INSTRUMENTS DAC7512 www ti com SBAS156B ELECTRICAL CHARACTERISTICS 42 7V to 5 5V R 2kj to GND C 200pF to GND PARAMETER STATIC PERFORMANCE 1 Resoluti
15. if the system supply voltages are at some value other than 5V The REF02 will output a steady supply voltage for the DAC7512 If the REF02 is used the current it needs to supply to the DAC7512 is 135uA This is with no load on the output of the DAC When the DAC output TEXAS DAC7512 INSTRUMENTS 13 SBAS156B www ti com Three Wire Serial Interface Vour 0V to 5V DAC7512 FIGURE 9 REF02 as Power Supply to DAC7512 is loaded the REF02 also needs to supply the current to the load The total current required with a 5kO load on the DAC output is 135 1 14mA The load regulation of the REF02 is typically 0 005 mA which results in an error of 285uV for the 1 14mA current drawn from it This corresponds to a 0 215 error BIPOLAR OPERATION USING THE DAC7512 The DAC7512 has been designed for single supply operation but a bipolar output range is also possible using the circuit in Figure 10 The circuit shown will give an output voltage range of 5V Rail to rail operation at the amplifier output is achiev able using an OPA340 as the output amplifier The output voltage for any input code can be calculated as follows D YI Vo ERE 4096 R R J where D represents the input code in decimal 0 4095 With Vpp 5V R 10 10 0 vo E 5 This is output voltage range of 5V with 000 correspond ing to a 5V output and FFF correspondi
16. ing to the DAC7512 is straight binary so the ideal output voltage is given by D Vout Vpp 3596 where D decimal equivalent of the binary code that is loaded to the DAC register it can range from 0 to 4095 RESISTOR STRING The resistor string section is shown in Figure 2 It is simply a string of resistors each of value R The code loaded into the DAC register determines at which node on the string the voltage is tapped off to be fed into the output amplifier by closing one of the switches connecting the string to the amplifier It is tested monotonic because it is a string of resistors CODE CHANGE GLITCH Loaded with 2kQ and 200pF to GND Code Change 800 to 7FF Vour 20mV div To Output Amplifier FIGURE 2 Resistor String OUTPUT AMPLIFIER The output buffer amplifier is capable of generating rail to rail voltages on its output which gives an output range of OV to Vpp It is capable of driving a load of 2kQ in parallel with 1000pF to GND The source and sink capabilities of the output amplifier can be seen in the typical characteristics The slew rate is 1V us with a half scale settling time of 8us with the output unloaded TEXAS DAC7512 INSTRUMENTS 11 SBAS156B www ti com SERIAL DAC7512 has a three wire serial interface SYNC SCLK Div which is compatible with SPI QSPI and Microwire interface standard
17. ng to a 5V output LAYOUT A precision analog component requires careful layout ad equate bypassing and clean well regulated power supplies As the DAC7512 offers single supply operation it will often be used in close proximity with digital logic microcontrollers microprocessors and digital signal processors The more digital logic present in the design and the higher the switch ing speed the more difficult it will be to achieve good performance from the converter Due to the single ground pin of the DAC7512 all return currents including digital and analog return currents must flow through the GND pin Ideally GND would be connected directly to an analog ground plane This plane would be Separate from the ground connection for the digital compo nents until they were connected at the power entry point of the system The power applied to Vpp should be well regulated and low noise Switching power supplies and DC DC converters will often have high frequency glitches or spikes riding on the output voltage In addition digital components can create similar high frequency spikes as their internal logic switches states This noise can easily couple into the DAC output voltage through various paths between the power connec tions and analog output This is particularly true for the DAC7512 as the power supply is also the reference voltage for the DAC As with the GND connection Vpp should be connected to 5V power supply pl
18. ns Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available OBSOLETE TI has discontinued the production of the device Eco Plan The planned eco friendly classification Pb Free RoHS or Green RoHS amp no Sb Br please check http Awww ti com productcontent for the latest availability information and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS Tis terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 196 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Green RoHS amp no Sb Br TI defines Green to mean Pb Free RoHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 196 by weight in homogeneous material 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications and peak solder temperature Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided TI bases its knowledge and
19. on Relative Accuracy Differential Nonlinearity Zero Code Error Full Scale Error Gain Error Zero Code Error Drift Gain Temperature Coefficient CONDITIONS Tested Monotonic by Design Zeroes Loaded to DAC Register All Ones Loaded to DAC Register DAC7512E TYP Bits LSB LSB mV 96 of FSR 96 of FSR uV c ppm of FSR C OUTPUT CHARACTERISTICS 2 Output Voltage Range Output Voltage Settling Time Slew Rate Capacitive Load Stability Code Change Glitch Impulse Digital Feedthrough DC Output Impedance Short Circuit Current Power Up Time 1 4 Scale to 3 4 Scale Change 400 to 00 R 2kQ OpF lt C lt 200pF R 2 C 500pF R R 2kQ 1LSB Change Around Major Carry Vpp 45V Vpp 3V Coming Out of Power Down Mode Vpp 5V Coming Out of Power Down Mode Vpp 3V V LOGIC INPUTS 2 Input Current VinL Input Low Voltage VL Input Low Voltage VinH Input High Voltage VinH Input High Voltage Pin Capacitance Vpp 5V 43V Vpp 45V Vpp 43V POWER REQUIREMENTS lbp normal mode Vpp 3 6V to 5 5V Vpp 2 7V to 3 6V Ipp all power down modes Vpp 3 6V to 5 5V Vpp 2 7V to 3 6V DAC Active and Excluding Load Current Vin Vpp and Vi GND and Vi GND and V GND and V GND POWER EFFICIENCY lour pp 2mA 5V TEMPERATURE RANGE Specified Perfo
20. ower consumption of 135uA at 5V However for the three power down modes the supply current falls to 200nA at 5V 50nA at 3V Not only does the supply current fall but the output stage is also internally switched from the output of the amplifier to a resistor network of known values This has the advantage that the output impedance of the part is known while the part is in power down mode There are three different options The output is connected internally to GND through a 1kQ resistor a 100kQ resistor or it is left open circuited High Z See Figure 5 for the output stage DBO x x er se o on s e L er FIGURE 3 Data Input Register SYNC HIGH before 16th Falling Edge Valid Write Sequence Output Updates on the 16th Falling Edge FIGURE 4 SYNC Interrupt Facility Wy TEXAS 12 INSTRUMENTS DAC7512 www ti com SBAS156B Resistor String DAC Amplifier Power down Resistor Circuitry Network FIGURE 5 Output Stage During Power Down All linear circuitry is shut down when the power down mode is activated However the contents of the DAC register are unaffected when in power down The time to exit power down is typically 2 5us for Vpp 5V and 5us for Vpp See the Typical Characteristics for more information MICROPROCESSOR INTERFACING DAC7512 TO 8051 INTERFACE Figure 6 shows a serial interface between the DAC7512 and a typical 8051 type microcontroll
21. r down feature accessed over the serial interface that can reduce the current consumption of the device to 50nA at 5V The low power consumption of this part in normal operation makes it ideally suited to portable battery operated equip ment The power consumption is 0 7mW at 5V reducing to 1uW in power down mode The DAC7512 is available in a SOT23 6 package and MSOP 8 package SPI and QSPI are registered trademarks of Motorola Microwire is a registered trademark of National Semiconductor Power Down Resistor Control Logic Network Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters 3 TEXAS INSTRUMENTS www ti com Copyright 2002 Texas Instruments Incorporated ABSOLUTE MAXIMUM RATINGS Vpp to GND Digital Input Voltage to GND Vour to GND Operating Temperature Range Storage Temperature Range Junction Temperature Range Tj SOT23 Package Power Dissipation JA Thermal Impedance Lead Temperature Soldering Vapor Phase 60s Infrared 15s MSOP Package Power Dissipation JA Thermal Impedance
22. rmance NOTES 1 Linearity calculated using a reduced code range of 48 to 4047 output unloaded 2 Guaranteed by design and characterization not production tested DAC7512 SBAS156B 3 TEXAS INSTRUMENTS www ti com TIMING CHARACTERISTICS 2 Vpp 2 7V to 5 5V all specifications 40 C to 105 C unless otherwise noted DAC7512E N PARAMETER DESCRIPTION CONDITIONS TYP SCLK Cycle Time 2 7V to 3 6V Vpp 3 6V to 5 5V SCLK HIGH Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V SCLK LOW Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V SYNC to SCLK Rising Edge Setup Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V Data Setup Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V Data Hold Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V SCLK Falling Edge to SYNC Rising Edge Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V Minimum SYNC HIGH Time Vpp 2 7V to 3 6V Vpp 3 6V to 5 5V NOTES 1 All input signals are specified with 5ns 10 to 90 of Vpp and timed from a voltage level of Vi Vi 2 2 See Serial Write Operation timing diagram below 3 Maximum frequency is 30MHz at Vpp 3 6V to 5 5V 20MHz at Vpp 2 7V to 3 6V SERIAL WRITE OPERATION Wy TEXAS 4 INSTRUMENTS DAC7512 www ti com SBAS156B TYPICAL CHARACTERISTICS Vpp 5V At T4 25 C Vpp 5V unless otherwise noted
23. s as well as most Digital Signal Processors DSPs See the Serial Write Operation timing diagram for an example of a typical write sequence The write sequence begins by bringing the SYNC line LOW Data from the Dy line is clocked into the 16 bit shift register on the falling edge of SCLK The serial clock frequency can be as high as 30MHz making the DAC7512 compatible with high speed DSPs On the 16th falling edge of the serial clock the last data bit is clocked in and the programmed function is executed i e a change in DAC register contents and or a change in the mode of operation At this point the SYNC line may be kept LOW or brought HIGH In either case it must be brought HIGH for a minimum of 33ns before the next write sequence so that a falling edge of SYNC can initiate the next write sequence Since the SYNC buffer draws more current when the SYNC signal is HIGH than it does when it is LOW SYNC should be idled LOW between write sequences for lowest power operation of the part As mentioned above however it must be brought HIGH again just before the next write sequence INPUT SHIFT REGISTER The input shift register is 16 bits wide as shown in Figure 3 The first two bits are don t cares The next two bits PD1 and PDO are control bits that control which mode of opera tion the part is in normal mode or one of three power down modes There is a more complete description of the various modes in the Po
24. uctor FIGURE 7 DAC7512 to Microwire Interface DAC7512 TO 68HC11 INTERFACE Figure 8 shows a serial interface between the DAC7512 and the 68HC11 microcontroller SCK of the 68HC11 drives the SCLK of the DAC7512 while the MOSI output drives the serial data line of the DAC The SYNC signal is derived from a port line PC7 similar to what was done for the 8051 68HC11 1 75130 SYNC SCK MOSI NOTE 1 Additional pins omitted for clarity FIGURE 8 DAC7512 to 68HC11 Interface The 68HC11 should be configured so that its CPOL bit is a 0 and its CPHA bit is a 1 This configuration causes data appearing on the MOSI output is valid on the falling edge of SCK When data is being transmitted to the DAC the SYNC line is taken LOW PC7 Serial data from the 68HC11 is transmitted in 8 bit bytes with only eight falling clock edges occurring in the transmit cycle Data is transmitted MSB first In order to load data to the DAC7512 PC7 is left LOW after the first eight bits are transferred and a second serial write operation is performed to the DAC and PC7 is taken HIGH at the end of this procedure APPLICATIONS USING REF02 AS A POWER SUPPLY FOR THE DAC7512 Due to the extremely low supply current required by the DAC7512 an alternative option is to use a REF02 5V precision voltage reference to supply the required voltage to the part see Figure 9 This is especially useful if the power supply is too noisy or
25. ucts and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice
26. wer Down Modes section The next 12 bits are the data bits These are transferred to the DAC register on the 16th falling edge of SCLK SYNC INTERRUPT In a normal write sequence the SYNC line is kept LOW for at least 16 falling edges of SCLK and the DAC is updated on the 16th falling edge However if SYNC is brought HIGH before the 16th falling edge this acts as an interrupt to the DB15 write sequence The shift register is reset and the write sequence is seen as invalid Neither an update of the DAC register contents or a change in the operating mode occurs as shown in Figure 4 POWER ON RESET The DAC7512 contains a power on reset circuit that controls the output voltage during power up On power up the DAC register is filled with zeros and the output voltage is OV it remains there until a valid write sequence is made to the DAC This is useful in applications where it is important to know the state of the output of the DAC while it is in the process of powering up POWER DOWN MODES The DAC7512 contains four separate modes of operation These modes are programmable by setting two bits PD1 and PDO in the control register Table shows how the state of the bits corresponds to the mode of operation of the device Normal Operation Power Down Modes Output 1kO to GND Output 100kO to GND High Z TABLE Modes of Operation for the DAC7512 When both bits are set to 0 the part works normally with its normal p
Download Pdf Manuals
Related Search
TEXAS INSTRUMENTS DAC7512 Low Power Rail to Rail Output 12 Bit Serial Input DIGITAL TO ANALOG CONV