LINEAR TECHNOLOGY LT1956/LT1956-5 Manual
Contents
1. 2 2uF ceramic L11956 SHDN SYNC GND Vo D2 MMSD914TI OUTPUT 1766 F13 Figure 13 Buck Converter with Adjustable Soft Start current via the Vc pin to maintain a constant dv dt at the Output Output rise time is controlled by the current through Css defined by R4 and Q1 s Var Once the output is in regulation Q1 turns off and the circuit operates normally R3 is transient protection for the base of Q1 Hen Rise Time Using the values shown in Figure 10 47 103 15 10 9 5 0 7 Rise Time 5ms The ramp is linear and rise times in the order of 100ms are possible Since the circuit is voltage controlled the ramp rate is unaffected by load characteristics and maximum Output current is unchanged Variants of this circuit can be used for sequencing multiple regulator outputs DUAL POLARITY OUTPUT CONVERTER The circuit in Figure 14a generates both positive and negative 5V outputs with all components under 3mm height The topology for the 5V output is a standard buck converter The AN output uses a second inductor L2 diode D3 and output capacitor C6 The capacitor C4 1956f 23 LT1956 LT1956 5 APPLICATIONS INFORMATION D2 MMSD914TI Vin BOOST 9V TO 12V ransis Te C3 2 2uF 50V CERAMIC GND SUMIDA CDRH4D28 150 63V SEE FIGURE 14c FOR Voutt Vout2 CER LOAD CURRENT RELATIONSHIP tIF LOAD CAN GO TO ZERO AN OPTIONAL PRELOAD OF 500Q CAN BE D3 USED TO IMPROVE REGULATION B0540W2. Pinpuctor With the GN16 package Oja 85 C W at an ambient temperature of 70 C Tj 70 85 0 39 10 0 47 108 C With the TSSOP package Oja 45 C W at an ambient temperature of 70 C Ty 70 45 0 37 De 0 47 91 C Die temperature can peak for certain combinations of Vin Vout and load current While higher Viy gives greater switch AC losses quiescent and catch diode losses a lower Vin may generate greater losses due to switch DC losses In general the maximum and minimum Vu levels should be checked with maximum typical load current for calculation of the LT1956 die temperature If a more accurate die temperature is required a measurement of the SYNC pin resistance to GND can be used The SYNC pin resistance can be measured by forcing a voltage no greater than 0 5V at the pin and monitoring the pin current over temperature in a oven This should be done with minimal device power low Vum and no switching Vc OV in order to calibrate SYNC pin resistance with ambient oven temperature 1956f 19 LT1956 LT1956 5 APPLICATIONS INFORMATION Note Some of the internal power dissipation in the IC due to BOOST pin voltage can be transferred outside of the IC to reduce junction temperature by increasing the voltage drop in the path of the boost diode D2 see Figure 9 This reduction of junction temperature inside the IC will allow higher ambient temperature operation for a given se
3. The ground for these components should be separated from the switch current path Failure to do so will result in poor stability or subharmonic like oscillation CONNECT TO GROUND PLANE GND e FOR THE FE PACKAGE C1 SOLDER THE EXPOSED PAD TO THE COPPER GROUND PLANE UNDERNEATH THE DEVICE KELVIN SENSE oo Vout i KEEP FB AND Vc COMPONENTS e AWAY FROM HIGH FREQUENCY HIGH CURRENT COMPONENTS 1956 F06 Figure 6 Suggested Layout 1956f 1 7 LT1956 LT1956 5 APPLICATIONS INFORMATION Board layout also has a significant effect on thermal resis tance For the GN package Pins 1 8 9 and 16 GND are a continuous copper plate that runs under the LT 1956 die This is the best thermal path for heat out of the package Reducing the thermal resistance from Pins 1 8 9 and 16 onto the board will reduce die temperature and increase the power capability of the LT1956 This is achieved by providing as much copper area as possible around these pins Adding multiple solder filled feedthroughs under and around these four corner pins to the ground plane will also help Similar treatment to the catch diode and coil termi nations will reduce any additional heating effects For the FE package the exposed pad should be soldered to the copper ground plane underneath the device PARASITIC RESONANCE Resonance or ringing may sometimes be seen on the switch node see Figure 7 Very high frequency ringing following swi
4. i D LT1956 LT 1956 5 ECHNOLOGY High Voltage 1 5A 500kHz Step Down Switching Regulators FEATURES DESCRIPTION Wide Input Range 5 5V to 60V The LT 1956 LT1956 5 are 500kHz monolithic buck 1 5A Peak Switch Current switching regulators with an input voltage capability up to Small 16 Pin SSOP or Thermally Enhanced 60V A high efficiency 1 5A 0 20 switch is included on the TSSOP Package die along with all the necessary oscillator control and logic Saturating Switch Design 0 20 circuitry A current mode architecture provides fast tran Peak Switch Current Maintained Over sient response and good loop stability Full Duty Cycle Range Special design techniques and a new high voltage process EE achieve high efficiency over a wide input range Efficiency Shutdown Gees 25uA is maintained over a wide output current range by using the a 12V Feedback Reena LT1956 output to bias the circuitry and by utilizing a supply boost 3 eu Fixed Output LT1956 5 capacitor to saturate the power switch Patented circuitry Fasily S Sa maintains peak switch current over the full duty cycle a KH See range Ashutdown pin reduces supply currentto 25uA and ee CAR OUTE SINUNI the device can be externally synchronized from 580kHz to APPLICATIONS 700kHz with a logic level input The LT1956 LT1956 5 are available in fused lead 16 pin High Voltage Industrial and Automotive SSOP and thermally enhanced TSSOP packages a Po rtable Compute rS C
5. the external divider Thevinin resistance must be low enough to pull 115uA out of the FB pin with 0 44V on the pin Rpiv lt 3 8k The net result is that reductions in frequency and current limit are affected by output voltage divider imped ance Although divider impedance is not critical caution should be used if resistors are increased beyond the suggested values and short circuit conditions will occur 1956f 8 LI MVR LT1956 LT1956 5 APPLICATIONS INFORMATION LT1956 TO FREQUENCY SHIFTING ERROR AMPLIFIER OUTPUT 5V 1956 F02 Figure 2 Frequency and Current Limit Foldback with high input voltage High frequency pickup will in crease and the protection accorded by frequency and current foldback will decrease CHOOSING THE INDUCTOR For most applications the output inductor will fall into the range of 5uH to 30uH Lower values are chosen to reduce physical size of the inductor Higher values allow more output current because they reduce peak current seen by the LT1956 switch which has a 1 5A limit Higher values also reduce output ripple voltage When choosing an inductor you will need to consider Output ripple voltage maximum load current peak induc tor current and fault current in the inductor In addition other factors such as core and copper losses allowable component height EMI saturation and cost should also be considered The following procedure is suggested as a way of handling thes
6. 16 ThinSOT is a trademark of Linear Technology Corporation Linear Technology Corporation 1630 McCarthy Blvd Milpitas CA 95035 7417 408 432 1900 e FAX 408 434 0507 e wun near com 1956f LT TP 0303 2K PRINTED IN USA TECHNOLOGY LINEAR TECHNOLOGY CORPORATION 2001
7. 16 LEAD PLASTIC TSSOP 1956IFE en se 19561 Tumax 125 C Oja 45 C W Oe PAD 10 C W 1956EFE 5 Tymax 125 C Oja 85 C W Our PIN 8 25 C W 19565 ae ETOGROUND PLANE 1956IFE 5 ege a 195615 Consult LTC Marketing for parts specified with wider operating temperature ranges ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range otherwise specifications are at Ty 25 C Vin 15V Ve 1 5V SHDN 1V Boost o c SW o c unless otherwise noted PARAMETER CONDITIONS MIN TYP MAX UNITS Reference Voltage LT1956 5 5V lt Vin lt 60V 1 204 1 219 1 234 VoL 0 2 lt Ve lt Voy 0 2 1 195 1 243 SENSE Voltage LT1956 5 5 5V lt Vin lt 60V 4 94 5 5 06 Vo 0 2 lt Ve lt Voy 0 2 4 90 5 10 SENSE Pin Resistance LT1956 5 9 5 13 8 19 kO FB Input Bias Current LT1956 e 0 5 1 5 uA Error Amp Voltage Gain Notes 2 9 200 400 VV Error Amp Gm dl Vc 10uA Note 9 1500 2000 3000 uMho 1000 3200 uMho Vo to Switch gm 1 7 AN EA Source Current FB 1V or Vsense 4 1V e 125 225 400 uA EA Sink Current FB 1 4V or Vsense 5 7V o 100 225 450 uA Vc Switching Threshold Duty Cycle 0 0 9 Ve High Clamp SHDN 1V 2 1 2 LT1956 LT1956 5 ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range otherwise specifications
8. 1956 F14a Figure 14a Dual Polarity Output Converter 500 5 30 100 T 450 5 25 90 Von LOAD CURRENT E 5 20 A Vourt LOAD CURRENT 750A 400 i 750mA 80 wi 5 15 i Vout LOAD ese ES Vourt LOAD CURRENT rae acca Sere Z 300 g 500MA e Q 5 05 l ES S 250 Vom LOAD CURRENT Z 50 200 go C 250MA 5 A Cla e 150 4 90 30 100 4 85 20 50 4 80 10 0 475 titi ttt 0 0 200 400 600 800 0 100 200 300 400 500 600 0 100 200 300 400 500 Vom LOAD CURRENT mA Vout2 LOAD CURRENT mA Vout2 LOAD CURRENT mA 1956 F15b 1956 Fide 1956 F14d Figure 14b Voyt2 5V Maximum Figure 14c Vout 5V Output Figure 14d Dual Polarity Output Allowable Load Current vs Von Voltage vs Load Current Converter Efficiency 5V Load Current couples energy to L2 and ensures equal voltages across transformer becomes available to provide a better height L2 and L1 during steady state Instead of using a trans cost solution refer to the dual output SEPIC circuit de former for L1 and L2 uncoupled inductors were used scription in Design Note 100 for correct transformer because they require less heightthanasingletransformer connection can be placed separately in the circuit layout for optimized During switch on time in steady state the volt
9. DIMENSIONS DO NOT INCLUDE MOLD FLASH MOLD FLASH SHALL NOT EXCEED 0 150mm 006 PER SIDE 1956f Information furnished by Linear Technology Corporation is believed to be accurate and reliable However no responsibility is assumed for its use Linear Technology Corporation makes no represen tation thatthe interconnection of its circuits as described herein will not infringe on existing patent rights 2 LT1956 LT1956 5 PACKAGE DESCRIPTION GN Package 16 Lead Plastic SSOP Narrow 150 Inch Reference LTC DWG 05 08 1641 045 005 189 196 KEE Ge SH 0 229 fz 15 14 13 12 11 109 REF 254 MIN 150 165 229 244 150 157 6 817 6 198 3 810 3 988 0165 0015 gt Le gt f 0250 TYP RECOMMENDED SOLDER PAD LAYOUT H 12345678 el Le SH gro 053 068 004 0098 0 38 0 10 1 351 1 727 0 102 0 249 007 0098 0 8 TYP Fa _ 016 050 7 mem E n p oso 0 406 1 270 0 203 0 305 0 635 NOTE BSC 1 CONTROLLING DIMENSION INCHES INCHES 2 DIMENSIONS ARE IN aa IMETERS 3 DRAWING NOT TO SCALE ausernee D
10. are increased above the suggested values _ R2 Vour 1 22 d 1 22 Table 1 OUTPUT R1 ERROR AT OUTPUT VOLTAGE R2 NEAREST 1 DUE TO DISCRETE 1 V kQ kQ RESISTOR STEPS 3 4 99 7 32 0 32 3 3 4 99 8 45 0 43 5 4 99 15 4 0 30 6 4 75 18 7 0 38 8 4 47 24 9 0 20 10 4 32 30 9 0 54 12 4 12 36 5 0 24 15 4 12 46 4 0 27 More Than Just Voltage Feedback The feedback pin is used for more than just output voltage sensing It also reduces switching frequency and current limit when output voltage is very low see the Frequency Foldback graph in Typical Performance Characteristics This is done to control power dissipation in both the IC and in the external diode and inductor during short circuit conditions A shorted output requires the switching regu lator to operate at very low duty cycles and the average current through the diode and inductor is equal to the short circuit current limit of the switch typically 2A for the LT1956 folding back to less than 1A Minimum switch on time limitations would prevent the switcher from attaining a sufficiently low duty cycle if switching frequency were maintained at 500kHz so frequency is reduced by about 5 1 when the feedback pin voltage drops below 0 8V see Frequency Foldback graph This does not affect operation with normal load conditions one simply sees a shift in switching frequency during start up as the output voltage rises In ad
11. are at Ty 25 C Vin 15V Ve 1 5V SHDN 1V Boost o c SW o c unless otherwise noted PARAMETER CONDITIONS MIN TYP MAX UNITS Switch Current Limit Vc Open Boost Viy 5V FB 1V or Vsense 4 1V 1 5 2 3 A Switch On Resistance Isy 1 5A Boost Vin 5V Note 7 0 2 0 3 Q 0 4 Q Maximum Switch Duty Cycle FB 1V or Vsense 4 1V 82 90 e 75 90 Switch Frequency Ve Set to Give DC 50 460 500 540 kHz e 430 570 kHz fsw Line Regulation 5 5V lt Vin lt 60V e 0 05 0 15 DN fsw Shifting Threshold Df 10kHz 0 8 V Minimum Input Voltage Note 3 o 4 6 5 5 V Minimum Boost Voltage Note 4 Low lt 1 5A e 2 3 V Boost Current Note 5 Boost Vum 5V Isw 0 5A e 12 25 mA Boost Viy 5V Isw 1 5A CY 42 70 mA Input Supply Current ly Note 6 Vous 5V 1 4 2 2 mA Output Supply Current Igias Note 6 Vous 5V 2 9 4 2 mA Shutdown Supply Current SHDN OV Vin lt 60V SW OV Vc Open 25 75 uA 200 uA Lockout Threshold Ve Open e 2 30 2 42 2 53 V Shutdown Thresholds Vc Open Shutting Down J 0 15 0 37 0 6 V Vc Open Starting Up e 0 25 0 45 0 6 V Minimum SYNC Amplitude e 1 5 2 2 V SYNC Frequency Range 580 700 kHz SYNC Input Resistance 20 kQ Note 1 Absolute Maximum Ratings are those values beyond which the life of a device may be impaired Note 2 Gain is measured with a Vc swing equal to 200mV above the low clamp level to 200mV below the upper
12. clamp level Note 3 Minimum input voltage is not measured directly but is guaranteed by other tests It is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator remain constant Actual minimum input voltage to maintain a regulated output will depend upon output voltage and load current See Applications Information Note 4 This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch Note 5 Boost current is the current flowing into the BOOST pin with the pin held 5V above input voltage It flows only during switch on time Note 6 Input supply current is the quiescent current drawn by the input pin when the BIAS pin is held at 5V with switching disabled Bias supply current is the current drawn by the BIAS pin when the BIAS pin is held at 5V Total input referred supply current is calculated by summing input supply current wm with a fraction of supply current ous bro Ivin IBias Vour Vin with Vin 15V Vout 5V lyin 1 4mA Ipias 2 9MA IToTAL 2 4mA Note 7 Switch on resistance is calculated by dividing Vu to SW voltage by the forced current 1 5A See Typical Performance Characteristics for the graph of switch voltage at other currents Note 8 The LT1956EFE LT1956EFE 5 LT1956EGN LT1956EGN 5 are guaranteed to meet performance specifications from 0 C to 125 C junction temperature Specifications over
13. input voltage e R inductor le R voltage drop H this condition is not observed the current will not be limited at lpg but will cycle by cycle ratchet up to some higher value Using the nominal LT1956 clock frequency of 500KHz a Vu of 12V and a Ve l R of say 0 7V the maximum toy to maintain control would be approximately 116ns an unacceptably short time The solution to this dilemma is to slow down the oscillator when the FB pin voltage is abnormally low thereby indicat ing some sort of short circuit condition Oscillator fre quency is unaffected until FB voltage drops to about 2 3 of its normal value Below this point the oscillator frequency decreases roughly linearly downto a limit of about 1 00kHz This lower oscillator frequency during short circuit condi tions can then maintain control with the effective mini mum on time Even with frequency foldback however the LT1956 will not survive a permanent output short at the absolute maximum voltage rating of Vu 60V this is defined solely by internal semiconductor junction break down effects For the maximum input voltage allowed during an output short to ground the previous equation defining minimum on time can be used Assuming Vp D1 catch diode 0 63V at 1A short circuit current is folded back to typical switch current limit e 0 5 inductor e DCR 1A e 0 128 0 128V L CDRH6D28 22 typical f 100kHz folded back and typical minimum on time 300ns
14. input voltage allowing switch to be saturated This boosted voltage is generated with an external capaci tor and diode Two comparators are connected to the shutdown pin One has a 2 38V threshold for undervoltage lockout and the second has a0 4V threshold for complete shutdown Qi POWER SWITCH S Rs DRIVER FLIP FLOP CIRCUITRY R 2 sw FREQUENCY FOLDBACK a2 FOLDBACK CURRENT LIMIT ERROR CLAMP AMPLIFIER Om 2000uMho FB 1 22V GND Jean Figure 1 LT1956 Block Diagram LT1956 LT 1956 5 APPLICATIONS INFORMATION FEEDBACK PIN FUNCTIONS The feedback FB pin on the LT1956 is used to set output voltage and provide several overload protection features The first part of this section deals with selecting resistors to set output voltage and the remaining part talks about foldback frequency and current limiting created by the FB pin Please read both parts before committing to a final design The 5V fixed output voltage part LT1956 5 has internal divider resistors andthe FB pin is renamed SENSE connected directly to the output The suggested value for the output divider resistor see Figure 2 from FB to ground R2 is 5k or less and a formula for R1 is shown below The output voltage error caused by ignoring the input bias current on the FB pin is less than 0 25 with R2 5k A table of standard 1 values is shown in Table 1 for common output voltages Please read the following section if divider resistors
15. see Figure 8 Switch and diode capacitance resonate with the inductor to form damped ringing at 1MHz to 10 MHZ This ringing is not harmful to the regulator and it has not been shown to contribute significantly to EMI Any attempt to damp it with a resistive snubber will degrade efficiency THERMAL CALCULATIONS Power dissipation in the LT1956 chip comes from four sources switch DC loss switch AC loss boost circuit current and input quiescent current The following formu las show how to calculate each of these losses These formulas assume continuous mode operation so they should not be used for calculating efficiency at light load currents Switch loss 2 Pow zclat ai ter 1 2 lour Vin f SWITCH NODE tov DV VOLTAGE 4 Al i INDUCTOR EIDA Da N CURRENT AT M KC Ms lout 0 1A wu SETT Ms Vin 25V Vout 5V L 15uH 500ns DIV 1956 F08 Figure 8 Discontinuous Mode Ringing 18 LT1956 LT1956 5 APPLICATIONS INFORMATION Boost current loss Vout lour 36 VIN Quiescent current loss Po Vin 0 001 5 Vout 0 003 Rew switch resistance 0 3 hot tere effective switch current voltage overlap time tp ty ty tip tr Viy 1 2 ns te Viy 1 7 ns tir tif Ioy7 0 05 ns f switch frequency Example with Viy 12V Vom 5V and lour 1A PBoosT Psw exo 57 10 9 1 2 1 12 600 103 0 125 0 171 0 296W 2 ee RUE ui 38
16. should be connected to ground 1956f 16 LT1956 LT1956 5 APPLICATIONS INFORMATION LAYOUT CONSIDERATIONS As with all high frequency switchers when considering layout care must be taken in order to achieve optimal electrical thermal and noise performance For maximum efficiency switch rise and fall times are typically in the nanosecond range To prevent noise both radiated and conducted the high speed switching current path shown in Figure 5 must be kept as short as possible This is implemented in the suggested layout of Figure 6 Shorten ing this path will also reduce the parasitic trace inductance of approximately 25nH inch At switch off this parasitic inductance produces a flyback spike across the LT1956 switch When operating at higher currents and input voltages with poor layout this spike can generate volt ages across the LT1956 that may exceed its absolute maximum rating A ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise MINIMIZE LT1956 C3 D1 LOOP op e VIN E Deep BOOST Vc BIAS Vin GND GND PLACE FEEDTHROUGH AROUND GROUND PINS 4 CORNERS FOR GOOD THERMAL CONDUCTIVITY ed i L1 FREQUENCY CIRCULATING PATH 1956 FOS Figure 5 High Speed Switching Path The Ve and FB components should be kept as far away as possible from the switch and boost nodes The LT1956 pinout has been designed to aid in this
17. signal It is directly logic compatible and can be driven with any signal between 10 and 90 duty cycle The synchronizing range is equal to initial operating frequency up to 700kHz See Synchronizing in Applications Information for details If unused this pin should be tied to ground SHDN Pin 15 The SHDN pin is used to turn off the regulator and to reduce input current to a few microam peres This pin has two thresholds one at 2 38V to disable switching and a second at 0 4V to force complete mi cropower shutdown The 2 38V threshold functions as an accurate undervoltage lockout UVLO sometimes used to prevent the regulator from delivering power until the input voltage has reached a predetermined level If the SHDN pin functions are not required the pin can either be left open to allow an internal bias current to lift the pin to a default high state or be forced high to a level not to exceed 6V 6 LT1956 LT 1956 5 BLOCK DIAGRAM The LT1956 is a constant frequency current mode buck converter This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch In addition to the normal error amplifier there is a current sense amplifier that monitors switch current on a cycle by cycle basis A switch cycle starts with an oscilla tor pulse which sets the Rs flip flop to turn the switch on When switch current reaches a level set by the inverting input of the comparator
18. the selection of the inductor value 1956f 9 LT1956 LT1956 5 APPLICATIONS INFORMATION Peak to peak output ripple voltage is the sum of a triwave created by peak to peak ripple current l p p times ESR and a square wave created by parasitic inductance ESL and ripple current slew rate Capacitive reactance is assumed to be small compared to ESR or ESL dl VRIPPLE Ip p ESR ESL dt where ESR equivalent series resistance of the output capacitor ESL equivalent series inductance of the output capacitor dl dt slew rate of inductor ripple current Viy L Peak to peak ripple current up e through the inductor and into the output capacitor is typically chosen to be between 20 and 40 of the maximum load current It is approximated by Vout Vin Vout MIMI Example with Viy 12V Vour 5V L 15uH ESR 0 080Q and ESL 10nH output ripple voltage can be approximated as follows ILp p 5 12 5 ips 0 389A PP 12 15 10 500 10 d 12 GE ID e 8 dt 1510 6 Veippte 0 389 0 08 10 10 9 10 0 8 0 0314 0 008 39mVp _p To reduce output ripple voltage further requires an in crease in the inductor value with the trade off being a physically larger inductor with the possibility of increased component height and cost Ceramic Output Capacitor An alternative way to further reduce output ripple voltage is to reduce the ESR of the output capaci
19. 5 387k Bu 116k SYNCHRONIZING The SYNC input must pass from a logic level low through the maximum synchronization threshold with a duty cycle between 10 and 90 The input can be driven directly from a logic level output The synchronizing range is equal to initial operating frequency up to 700kHz This means that minimum practical sync frequency is equal to the worst case high self oscillating frequency 570kHz not the typical operating frequency of 500kHz Caution should be used when synchronizing above 662kHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced This type of subharmonic switching only occurs at input voltages less than twice output voltage Higher inductor values will tend to eliminate this problem See Frequency Compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensa tion Application Note 19 has more details on the theory of slope compensation At power up when Vc is being clamped by the FB pin see Figure 2 Q2 the sync function is disabled This allows the frequency foldback to operate in the shorted output con dition During normal operation switching frequency is controlled by the internal oscillator until the FB pin reaches 0 8V after which the SYNC pin becomes operational If no synchronization is required this pin
20. CURRENT Maximum load current for a buck converter is limited by the maximum switch current rating Ip The current rating for the LT1956 is 1 5A Unlike most current mode convert ers the LT1956 maximum switch current limit does not fall off at high duty cycles Most current mode converters suffer a drop off of peak switch current for duty cycles above 50 This is due to the effects of slope compensa tion required to prevent subharmonic oscillations in cur rent mode converters For detailed analysis see Applica tion Note 19 The LT1956 is able to maintain peak switch current limit over the full duty cycle range by using patented circuitry to cancel the effects of slope compensation on peak switch current without affecting the frequency compensation it provides Maximum load current would be equal to maximum switch current for an infinitely large inductor but with finite inductor size maximum load current is reduced by one half of peak to peak inductor current l p p The following formula assumes continuous mode operation implying that the term on the right is less than one half of Ip lout max Continuous Mode Vout VF Wu Vout Ve EIN For Vout 5V VIN MAX 8V VFD 0 63V f 500kHz and L 10uH lp p LP P 5 0 63 8 5 0 63 2 8 500 103 1010 5 1 5 0 17 1 33A Note that there is less load current available at the higher input voltage because inductor ripple current increas
21. HUTDOWN T z 15 CURRENT DROPS TO A FEW pA TYPICAL 5 e 3 gt oO oO a E Z S 10 Z Z 100 a x ao a Ze Ge GUARANTEED MINIMUM S ER i oO i SS 05 AT 2 38V STANDBY THRESHOLD a CURRENT FLOWS OUT OF PIN 6 L 1 0 0 0 0 20 40 60 80 100 50 25 0 2 50 75 100 125 50 25 0 25 50 75 100 125 DUTY CYCLE JUNCTION TEMPERATURE C JUNCTION TEMPERATURE C 1956 G01 1956 G02 1956 G03 Lockout and Shutdown Thresholds Shutdown Supply Current Shutdown Supply Current 40 r 300 2 4 ven 0V 7 LOCKOUT 35 250 s 30 Vin 60V o 16 D amp 200 oc 5 5 Vin 15V S12 S 20 S 150 z amp 45 a a 08 wn o 100 START UP z z 0 4 S 50 SHUTDOWN 0 o A E E E S 0 50 25 0 25 50 75 100 125 0 10 20 30 40 50 60 0 0 1 0 2 0 3 04 0 5 JUNCTION TEMPERATURE C INPUT VOLTAGE V SHUTDOWN VOLTAGE V 1956 G04 1956 G05 1956 G06 Error Amplifier Transconductance Error Amplifier Transconductance Frequency Foldback 2500 3000 200 625 SWITCHING a FREQUENCY 2000 2500 150 500 S gt z SZ 2 1500 g 2000 100 5E 375 aoe S e Es S 1500 Rout moo 2 1000 amp 1900 F Veg 2 108 Se 50 6 Zan 250 3 E E 500 te 0 ZS 15 5 FB PIN Sun Ge CURRENT Ia 25 0 2 50 75 100 125 100 1k 10k 100k 1M 10M i 0 02 04 06 08 10 12 JUNCTION TEMPERATURE FREQUENCY Hz Vre V 1956 G08 1956 G07 1956 G09 LT1956 LT1956 5 TYPICAL PERFORMANCE CHARACTERISTICS FREQUENCY kHz THRESHOLD VOLTAGE V Switchi
22. IMENSION DOES NOT INCLUDE MOLD FLASH MOLD FLASH SHALL NOT EXCEED 0 006 0 152mm PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH INTERLEAD FLASH SHALL NOT EXCEED 0 010 0 254mm PER SIDE PART NUMBER DESCRIPTION COMMENTS LT1074 LT1076 Step Down Switching Regulators Up to 64V Input 100kHz 5A and 2A LT1076HV LT1082 1A High Voltage Efficiency Switching Voltage Regulator Up to 75V Input 60kHz Operation LT1370 High Efficiency DC DC Converter Up to 42V 6A 500kHz Switch LT1371 High Efficiency DC DC Converter Up to 35V 3A 500kHz Switch LT1375 LT1376 1 5A 500kHz Step Down Switching Regulators Operation Up to 25V Input Synchronizable LT1375 N8 S8 S16 LT1616 600mA 1 4MHz Step Down Switching Regulator 3 6V to 25V Viy 6 Lead ThinSOT LT1676 Wide Input Range High Efficiency Step Down Switching Regulator 7 4V to 60V Vu 100kHz Operation 700mA Internal Switch S8 LT1765 Monolithic 3A 1 25MHz Step Down Regulator Vin 3V to 25V Ver 1 2V S8 TSSOP 16E Exposed Pad LT1766 Wide Input Range High Efficiency Step Down Switching Regulator 5 5V to 60V Input 200kHz Operation 1 5A Internal Switch TSSOP 16E LT1767 Monolithic 1 5A 1 25MHz Step Down Regulator Vin 3V to 25V Ver 1 2V MS8 LT1776 Wide Input Range High Efficiency Step Down Switching Regulator Up to 7 4V to 60V 200kHz Operation 700mA Internal Switch TSSOP 16E LT1777 Low Noise Buck Regulator Operation Up to 48V Controlled Voltage and Current Slew Rates
23. In systems with a primary and backup supply for ex ample a battery powered device with a wall adapter input the output of the LT1956 can be held up by the backup supply with the LT1956 input disconnected In this condi tion the SW pin will source current into the Viy pin If the SHDN pin is held at ground only the shut down current of 25pA will be pulled via the SW pin from the second supply With the SHDN pin floating the LT1956 will consume its quiescent operating current of 1 5mA The Viy pin will also source current to any other components connected to the input line If this load is greater than 10mA or the input could be shorted to ground a series Schottky diode must be added as shown in Figure 12 With these safeguards the output can be held at voltages up to the Viy absolute maximum rating BUCK CONVERTER WITH ADJUSTABLE SOFT START Large capacitive loads or high input voltages can cause high input currents at start up Figure 13 shows a circuit that limits the dv dt of the output at start up controlling the capacitor charge rate The buck converter is a typical configuration with the addition of R3 R4 Css and Q1 As the output starts to rise Q1 turns on regulating switch 22 LT1956 LT1956 5 APPLICATIONS INFORMATION D3 10MQO60N REMOVABLE INPUT Vin T1956 MMSD914TI ALTERNATE SUPPLY 1956 F12 Figure 12 Dual Source Supply with 254A Reverse Leakage BOOST BIAS INPUT VIN SW 12V c3
24. LP025060B 682 6 8 1 3 0 165 1 65 Sumida CDRH4D28 4R7 47 1 32 0 072 3 0 CDRH5D28 100 10 1 30 0 065 3 0 CDRH6D28 150 15 1 40 0 084 3 0 CDRH6D28 180 18 1 32 0 095 3 0 CDRH6D28 220 22 1 20 0 128 3 0 CDRH6D38 220 22 1 30 0 096 40 10 LT1956 LT1956 5 APPLICATIONS INFORMATION iron cores are forgiving because they saturate softly whereas ferrite cores saturate abruptly Other core mate rials fall somewhere in between The following formula assumes continuous mode of operation but errs only Slightly on the high side for discontinuous mode so it can be used for all conditions Mout Min Your DeYyetoL Les Ipeak lout lo EMI Decide if the design can tolerate an open core geometry like a rod or barrel which have high magnetic field radiation or whether it needs a closed core like a toroid to prevent EMI problems This is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem Additional Considerations After making an initial choice consider additional factors such as core losses and second sourcing etc Use the experts in Linear Technology s Applications department if you feel uncertain about the final choice They have experience with a wide range of inductor types and can tell you about the latest developments in low profile surface mounting etc MAXIMUM OUTPUT LOAD
25. T LTC and LT are registered trademarks of Linear Technology Corporation m Battery Powered Systems US PATENT NO 6 498 466 m Battery Chargers m Distributed Power Systems TYPICAL APPLICATION 5V Buck Converter Efficiency vs Load Current MMSD914Tl 100 Vin 12V L 18uH TRANSIENTS TO 60V 6 3V E ceramic EFFICIENCY 0 025 050 075 100 1 25 LOAD CURRENT A 1956 TA02 4700pF TUNITED CHEMI CON THCS50EZA225ZT 1956 TA01 LT1956 LT1956 5 ABSOLUTE MAXIMUM RATINGS wes 1 Input Voltage VIN secre eee 60V Operating Junction Temperature Range BOOST Pin Above SW n se 35V LT1956EFE LT1956EFE 5 LT1956EGN LT1956EGN 5 BOOST Pin VONAGE ccssecscomnccrcucievitiantvinsadslentnas 68V Notes AL E 40 C to 125 C SYNC SENSE Voltage LT1956 5 0 0 0 00 7V LT1956IFE LT19561FE 5 LT1956IGN LT1956IGN 5 ele el 6V Notes 8 10 oeiee 40 C to 125 C BIAS Pin Voltage cascccsccceieanssesscatsnnscedcediicdenrdscebebignss 30V Storage Temperature Range 65 C to 150 C FB Pin Voltage Current T9np 3 5V 2mA Lead Temperature Soldering 10 eer 300 C PACKAGE ORDER INFORMATION TOP VIEW ORDER PART TOP VIEW ORDER PART GND GND NUMBER GND NUMBER sw SHDN SHDN NC l SYNC LT1 956EFE SYNC LT1 956EGN LT1956EFE 5 F NC l FB SENSE FB SENSE w e LT19561FE 5 LT19561GN 5 eee Sos FE PART MARKING BIAS GN PART MARKING GND GND GND 1956EFE 1956
26. _ 0 osew Pg 12 0 0015 5 0 003 0 033W Total power dissipation in the IC is given by Prot Psw Peoost Pa 0 296W 0 058W 0 033W 0 39W Thermal resistance for the LT1956 packages is influenced by the presence of internal or backside planes SSOP GN16 Package With a full plane under the GN16 package thermal resistance will be about 85 C W TSSOP Exposed Pad Package With a full plane under the TSSOP package thermal resistance Oja will be about 45 C To calculate die temperature use the proper thermal resistance 6 ja number for the desired package an add in worst case ambient temperature Ty Ta 84a Prot When estimating ambient remember the nearby catch diode and inductor will also be dissipating power Ve Vin Vout Loan Vin Ve Forward voltage of diode assume 0 63V at 1A 0 63 12 5 1 12 Notice that the catch diode s forward voltage contributes a significant loss in the overall system efficiency A larger low Ve diode can improve efficiency by several percent PDIODE 0 37W PDIODE Pinpuctor Loap Locr Lpcr inductor DC resistance assume 0 1 Pinpuctor 1 0 1 0 1W Typical thermal resistance of the board is 10 C W Taking the catch diode and inductor power dissipation into ac count and using the example calculations for LT1956 dis sipation the LT1956 die temperature will be estimated as Ty Ta Oya Prot 10 e Poiope
27. age With a tantalum output capacitor the LT1956 already includes a resistor Rc and filter capacitor Cr at the Ve pin see Figures 10 and 11 to compensate the loop over the entire Vum range to allow for stable pulse skipping for high Vjy to Voyrt ratios gt 4 A ceramic output capacitor can still be used with a simple adjustment to the resistor Rc for stable operation see Ceramic Capacitors section for stabilizing LT1956 If additional phase margin is required a capacitor Cfg can be inserted between the Output and FB pin but care must be taken for high output voltage applications Sudden shorts to the output can create unacceptably large negative transients on the FB pin For Viy to Voyrt ratios lt 4 higher loop bandwidths are possible by readjusting the frequency compensation com ponents at the Vc pin When checking loop stability the circuit should be oper ated over the application s full voltage current and tem perature range Proper loop compensation may be obtained by empirical methods as described in Application Notes 19 and 76 OUTPUT TANTALUM CERAMIC 80 60 150 GAIN 40 120 d v g z ea i 20 90 T e a S PHASE B 0 60 l Ci ZA T 20 30 40 0 10 100 1k 10k 100k 1M FREQUENCY Hz 1956 F11 Vin 12V Ro 2 2k Vout 5V Cc 22nF ILoap 500mA Cr 220pF Cour 100uF 10V 0 1 Figure 11 Overall Loop Response CONVERTER WITH BACKUP OUTPUT REGULATOR
28. age across Space savings and reduce overall cost This is true even both L1 and L2 is positive and equal with energy and when the uncoupled inductors are sized twice the value of current ramping up in each inductor The current in L2 is inductance of the transformer in order to keep ripple provided by the coupling capacitor C4 During switch off current comparable to the transformer solution If asingle time current ramps downward in each inductor The 1956f 24 LS UR LT1956 LT 1956 5 APPLICATIONS INFORMATION currentin L2 and C4 flows via the catch diode D3 charging the negative output capacitor C6 If the negative output is not loaded enough it can go severely unregulated be come more negative Figure 14b shows the maximum allowable 5V output load current vs load current on the 5V output that will maintain the 5V output within 3 tolerance Figure 14c shows the 5V output voltage regu lation vs its own load current when plotted for three separate load currents on the 5V output The efficiency of the dual output converter circuit shown in Figure 14a is given in Figure 14d POSITIVE TO NEGATIVE CONVERTER The circuit in Figure 15 is a positive to negative topology using a grounded inductor It differs from the standard approach in the way the IC chip derives its feedback signal because the LT1956 accepts only positive feedback sig nals The ground pin must be tied to the regulated negative Output A resistor d
29. dition to lower switching frequency the LT1956 also operates at lower switch current limit when the feedback pin voltage drops below 0 6V Q2 in Figure 2 performs this function by clamping the Vc pin to a voltage less than its normal 2 1V upper clamp level This foldback current limit greatly reduces power dissipation in the IC diode and in ductor during short circuit conditions External synchro nization is also disabled to prevent interference with fold back operation Again it is nearly transparent to the user under normal load conditions The only loads that may be affected are current source loads which maintain full load current with output voltage less than 50 of final value In these rare situations the feedback pin can be clamped above 0 6V with an external diode to defeat foldback current limit Caution clamping the feedback pin means that frequency shifting will also be defeated so a combination of high in put voltage and dead shorted output may cause the LT1956 to lose control of current limit The internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low The equivalent circuitry is shown in Figure 2 Q1 is completely off during normal operation If the FB pin falls below 0 8V Q1 begins to conduct current and reduces frequency at the rate of approximately 3 5kHz uA To ensure adequate frequency foldback under worst case short circuit conditions
30. e by 2 for high surge applications CATCH DIODE Highest efficiency operation requires the use of a Schottky type diode DC switching losses are minimized due to its low forward voltage drop and AC behavior is benign due to its lack of a significant reverse recovery time Schottky diodes are generally available with reverse voltage ratings of up to 60V and even 100V and are price competitive with other types The use of so called ultrafast recovery diodes is gener ally not recommended When operating in continuous mode the reverse recovery time exhibited by ultrafast diodes will result in a slingshot type effect The power 1956f 14 LT1956 LT1956 5 APPLICATIONS INFORMATION internal switch will ramp up Vu current into the diode in an attempt to get it to recover Then when the diode has finally turned off some tens of nanoseconds later the Vsw node voltage ramps up at an extremely high dV dt per haps 5 to even 10V ns With real world lead inductances the Vsw node can easily overshoot the Vu rail This can result in poor RFI behavior and if the overshoot is severe enough damage the IC itself The suggested catch diode D1 is an International Recti fier 1OMQO60N Schottky It is rated at 1 5A average forward current and 60V reverse voltage Typical forward voltage is 0 63V at 1A The diode conducts current only during switch off time Peak reverse voltage is equal to regulator input voltage Average for
31. e current is equal to load current Peak diode current will be considerably higher Peak diode current Continuous Mode bes Vin Vout Vin Vour Vin 2 L f Min Vout Zou Vout L f Keep in mind that during start up and output overloads average diode current may be much higher than with normal loads Care should be used if diodes rated less than 1A are used especially if continuous overload conditions must be tolerated Discontinuous Mode 20 LT1956 LT1956 5 PACKAGE DESCRIPTION FE Package 16 Lead Plastic TSSOP 4 4mm Reference LTC DWG 05 08 1663 Exposed Pad Variation BB D 6 60 0 10 A 2 94 4 50 0 10 116 SEE NOTE 4 0 45 0 05 EN H OOOOO OOD gt e a RECOMMENDED SOLDER PAD LAYOUT 4 30 4 50 169 17 0 45 0 75 i L 4 90 5 10 193 201 16 1514 13 12 1110 9 123 45 67 8 0 09 0 20 _0 09 0 20 _ 018 030 0036 0079 1 10 0433 MAX mu Essai 0 65 f 0256 7 d 0 05 0 15 BSC 002 006 0 195 0 30 gt gt lt FE16 BB TSSOP 0203 NOTE 1 CONTROLLING DIMENSION MILLIMETERS MILLIMETERS 2 DIMENSIONS ARE IN FINCHES 3 DRAWING NOT TO SCALE 0077 0118 4 RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT
32. e somewhat complicated and con flicting requirements Output Ripple Voltage Figure 3 shows a comparison of output ripple voltage for the LT1956 using either a tantalum or ceramic output capacitor It can be seen from Figure 3 that output ripple voltage can be significantly reduced by using the ceramic output capacitor the significant decrease in output ripple voltage is due to the very low ESR of ceramic capacitors Vout USING voiy 22uF CERAMIC 4 OUTPUT CAPACITOR 10mV DIV A Vout USING Wo A TW E 100uF 0 08 4 TANTALUM OUTPUT Y CAPACITOR 10mV DIV E Vin 12V 1us DIV 1956 F03 Vout 5V L 15uH Figure 3 LT1956 Output Ripple Voltage Waveforms Ceramic vs Tantalum Output Capacitors Output ripple voltage is determined by ripple current lp pl through the inductor and the high frequency impedance of the output capacitor At high frequencies the impedance of the tantalum capacitor is dominated by its effective series resistance ESR Tantalum Output Capacitor The typical method for reducing output ripple voltage when using a tantalum output capacitor is to increase the inductor value to reduce the ripple current in the induc tor The following equations will help in choosing the required inductor value to achieve a desirable output ripple voltage level If output ripple voltage is of less importance the subsequent suggestions in Peak Inductor and Fault Current and EMI will additionally help in
33. es At Vin 15V and using the same set of conditions louT maX 1 5 5 0 63 15 5 0 63 2 15 500 108 10 10 8 1 5 0 35 1 15A To calculate peak switch current with a given set of conditions use louT MaAX 1 5 pr SW PEAK lout re Vout VF Wu Mom Ve 2 Min UL Reduced Inductor Value and Discontinuous Mode lour If the smallest inductor value is of the most importance to a converter design in order to reduce inductor size cost discontinuous mode may yield the smallest inductor 1956f 11 LT1956 LT1956 5 APPLICATIONS INFORMATION solution The maximum output load current in discontinu ous mode however must be calculated and is defined later in this section Discontinuous mode is entered when the output load current is less than one half of the inductor ripple current IL p p In this mode inductor current falls to zero before the next switch turn on see Figure 8 Buck converters will be in discontinuous mode for output load current given by Jor Discontinous Mode lt Vout W Vin Vout Ve 2 Vin f L The inductor value in a buck converter is usually chosen large enough to keep inductor ripple current pp low this is done to minimize output ripple voltage and maxi mize output load current In the case of large inductor values aS seen in the equation above discontinuous mode will be associated with light loads When choosing
34. etailed theoretical basis for estimating internal power dissipation is given in the Thermal Calculations section This willallowa first pass check of whether an application s maximum input voltage requirement is suitable for the LT1956 Be aware that these calculations are for DC input voltages and that input voltage transients as high as 60V are possible if the resulting increase in internal power dissipation is of insufficient time duration to raise die temperature significantly For the FE package this means high voltage transients on the order of hundreds of milli seconds are possible If LT1956 FE package thermal calculations show power dissipation is not suitable for the given application the LT1766 FE package is a recom mended alternative since it is identical to the LT1956 but runs cooler at 200kHz Switch minimum on time is the other factor that may limit the maximum operational input voltage for the LT1956 if pulse skipping behavior is not allowed For the LT1956 pulse skipping may occur for Vjy Vour Vp ratios gt 4 Ve Schottky diode D1 forward voltage drop Figure 5 If the LT1766 is used the ratio increases to 10 Pulse skipping is the regulator s way of missing switch pulses to maintain output voltage regulation Although an increase in output ripple voltage can occur during pulse skipping a ceramic output capacitor can be used to keep ripple voltage to a minimum see output ripple voltage compari son for tan
35. hen possible For the FE package the exposed pad should be soldered to the copper GND plane underneath the device See Applications Informa tion Layout Considerations SW Pin 2 The switch pin is the emitter of the on chip power NPN switch This pin is driven up to the input pin voltage during switch on time Inductor current drives the switch pin negative during switch off time Negative volt age is clamped with the external catch diode Maximum negative switch voltage allowed is 0 8V NC Pins 3 5 7 13 No Connection Vin Pin 4 This is the collector of the on chip power NPN switch Vu powers the internal control circuitry when a voltage on the BIAS pin is not present High dl dt edges occur on this pin during switch turn on and off Keep the path short from the Vu pin through the input bypass capacitor through the catch diode back to SW All trace inductance on this path will create a voltage spike at switch off adding to the Ver voltage across the internal NPN BOOST Pin 6 The BOOST pin is used to provide a drive voltage higher than the input voltage to the internal bipolar NPN power switch Without this added voltage the typical switch voltage loss would be about 1 5V The additional BOOST voltage allows the switch to saturate and voltage loss approximates that of a 0 2Q FET struc ture but with much smaller die area BIAS Pin 10 The BIAS pin is used to improve efficiency when operating at higher input vo
36. ivider to the FB pin then provides the proper feedback voltage for the chip The following equation can be used to calculate maximum load current for the positive to negative converter D2 MMSD914TI OUTPUT 12V 0 25A INCREASE L1 TO 10uH OR 18H FOR HIGHER CURRENT APPLICATIONS 77 SEE APPLICATIONS INFORMATION MAXIMUM LOAD CURRENT DEPENDS ON MINIMUM INPUT VOLTAGE AND INDUCTOR SIZE SEE APPLICATIONS INFORMATION Figure 15 Positive to Negative Converter Min Vour E G PELE Mast 0 3 Vout Vin 9 3 Vout VF lp maximum rated switch current Vin Minimum input voltage Vout output voltage Ve catch diode forward voltage 0 3 switch voltage drop at 1 5A Example with VIN MIN 5 5V Vout 12V L 15uH Ve 0 63V Ip 1 5A IMAX 0 36A IMAX INDUCTOR VALUE The criteria for choosing the inductor is typically based on ensuring that peak switch current rating is not exceeded This gives the lowest value of inductance that can be used butin some cases lower output load currents it may give a value that creates unnecessarily high output ripple voltage The difficulty in calculating the minimum inductor size needed is that you must first decide whether the switcher will be in continuous or discontinuous mode at the critical point where switch current reaches 1 5A The first step is to use the following formula to calculate the load current above which the switcher must use continu
37. l power dissipation while still maintaining minimum boost voltage across C2 A zener D4 placed in series with D2 see Figure 9 drops voltage to C2 Example The BOOST pin power dissipation for a 20V input to 12V output conversion at 1A is given by _ 12 1 36 012 PBoosT yQ Ha 7V zener is placed in series with D2 then power dissipation becomes 0 2W _ 12e 1 36 5 hue ae For an FE package with thermal resistance of 45 C W ambient temperature savings would be T ambient savings 0 116W e 45 C W 5 C For a GN package with thermal resistance of 85 C W ambient temperature savings would be T ambient savings 0 116W e 85 C W 10 C The 7V zener should be sized for excess of 0 116W operation The tolerances of the zener should be consid ered to ensure minimum Vpoost exceeds 3 3V VDROOP 0 084W BOOST Vin LT1956 SW 1956 F09 Figure 9 BOOST Pin Diode Selection 20 LT1956 LT1956 5 APPLICATIONS INFORMATION Input Voltage vs Operating Frequency Considerations The absolute maximum input supply voltage forthe LT1956 is specified at 60V This is based on internal semiconduc tor junction breakdown effects The practical maximum input supply voltage for the LT1956 may be less than 60V due to internal power dissipation or switch minimum on time considerations For the extreme case of an output short circuit fault to ground see the section Short Circuit Considerations A d
38. ltage at the output see Output Ripple Voltage in the Applications Information section It is possible to reduce capacitor size and output ripple voltage by replac ing the tantalum output capacitor with a ceramic output capacitor because of its very low ESR The zero provided by the tantalum output capacitor must now be reinserted back into the loop Alternatively there may be cases where even with the tantalum output capacitor an addi tional zero is required in the loop to increase phase margin for improved transient response Azero can be added into the loop by placing a resistor Rc at the Vc pin in series with the compensation capacitor Cc or by placing a capacitor Cfg between the output and the FB pin When using Rc the maximum value has two limitations First the combination of output capacitor ESR and Re may Stop the loop rolling off altogether Second ifthe loop gain is not rolled off sufficiently at the switching frequency output ripple will perturb the Ve pin enough to cause unstable duty cycle switching similar to subharmonic 1956f 21 LT1956 LT1956 5 APPLICATIONS INFORMATION CURRENT MODE POWER STAGE Om 2mho ERROR AMPLIFIER FB gm ES 2000umho k Ro 1 22V 200 ESR 1956 F10 Figure 10 Model for Loop Response oscillations If needed an additional capacitor Cr can be added across the Rc Cc network from the Ve pin to ground to further suppress Vc ripple volt
39. ltages and light load current Connecting this pin to the regulated output volt age forces most of the internal circuitry to draw its oper ating current from the output voltage rather than the input supply This architecture increases efficiency especially when the input voltage is much higher than the output Minimum output voltage setting for this mode of operation is 3V Vc Pin 11 The Ve pin is the output of the error amplifier and the input of the peak switch current comparator It is normally used for frequency compensation but can also serve as a current clamp or control loop override Ve sits at about 1V for light loads and 2V at maximum load It can be driven to ground to shut off the regulator but if driven high current must be limited to 4mA FB SENSE Pin 12 The feedback pin is used to set the Output voltage using an external voltage divider that gen erates 1 22V at the pin for the desired output voltage The 5V fixed output voltage parts have the divider included on the chip and the FB pin is used as a SENSE pin connected directly to the 5V output Three additional functions are performed by the FB pin When the pin voltage drops below 0 6V switch current limit is reduced and the exter nal SYNC function is disabled Below 0 8V switching frequency is also reduced See Feedback Pin Functions in Applications Information for details SYNC Pin 14 The SYNC pin is used to synchronize the internal oscillator to an external
40. ng Frequency 575 550 525 500 475 450 25 0 2 50 75 100 JUNCTION TEMPERATURE C 1956 G10 125 Vc Pin Shutdown Threshold 0 9 0 7 50 25 0 25 50 75 100 JUNCTION TEMPERATURE C 1956 G13 125 INPUT VOLTAGE V SWITCH VOLTAGE mV Minimum Input Voltage with 5V Output INIMUM INPUT LTAGE TO START T INIMUM INPUT VOLTAGE TO RUN 5 0 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 LOAD CURRENT A 1956 G11 Switch Voltage Drop 0 0 5 1 1 5 SWITCH CURRENT A 1766 G14 BOOST PIN CURRENT mA SWITCH MINIMUM ON TIME ns BOOST Pin Current 0 0 5 1 15 SWITCH CURRENT A 1956 G12 Switch Minimum ON Time vs Temperature 2 0 2 50 75 100 JUNCTION TEMPERATURE C 125 1956 G15 1956f LT1956 LT 1956 5 PIN FUNCTIONS GND Pins 1 8 9 16 The GND pin connections act as the reference for the regulated output so load regulation will suffer if the ground end of the load is not atthe same voltage as the GND pins of the IC This condition will occur when load current or other currents flow through metal paths between the GND pins and the load ground Keep the paths between the GND pins and the load ground short and use a ground plane w
41. of 200kHz allowing higher sustained input voltage capa bility during output short circuit The LT1956 is a current mode controller It uses the Ve node voltage as an input to a current comparator which turns off the output switch on a cycle by cycle basis as peak switch current is reached The internal clamp on the Ve node nominally 2V then acts as an output switch peak current limit This action becomes the switch current limit specification The maximum available output power is then determined by the switch current limit A potential controllability problem could occur under short circuit conditions If the power supply output is short circuited the feedback amplifier responds to the low output voltage by raising the control voltage Vo to its peak current limit value Ideally the output switch would be turned on and then turned off as its current exceeded the value indicated by V However there is finite response time involved in both the current comparator and turnoff of the output switch These result in a minimum on time tonciny When combined with the large ratio of Viy to Ve l R the diode forward voltage plus inductor le R voltage drop the potential exists for a loss of control Expressed mathematically the requirement to maintain control is Ve Ale pie ViN 12 LT1956 LT1956 5 APPLICATIONS INFORMATION where f switching frequency ton Switch minimum on time Ve diode forward voltage Vin
42. ost capacitor is recommended for most appli cations Almost any type of film or ceramic capacitor is suitable but the ESR should be lt 1Q to ensure it can be fully recharged during the off time of the switch The capacitor value is derived from worst case conditions of 1800ns on time 42mA boost current and 0 7V discharge ripple The boost capacitor value could be reduced under less demanding conditions but this will not improve circuit operation or efficiency Under low input voltage and low load conditions a higher value capacitor will reduce discharge ripple and improve start up operation SHUTDOWN FUNCTION AND UNDERVOLTAGE LOCKOUT Figure 4 shows how to add undervoltage lockout UVLO to the LT1956 Typically UVLO is used in situations where the input supply is current limited or has a relatively high source resistance A switching regulator draws constant power from the source so source current increases as source voltage drops This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions UVLO prevents the regulator from operating at source voltages where these problems might occur Threshold voltage for lockout is about 2 38V A 5 5uA bias current flows outof the pin at this threshold The internally generated current is used to force a default high state on the shutdown pin if the pin is left open When low shut down current is not an issue
43. ous mode If your load current is less than this use the discontinuous mode formula to calculate minimum inductor needed If load current is higher use the continuous mode formula Output current where continuous mode is needed Vin lp vu u Ip 4 Vin Vout Vin Vout Wei Minimum inductor discontinuous mode 2 Vout lout f Ip 1956f 20 LT1956 LT1956 5 PACKAGE DESCRIPTION Minimum inductor continuous mode Bag Vin Vout Vout Ve 2 f Vin vor ur HI For a 12V to 12V converter using the LT1956 with peak switch current of 1 5A and a catch diode of 0 63V Laue 12 2 1 5 2 CONT A 4 12 12 12 4 12 0 63 For a load current of 0 25A this says that discontinuous mode can be used and the minimum inductor needed is found from 0 370A 2 12 0 25 500 10 1 5 2 In practice the inductor should be increased by about 30 over the calculated minimum to handle losses and variations in value This suggests a minimum inductor of 7uH for this application MIN 5 3uH Ripple Current in the Input and Output Capacitors Positive to negative converters have high ripple current in the input capacitor For long capacitor lifetime the RMS value of this current must be less than the high frequency ripple current rating of the capacitor The following formula will give an approximatevalue for RMS ripple current This formula assumes continuous mode and large inductor
44. s to prevent excessive ripple causing dips below the mini mum operating voltage resulting in erratic operation Depending on how the LT1956 circuit is powered up you may need to check for input voltage transients The input voltage transients may be caused by input voltage steps or by connecting the LT1956 converter to an already powered up source such as a wall adapter The sudden application of input voltage will cause a large surge of current in the input leads that will store energy in the parasitic inductance of the leads This energy will cause the input voltage to swing above the DC level of input power source and it may exceed the maximum voltage rating of input capacitor and LT1956 The easiest way to suppress input voltage transients is to addasmall aluminum electrolytic capacitor in parallel with the low ESR input capacitor The selected capacitor needs to have the right amount of ESR in order to critically dampen the resonant circuit formed by the input lead inductance and the input capacitor The typical values of ESR will fallin the range of 0 52 to 2Q and capacitance will fall in the range of 5uF to 50uF lf tantalum capacitors are used values in the 22uF to 470uF range are generally needed to minimize ESR and meet ripple current and surge ratings Care should be taken to ensure the ripple and surge ratings are not exceeded The AVX TPS and Kemet T495 series are surge rated AVX recommends derating capacitor operating voltag
45. small inductor values however discon tinuous mode will occur at much higher output load currents The limit to the smallest inductor value that can be chosen is set by the LT1956 peak switch current Ip and the maximum output load current required given by lout max Discontinuous Mode po Ip f L Un 2 lLp p 2 Vout Ve Vin Vout VF Example For Viy 15V Vout 5V Ve 0 63V f 500kHz and L 4uH louT MAX Discontinuous Mode _ 1 52 600 108 4 10 6 15 2 5 0 63 15 5 0 63 loUT MAX Discontinuous Mode 0 639A What has been shown here is that if high inductor ripple current and discontinuous mode operation can be toler ated small inductor values can be used If a higher output load current is required the inductor value must be increased If lout max nO longer meets the discontinuous mode criteria use the lout max equation for continuous mode the LT1956 is designed to operate well in both modes of operation allowing a large range of inductor values to be used SHORT CIRCUIT CONSIDERATIONS For a ground short circuit fault on the regulated output the maximum input voltage for the LT1956 is typically limited to 25V If a greater input voltage is required increasing the resistance in series with the inductor may suffice see short circuit calculations at the end of this section Alternatively the 1 54 LT1766 can be used since itis identical to the LT1956 but runs at a lower frequency
46. specially constructed and tested for low ESR so they give the lowest ESR for a given volume The value in microfarads is not particularly criti cal and values from 22uF to greater than 500uF work well but you cannot cheat mother nature on ESR If you find a tiny 22uF solid tantalum capacitor it will have high ESR and output ripple voltage will be terrible Table 3 shows some typical solid tantalum surface mount capacitors Table 3 Surface Mount Solid Tantalum Capacitor ESR and Ripple Current E CASE SIZE ESR MAX Q RIPPLE CURRENT A AVX TPS Sprague 593D 0 1 to 0 3 0 7 to 1 1 D CASE SIZE AVX TPS Sprague 593D 0 1 to 0 3 0 7 to 1 1 C CASE SIZE AVX TPS 0 2 typ 0 5 typ Unlike the input capacitor RMS ripple current in the Output capacitor is normally low enough that ripple cur rent rating is not an issue The current waveform is triangular with a typical value of 125mApgms The formula to calculate this is 1956f 13 LT1956 LT 1956 5 APPLICATIONS INFORMATION Output capacitor ripple current RMS 0 29 VourT Vin Vout MN IRIPPLE RMS Ceramic Capacitors Ceramic capacitors are generally chosen for their good high frequency operation small size and very low ESR effective series resistance Their low ESR reduces output ripple voltage but also removes a useful zero in the loop frequency response common to tantalum capaci tors To compensate for this a resis
47. t of conditions BOOST pin circuitry dissipates power given by Isw 36 e Va ViN Typically Veo the boost voltage across the capacitor C2 equals Vom This is because diodes D1 and D2 can be considered almost equal where Vc2 Vout Ve D2 VF D1 Mom Hence the equation for boost circuitry power dissipation given in the previous Thermal Calculations section is Stated as Poiss BOOST Pin VOUT Vout Isw 36 Vout Vin Here it can be seen that boost power dissipation increases as the square of Voyr It is possible however to reduce Vera below Vour to save power dissipation by increasing the voltage drop in the path of D2 Care should be taken that Veo does not fall below the minimum 3 3V boost voltage required for full saturation of the internal power switch For output voltages of 5V Veo is approximately 5V During switch turn on Vc will fall as the boost capacitor C2 is discharged by the BOOST pin In the previous BOOST Pin section the value of C2 was designed for a0 7V droop in Veo Vproop Hence an output voltage as low as 4V would still allow the minimum 3 3V for the boost function using the C2 capacitor calculated Ppiss BOOsT If a target output voltage of 12V is required however an excess of 8V is placed across the boost capacitor which is not required for the boost function but still dissipates additional power What is required is a voltage drop in the path of D2 to achieve minima
48. talum vs ceramic output capacitors Figure 3 FREQUENCY COMPENSATION Before starting on the theoretical analysis of frequency response the following should be remembered the worse the board layout the more difficult the circuit will be to Stabilize This is true of almost all high frequency analog circuits read the Layout Considerations section first Common layout errors that appear as stability problems are distant placement of input decoupling capacitor and or catch diode and connecting the Ve compensation to a ground track carrying significant switch current In addi tion the theoretical analysis considers only first order non ideal component behavior For these reasons it is important that a final stability check is made with produc tion layout and components The LT1956 uses current mode control This alleviates many of the phase shift problems associated with the inductor The basic regulator loop is shown in Figure 10 The LT1956 can be considered as two gpm blocks the error amplifier and the power stage Figure 11 shows the overall loop response At the Vc pin the frequency compensation components used are Ro 2 2k Co 0 022uF and Cr 220pF The output capacitor used is a 100uF 10V tantalum capacitor with typical ESR of 100mQ The ESR ofthe tantalum output capacitor provides a useful Zero in the loop frequency response for maintaining stabil ity This ESR however contributes significantly to the ripple vo
49. tch rise time is caused by switch diode input capacitor lead inductance and diode capacitance Schot tky diodes have very high Q junction capacitance that can ring for many cycles when excited at high frequency If total lead length for the input capacitor diode and switch path is 1 inch the inductance will be approximately 25nH At switch off this will produce a spike across the NPN Output device in addition to the input voltage At higher currents this spike can be in the order of 10V to 20V or higher with a poor layout potentially exceeding the abso lute max switch voltage The path around switch catch diode and input capacitor must be kept as short as possible to ensure reliable operation When looking at this SW FALL 2V DIV 50ns DIV 1956 F07 Figure 7 Switch Node Resonance a gt 100MHz oscilloscope must be used and waveforms should be observed on the leads of the package This switch off spike will also cause the SW node to go below ground The LT1956 has special circuitry inside which mitigates this problem but negative voltages over 0 8V lasting longer than 10ns should be avoided Note that 100MHz oscilloscopes are barely fast enough to see the details of the falling edge overshoot in Figure 7 A second much lower frequency ringing is seen during switch off time if load current is low enough to allow the inductor current to fall to zero during part of the switch off time
50. the 40 C to 125 C operating junction temperature range are assured by design characterization and correlation with statistical process controls The LT1956IFE LT1956IFE 5 LT1956IGN LT1956IGN 5 are guaranteed over the full 40 C to 125 C operating junction temperature range Note 9 Transconductance and voltage gain refer to the internal amplifier exclusive of the voltage divider To calculate gain and transconductance refer to the SENSE pin on fixed voltage parts Divide values shown by the ratio Voyq 1 219 Note 10 This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions Junction temperature will exceed 125 C when overtemperature protection is active Continuous operation above the specified maximum operating junction temperature may impair device reliability 1956f LT1956 LT1956 5 TYPICAL PERFORMANCE CHARACTERISTICS Switch Peak Current Limit FB Pin Voltage and Current SHDN Pin Bias Current 25 2 0 250 CURRENT REQUIRED TO FORCE SHUTDOWN 200 FLOWS OUT OF PIN AFTER S
51. the error due to this current can be minimized by making Bu o 10k or less If shutdown currentis an issue Rig can be raised to 100k but the error due to initial bias current and changes with temperature should be considered Rio 10k to 100k 25k suggested Ry Luo Vn 2 38V 2 38V RLo 5 5uA Vin Minimum input voltage Keep the connections from the resistors to the shutdown pin short and make sure that interplane or surface capaci tance to the switching nodes are minimized If high resistor values are used the shutdown pin should be 1956f LI MVR 15 LT1956 LT 1956 5 APPLICATIONS INFORMATION OUTPUT TOTAL SHUTDOWN e 1956 F04 Figure 4 Undervoltage Lockout bypassed with a 1000pF capacitor to prevent coupling problems from the switch node If hysteresis is desired in the undervoltage lockout point a resistor Rfg can be added to the output node Resistor values can be calcu lated from Rio Vin 2 38 AW Vourt 1 AV 2 38 Rio 5 5uA Reg Rui Vour AV 25k suggested for Rio Vum Input voltage at which switching stops as input voltage descends to trip level AV Hysteresis in input voltage level Rui Example output voltage is 5V switching is to stop if input voltage drops below 12V and should not restart unless input rises back to 13 5V AV is therefore 1 5V and Vin 12V Let Rig 25k 25k 12 2 38 1 5 5 1 1 5 2 38 25k 5 5pA E 25k 10 41 2 24 Rrs 116k 5 1
52. the flip flop is reset and the switch turns off Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point This technique means that the error amplifier commands current to be delivered to the output rather than voltage A voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor then an abrupt 180 shift will occur The current fed system will have 90 phase shift ata much lower frequency but will not have the additional 90 shift until well beyond the LC resonant frequency This makes VIN 2 9V BIAS INTERNAL BIAS REGULATOR Vcc SLOPE COMP SYNC 14 anmisLoPE coMe SHUTDOW COMPARATOR 500kHz OSCILLATOR CD 5 5uA LOCKOUT a COMPARATOR D VC MAX CLAMP 2 38V CURRENT COMPARATOR it much easier to frequency compensate the feedback loop and also gives much quicker transient response Most of the circuitry of the LT1956 operates from an internal 2 9V bias line The bias regulator normally draws power from the regulator input pin but if the BIAS pin is connected to an external voltage higher than 3V bias power will be drawn from the external source typically the regulated output voltage This will improve efficiency if the BIAS pin voltage is lower than regulator input voltage High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the
53. the maxi mum allowable input voltage during an output short to ground is typically Vin 0 63V 0 128V 100kHz e 300ns Vin MAX 25V Increasing the DCR of the inductor will increase the maxi mum Vy allowed during an output short to ground but will also drop overall efficiency during normal operation Every time the converter wakes up from shutdown or undervoltage lockout to begin switching the output capacitor may potentially be starting from OV This re quires that the part obey the overall duty cycle demanded by the loop related to Vu and Vour as the output voltage rises to its target value It is recommended that for TV Vout Ve ratios gt 4 a soft start circuit should be used to control the output capacitor charge rate during start up or during recovery from an output short circuit thereby adding additional control over peak inductor current See Buck Converter with Adjustable Soft Start later in this data sheet OUTPUT CAPACITOR The LT1956 will operate with either ceramic or tantalum output capacitors The output capacitor is normally cho sen by its effective series resistance ESR because this is what determines output ripple voltage The ESR range for typical LT1956 applications using a tantalum output capacitor is 0 05Q to 0 2Q Atypical output capacitor is an AVX type TPS 100yF at 10V with a guaranteed ESR less than 0 1Q This is a D size surface mount solid tantalum capacitor TPS capacitors are
54. tor Rc can be placed in series with the Ve compensation capacitor Cc Care must be taken however since this resistor sets the high frequency gain of the error amplifier including the gain at the switching frequency If the gain of the error amplifier is high enough at the switching frequency output ripple voltage although smaller for a ceramic output capacitor may still affect the proper operation of the regulator A filter capacitor Cr in parallel with the Rc Cc network is suggested to control possible ripple at the Vc pin The LT1956 can be stabilized for Vor 5V at 1A using a 22uF ceramic output capacitor and Ve com ponent values of Cc 4700pF Re 4 7k and CF 220pF INPUT CAPACITOR Step down regulators draw current from the input supply in pulses The rise and fall times of these pulses are very fast The input capacitor is required to reduce the voltage ripple this causes at the input of LT1956 and force the switching current into a tight local loop thereby minimiz ing EMI The RMS ripple current can be calculated from E Vout Vin Mam IRIPPLE RMS CiN lout me IN Ceramic capacitors are ideal for input bypassing At500kHz switching frequency the energy storage requirement of the input capacitor suggests that values in the range of 2 2uF to 10uF are suitable for most applications If opera tion is required close to the minimum input required by the output of the LT1956 a larger value may be required This i
55. tor by using a ceramic capacitor Although this reduction of ESR re moves a useful zero in the overall loop response this zero can be replaced by inserting a resistor Rc in series with the Ve pin and the compensation capacitor Cc See Ceramic Capacitors in Applications Information Peak Inductor Current and Fault Current To ensure that the inductor will not saturate the peak in ductor current should be calculated knowing the maximum load current An appropriate inductor should then be cho sen In addition a decision should be made whether or not the inductor must withstand continuous fault conditions H maximum load current is 0 5A for instance a 0 5A inductor may not survive a continuous 2A overload condi tion Dead shorts will actually be more gentle on the inductor because the LT1956 has frequency and current limit foldback Peak inductor and switch current can be significantly higher than output current especially with smaller induc tors and lighter loads so don t omit this step Powdered Table 2 VENDOR VALUE Ipc max DCR HEIGHT PART NO uH Amps Ohms mm Coiltronics UP1B 100 10 1 9 0 111 5 0 UP1B 220 22 1 2 0 254 5 0 UP2B 220 22 2 0 0 062 6 0 UP2B 330 33 1 7 0 092 6 0 UP1B 150 15 1 5 0 175 5 0 Coilcraft D01813P 153HC 15 1 5 0 170 5 0 D01813P 103HC 10 1 9 0 111 5 0 D53316P 223 22 1 6 0 207 5 1 D53316P 333 33 1 4 0 334 5 1
56. value Small inductors will give some what higher ripple current especially in discontinuous mode The exact formulas are very complex and appear in Application Note 44 pages 29 and 30 For our pur poses here have simply added a fudge factor ff The value for ff is about 1 2 for higher load currents and L gt 15uH It increases to about 2 0 for smaller inductors at lower load currents Vout Capacitor lous ff lout Vi ff 1 2 to 2 0 The output capacitor ripple current for the positive to negative converter is similar to that for a typical buck regulator it is a triangular waveform with peak to peak value equal to the peak to peak triangular waveform of the inductor The low output ripple design in Figure 14 places the input capacitor between Viy and the regulated negative Output This placement of the input capacitor significantly reduces the size required for the output capacitor versus placing the input capacitor between Viy and ground The peak to peak ripple current in both the inductor and output capacitor assuming continuous mode is _ DCe ViN feL DC Duty Cycle Ip p Vout Ve Vout Vin VF Ip kou Nk The output ripple voltage for this configuration is as low as the typical buck regulator based predominantly on the inductor s triangular peak to peak ripple current and the ESR of the chosen capacitor see Output Ripple Voltage in Applications Information Diode Current Average diod
57. ward current in normal Operation can be calculated from Ipcave our 1 DC This formula will not yield values higher than 1 5A with maximum load current of 1 5A The only reason to consider a larger diode is the worst case condition of a high input voltage and shorted output With a shorted condition diode current will increase to a typical value of 2A determined by peak switch current limit This is safe for short periods of time but it would be prudent to check with the diode manufacturer if continuous operation under these conditions must be tolerated BOOST PIN For most applications the boost components are a 0 1 uF capacitor and an MMSD914TI diode The anode is typi cally connected to the regulated output voltage to generate avoltage approximately Vor above Vu to drive the output stage However the output stage discharges the boost capacitor during the on time of the switch The output driver requires at least 3V of headroom throughout this period to keep the switch fully saturated If the output voltage is less than 3V itis recommended that an alternate boost supply is used The boost diode can be connected to the input although care must be taken to prevent the 2x Vin boost voltage from exceeding the BOOST pin absolute maximum rating The additional voltage across the switch driver also increases power loss reducing efficiency If available an independent supply can be used with a local bypass capacitor A 0 1pF bo
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LINEAR TECHNOLOGY LT1956/LT1956 5 Manual lt1962-5 lt1963-2.5