ANALOG DEVICES SSM2166 English products handbook Rev D
Contents
1. 2 designates RoHS version Rev D Page 17 of 20 NOTES Rev D Page 18 of 20 NOTES Rev D Page 19 of 20 NOTES 1996 2008 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners D00357 0 7 08 D DEVICES www analo g com Rev D Page 20 of 202. 1 ms in most cases c7 10uF OPTIONAL 00357 016 Figure 16 Functional Block Diagram and Typical Application Rev D Page 9 of 20 The performance of the rms level detector is illustrated for a Cave of 2 2 uF in Figure 17 and for a Cave of 22 uF in Figure 18 In each of these images the input signal to the SSM2166 not shown is a series of tone bursts in six successive 10 dB steps The tone bursts range from 66 dBV 0 5 mV rms to 6 dBV 0 5 V rms As shown in Figure 17 and Figure 18 the attack time of the rms level detector is dependent only on Cave but the release times are linear ramps whose decay times are dependent on both Cave and the input signal step size The rate of release is approximately 240 dB s for a Cave of 2 2 uF and 12 dB s for a Cave of 22 uF o sp m D 3 S s Figure 18 RMS Level Detector Performance with Cave 22 uF CONTROL CIRCUITRY The output of the rms level detector is a signal proportional to the log of the true rms value of the buffer output with an added dc offset The control circuitry subtracts a dc voltage from this signal scales it and sends the result to the VCA to control the gain The gain control of the VCA is logarithmic a linear change in the control signal causes a decibel change in gain It is this control law that allows linear processing of the log rms signal to provide the flat compression characteristic on the input output characteristic shown in Figure 15 Compr
3. 2 1 Buffer Gain 20 dB VCA Gain 10 dB Noise Gate 100 uV Rev D Page 14 of 20 Note that the SSM2166 processes the output of the buffer which in the previous example is 20 dB or 10 times the input level Use the oscilloscope to verify that the buffer is not being driven into clipping with excessive input signals In the application take the minimum gain in the buffer consistent with the average source level as well as the crest factor ratio of peak to rms ROTATION POINT 500 COMPRESSION REGION LIMITING REGION OUTPUT mV 40 GATE THRESHOLD 0 1 1 0 10 15 INPUT mV 00357 029 Figure 30 Transfer Characteristic EVALUATION BOARD SETUP PROCEDURE When building a breadboard keep the leads to Pin 3 Pin 4 and Pin 5 short An evaluation board is available from an Analog Devices sales representative The R and C designations refer to the demonstration board schematic of Figure 26 and the parts list in Table 7 TEST EQUIPMENT SETUP The recommended equipment and configuration are shown in Figure 31 A low noise audio generator with a smooth output adjustment range of 50 uV to 50 mV is a suitable signal source A 40 dB pad is useful to reduce the level of most generators by 100x to simulate the microphone levels The input voltmeter can be connected before the pad and need only go down to 10 mV The output voltmeter should go up to 2 V The oscilloscope is used to verify that the output is sinusoida
4. FREQUENCY Hz Figure 11 VCA Gain Bandwidth Curves vs Frequency Rcomp 00 Roan 1 24kQ Reate 500kQ Rrot pt 1 74kQ 20 100 1k 10k 30k FREQUENCY Hz Figure 12 PSRR vs Frequency 00357 011 00357 012 Rev D Page 7 of 20 Cave 2 2uF SYSTEM GAIN 0dB Ry 10kQ Cave 2 2uF SYSTEM GAIN 0dB Ry 10kQ Figure 14 Large Signal Transient Response 00357 013 00357 014 THEORY OF OPERATION Figure 15 illustrates a typical transfer characteristic for the SSM2166 where the output level in decibels is plotted as a function of the input level in decibels The dotted line indicates the transfer characteristic for a unity gain amplifier For input signals in the range of Voz downward expansion to Vr rotation point an r dB change in the input level causes a 1 dB change in the output level Here r is defined as the compression ratio The compression ratio can be varied from 1 1 no compression to over 15 1 via a single resistor Rcomp Input signals above Vre are compressed with a fixed compression ratio of approximately 15 1 This region of operation is the limiting region Varying the compression ratio has no effect on the limiting region The break point between the compression region and the limiting region is referred to as the limiting threshold or the rotation point and is user specified in the SSM2166 The ter
5. Noise 20 kHz bandwidth Vin GND 109 dBu Total Harmonic Distortion and THD N Second and third harmonics Vin 20 dBu 0 25 0 5 Noise 22 kHz low pass filter Input Impedance Zin 180 kQ Output Impedance Zout 75 Q Load Drive Resistive 5 kQ Capacitive 2 nF Buffer Input Voltage Range 1 THD 1 Vrms Output Voltage Range 1 THD 1 Vrms VCA Input Voltage Range 1 THD 1 Vrms Output Voltage Range 1 THD 1 4 Vrms Gain Bandwidth Product 1 1 compression VCA gain 60 dB 30 MHz CONTROL SECTION VCA Dynamic Gain Range 60 dB VCA Fixed Gain Range 60 to 19 dB Compression Ratio Minimum 1 1 Compression Ratio Maximum See Figure 19 for Rcomp Rror pt rotation 15 1 point 100 mV rms Control Feedthrough 15 1 compression rotation point 10 dBu 5 mV R2 1 5 kQ POWER SUPPLY Supply Voltage Range V 4 5 5 5 V Supply Current Isy 7 5 10 mA Quiescent Output Voltage Level 2 2 V Power Supply Rejection Ratio PSRR 50 dB POWER DOWN Supply Current Pin 12 V 10 100 pA 10 dBu 0 775 Vrms 2 Normal operation for Pin 12 is 0 V Rev D Page 3 of 20 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2 Parameter Rating Table 3 Supply Voltage 10V Package Type Osa Bic Unit Audio Input Voltage Supply voltage 14 Lead SOIC 120 36 C W Operating Temperature Range 40 C to 85 C Storage Temperature Range 65 C to 150 C Junction Temperature T 150 C ESD CAUTION Lead Temperature Soldering 60 sec 30
6. ROTATION SET 1V rms 2 COMPRESSION RATIO 1 1 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 GAIN ADJUST RESISTOR kO Figure 6 VCA Gain vs Rea Pin 2 to GND 00357 004 00357 005 00357 006 Rev D Page 6 of 20 ROTATION POINT V rms Ta 25 C V 5V COMPRESSION RATIO 1 1 NOISE GATE SETTING 550V rms ROTATION SET 1V rms GAIN ADJUST 1 25kQ INPUT VOLTAGE V rms Figure 7 THD N vs Input Vrms Ta 25 C V 5V Vin 77 5mV rms 1kHz COMPRESSION RATIO 1 1 NOISE GATE SETTING 550V rms ROTATION SET 1V rms GAIN ADJUST 156kQ KH MEASUREMENT FILTER BW 20Hz TO 20kHz 10 100 1k 10k 30k 2 a 0 01 FREQUENCY Hz Figure 8 THD N vs Frequency Hz 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 Rrot pt RESISTOR k0 Figure 9 Rotation Point vs Rrorpr Pin 11 to V 00357 007 00357 008 00357 009 VGA GAIN dB PSRR dB COMPRESSION RATIO NOISE BW 20kHz 00357 010 80 G 60dB 60 1 L G 40dB 40 G 20dB 20 1 0 ROTATION SET 1V rms 20 Rcomp 30kQ NOISE GATE SETTING 550uV rms Vin 1mV rms 40 1k 10k 100k 1M
7. With the power removed from the test fixture measure and record the values of all potentiometers including any fixed resistance in series with them If the averaging capacitor C4 changes also note its value Rev D Page 15 of 20 SETUP SUMMARY The transfer condition of Figure 2 has been implemented For inputs below the 100 uV noise gate threshold circuit and back ground noise is minimized Above it the output increases at a rate of 1 dB for each 2 dB input increase until the 500 mV rotation point is reached at an input of approximately 15 mV For higher inputs that drive the output beyond 500 mV limiting occurs and there is little further increase The SSM2166 processes the output of the buffer which in the previous example is 20 dB or Table 6 Initial Potentiometer Settings 10x the input level Use the oscilloscope to ensure that the buffer is not being driven into clipping with the highest expected input peaks Always take the minimum gain in the buffer consis tent with the average source level and crest factor ratio of peak to rms The wide program range of the SSM2166 makes it useful in many applications other than microphone signal conditioning Function Potentiometer Range Initial Position Initial Resistance Effect of Change Gain Adjust VCA R10 0kQ to 20 kQ CCW oQ 0 dB CW to increase VCA gain Rotation Point R3 0 kQ to 50 kQ CCW 00 1 V CW to reduce rotation point Compress
8. buffer and then by the VCA The input buffer presents an input impedance of approximately 180 kQ to the source A dc voltage of approximately 1 5 V is present at AUDIO IN Pin 7 requiring the use of a blocking capacitor C1 for ground referenced sources A 0 1 uF capacitor is a good choice for most audio applications The input buffer is a unity gain stable amplifier that can drive the low impedance input of the VCA The VCA is a low distortion variable gain amplifier VGA whose gain is set by the side chain control circuitry The input to the VCA is a virtual ground in series with approximately 1 kQ An external blocking capacitor C6 must be used between the buffer output and the VCA input The 1 kQ impedance between amplifiers determines the value of this capacitor which is typically between 1 uF and 10 uF An aluminum electrolytic capacitor is an economical choice The VCA amplifies the input signal current flowing through C6 and converts this current to a voltage at the OUTPUT pin Pin 13 The net gain from input to output can be as high as 60 dB without additional buffer gain depending on the gain set by the control circuitry Rev D Page 8 of 20 The gain of the VCA at the rotation point is set by the value of a resistor Rca connected between Pin 2 and GND The relationship between the VCA gain and Ream is shown in Figure 6 The AGC range can be as high as 60 dB The VCAw pin Pin 3 is the non inverting input terminal t
9. 0 C ESD electrostatic discharge sensitive device Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability A laA Charged devices and circuit boards can discharge without detection Although this product features patented or proprietary protection circuitry damage may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Rev D Page 4 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VCAwn 3 SSM2166 12 POWER DOWN TOP VIEW ROTATION SET BUF OUT 5 Not to Scale 70 comp RATIO SET 9 NOISE GATE SET rs AVG CAP AUDIO IN 00357 003 Figure 3 Pin Configuration Table 4 Pin Function Descriptions Pin No Mnemonic Description 1 GND Ground 2 GAIN ADJUST VCA Gain Adjust Pin A resistor from this pin to ground sets the fixed gain of the VCA To check the setting of this pin make sure the compression ratio set pin Pin 10 is grounded for no compression The gain can be varied from 0 dB to 20 GB For 20 dB leave the pin open For 0 dB of fixed gain a typical resist
10. 227 0 0500 0 31 0 0122 0 17 0 0067 0 40 0 0157 COMPLIANT TO JEDEC STANDARDS MS 012 AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS INCH DIMENSIONS IN PARENTHESES ARE ROUNDED OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 32 14 Lead Standard Small Outline Package SOIC_N Narrow Body R 14 Dimensions shown in millimeters and inches 060606 A ORDERING GUIDE Model Temperature Range Package Description Package Option SSM2166S 40 C to 85 C 14 Lead SOIC_N R 14 SSM2166S REEL 40 C to 85 C 14 Lead SOIC_N R 14 SSM2166S REEL7 40 C to 85 C 14 Lead SOIC_N R 14 SSM2166SZ 40 C to 85 C 14 Lead SOIC_N R 14 SSM2166SZ REEL 40 C to 85 C 14 Lead SOIC_N R 14 SSM2166SZ REEL7 40 C to 85 C 14 Lead SOIC_N R 14 1 Z RoHS Compliant Part Top Branding Revision Reflecting Die Replacement Version Original Die Revision Prior to Rev C of Data Sheet New Die Revision Rev C to Current Revision of Data Sheet Pb Free ROHS Version Top Line 1 SSM Top Line 2 2166 Top Line 3 XXXX Top Line 1 SSM Top Line 2 2166A Top Line 3 XXXX SnPb Lead Finish Version Top Line 1 SSM Top Line 2 2166 Top Line 3 XXXX Top Line 1 SSM Top Line 2 2166A Top Line 3 XXXX 1 Letter A designates new die revision refer to revised external component values in Figure 5 Figure 6 Figure 9 and Figure 19
11. ANALOG DEVICES FEATURES Complete microphone conditioner in a 14 lead SOIC package Single 5 V operation Adjustable noise gate threshold Compression ratio set by external resistor Automatic limiting feature prevents ADC overload Adjustable release time Low noise and distortion Power down feature 20 kHz bandwidth 1 dB APPLICATIONS Microphone preamplifiers processors Computer sound cards Public address paging systems Communication headsets Telephone conferencing Guitar sustain effects generators Computerized voice recognition Surveillance systems Karaoke and DJ mixers GENERAL DESCRIPTION The SSM2166 integrates a complete and flexible solution for conditioning microphone inputs in computer audio systems It is also excellent for improving vocal clarity in communications and public address systems A low noise voltage controlled amplifier VCA provides a gain that is dynamically adjusted by a control loop to maintain a set compression characteristic The compression ratio is set by a single resistor and can be varied from 1 1 to over 15 1 relative to a user defined rotation point signals above the rotation point are limited to prevent overload and to eliminate popping In the 1 1 compression setting the Microphone Preamplifier with Variable Compression and Noise Gating SSM2166 can be programmed with a fixed gain of up to 20 dB this gain is in addition to the variable gain in other compression settings The i
12. V rms From Figure 21 the rotation point is inversely proportional to Rrorer For example a 1 kQ resistor would typically set the rotation point at 1 V rms whereas a 55 kQ resistor would typically set the rotation point at approximately 30 mV rms Rev D Page 10 of 20 Because limiting occurs for signals larger than the rotation point Vin gt Ver the rotation point effectively sets the maximum output signal level It is recommended that the rotation point be set at the upper extreme of the range of typical input signals so that the compression region covers the entire desired input signal range Occasional larger signal transients are then attenuated by the action of the limiter OUTPUT dB Vrp1 Vrp2 VRP3 7 INPUT dB 00357 020 Figure 21 Effect of Varying the Rotation Point VCA Gain Setting and Muting The maximum gain of the SSM2166 is set by the GAIN ADJUST pin Pin 2 via Ream This resistor with a range of 1 KQ to 20 kQ causes the nominal VCA gain to vary from 0 dB to approximately 20 dB respectively Setting the VCA gain to its maximum can also be achieved by leaving the GAIN ADJUST pin in an open condition no connect Figure 22 illustrates the effect on the transfer characteristic by varying this parameter For low level signal sources the VCA should be set to maximum gain using a 20 KQ resistor OUTPUT dB VRP INPUT dB 00357 021 Figure 22 Effect of Varying the VCA Gain Setting Th
13. VG CAP GAIN ADJUST on the SSM2166 by connecting the GAIN ADJUST pin Pin 2 through a 330 Q resistance to ground This is provided on the evaluation board via R11 and S1 Capacitor C5 connected between Pin 2 and ground and provided on the evaluation board can be used to avoid audible clicks when using the mute function To configure the SSM2166 input buffer for gain provisions for R1 R2 and C2 have been included To configure the input buffer for unity gain operation R1 and R2 are removed and a direct connection is made between the IN pin Pin 6 and the BUF OUT pin Pin 5 The output stage of the SSM2166 is capable of driving gt 1 V rms 3 V p p into gt 5 KQ loads and is externally available through an RCA phono jack provided on the board If the output of the SSM2166 is required to drive a lower load resistance or an audio cable the on board OP113 can be used To use the OP113 buffer insert Jumper J4 into the board socket for Pin 4 and Pin 5 and insert Jumper J5 into the board socket for Pin 6 and Pin 7 If the output buffer is not required remove Jumper J5 and insert Jumper J4 into board socket Pin 5 and Pin 7 There are no blocking capacitors either on the input or at the output of the buffer As a result the output dc level of the buffer matches the output dc level of the SSM2166 which is approximately 2 3 V A dc blocking capacitor can be inserted at Pin 6 and Pin 7 An evaluation board and setup procedure is avai
14. anges to Figure 11 and Figure 12 ssssssssssssssssssssssssssrsssssssssssseee 7 Changes to Figure 19 ima ayien NE 10 Changes to Figure 2Oriioesi ie ea E REEE 13 Added Top Branding Revision Reflecting Die Replacement Ee OS E OE TE EEE E E 17 5 08 Rev B to Rev C Updated F rMat srersssisereisiriiiiriaiiaias Universal Changes to Features Section and General Description SOCUOM AE EEE 1 Changes to Table T onien e peten renea KERE E E R R A 3 Changes 10 Table 2 si issssessisssecsiissdecoscasessctosevssaevabedssanstaseasssbedescsstunss 4 Deleted TPC 3 Renumbered Sequentially cesses 4 Changes to Table 4 Pin 8 Description Column uu eee 5 Changes to Figure 5 Figure 6 Figure 8 and Figure 9 6 Change to Figure Tlieir terie ae r AR S 7 Changes to Signal Path Section ss ssssssssssssssssssssssssssssssrseessssssssssseee 9 Signal Pathi A E ERA 8 Level Detector yanen aeann 9 Control Circuiti yssen aNs 10 Power DownFeat renceneeiiei ira 12 PCB Layout Considerations cccsssessesssesssesseesessesseesesseenes 12 Evaluation Boird cccsccsssessesseessessessesseessecsseesseesseesecssessneesies 13 Evaluation Board Examples cscscsessesessesesssessesseessesseesees 14 Evaluation Board Setup Procedure ecsseeeeeseeeeeeteeees 15 Test Equipment Setup irrser n ra r E N i 15 Setup Summary s teehee E ERE 16 Outline Dimensions s a a E ENKE 17 Ordering Guid scssssscsssesecnssvesnectisstosedsvsionsdasas
15. ations subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners 10uF i V 10uF OPTIONAL Dv NOISE GATE SET CONTROL ROTATION daa G6 SET COMP RATIO SET 25kQ 00357 001 One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 1996 2008 Analog Devices Inc All rights reserved TABLE OF CONTENTS Features aneis sae or r a S EEEE EE 1 Applications iesise sarean aaaea eaaa AEREA 1 General Descriptions aisvesciecssessieiaessvasevesslstncehidenstssevesssebvienatesotevedong 1 Functional Block Diagram and Typical Speech Application 1 REVISION HIStory rrey a R renee 2 Specifications irasra ER E EE EE EE 3 Absolute Maximum Ratings sss sssssssssssssssssssssssssssrssreesssssssssssene 4 Thermal Resistance 4 ESD Caution cscacincehtes ya he ethene eee eee 4 Pin Configuration and Function Descriptions 5 Typical Performance Characteristics csseessesseessessesseessesseens 6 Theory Of QPeratiOn ss cassssssvoseacisoaievsssvesnncsaoshessseratesasseohosesseeiorssssateee 8 Applications Information ccccsessssssesesseesessesssessesseessesseenee 8 REVISION HISTORY 7 08 Rev C to Rev D Changes to Figure 4 through Figure 9 oo eesesseessesseeseessesseene 6 Ch
16. e gain of the VCA can be reduced below 0 dB by making Reaw smaller than 1 KO Switching Pin 2 through 330 Q or less to GND mutes the output Either a switch connected to ground or a transistor can be used as shown in Figure 23 To avoid audible clicks when using the mute feature a capacitor C5 can be connected from Pin 2 to GND The value of the capacitor is arbitrary and should be determined empirically but a 0 01 uF capacitor is a good starting value SSM2166 NOTES 1 ADDITIONAL CIRCUIT DETAILS OMITTED FOR CLARITY 00357 022 Figure 23 Details of Mute Option Downward Expansion Threshold The downward expansion threshold or noise gate is deter mined via a second reference voltage internal to the control circuitry This second reference can be varied in the SSM2166 using a resistor Rare connected between the positive supply and the NOISE GATE SET pin Pin 9 The effect of varying this threshold is shown in Figure 24 The downward expansion threshold can be set between 300 uV rms and 20 mV rms by varying the resistance value between Pin 9 and the supply voltage Like the ROTATION SET pin the downward expansion threshold is inversely proportional to the value of this resistance setting this resistance to 1 MO sets the threshold at approximately 250 uV rms whereas a 10 kQ resistance sets the threshold at approximately 20 mV rms This relationship is illustrated in Figure 5 A potentiometer network is provided on the evalua
17. ession Ratio Changing the scaling of the control signal fed to the VCA causes a change in the circuit compression ratio r This effect is shown in Figure 20 The compression ratio can be set by connecting a resistor between the COMP RATIO SET pin Pin 10 and GND Lowering Rcomp gives smaller compression ratios as shown in Figure 19 with values of approximately 17 kQ or less resulting in a compression ratio of 1 1 AGC performance is achieved with compression ratios between 2 1 and 15 1 and is dependent on the application A 100 kO potentiometer can be used to allow this parameter to be adjusted On the evaluation board see Figure 26 an optional resistor can be used to set the compression equal to 1 1 when the wiper of the potentiometer is at its full counterclockwise CCW position COMPRESSION RATIO ROTATION POINT 100mV rms 300mV rms 00357 031 TYPICAL Rcomp VALUES IN KO Figure 19 Compression Ratio vs Rcomp Pin 10 to GND 7 NCA GAIN 1 OUTPUT dB VDE INPUT dB VRP 00357 019 Figure 20 Effect of Varying the Compression Ratio Rotation Point An internal dc reference voltage in the control circuitry used to set the rotation point is user specified as illustrated in Figure 9 The effect on rotation point is shown in Figure 21 By varying a resistor Rror pr connected between the positive supply and the ROTATION SET pin Pin 11 the rotation point may be varied by approximately 20 mV rms to 1
18. external capacitor connected to the AVG CAP pin Pin 8 For optimal low frequency operation of the level detector down to 10 Hz the value of the capacitor should be 2 2 uF Some experimentation with larger values for the AVG CAP may be necessary to reduce the effects of excessive low frequency ambient background noise The value of the averaging capacitor affects sound quality too small a value for this capacitor may cause a pumping effect for some signals while too large a value may result in slow response times to signal dynamics Electrolytic capacitors are recommended for lowest cost and should be in the range of 2 uF to 47 uF Capacitor values from 18 uF to 22 uF have been found to be more appropriate in voice band applications where capacitors on the low end of the range seem more appropriate for music program material The rms detector filter time constant is approximately given by 10 x Cave milliseconds where Cave is in uF This time constant controls both the steady state averaging in the rms detector as well as the release time for compression that is the time it takes for the system gain to react when a large input is followed by a small signal The attack time the time it takes for the gain to be reduced when a small signal is followed by a large signal is controlled partly by the AVG CAP value but is mainly controlled by internal circuitry that speeds up the attack for large level changes This limits overload time to less than
19. f 500 mV but not in limiting Note the value around 15 mV Next reduce the input to 1 10 of the value noted around 1 5 mV for a change of 20 dB Next adjust R6 COMP RATIO ADJ CW until the output is 160 mV for an output change of 10 dB The compression which is the ratio of the output change to the input change in decibels dB has been set to 2 1 Step 7 Setting the Noise Gate With the input set at 100 uV observe the output on the oscilloscope and adjust R7 NOISE GATE ADJ CCW until the output drops rapidly Rock the control back and forth to find the knee The noise gate has been set to 100 uV The range of the noise gate is from 0 3 mV to over 0 5 mV relative to the output of the buffer To fit this range to the application it may be necessary to attenuate the input or apportion the buffer gain and VCA gain differently Step 8 Listening At this time it may be desirable to connect an electret micro phone to the SSM2166 and listen to the results Be sure to include the proper power for the internal FET of the microphone usually 2 V dc to 5 V dc through a 2 2 kQ resistor Experiment with the settings to hear how the results change Varying the averaging capacitor C4 changes the attack and decay times which are best determined empirically The compression ratio keeps the output steady over a range of microphone to speaker distances and the noise gate keeps the background sounds subdued Step 9 Recording Values
20. ion Point R6 0kQ to 100kQ CCW 00 1 1 CW to increase compression Noise Gate R7 0kONto1MQ CW 1MQ 300 uV CCW to increase threshold Table 7 Demonstration Board Parts List Component Value Description R1 10 KO resistor Feedback R2 10 kO resistor Input R3 50 kQ potentiometer Rotation point adjust R4 500 O resistor Rotation point fixed R5 0 Q resistor Compression ratio fixed R6 100 KQ potentiometer Compression ratio adjust R7 1 MO potentiometer Noise gate adjust R8 500 O resistor Noise gate fixed R9 1 KQ resistor Gain adjust fixed R10 20 kQ potentiometer Gain adjust R11 330 O resistor Mute R12 100 KO resistor Power down pull up C1 0 1 uF capacitor Input dc block C2 1 uF capacitor Buffer low F G 1 G3 0 1 uF capacitor V bypass C4 2 2 uF to 22 uF capacitor Average capacitor C5 0 01 uF capacitor Mute click suppress C6 10 uF capacitor Coupling C7 10 uF capacitor VCA noise dc balance IC1 SSM2166 MIC preamp IC2 OP113 IC Operational amplifier output buffer S1 SPST Switch Mute J1 1 8 inch mini phone plug jumper MIC input J2 RCA female jumper Output jack Rev D Page 16 of 20 OUTLINE DIMENSIONS 4 00 oi 575 3 80 0 1496 E 8 75 0 3445 8 55 0 3366 6 20 0 2441 5 80 0 2283 gt le 1 27 10 0500 0 50 0 0197 gn 1 75 0 0689 0 25 0 0098 0 25 0 0098 1 35 0 0531 8 0 10 0 0039 oy a L COPLANARITY lle SEATING a i laalaa 0 10 0 51 0 0201 PLANE 0 25 0 0098
21. is a complete microphone signal conditioning system on a single integrated circuit Designed primarily for voice band applications this integrated circuit provides amplification rms detection limiting variable compression and downward expansion An integral voltage controlled amplifier VCA provides up to 60 dB of gain in the signal path with approximately 30 kHz bandwidth Additional gain is provided by an input buffer op amp circuit that can be set anywhere from 0 dB to 20 dB for a total signal path gain of up to 80 dB The device operates on a single 5 V supply accepts input signals up to 1 V rms and produces output signal levels gt 1 V rms 3 V p p into loads gt 5 kQ The internal rms detector has a time constant set by an external capacitor The SSM2166 contains an input buffer and automatic gain control AGC circuit for audio band and voice band signals Circuit operation is optimized by providing a user adjustable time constant and compression ratio A downward expansion noise gating feature eliminates circuit noise in the absence of an input signal The SSM2166 allows the user to set the downward expansion threshold the limiting threshold rotation point the input buffer fixed gain and the internal VCA nominal gain at the rotation point The SSM2166 also features a power down mode and muting capability SIGNAL PATH Figure 16 illustrates the block diagram of the SSM2166 The audio input signal is processed by the input
22. l and that no clipping occurs in the buffer and to set the limiting and noise gating knees SSM2166 PREA EVALUATION OSCILLOSCOPE BOARD AC AC VOLTMETER VOLTMETER 00357 030 Figure 31 Test Equipment Setup Step 1 Configure the Buffer The SSM2166 has an input buffer that can be used when the overall gain required exceeds 20 dB the maximum user selectable gain of the VCA In the example the desired output is 500 mV for an input of 15 mV requiring a total gain of 30 dB Set the buffer gain at 20 dB and adjust the VCA for 10 dB In the socket pins provided on the evaluation board insert R1 100 kQ and R2 11 kQ The buffer gain is set to 20 dB x10 Step 2 Initializing Potentiometers With the power off preset the potentiometers per Table 6 Step 3 Testing Setup With the power on adjust the generator for an input level of 15 mV 1 kHz The output meter should indicate approximately 100 mV if not check the setup Step 4 Adjusting the Rotation Point Set the input level to 15 mV and observe the output on the oscilloscope Adjust R3 ROTATION PT ADJ until the output level just begins to drop then reverse so that the output is 500 mV The limiting has been set to 500 mV Step 5 Adjusting the VCA Gain Set the input level to 15 mV Adjust R10 GAIN ADJ clockwise CW for an output level of 500 mV The VCA gain has been set to 10 dB Step 6 Adjusting the Compression Ratio Set the input signal for an output o
23. lable from a Analog Devices Inc sales representative SET SSM2166 COMP RATIO SET OUTPUT 6 JACK RCA 00357 025 Figure 26 Evaluation Board Schematic Rev D Page 13 of 20 3 g Z R3 ROTATION c1 Ray PT ADJ CEs ms coe RATIO R NOISE GATE 00357 026 00357 027 Figure 28 Evaluation Board Topside Metallization Not to Scale 00357 028 Figure 29 Evaluation Board Backside Metallization Not to Scale EVALUATION BOARD EXAMPLES To illustrate how easy it is to program the SSM2166 a practical example is provided The SSM2166 was used to interface an electret type microphone to a postamplifier The evaluation board or the circuit configuration shown in Figure 26 can be used The signal from the microphone was measured under actual conditions to vary from 1 mV to 15 mV The postamplifier requires no more than 500 mV at its input The required gain from the SSM2166 is therefore Grorat 20 x log 500 15 30 dB The input buffer gain is set to 20 dB and the VCA gain is adjusted to 10 dB The limiting or rotation point is set at 500 mV output A 2 1 compression ratio and a noise gate threshold that operates below 100 pV is also used These objectives are summarized in Table 5 The transfer characteristic implemented is illustrated in Figure 30 Table 5 Objective Specifications Parameter Value Input Range 1 mV to 15 mV Output Range To 500 mV Limiting Level 500 mV Compression
24. llustrated in Figure 26 As a design aid the layouts for the topside silkscreen and the topside and backside metallization layers are shown in Figure 27 Figure 28 and Figure 29 Although not shown to scale the finished dimension of the evaluation board is 3 5 inches by 3 5 inches and comes complete with pin sockets and a sample of the SSM2166 Signal sources are connected to the SSM2166 through a 1 8 inch phone jack where a 0 1 uF capacitor couples the input signal to the AUDIO IN pin Pin 7 As shown in Figure 26 and in microphone applications the phone jack shield can be optionally connected to the ground plane of the board Jumper J1 inserted into the board socket for Pin 1 and Pin 2 or to the VCAxr input at Pin 4 J1 inserted into the board socket for Pin 1 and Pin 3 If the signal source is a waveform or function generator the phone jack shield should be connected to ground For ease in making adjustments for all configuration parameters single turn potentiometers are used throughout Optional Jumper J2 connects the COMP RATIO SET pin to ground and sets the SSM2166 for no compression that is compression ratio 1 1 Optional Jumper J3 connects the POWER DOWN Pin 12 input to ground for normal operation J3 can be replaced by an open drain logic buffer for a digitally controlled shutdown function An output signal mute function can be implemented ROTATION PT ADJ R4 BUF OUT VCAjy ROTATION SET 10kO AUDIO IN VCAR A
25. m rotation point derives from the observation that the straight line in the compression region rotates about this point on the input output characteristic as the compression ratio is changed The gain of the system with an input signal level of Vee is fixed by Ream regardless of the compression ratio and is the nominal gain of the system The nominal gain of the system can be increased by the user via the on board VCA by up to 20 dB Additionally the input buffer of the SSM2166 can be configured to provide fixed gains of 0 dB to 20 dB with R1 and R2 Input signals below Voz are downward expanded that is a 1 dB change in the input signal level causes approximately a 3 dB change in the output level As a result the gain of the system is small for very small input signal levels even though it may be quite large for small input signals above Vor The down ward expansion threshold Voz is set externally by the user via Rear at Pin 9 NOISE GATE SET The SSM2166 provides an active high CMOS compatible digital input whereby a power down feature reduces the device supply current to less than 100 uA LIMITING THRESHOLD LIMITING ROTATION POINT REGION Gf of 1 7 7 VCA GAIN 1 COMPRESSION DOWNWARD REGION EXPANSION THRESHOLD NOISE GATE OUTPUT dB DOWNWARD EXPANSION REGION INPUT dB 00357 015 Figure 15 General Input Output Characteristics APPLICATIONS INFORMATION The SSM2166
26. nput buffer can also be configured for front end gains of 0 dB to 20 dB A downward expander noise gate prevents amplification of noise or hum This results in optimized signal levels prior to digitization thereby eliminating the need for additional gain or attenuation in the digital domain that may add noise or impair accuracy of speech recognition algorithms The compression ratio and time constants are set externally A high degree of flexibility is provided by the VCA gain rotation point and noise gate adjustment pins The SSM2166 is an ideal companion product for audio codecs used in computer systems such as the AD1845 The SSM2166 is available in a 14 lead SOIC package and is guaranteed for operation over the extended industrial temperature range of 40 C to 85 C 0 COMP RATIO 10 1 10 COMP RATIO 2 1 a a 20 2 COMP RATIO 1 1 E 30 40 70 60 50 40 30 20 10 INPUT dBu o 00357 002 Figure 1 Compression and Gating Characteristics with 10 dB of Fixed Gain The Gain Adjust Pin Can Be Used to Vary This Fixed Gain Amount FUNCTIONAL BLOCK DIAGRAM AND TYPICAL SPEECH APPLICATION R1 10kQ Rev D Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specific
27. o the VCA The inverting input of the VCA is available at the VCAz pin Pin 4 and exhibits an input impedance of 1 kQ as well As a result this pin can be used for differential inputs or for the elimination of grounding problems by connecting a capacitor whose value equals that used in series with the VCAw pin to ground see Figure 26 for more details The output impedance of the SSM2166 is typically less than 75 Q and the external load on Pin 13 should be gt 5 kQ The nominal output dc voltage of the device is approximately 2 2 V Use a blocking capacitor for grounded loads The bandwidth of the SSM2166 is quite wide at all gain settings The upper 3 dB point is approximately 30 kHz at gains as high as 60 dB using the input buffer for additional gain circuit bandwidth is unaffected The gain bandwidth GBW plots are shown in Figure 11 The lower 3 dB cutoff frequency of the SSM2166 is set by the input impedance of the VCA 1 kQ and C6 While the noise of the input buffer is fixed the input referred noise of the VCA is a function of gain The VCA input noise is designed to be a minimum when the gain is at a maximum thereby optimizing the usable dynamic range of the part A plot of wideband peak to peak output noise is shown in Figure 10 BUF OUT 1 VCAin LEVEL DETECTOR LEVEL DETECTOR The SSM2166 incorporates a full wave rectifier and true rms level detector circuit whose averaging time constant is set by an
28. or value is approximately 1 KQ For 10 dB of fixed gain the resistor value is approximately 2 kQ to 3 kQ For resistor values lt 1 KO the VCA can attenuate or mute see Figure 6 3 VCA VCA Input Pin A typical connection is a 10 uF capacitor from the buffer output pin Pin 5 to this pin 4 VCAR Inverting Input to the VCA This input can be used as a nonground reference for the audio input signal see the Applications Information section 5 BUF OUT Input Buffer Amplifier Output Pin This pin must not be loaded by capacitance to ground 6 IN Inverting Input to the Buffer A 10 kQ feedback resistor R1 from the buffer output Pin 5 to this input pin and a resistor R2 from this pin through a 1 F capacitor to ground give gains of 6 dB to 20 dB for R2 10 kN to 1 1 kQ 7 AUDIO IN Input Audio Signal The input signal should be ac coupled 0 1 uF typical into this pin 8 AVG CAP Detector Averaging Capacitor A capacitor 1 uF to 22 UF to ground from this pin is the averaging capacitor for the detector circuit 9 NOISE GATE SET Noise Gate Threshold Set Point A resistor to V sets the level below which input signals are downward expanded For a 0 7 mV threshold the resistor value is approximately 380 kQ Increasing the resistor value reduces the threshold see Figure 5 10 COMP RATIO SET Compression Ratio Set Pin A resistor to ground from this pin sets the compression ratio as shown in Figure 2 Figure 19 gives resistor values for vario
29. st be exercised in the layout of the PCB that contains the IC and its associated components The following recommendations should be considered and or followed e In some high system gain applications the shielding of input wires to minimize possible feedback from the output of the SSM2166 back to the input circuit may be necessary e A single point star ground implementation is recom mended in addition to maintaining short lead lengths and PCB runs The evaluation board layout shown in Figure 27 Figure 28 and Figure 29 demonstrates the single point grounding scheme In applications where an analog ground and a digital ground are available the SSM2166 and its surrounding circuitry should be connected to the analog ground of the system Because of these recommendations wire wrap board connections and grounding implementations should be avoided e The internal buffer of the SSM2166 was designed to drive only the input of the internal VCA and its own feedback network Stray capacitive loading to ground from the BUF OUT pin in excess of 5 pF to 10 pF can cause excessive phase shift and can lead to circuit instability e When using high impedance sources 25 KQ system gains in excess of 60 dB are not recommended This configuration is rarely appropriate because virtually all high impedance inputs provide larger amplitude signals that do not require as much amplification When using high impedance sources however it can be advantageous
30. tion board for this adjustment In general the downward expansion threshold should be set at the lower extreme of the desired range of the input signals so that signals below this level are attenuated OUTPUT dB V 7 DE2 VDE1 VDE3 INPUT dB 7 Figure 24 Effect of Varying the Downward Expansion Noise Gate Threshold 00357 023 Rev D Page 11 of 20 POWER DOWN FEATURE The supply current of the SSM2166 can be reduced to less than 100 uA by applying an active high 5 V CMOS compatible input to the POWER DOWN pin Pin 12 In this state the input and output circuitry of the SSM2166 assumes a high impedance state as such the potentials at the input pin and the output pin are determined by the external circuitry connected to the SSM2166 The SSM2166 takes approximately 200 ms to settle from a power down to power on command For power on to power down the SSM2166 requires more time typically less than 1 second Cycling the power supply to the SSM2166 can result in quicker settling times the off to on settling time of the SSM2166 is less than 200 ms while the on to off settling time is less than 1 ms In either implementation transients may appear at the output of the device To avoid these output transients use mute control of the VCA gain as previously mentioned PCB LAYOUT CONSIDERATIONS Because the SSM2166 is capable of wide bandwidth operation and can be configured for as much as 80 dB of gain special care mu
31. to shunt the source with a capacitor to ground at the input pin of the IC Pin 7 to lower the source impedance at high frequencies as shown in Figure 25 A capacitor with a value of 1000 pF is a good starting value and sets a low pass corner at 31 kHz for 5 kQ sources In applications where the source ground is not as clean as would be desirable a capacitor illustrated as C7 on the evaluation board from the VCAz input to the source ground may prove beneficial This capacitor is used in addition to the grounded capacitor illustrated as C2 on the evaluation board used in the feedback around the buffer assuming that the buffer is configured for gain m c1 0 14F AUDIO INO Rg gt 5kQ AUDIO IN Cx men SSM2166 T NOTES 1 ADDITIONAL CIRCUIT DETAILS OMITTED FOR CLARITY 00357 024 Figure 25 Circuit Configuration for Use with High Impedance Signal Sources The value of C7 should be the same as C6 which is the capacitor value used between BUF OUT and VCAw This connection makes the source ground noise appear as a common mode signal to the VCA allowing the common mode noise to be rejected by the VCA differential input circuitry C7 can also be useful in reducing ground loop problems and in reducing noise coupling from the power supply by balancing the impedances connected to the inputs of the internal VCA Rev D Page 12 of 20 EVALUATION BOARD A schematic diagram of the SSM2166 evaluation board is i
32. toscasestosadsvatensddense 17 Added Figure 9 sesesssesinecscussiveswtcsepsssnresvasiulsscsuseannssewesteecusasennvemnaers 10 Deleted Figure 14 and Figure 17 12 Deleted Other Versions Section atl Changes to Figure 26 essssessssessssssereessreressssreresssreresssrerresssreressss 13 Changes to Figure 27 areir rieri ee C EER 14 Changes to Test Equipment Section ssssssssssssssssssssssssssssssssteessss 15 Added Table 6 niin si NEA E 16 Added Table 7 sinuca aa E aa 16 Updated Outline DiMensionS ssssssessessssessssssreresssrrrrsssseeressseeeres 17 Changes to Ordering Guide ssssessessssessesssreresssserressssereessseeressss 17 3 03 Rev A to Rev B Deleted PDIP Package ss ssssssssssssossstssrssssssssssssssstressssssssss Universal Change to General Description ssssssssssssessessssssssstrrtsssssssssstessssssss 1 Changes to Thermal Characteristics cccssesssssessessssesssesseeseens 2 Changes to Ordering Guide ciceesessesesseesesessessessesseesseeneens 2 Deleted 14 Lead PDIP Outline Dimensions 0 0 0 15 Updated 14 Lead Narrow Body SOIC Outline Dimensions 15 Rev D Page 2 of 20 SPECIFICATIONS V 5V f 1 kHz Rt 100 kQ Roars 600 kO Rrorrr 3 KO Reomp 0 Q R1 0 Q R2 Q Ta 25 C unless otherwise noted Vin 300 mV rms Table 1 Parameter Symbol Conditions Min Typ Max Unit AUDIO SIGNAL PATH Voltage Noise Density en 15 1 Compression 17 nVv VHz
33. us rotation points 11 ROTATION SET Rotation Point Set Pin This pin is set by adding a resistor to the positive supply This resistor together with the gain adjust pin determines the onset of limiting A typical value for this resistor is 17 KQ for a 100 mV rotation point Increasing the resistor value reduces the level at which limiting occurs see Figure 9 12 POWER DOWN Power Down Pin Connect this pin to ground for normal operation Connect this pin to the positive supply for power down mode 13 OUTPUT Output Signal 14 V Positive Supply 5 V Nominal Rev D Page 5 of 20 TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT dBu NOISE GATE mV rms VCA GAIN dB COMP RATIO cw aa RATIO 19 1 E RATIO 2 1 COMP RATIO 1 1 Ta 25 C V 5V Vin 300mV rms 1kHz R 100k NOISE GATE SETTING 550yV rms ROTATION SET 300mV rms GAIN ADJUST 1 25kQ 80 70 60 50 40 30 20 10 0 INPUT dBu Figure 4 Output vs Input Characteristics 100 Ta 25 C V 5V RL 100k COMPRESSION RATIO 2 1 ROTATION SET 700mV rms 10 GAIN ADJUST 1 56kQ 1 0 1 0 50 100 150 200 250 300 350 400 450 500 550 600 650 Reate kQ Figure 5 Noise Gate vs Reame Pin 9 to V 20 18 16 14 12 10 Ta 25 C 8 V 5V 6 Vin 77 5mV rms 1kHz R 100k 4 NOISE GATE SETTING 550yV rms
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ANALOG DEVICES SSM2166 English products handbook Rev D