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LINEAR TECHNOLOGY - LTC3555/LTC3555-X High Ef ciency USB Power Manager + Triple Step-Down DC/DC handbook

1. unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VGHRG CHRG Pin Output Low Voltage IcHRG 65 100 mV IcHRG CHRG Pin Leakage Current VEHRG 5V 1 Row Battery Charger Power FET On 0 18 Q Resistance Between and BAT Junction Temperature in Constant 110 2 Temperature Mode NTC Cold Temperature Fault Threshold Rising Threshold 75 0 76 5 78 0 VpUS Voltage Hysteresis 1 5 96 Vuor Hot Temperature Fault Threshold Falling Threshold 33 4 34 9 36 4 Vpus Voltage Hysteresis 1 5 96 Vpis NTC Disable Threshold Voltage Falling Threshold 0 7 17 2 1 VBus Hysteresis 50 mV Inte NTC Leakage Current VBUS 5V 50 50 nA Ideal Diode VFWD Forward Voltage IvouT 10mA 2 mV lyour 10mA 15 mV Rpropout Internal Diode On Resistance Dropout Vays 0 18 Q IMAX_DIODE Internal Diode Current Limit 1 6 A Always On 3 3V LDO Supply Vipo3v3 Regulated Output Voltage lt lt 29 3 1 3 3 3 5 V 1003 3 Closed Loop Output Resistance 4 Q Ro 100393 Dropout Output Resistance 23 Q Logic 1 EN1 EN2 EN3 Logic Low Input Voltage 0 4 V Vin Logic High Input Voltage 12 V Ipp1 EN2 ENS 2 Pull Down Currents 12C Port Input Supply Voltag
2. 15 LIC3555 LIC3555 X OPERATION If the load current increases beyond the power allowed from the switching regulator additional power will be pulled from the battery via the ideal diode Furthermore if power to Vays USB or wall power is removed then all of the application power will be provided by the battery via the ideal diode The transition from input power to battery power at Vour will be quick enough to allow only the capacitor to keep from drooping The ideal diode consists of a precision amplifier that enables a large on chip P channel MOSFET transistor whenever the voltage at Vour is approximately 15mV below the voltage 2200 VISHAY 512333 2000 OPTIONAL EXTERNAL 1800 IDEAL DIODE 1600 1400 Z B LTC3555 e 1200 IDEAL DIODE 88 1000 800 600 ON 400 SEMICONDUCTOR MBRM120LT3 200 0 0 60 120 180 240 300 360 420 480 FORWARD VOLTAGE mV BAT Vout 3555 02 at BAT The resistance of the internal ideal diode is approxi mately 180m If this is sufficient for the application then no external components are necessary However if more conductance is needed an external P channel MOSFET transistor can be added from BAT to Vout When an external P channel MOSFET transistor is pres ent the GATE pin of the LTC3555 family drives its gate for automatic ideal diode control The source of the externa
3. 355514 2 AL Ue ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating LIC 3555 LIC3555 X temperature range otherwise specifications are at Ta 25 C Vgys 5V BAT 3 8V DVcc 3 3V 1k unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS hciPROG Ratio of Measured Vgus Current to 1x Mode 224 mA mA Note 4 CLPROG Program Current 5x Mode 1133 mA mA 10x Mode 2140 mA mA Suspend Mode 11 3 mA mA lour PoweRPATH Vour Current Available Before 1x Mode BAT 3 3V 135 mA Loading BAT 5x Mode BAT 3 3V 672 mA 10x Mode BAT 3 3V 1251 mA Suspend Mode 0 32 mA Vci PROG CLPROG Servo Voltage in Current 1x 5x 10x Modes 1 188 V Limit Suspend Mode 100 mV VuvLO VBUS Vgus Undervoltage Lockout Rising Threshold 4 30 4 35 V Falling Threshold 3 95 4 00 V Vuvio veus BAr Vgus to BAT Differential Undervoltage Rising Threshold 200 mV Lockout Falling Threshold 50 Vout Voltage 1x 5x 10x Modes OV lt lt 4 2V 34 BAT 03 47 V lout OMA Battery Charger Off USB Suspend Mode 250 4 5 4 6 4 7 V fosc Switching Frequency 1 8 2 25 2 7 MHz Rpmos_ POWERPATH PMOS On Resistance 0 18 Q 5 NMOS On Resistance 0 30 Q IPEAK POWERPATH Peak Switch Current Limit 1x 5x Modes 2 A 10x 3 A Battery Charger 0 BAT R
4. A2 M AO Switching Regulator 3 Servo Voltage 0 0 0 0 0 425V 0 0 0 1 0 450V 0 0 1 0 0 475V 0 0 1 1 0 500V 0 1 0 0 0 525V 0 1 0 1 0 550V 0 1 1 0 0 575V 0 1 1 1 0 600V 1 0 0 0 0 625V 1 0 0 1 0 650V 1 0 1 0 0 675V 1 0 1 1 0 700V 1 1 0 0 0 725V 1 1 0 1 0 750V 1 1 1 0 0 775V 1 1 1 1 0 800V Table 5 General Purpose Switching Regulator Modes B6 B5 SDA SCL Switching Regulator Mode 0 0 Pulse Skip 0 1 Forced Burst Mode Operation 1 0 LDO Mode 1 1 Burst Mode Operation SDA and SCL take on this context only when DVcc master The master releases the SDA line high during the acknowledge clock cycle The slave receiver must pull down the SDA line during the acknowledge clock pulse so that it remains a stable low during the high period of this clock pulse Slave Address The LTC3555 family responds to only one 7 bit address which has been factory programmed to 0001001 The eighth bit of the address byte R W must be 0 for the 11063555 family to recognize the address since it is a write only device This effectively forces the address to be eight bits long where the least significant bit of the address is 0 If the correct seven bit address is given but the R W bit is 1 the LTC3555 family will not respond Bus Write Operation The master initiates communication with the T3555 family with a START condition and 7 bit address followed by the write bit R W 0 If the addres
5. FUNCTIONS SW1 Pin 17 Power Transmission Pin for Switching Regulator 1 Vina Pin 18 Power Input for Switching Regulator 1 This pin will generally be connected to Vour MLCC capacitor is recommended on this pin FB1 Pin 19 Feedback Input for Switching Regulator 1 When regulator 15 control loop is complete this pin servos to a fixed voltage of 0 8V PROG Pin 20 Charge Current Program and Charge Current Monitor Pin Connecting a resistor from PROG to ground programs the charge current If sufficient in put power is available in constant current mode this pin servos to 1V The voltage on this pin always represents the actual charge current CHRG Pin 21 Open Drain Charge Status Output The CHRG pin indicates the status of the battery charger Four possible states are represented by CHRG charging not charging unresponsive battery and battery temperature out of range CHRG is modulated at 35kHz and switches between a low and a high duty cycle for easy recogni tion by either humans or microprocessors See Table 1 CHRG requires a pull up resistor and or LED to provide indication GATE Pin 22 Analog Output This pin controls the gate of an optional external P channel MOSFET transistor used to supplement the ideal diode between and BAT The external ideal diode operates in parallel with the internal ideal diode The source of the P channel MOSFET should be connected to Vour and the drain should be
6. The LTC3555 family will pause charging when the resistance of the NTC thermistor drops to 0 54 times the value of R25 or approximately 5 4k For a Vishay Curve 1 thermistor this corresponds to approximately 40 C If the battery charger is in constant voltage float mode the safety timer also pauses until the thermistor indicates a return to a valid temperature As the tempera ture drops the resistance of the NTC thermistor rises The LTC3555 family is also designed to pause charging when the value of the NTC thermistor increases to 3 25 times the value of R25 For Vishay Curve 1 this resistance 32 5k corresponds to approximately 0 C The hotand cold comparators each have approximately 3 C of hysteresis to prevent oscillation about the trip point Grounding the NTC pin disables the NTC charge pausing function Thermal Regulation To optimize charging time an internal thermal feedback loop may automatically decrease the programmed charge current This will occur if the die temperature rises to approximately 110 C Thermal regulation protects the LTC3555 family from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the part or external components The benefit of the LTC3555 family thermal regulation loop is that charge current can be set according to actual co
7. FEATURES Power Manager High Efficiency Switching PowerPath Controller with Bat Track Adaptive Output Control Programmable USB or Wall Current Limit 100mA 500mA 1A Full Featured Li lon Polymer Battery Charger 1 5A Maximum Charge Current Internal 180mQ2 Ideal Diode External Ideal Diode Controller Powers Load in Battery Mode Low No Load Quiescent Current when Powered from BAT lt 32 DC DCs m Triple High Efficiency Step Down DC DCs 1 400 400 All Regulators Operate at 2 25MHz Dynamic Voltage Scaling on Two Outputs 120 or Independent Enable Controls Low No Load Quiescent Current 20 28 Pin 4mm x 5mm x 0 75mm QFN Package APPLICATIONS m HDD Based MP3 Players PDAs GPS PMPs m Portable Medical Products m Handheld Instrumentation Other USB Based Handheld Products LIC3555 LTC3555 X ECHNOLOGY High Efficiency USB Power Manager Triple Step Down DC DC DESCRIPTION The LTC 3555 family are highly integrated USB com patible power management and battery charger ICs for Li lon Polymer battery applications They include a high efficiency current limited switching PowerPath manager with automatic load prioritization a battery charger an ideal diode and three general purpose synchronous step down switching regulators The LTC3555 family limits input current to either 100mA or 500mA for USB applications or 1A for adapter powered applications Unlike linear ch
8. pins are logically OR ed with their corresponding bits in the 126 serial port See Table 2 Exposed Pad Pin 29 Ground The Exposed Pad should be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the part 355514 12 M LIC3555 LTC 3555 X BLOCK DIAGRAM 2 25MHz PowerPath SWITCHING REGULATOR SUSPEND LDO 500 E CC CV CHARGER BATTERY TEMPERATURE 3 MONITOR gt 6V ENABLE CHARGE STATUS 400mA 2 25MHz SWITCHING REGULATOR 1 ENABLE 400mA 2 25MHz SWITCHING REGULATOR 2 ENABLE 1 2 25 2 SWITCHING REGULATOR 3 3555 BD 355514 AL Ure 13 3555 3555 STOP DATA BYTE A DATA BYTE B ADDRESS WR 0 0 0 1 0 0 1 0 A6 AS AA M AO B7 B6 BS B4 B2 BO START SDA 0 0 0 1 0 0 1 0 ACK ACK START CONDITION REPEATED START CONDITION tsu STA lt HD STA STOP CONDITION START CONDITION OPERATION Introduction The LTC3555 family are highly integrated power manage ment ICs which include a high efficiency switch mode PowerPath controller a battery charger an ideal diode an always on LDO and three general purpose step down switching regulators The entire chip is controlled by either direct digital control by an 126 serial p
9. Continuous operation above the specified maximum operating junction temperature may impair device reliability Note 4 Total input current is the sum of quiescent current lygysq and measured current given by 1 Note 5 is expressed as a fraction of measured full charge current with indicated PROG resistor Note 6 FBx above regulation such that regulator is in sleep Specification does not include resistive divider current reflected back to Vinx Note 7 Guaranteed by design but not explicitly tested Note 8 Applies to pulse skip Burst Mode operation and forced Burst Mode operation only Note 9 Inductor series resistance adds to open loop Royt 355514 AL Ure LIC3555 LTC3555 X TYPICAL PERFORMANCE CHARACTERISTICS Ideal Diode V I Characteristics Ideal Diode Resistance vs Battery Voltage 10 INTERNAL IDEAL DIODE WITH SUPPLEMENTAL EXTERNAL VISHAY 512333 05 INTERNAL IDEAL DIODE lt 06 z INTERNAL IDEAL 2 DIODE ONLY 2 04 c INTERNAL IDEAL DIODE WITH SUPPLEMENTAL 02 EXTERNAL VISHAY Vgyg OV 512333 05 us 5V 0 L 0 0 04 008 012 016 020 27 30 33 36 39 42 FORWAR
10. LIC3555 LTC3555 X over their rated voltage and temperature ranges Y5V ceramic capacitors have the highest packing density but must be used with caution because of their extreme non linear characteristic of capacitance verse voltage The actual in circuit capacitance of a ceramic capacitor should be measured with a small AC signal as is expected in circuit Many vendors specify the capacitance versus voltage with a 1VRMS AC test signal and as a result overstate the capacitance that the capacitor will present in the application Using similar operating conditions as the application the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires General Purpose Switching Regulator Inductor Selection Many different sizes and shapes of inductors are avail able from numerous manufacturers Choosing the right inductor from such a large selection of devices can be overwhelming but following a few basic guidelines will make the selection process much simpler The general purpose step down converters are designed to work with inductors in the range of 2 2uH to 10pH For most applications a 4 7 inductor is suggested for the lower power switching regulators 1 and 2 and 2 2uH is recommended for the more powerful switching regula tor 3 Larger value inductors reduce ripple current which improves output ripple voltage Lower value induc
11. it with Vour connected metal which should generally be less that one volt higher than GATE When laying out the printed circuit board the following checklist should be used to ensure proper operation of the LTC3555 family 1 Are the capacitors at Vays Vint Viyo and Ving as close as possible to the 11035552 These capacitors provide the AC currentto the internal power MOSFETS and their drivers Minimizing inductance from these capacitors to the LTC3555 is a top priority 2 Are Cour L1 closely connected The plate of Cour returns current to the GND plane 3 Keep sensitive components away from the SW pins LIC 3555 LIC3555 X Figure 7 Higher Frequency Ground Currents Follow Their Incident Path Slices in the Ground Plane Cause High Voltage and Increased Emissions Battery Charger Stability Considerations The LTC3555 family s battery charger contains both a constant voltage and a constant current control loop The constant voltage loop is stable without any compen sation when a battery is connected with low impedance leads Excessive lead length however may add enough series inductance to require a bypass capacitor of at least from BAT to GND Furthermore when the battery is disconnected a 100uF MLCC capacitor in series with a 0 30 resistor from BAT to GND is required to prevent oscillation High value low ESR multilayer ceramic chip capacitors reduce the constant voltage loop phase margin p
12. 3555 PACKAGE DESCRIPTION UFD Package 28 Lead Plastic QFN 4mm x 5mm Reference LTC DWG 05 08 1712 Rev B EET e 22 2 65 0 05 lt 3 65 0 05 I PACKAGE OUTLINE 000000100 Y 0 25 40 05 0 50 BSC lt 3 50 REF lt 4 10 0 05 EP 5500 05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 NOTCH o R 0 20 OR 0 35 0 0 45 CHAMFER 4 00 0 10 0 75 50 05 2 pem 2 SIDES gt 1 0 40 0 10 PIN 1 lt 4 TOP MARK NOTE 6 T I I 2 T 5 00 0 10 2 SIDES 3 50 REF T 1 Y Y UFD28 QFN 0506 REV B lt 0 200 REF 025 0 05 lt 0 00 0 05 lt 0 50 BSC BOTTOM VIEW EXPOSED PAD NOTE 1 DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE 220 VARIATION WXXX X 2 DRAWING NOT TO SCALE 3 ALL DIMENSIONS ARE IN MILLIMETERS 4 DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH MOLD FLASH IF PRESENT SHALL NOT EXCEED 0 15mm ON ANY SIDE 5 EXPOSED PAD SHALL BE SOLDER PLATED 6 SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 355514 Information furnished by Linear Technology Corporation is believed to be accurate and reliable 7 LINEAR However no res
13. Corporation 1630 McCarthy Blvd Milpitas CA 95035 7417 408 432 1900 FAX 408 434 0507 9 www linearcom 355514 LT 0708 REV D PRINTED IN USA TECHNOLOGY LINEAR TECHNOLOGY CORPORATION 2007
14. Figure 1 Vour vs BAT The LTC3555 vs the LTC3555 1 and LTC3555 3 For very low battery voltages the battery charger acts like a load and due to limited input power its current will tend to pull below the 3 6V instant on voltage prevent Vour from falling below this level the LTC3555 1 and 3555 3 include an undervoltage circuit that auto matic detects that Vour is falling and reduces the battery charge currentas needed This reduction ensures that load current and output voltage are always prioritized and yet delivers as much battery charge current as possible The standard LTC3555 does not include this circuit and thus favors maximum charge current at all times over output voltage preservation If instant on operation under low battery conditions is a requirement then the 1103555 1 or LTC3555 3 should be used If maximum charge efficiency at low battery voltages is preferred and instant on operation is not a requirement then the standard LTC3555 should be selected All versions of the T3555 family will start up with a removed battery TheLTC3555 3 has a battery charger float voltage of 4 100V rather than the 4 200V float voltage of the 11603555 and 3555 1 Ideal Diode from BAT to Vour The LTC3555 family has an internal ideal diode as well as a controller for an optional external ideal diode The ideal diode controller is always on and will respond quickly whenever Vour drops below BAT 355514
15. LDO canbe used to provide power to asystem pushbutton controller standby microcontroller or real time clock Designed to deliver up to 25mA the always on LDO requires at least low impedance ceramic bypass capacitor for com pensation The LDO is powered from VouT and therefore will enter dropout at loads less than 25mA as Vour falls near 3 3V If the LDO3V3 output is not used it should be disabled by connecting it to Vor Vpus Undervoltage Lockout UVLO An internal undervoltage lockout circuit monitors Vays and keeps the PowerPath switching regulator off until Vays rises above 4 30V and is about 200mV above the battery voltage Hysteresis on the UVLO turns off the regulator if drops below 4 00V or to within 50mV of BAT When this happens system power at Vour will be drawn from the battery via the ideal diode Battery Charger The LTC3555 family includes a constant current constant voltage battery charger with automatic recharge automatic termination by safety timer low voltage trickle charging bad cell detection and thermistor sensor input for out of temperature charge pausing Battery Preconditioning When a battery charge cycle begins the battery charger first determines if the battery is deeply discharged If the battery voltage is below Vrg typically 2 85V an automatic trickle charge feature sets the battery charge current to 10 of the programmed value If the low voltage persists for more than 1 2
16. The capacitor Crp cancels the pole created by feedback resis tors and the input capacitance of the FB pin and also helps to improve transient response for output voltages much greater than 0 8 A variety of capacitor sizes can be used for but a value of 10pF is recommended for most ap plications Experimentation with capacitor sizes between 2pF and 22pF may yield improved transient response Step Down Switching Regulator Operating Modes The LTC3555 family s general purpose switching regula tors include four possible operating modes to meet the noise power needs of a variety of applications In pulse skip mode an internal latch is set at the start of every cycle which turns on the main P channel MOSFET switch During each cycle a current comparator compares the peakinductor currenttothe output of an error amplifier The output of the current comparator resets the internal latch which causes the main P channel MOSFET switch to turn off and the N channel MOSFET synchronous rectifier to turn on The N channel MOSFET synchronous rectifier turns off at the end of the 2 25 MHz cycle or if the current through the N channel MOSFET synchronous rectifier drops to zero Using this method of operation the error amplifier adjusts the peak inductor current to deliver the required output power All necessary compensation is internal to the switching regulator requiring only a single ceramic output capacitor for stability At lightloads in PWM
17. Vpys is available and the PowerPath switch ing regulator is enabled power is delivered from Vays to Vout via SW Vour drives the combination of the external load switching regulators 1 2 and 3 and the battery charger Ifthe combined load does not exceed the PowerPath switch ing regulators programmed input current limit Voyy will track 0 3V above the battery By keeping the voltage across the battery charger low efficiency is optimized because power lostto the linear battery charger is minimized Power available to the external load is therefore optimized 3555fd 14 AL M OPERATION If the combined load at Vour is large enough to cause the switching power supply to reach the programmed input currentlimit the battery charger will reduce its charge cur rent by that amount necessary to enable the external load to be satisfied Even if the battery charge current is set to exceed the allowable USB current the USB specification will not be violated The switching regulator will limit the average input current sothatthe USB specification is never violated Furthermore load current at Vour will always be prioritized and only excess available power will be used to charge the battery If the voltage at BAT is below 3 3 or the battery is not present and the load requirement does not cause the switching regulator to exceed the USB specification Vour will regulate at 3 6V If the load exceeds the avail able power Vour will drop
18. hour the battery charger automatically terminates and indicates via the CHRG pin that the battery was unresponsive Oncethe battery voltage is above 2 85V the battery charger begins charging in full power constant current mode The LIC3555 LTC3555 X current delivered to the battery will try to reach 1022V Rpnoc Depending on available input power and external load conditions the battery charger may or may not be able to charge at the full programmed rate The external load will always be prioritized over the battery charge current The USB current limit programming will always be observed and only additional power will be available to charge the battery When system loads are light battery charge current will be maximized Charge Termination The battery charger has a built in safety timer When the voltage on the battery reaches the pre programmed float voltage the battery charger will regulate the battery volt age and the charge current will decrease naturally Once the battery charger detects that the battery has reached the float voltage the four hour safety timer is started After the safety timer expires charging of the battery will discontinue and no more current will be delivered Automatic Recharge After the battery charger terminates it will remain off drawing only microamperes of current from the battery If the portable product remains in this state long enough the battery will eventually self discharge To ensu
19. temperature is out of range charging is paused until it re enters the valid range A low drift bias resistor is required from Vgys to NTC and a thermistor is required from NTC to ground If the NTC function is not desired the NTC pin should be grounded FB2 Pin 4 Feedback Input for Switching Regulator 2 When regulator 2 s control loop is complete this pin servos to 1 of 16 possible set points based on the commanded value from the 120 serial port See Table 4 Ving Pin 5 Power Input for Switching Regulator 2 This pin will generally be connected to Vour MLCC capacitor is recommended on this pin 5112 Pin 6 Power Transmission Pin for Switching Regulator 2 2 Pin 7 Logic Input This logic input pin indepen dently enables switching regulator 2 This pin is logically OR ed with its corresponding bit in the 120 serial port See Table 2 LIC3555 LTC3555 X DVcc Pin 8 Logic Supply for the 120 Serial Port If the serial port is not needed it can be disabled by grounding DVoc When is grounded chip control is automati cally passed to the individual logic input pins SCL Pin 9 Clock Input Pin for the 120 Serial Port The 120 logic levels are scaled with respect to DVcc If DVcc is grounded the SCL pin is equivalent to the B5 bit in the 2 serial port SCL in conjunction with SDA determine the operating modes of switching regulators 1 2 and 3 when is grounded See Tables 2 and 5
20. to a voltage between 3 6V and the battery voltage If there is no battery present when the load exceeds the available USB power can drop toward ground The power delivered from Vpys to Vour is controlled by 2 25 constant frequency step down switching regulator To meet the USB maximum load specification the switching regulator includes a control loop which ensures that the average input current is below the level programmed at CLPROG Thecurrentat CLPROG isa fraction prog ofthe current When a programming resistor and an averaging capacitor are connected from CLPROG to GND the voltage on CLPROG represents the average input current of the switching regulator When the input current approaches the programmed limit CLPROG reaches 1 188V and power out is held constant The input current limit is programmed by the lj and 11 pins or by the 120 serial port It can be configured to limit average input current to one of several possible settings as well as be deactivated USB suspend The input current limit will be set by the Servo voltage and the resistor CLPROG according to the following expression Vei PROG Roi PRoG Figure 1 shows the range of possible voltages at Voyy as a function of battery voltage lveus veusa 1 LIC3555 LTC3555 X NO LOAD Vour V 24 27 30 33 36 39 42 BAT V
21. values will cause the Burst and forced Burst Mode switching frequencies to increase Table 7 shows several inductors that work well with the LTC3555 family s general purpose regulators These in ductors offer a good compromise in current rating DCR and physical size Consult each manufacturer for detailed information on their entire selection of inductors Table 7 Recommended Inductors INDUCTOR L MAX MAX SIZE in mm TYPE WH Ipe DOR Q LxWxH MANUFACTURER DE2818C 4 7 125 0 072 3 0x2 8x 1 8 Toko 3 3 1 45 0 053 3 0 x 2 8 1 8 www toko com 03120 4 7 0 79 024 136 36 12 3 3 0 90 020 3 6 3 6 1 2 2 2 1 14 014 3 66x3 6x1 2 DE2812C 47 1 2 0 13 3 0x28x 1 2 3 3 1 4 010 3 0x28x 1 2 2 0 1 8 0 067 3 0 x 2 8 x 1 2 CDRH3D16 4 7 0 9 0 11 4 4 1 8 Sumida 3 3 14 0 085 4x4x1 8 www sumida 2 2 1 2 0 072 4x4x1 8 com CDRH2D11 4 7 0 5 017 32 32 12 3 3 0 6 0 123 32 32 12 22 0 78 0 008 32x3 2x12 CLS4D09 4 7 0 75 0 19 49 49 1 503118 4 7 1 3 0 162 3 1 3 1 1 8 Cooper 3 3 1 59 0113 3 1 x 3 1 x 1 8 www cooperet 2 2 2 0 0 074 3 1 3 1 1 8 com SD3112 47 08 0 246 3 1x3 1 x 12 3 3 0 97 0 165 3 1x 3 1 x 1 2 22 1 12 014 131 31 12 5012 47 129 0417 52x52x12 33 142 0104 152 52 12 22 180 0575 52 52 12 5010 47 1 08 0153 152x52x1 0 3 3 1 31 0 108 5 2x5 2x1 0 2 2 165 0591 52 52 1 0 LPS3015 4 7 1
22. 0 Voura 2 5V Voura 1 2V 4 V 12V m im 5 0013 1 1 8 6 60 5 Vours 1 8V 5 50 50 2 40 2 40 LL 30 30 20 20 10 10 0 0 1 10 100 1000 0 1 1 10 100 1000 LOAD CURRENT mA LOAD CURRENT mA 3555 G31 3555 632 Switching Regulators 1 2 Load Switching Regulators 1 2 Load Regulation at 2 1 2V Regulation at 2 1 8V 1 230 1 845 Vint 2 3 8V VIN12 3 8V ELM Burst Mode OPERATION 441215 1 823 1 PULSE SKIP MODE E E FORCED 1200 1 800 Burst Mode 5 5 OPERATION a n lll 1185 1 778 1 170 1 755 0 1 1 10 100 1000 0 1 1 10 100 1000 LOAD CURRENT mA 3555 G34 LOAD CURRENT mA 3555 G35 100 EFFICIENCY 95 100 EFFICIENCY 95 2 56 OUTPUT VOLTAGE V D A 0 1 1 10 Switching Regulators 1 2 Forced Burst Mode Efficiency VouT12 2 5V Vouti 2 1 2V Vour1 2 1 8V VIN12 3 8V 0 1 1 10 100 1000 LOAD CURRENT mA 3555 G30 Switching Regulator 3 Forced Burst Mode Efficiency Voura 2 5V 0 1 1 10 100 1000 LOAD CURRENT mA 3555 G33 Switching Regulators 1 2 Load Regulation at Voy
23. 000 2800 mA louts Available Output Current Pulse Skip Burst Mode Operation Note 7 1000 mA Forced Burst Mode Operation Note 7 150 mA LDO Mode Note 7 50 mA VEBHIGH3 Maximum Servo Voltage Full Scale 1 1 1 1 Note 8 e 0 78 0 80 0 82 V VeBLow3 Minimum Servo Voltage Zero Scale 0 0 0 0 Note 8 0 405 0 425 0 445 V Veg Servo Voltage Step Size 25 mV PMOS Rps oN 0 18 9 NMOS Rpson 0 30 Q Ri pocta 100 Mode Closed Loop Rout 0 25 Q 0013 LDO Mode Open Loop Rout Note 9 2 5 Q tRsT3 7 Reset Time for Switching Within 92 of Final Value to RST3 Hi Z 230 ms egulator Note 1 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime Note 2 The LTC3555E LTC3555E X are guaranteed to meet performance specifications from 0 C to 85 C Specifications over the 40 to 85 operating temperature range are assured by design characterization and correlation with statistical process controls The LTC3555l LTC35551 X are guaranteed to meet performance specifications over the full 40 C to 85 C operating temperature range Note 3 The LTC3555 LTC3555 X include overtemperature protection that is intended to protect the device during momentary overload conditions Junction temperature will exceed 125 C when overtemperature protection is active
24. 100 Vgus 5V 50 BAT 3 8V VBus OV 1 BUCK REGULATORS OFF Ew SmA DIV lt z amp 60 30 cc z 2 a Vipoava e c 40 20mV DIV 20 5 COUPLED 23 i 20 10 BS BAT 3 8V 20ys DIV 0 0 1 40 15 10 35 60 85 RST3 CHRG PIN VOLTAGE V TEMPERATURE 20 3555 G19 3555 G21 for Switching Regulator Switching Regulator Current Limit Switching Regulator Low Power Power Switches vs Temperature vs Temperature Mode Quiescent Currents I 3 8V IN1 2 3 REGULATOR 3 owe ULATORS 1 Vouri23 25V 40 NMOS SWITCH 2 Burst Mode 2 OPERATION 2 z 30 FORCED a Burst Mode 2 PMOS SWITC REGULATORS 1 2 a OPERATION GULATOR 3 E 20 a 8 10 VIN123 3 8V 0 40 5 10 35 60 85 40 15 10 35 60 85 40 5 10 35 60 85 TEMPERATURE 20 TEMPERATURE C TEMPERATURE C 3555 G22 3555 G23 3555 G24 Switching Regulators 1 2 Pulse Switching Regulator 3 Pulse Skip Switching Regulator Soft Start Skip Mode Quiescent Currents Mode Quiescent Currents Waveform 325 1 95 400 11 Viy1 2 3 8V VouT3 2 5V 300 1 90 350 10_ gt 2 2 5V 5 lt s CONSTANT FREQUENCY E VIN3 3 5V E 275 1855 E CONSTANT FREQUENCY o 5 c 300 932 5 2 250 1805 gt 2 i gt 5 225 us 09 Vourigz129V 50us DIV Sum ULSE SKI
25. 3555 LTC3555 X LTC3555 LTC3555 X ENABLE NTC ENABLE 5h Figure 5 NTC Circuits Therefore the hot trip point is set when Vus 0 349 Vus Ruom Ruroqot and the cold trip point is set when RNTclcoLp RNow RNTclcoLD Solving these equations for RNTCICOLD and RNTCIHOT results in the following Vsus 0 765 Vnus 0 536 355514 AL Ure 2 LIC3555 LIC3555 X APPLICATIONS INFORMATION RNTclcoLD 3 25 By setting equal to R25 the above equations result in agr 0 536 and 3 25 Referencing these ratios to the Vishay Resistance Temperature Curve 1 chart gives a hot trip point of about 40 C and a cold trip point of about 0 C The difference between the hot and cold trip points is approximately 40 By using a bias resistor different in value from R25 the hotand coldtrip points be moved in either direction The temperature span will change somewhat due tothe non linear behavior ofthethermistor Thefollowing equations can be used to easily calculate a new value for the bias resistor CHOT eR2 NOM 0536 135 R25 where and oco p are the resistance ratios at the desired hot and cold trip points Note that these equations are linked Therefore only one of the two trip points can be chosen the other is determined by the default rati
26. 4 02 3 0 3 0 1 5 Coil Craft 3 3 1 9 013 13 0 3 0 1 5 www coilcraft 22 15 011 3 0x3 0x1 5 com Typical General Purpose Switching Regulator Input Output Capacitor Selection Low ESR equivalent series resistance MLCC capacitors should be used at both switching regulator outputs as well asateach switching regulator input supply Vinx Only X5R or X7R ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types 10uF output capaci tor is sufficient for most applications For good transient response and stability the output capacitor should retain at least 4uF of capacitance over operating temperature and bias voltage Each switching regulator input supply should be bypassed with a capacitor Consult with capacitor manufacturers for detailed information on their selection and specifications of ceramic capacitors Many manufac turers now offer very thin 1mm tall ceramic capacitors ideal for use in height restricted designs Table 8 shows a list of several ceramic capacitor manufacturers Table 8 Recommended Ceramic Capacitor Manufacturers AVX WWW avxcorp com Murata www murata com Taiyo Yuden www t yuden com Vishay Siliconix www vishay com TDK www tdk com Over Programming the Battery Charger The USB high power specification allows for up to 2 5W to be drawn from the USB port 5V x500mA The PowerPath sw
27. 996 40 15 10 35 60 85 TEMPERATURE C 3555 G14 Quiescent Current vs Temperature 15 VBUS 5V lvour 25 5 t 12 P fx 9 e c 5 6 3 40 15 10 35 60 85 TEMPERATURE 3555 617 OUTPUT VOLTAGE V OUTPUT VOLTAGE V QUIESCENT CURRENT uA 3 3V LDO Output Voltage vs Load Current Vgys OV 34 BAT 3 5V BAT 3 9V 4 2V o n BAT BAT 3 1V 32V 1 BAT 3 3V 0 5 10 15 0 25 LOAD CURRENT mA 3555 G12 Low Battery Instant On Output Voltage vs Temperature 3 68 BAT 27V 100mA 5x MODE e N 15 10 35 60 85 TEMPERATURE C 3555 G15 Quiescent Current in Suspend vs Temperature 0 I lvour OHA 15 10 35 60 85 TEMPERATURE C 3555 G18 355514 AL WER TYPICAL PERFORMANCE CHARACTERISTICS RST3 CHRG Pin Current vs 3 3V LDO Step Response LIC 3555 LIC3555 X Battery Drain Current vs Voltage Pull Down State 5mA to 15mA Temperature
28. D VOLTAGE V BATTERY VOLTAGE V 3555 G01 3555 G02 USB Limited Battery Charge USB Limited Battery Charge Current vs Battery Voltage Current vs Battery Voltage 700 150 80 3555 1 125 1 11103555 17 3555 3 3555 3 500 5V 2 3k T 400 CLPROG 9 E 5 75 2 300 z amp 50 lt lt 200 100 25 5x USB SETTING 1x USB SETTING 0 BATTERY CHARGER SET FOR 1A 0 BATTERY CHARGER SET FOR 1A 27 30 33 36 39 42 27 30 33 36 39 42 BATTERY VOLTAGE V BATTERY VOLTAGE V 3555 604 3555 605 Battery Charging Efficiency vs PowerPath Switching Regulator Battery Voltage with No External Efficiency vs Output Current Load 100 100 5x 10x MODE RcLPROG 3k 1x MODE Rprog 1k 90 0mA 90 80 gt 12477 LTC3555 1 5 4 5 C LTC3555 3 w 1 LTC3555 3 70 j 1x CHARGING EFFICIENCY 2 4 5x CHARGING EFFICIENCY 40 60 0 01 0 1 1 27 30 33 36 39 42 OUTPUT CURRENT A 3555 G07 BATTERY VOLTAGE V 3555 608 Output Voltage vs Output Current Battery Charger Disabled 4 50 Vpus 5V BAT 4V 5x MODE 4 25 2 4 00 s 5 BAT 3 4V 2 3 75 3 50 3 25 200 400 600 800 1000 OUTPUT CURRENT mA 3555 G03 Battery Drain Current vs Battery Voltage 25 lvour OWA Vgus 20 amp 15 2 ce amp 10 E E VBUS 5V 5 SU
29. ED while a microprocessor would be able to decode either the 12 5 or 87 5 duty cycles as a bad battery fault Note that the LTC3555 family is athree terminal PowerPath product where system load is always prioritized over battery charging Due to excessive system load there may not be sufficient power to charge the battery beyond the trickle charge threshold voltage within the bad battery timeout period In this case the battery charger will falsely indicate a bad battery System software may then reduce the load and reset the battery charger to try again Although very improbable it is possible that a duty cycle reading could be taken at the bright dim transition low duty cycle to high duty cycle When this happens the 3555fd 18 M OPERATION duty cycle reading will be precisely 50 If the duty cycle reading is 50 system software should disqualify it and take a new duty cycle reading NTC Thermistor The battery temperature is measured by placing a nega tive temperature coefficient NTC thermistor close to the battery pack To use this feature connect the NTC thermistor RNTC between the NTC and ground and a resistor from to the NTC pin should be 1 resistor with a value equal to the value of the chosen NTC therm istor at 25 C R25 For applications requiring greater than 750mA of charging current a 10k NTC thermistor is recommended due to increased interference
30. IUFD 17TRPBF 35551 28 Lead LTC3555EUFD 3 PBF LTC3555EUFD 3 TRPBF 35553 28 Lead 4mm x 5mm Plastic QFN 40 C to 85 C LTC35551UFD 3 PBF LTC3555IUFD 3 TRPBF 35553 28 Lead 4mm x 5mm Plastic QFN 40 C to 85 C Consult LTC Marketing for parts specified with wider operating temperature ranges The temperature grade is identified by a label on the shipping container Consult LTC Marketing for information on non standard lead based finish parts For more information on lead free part marking go to http www linear com leadfree For more information on tape and reel specifications go to http www linear com tapeandreel P 4mm x 5mm Plastic QFN 4090 to 85 C P ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range otherwise specifications are at T 25 C Vgus 5V BAT 3 8V DVcc 3 3V Rpnos 1k Reipnoc unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS PowerPath Switching Regulator Input Supply Voltage 4 35 5 5 V IBUSLIM Total Input Current 1 Mode Voy BAT 87 95 100 mA 5x Mode Voyt e 436 460 500 mA 10x Mode Vour BAT e 800 860 1000 mA Suspend Mode Vour BAT e 0 31 0 38 0 50 mA lvBUSQ Vpus Quiescent Current 1 Mode lour OMA 7 mA 5x Mode lout 15 mA 10x Mode Ioyt 15 mA Suspend Mode 0 044 mA
31. PPING SKIPPING 200 1 70 200 7 40 15 10 35 60 85 40 15 10 35 60 85 TEMPERATURE C TEMPERATURE C 3555 G25 3555 G26 355514 3 LIC3555 LIC3555 X TYPICAL PERFORMANCE CHARACTERISTICS Switching Regulators 1 2 Switching Regulators 1 2 Pulse Skip Mode Efficiency Burst Mode Efficiency se VouT1 2 2 5V 80 H NE 2 Vour1 2 1 8V 2 5 zv 2 40 2 40 30 30 20 20 10 10 Vint2 3 8V Vini 2 3 8V 1 10 100 1000 0 1 1 10 100 1000 LOAD CURRENT mA LOAD CURRENT mA 3555 G28 3555 G29 Switching Regulator 3 Switching Regulator 3 Pulse Skip Mode Efficiency Burst Mode Efficiency 1015 3589 100 runs 88V V 2 5V IN3 79 9 22 90 90 IN3 0013 80 8
32. Pour Paus 100 EFFICIENCY 96 i g RTC LOW POWER LOGIC 0 355514 AL Ure 1 LIC3555 LIC3555 X ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Notes 1 2 3 Vgus Transient t lt 1ms D ty S 0 3V to 7V Vint ViN2 Ving VBUS Static DVcc FB1 FB2 FB3 NTC BAT EN1 EN2 lu SCL SDA 5 CHRG 0 3 to 6V 3mA 2 eder cares 50mA LETS TOT EE EIE IT 2mA One 30mA low lsw2 1 600 low lewa vouUT 2 Junction Temperature 125 C Operating Temperature Range Note 2 40 C to 85 C wo Storage Temperature Range 65 C to 125 C 125 C 37 CAN EXPOSED PAD PIN 29 IS GND MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3555EUFD PBF LTC3555EUFD TRPBF 3555 28 1 4mm x 5mm Plastic QFN 407 to 85 C LTC3555 UFD PBF LTC3555IUFD TRPBF 3555 28 Lead 4mm x 5mm Plastic QFN 40 C to 85 C LTC3555EUFD 1 PBF LTC3555EUFD 1 TRPBF 35551 28 Lead 4mm x 5mm Plastic QFN 40 C to 85 C LTC3555IUFD 17PBF LTC3555
33. Regulators are Disabled in 2 8 2 9 V UVLO fosc Oscillator Frequency 1 8 2 25 2 7 123 Input Current 2 3 0 85V 50 50 0123 Maximum Duty Cycle 100 90 Rsw123 PD SWx Pull Down in Shutdown 10 General Purpose Switching Regulator 1 Pulse Skip Mode Input Current loyr1 Note 6 225 pA Burst Mode Input Current loyri Note 6 35 60 Forced Burst Mode Input Current Note 6 20 35 100 Mode Input Current loyri Note 6 20 35 Shutdown Input Current loyri FB1 OV 1 LIMSW1 PMOS Switch Current Limit Pulse Skip Burst Mode Operation 600 800 1100 mA louti Available Output Current Pulse Skip Burst Mode Operation Note 7 400 mA Forced Burst Mode Operation Note 7 60 mA LDO Mode Note 7 50 mA Vegi Servo Voltage Vote 8 0 78 0 80 0 82 V Rp PMOS Rps oN 0 6 NMOS Rps ow 0 7 Q Ripo LDO Mode Closed Loop Rour 0 25 Q RLpO_OL1 LDO Mode Vote 9 2 5 Q General Purpose Switching Regulator 2 Pulse Skip Mode Input Current Note 6 225 Burst Mode Input Current Note 6 35 60 Forced Burst Mode Input Current Note 6 20 35 100 Mode Input Current Note 6 20 35 pA Shutdown Input Current lout FB2 1 lLimswe PMOS Switch Current Limit Pulse Skip Bu
34. SDA Pin 10 Data Input Pin for the 120 Serial Port The 120 logic levels are scaled with respect to DVcc If DVcc is grounded the SDA pin is equivalent to the B6 bit in the 2 serial port SDA in conjunction with SCL determine the operating modes of switching regulators 1 2 and 3 when DVcc is grounded See Tables 2 and 5 Ving Pin 11 Power Input for Switching Regulator 3 This pin will generally be connected to Vout A MLCC capacitor is recommended on this pin 5113 Pin 12 Power Transmission Pin for Switching Regulator 3 EN3 Pin 13 Logic Input This logic input pin indepen dently enables switching regulator 3 This pin is logically OR ed with its corresponding bit in the 120 serial port See Table 2 FB3 Pin 14 Feedback Input for Switching Regulator 3 When regulator 3 s control loop is complete this pin servos to 1 of 16 possible set points based on the commanded value from the 120 serial port See Table 4 RST3 Pin 15 Logic Output This in an open drain output which indicates that switching regulator 3 has settled to its final value It can be used as a power on reset for the primary microprocessor or to enable the other switching regulators for supply sequencing EN1 Pin 16 Logic Input This logic input pin indepen dently enables switching regulator 1 This pin is logically OR ed with its corresponding bit in the 120 serial port See Table 2 355514 11 LIC3555 LIC3555 X
35. SPEND MODE __ 0 27 30 33 36 39 42 BATTERY VOLTAGE V 3555 G06 Vgus Current vs Vgys Voltage Suspend 50 BAT 3 8V lvour OMA 40 3 2 c 30 c 20 wn 8 10 BUS VOLTAGE V 3555 609 355510 7 LIC3555 LIC3555 X TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT VOLTAGE V CHARGE CURRENT FREQUENCY MHz Output Voltage vs Load Current in Suspend 5 0 A A o 02 3 0 Vpus 5V BAT 3 3V 0 1 2 5 0 2 0 3 LOAD CURRENT mA 0 4 0 5 3555 G10 Battery Charge Current vs Temperature 600 500 400 THERMAL REGULATION 300 200 100 Rprog 2k 0 10x MODE 40 20 0 20 40 60 80 100 120 TEMPERATURE 20 3555 G13 Oscillator Frequency vs Temperature 2 6 24 BAT 3 6V 2 2 BAT 3V VBUS OV 2 0 BAT 2 7V VBUS OV 1 8 I 40 15 10 35 60 85 TEMPERATURE 20 3555 616 NORMALIZED FLOAT VOLTAGE CURRENT mA Vgus Current vs Load Current in Suspend 0 5 VBUS 5V BAT 3 3V RcLPRoG 3k EN e e 0 1 0 0 1 0 2 0 3 LOAD CURRENT mA 0 4 0 5 3555 G11 Normalized Battery Charger Float Voltage vs Temperature 1 001 1 000 0 999 0 998 0 997 0
36. argers the 11035955 family s switching architecture transmits nearly all ofthe power avail able from the USB port to the load with minimal loss and heat which eases thermal constraints in small spaces Two of the three general purpose switching regulators can provide up to 400mA and the third can deliver 1A The entire product can be controlled via 126 or simple 1 0 The LTC3555 1 LTC3555 3 versions offer instant on power delivery tothe portable producteven with a very low battery voltage The 3555 3 version also has a reduced charger float voltage of 4 100V for battery safety and longevity The 1103555 family is available in the low profile 28 pin 4mm x 5mm x 0 75mm QFN surface mount package 47 LT LTC and LTM are registered trademarks of Linear Technology Corporation PowerPath and Bat Track are trademarks of Linear Technology Corporation All other trademarks are the property of their respective owners Protected by U S Patents including 6522118 and 6404251 TYPICAL APPLICATION High Efficiency PowerPath Manager and Triple Step Down Regulator A eat 4 35V TO 5 5V 9 ALWAYS ON LDO 5 TRIPLE ENABLE HIGH EFFICIENCY CONTROLS TEP DOWN SWITCHIN REGULATORS PORT 0 8V TO 3 6V 400mA MEMORY 0 8V TO 3 6V 400mA Vgus 5V S 0 10 OMA G 0 8V TO 3 6V 1A 0 L 1x MODE RST UPROCESSOR 0 01 0 1 2 lour 3555 01 Switching Regulator Efficiency to iS System Load
37. cing radiated EMI and conducted supply noise Low Supply Operation The 1103555 family incorporates an undervoltage lockout circuit on Vour which shuts down the general purpose switching regulators when drops below 0 This UVLO prevents unstable operation 355514 23 LIC3555 LIC3555 X APPLICATIONS INFORMATION CLPROG Resistor and Capacitor As described in the High Efficiency Switching PowerPath Controller section the resistor on the CLPROG pin deter mines the average input current limit when the switching regulator is set to either the 1x mode USB 100mA the 5x mode USB 500mA or the 10x mode The input cur rent will be comprised of two components the current that is used to drive Voyy and the quiescent current of the switching regulator To ensure that the USB specification is strictly met both components of input current should be considered The Electrical Characteristics table gives values for quiescent currents in either setting as well as Current limit programming accuracy To get as close to the 500mA or 100mA specifications as possible a 1 resistor should be used Recall that lvBUS lvgusa McLprog 1 An averaging capacitor or an R C combination is required in parallel with the CLPROG resistor so that the switching regulator can determine the average input current This network also provides the dominant pole for the feedback loop whe
38. connected to BAT If the external ideal diode FET is not used GATE should be left floating BAT Pin 23 Single Cell Li Ion Battery Pin Depending on available Vays power a Li lon battery on BAT will either deliver power to Vourthrough the ideal diode or be charged from Vour via the battery charger Vout Pin 24 Output voltage of the Switching PowerPath Controller and Input Voltage of the Battery Charger The majority of the portable product should be powered from Vout The LTC3555 family will partition the available power between the external load on Vour and the internal battery charger Priority is given to the external load and any extra power is used to charge the battery An ideal diode from BAT to ensures that Vour is powered even if the load exceeds the allotted power from Vpys or if Vays power source is removed Voyy should be bypassed with a low impedance ceramic capacitor Pin 25 Primary Input Power Pin This pin delivers powerto Voyrviathe SW pin by drawing controlled current from a DC source such as a USB port or wall adapter SW Pin 26 Power Transmission Pin for the USB Power Path The SW pin delivers power from Vgus to via the step down switching regulator A 3 inductor should be connected from SW to 21 28 Logic Inputs 1 control the current limit of the PowerPath switching regulator See Table 3 Both of the lj and lj
39. cuit current protection and switch node slew limiting circuitry to reduce radiated EMI No external compensation components are required The operating mode of the regulators may be set by either 26 control or by manual control of the SDA and SCL pins if the 12C port is not used Each converter may be individu ally enabled by either their external control pins EN1 EN2 EN3 or by the 12C port Switching regulators 2 and 3 have individual programmable feedback servo voltages via 120 control The switching regulator input supplies Vino and will generally be connected to the system load Vout 3555fd LI 21 LIC3555 LIC3555 X OPERATION Step Down Switching Regulator Output Voltage Programming All three switching regulators can be programmed for output voltages greater than 0 8V Switching regulators 2 and 3 have 120 programmable set points while regulator 1 has asingle fixed set point The full scale output voltage for each switching regulator is programmed using a resistor divider from the switching regulator output connected to the feedback pins FB1 FB2 and FB3 such that R1 Vourx lt 1 OUTX where Vepy ranges from 0 425V to 0 8V for switching regulators 2 and and is fixed at 0 8V for switching regulator 1 See Figure 4 Vinx LTC3555 1103555 Sm 3555 04 Figure 4 Buck Converter Application Circuit Typical values for R1 are in the range of 40k to 1M
40. current may still reverse slightly This value depends on the speed ofthe comparator in relation to the slope of the current waveform given by Vi is the voltage across the inductor approximately Voyr L is the inductance value An inductance value of 3 3uH is a good starting value The ripple will be small enough for the regulator to remain in continuous conduction at 100mA average Vpus current At lighter loads the current reversal comparator will dis able the synchronous rectifier for currents slightly above OmA As the inductance is reduced from this value the 1103555 family will enter discontinuous conduction mode at progressively higher loads Ripple at Vour will increase directly proportionally to the magnitude of inductor ripple Transient response however will improve The current mode controller controls inductor current to exactly the amount required by the load to keep Vour in regulation transient load step requires the inductor current to change toanew level Since inductor current cannot change instan taneously the capacitance on delivers or absorbs the difference in current until the inductor current can change to meetthe new load demand A smaller inductor changes its current more quickly for a given voltage drive than a larger inductor resulting in faster transient response A larger inductor will reduce output ripple and current ripple but at the expense of reduced transient performance and a phys
41. ding a second adjustment resistor to the circuit If only the bias resistor is adjusted then either the upper or the lower threshold can be modified but not both The other trip point will be determined by the characteristics of the thermistor Using the bias resistor in addition to an adjustment resistor both the upper and the lower tempera ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease Examples of each technique are given below NTC thermistors have temperature characteristics which are indicated on resistance temperature conversion tables The Vishay Dale thermistor 50603 011 1002 used in the following examples has a nominal value of 10k and follows the Vishay Curve 1 resistance temperature characteristic In the explanation below the following notation is used R25 Value of the Thermistor at 25 C 010 Value of thermistor at the cold trip point Value of the thermistor at the hot trip point acorn Ratio of 1 to R25 Ratio of 10 25 Rnom Primary thermistor bias resistor see Figure 5 R1 Optional temperature range adjustment resistor see Figure 5b The trip points for the LTC3555 family s temperature quali fication are internally programmed at 0 349 Vpys for the hot threshold and 0 765 Vgus for the cold threshold LIC
42. e USB voltage 10V before it settles out In fact due to the high voltage coefficient of many ceramic capacitors a nonlinearity the voltage may even exceed twice the USB voltage To prevent excessive voltage from damaging the 1103555 family during a hot insertion it is best to have a low voltage coefficient capacitor at the Vpus pin to the 1103555 family This is achievable by selecting an capacitor that has a higher voltage rating than that required forthe application For example a 16V 10 capacitor in a 1206 case would be a better choice than a 6 3V X5R 10uF capacitor in a smaller 0805 case Alternatively the following soft connect circuit Figure 6 can be employed In this circuit capacitor C1 holds MP1 off when the cable is first connected Eventually C1 begins to charge up to the USB input voltage applying increasing gate support to MP1 The long time constant of R1 and C1 prevent the current from building up in the cable too fast thus dampening out any resonant overshoot Printed Circuit Board Layout Considerations In order to be able to deliver maximum current under all conditions it is critical that the Exposed Pad on the back side of the LTC3555 family package be soldered to the PC board ground Failure to make thermal contact between the Exposed Pad on the backside of the package and the copper board will result in higher thermal resistances Furthermore due to its high frequency switching circu
43. e 1 6 5 5 V Ipvec DVcc Current SCL SDA OkHz 0 5 Vpvec_UVLO DVcc UVLO 1 0 V ADDRESS 120 Address 0001 00110 Vin SDA SCL Input High Threshold 70 DVec SDA SCL Input Low Threshold 30 DVcc Ipp2 SDA SCL Pull Down Current 2 VoL Digital Output Low SDA IpuLLup 3mA 0 4 V Clock Operating Frequency 400 kHz BUF Bus Free Time Between Stop and Start 1 3 ps Condition lHD STA Hold Time After Repeated Start 0 6 18 Condition 15 STA Repeated Start Condition Setup Time 0 6 18 355514 4 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating LIC 3555 LIC3555 X temperature range otherwise specifications are at Ta 25 C Vgys 5V BAT 3 8V DVcc 3 3V 1k unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 15 STD Stop Condition Time 0 6 18 tup DAT OUT Data Hold Time 225 ns tHD_DAT IN Input Data Hold Time 0 900 ns tsu_pat Data Setup Time 100 ns ti ow Clock Low Period 1 3 ps tHIGH Clock High Period 0 6 18 lr Clock Data Fall Time 20 300 ns lr Clock Data Rise Time 20 300 ns tsp Spike Suppression Time 50 ns General Purpose Switching Regulators 1 2 and 3 Vind 2 3 Input Supply Voltage 2 7 5 5 V Vout UVLO Voyt Falling 2 Connected to Vour Through Low 2 5 2 6 V Vout UVLO Vour Rising Impedance Switching
44. egulated Output Voltage 17 3555 17 3555 1 4179 4 200 4 221 3555 3555 1 4165 4 200 4 235 V 1103555 3 4 079 4 100 4 121 V LTC3555 3 4 065 4 100 4 135 V Constant Current Mode Charge Rpnoc 1k 980 1022 1065 mA Current Rprog ok 185 204 223 mA Battery Drain Current Vsus gt Battery Charger Off 2 3 5 5 Vpus OV lyour Ideal Diode Mode 103555 27 38 LTC3555 1 LTC3555 3 32 44 VPROG PROG Pin Servo Voltage 1 000 V VPROG_TRKL PROG Pin Servo Voltage in Trickle BAT lt VTRKL 0 100 V Charge 10 C 10 Threshold Voltage at PROG 100 mV hPRoG Ratio of Igar to PROG Pin Current 1022 mA mA ITRKL Trickle Charge Current BAT lt VTRKL 100 mA VTRKL Trickle Charge Threshold Voltage BAT Rising 2 7 2 85 3 0 V AVrRKL Trickle Charge Hysteresis Voltage 135 mV AVRECHRG Recharge Battery Threshold Voltage Threshold Voltage Relative to VFLOAT 15 100 125 mV trERM Safety Timer Termination Timer Starts when BAT Vg oar 3 3 4 5 Hour tBADBAT Bad Battery Termination Time BAT lt VTRKL 0 42 0 5 0 63 Hour evo End of Charge Indication Current Ratio Note 5 0 088 0 1 0 112 mA mA 355514 AL 3 LIC3555 LIC3555 X ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range otherwise specifications are at T 25 C Vgys 5V BAT 3 8V DVcc 3 3V Rpnoc 1k
45. ically larger inductor package size For this reason a larger Cvour will be required for larger inductor sizes The input regulator has an instantaneous peak current clamp to prevent the inductor from saturating during tran sient load or start up conditions The clamp is designed so thatitdoes not interfere with normal operation at high loads and reasonable inductor ripple It is intended to prevent inductor current runaway in case of a shorted output The DC winding resistance and AC core losses of the in ductor will affect efficiency and therefore available output power These effects are difficult to characterize and vary 355514 24 M APPLICATIONS INFORMATION by application Some inductors that may be suitable for this application are listed in Table 6 Table 6 Recommended Inductors MAX INDUCTOR L Ipc DCR SIZE in mm TYPE LxWxH MANUFACTURER LPS4018 3 3 2 2 0 08 3 9 3 9 1 7 Coilcraft www coilcraft com D53LC 3 3 2 26 0 034 DB318C 3 3 1 55 0 070 5x5x3 Toko 3 8 3 8 1 8 www toko com WE TPC 3 3 11 95 0 065 4 8 x 4 8 x 1 8 Wurth Elektronik Type M1 www we online com CDRH6D12 3 3 2 2 0 0625 67 x 6 7 x 1 5 Sumida CDRH6D38 3 3 3 5 0 020 7 7 4 www sumida com and Vour Bypass Capacitors The style and value of capacitors used with the 1763555 family determine several important
46. itching regulator transforms the voltage at to just above the voltage at BAT with high efficiency while limiting power to less than the amount programmed at CLPROG In some cases the battery charger may be programmed with the PROG pin to deliver the maximum safe charging current without regard to the USB specifications If there is insufficient current available to charge the battery at the programmed rate the PowerPath regulator will reduce charge current until the system load on Voy is satisfied and the Vpys current limit is satisfied Programming the battery charger for more current than is available will not cause the average input current limit to be violated It will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible and with minimal power dissipation within the battery charger 3555fd 20 M APPLICATIONS INFORMATION Alternate NTC Thermistors and Biasing The LTC3555 family provides temperature qualified charg ing if a grounded thermistor and a bias resistor are con nected to NTC By using a bias resistor whose value is equal to the room temperature resistance of the thermistor R25 the upper and lower temperatures are pre programmed to approximately 40 C and 0 C respectively assuming a Vishay Curve 1 thermistor The upper and lower temperature thresholds can be ad justed by either a modification of the bias resistor value or by ad
47. itry it is imperative that the input capacitors inductors and output capacitors be as close to the LTC3555 family as possible andthatthere be an unbrokenground plane under 355514 20 M APPLICATIONS INFORMATION 5V USB INPUT USB CABLE Figure 6 USB Soft Connect Circuit the IC and all of its external high frequency components High frequency currents such as the Vpys Vina Vine and VIN3 currents on the LTC3555 family tend to find their way along the ground plane in a myriad of paths ranging from directly back to a mirror path beneath the incident path on the top of the board If there are slits or cuts in the ground plane due to other traces on that layer the current will be forced to go around the slits If high frequency currents are not allowed to flow back through their natural least area path excessive voltage will build up and radiated emissions will occur There should be a group of vias under the grounded backside of the pack age leading directly down to an internal ground plane To minimize parasitic inductance the ground plane should be on the second layer of the PC board The GATE pin for the external ideal diode controller has extremely limited drive current Care must be taken to minimize leakage to adjacent PC board traces 100nA of leakage from this pin will introduce an offset to the 15mV ideal diode of approximately 10mV To minimize leakage the trace can be guarded on the PC board by surrounding
48. kewise with only one exception ifthe LTC3555 family was previously addressed and sent valid data but not updated with a STOP it will respond to any STOP that appears on the bus independent of the number of REPEAT STARTS that have occurred If a REPEAT START is given and the LTC3555 family successfully acknowledges its address and first byte it will not respond to a STOP until both bytes of the new data have been received and acknowledged Disabling the I2C Port The 126 serial port can be disabled by grounding the pin In this mode control automatically passes to the in dividual logic input pins 1 EN2 SDA and SCL Some functionality is not available in this mode such as the programmability of switching regulators 2 and 3 s output voltage and the battery charger disable feature In this mode both of the programmable switching regulators have a fixed servo voltage of 0 8V Becausethe SDAand SCL pins have no other context when is grounded these pins re mapped to control the switching regulator mode bits B5 and B6 SCL maps to B5 and SDA maps to B6 RST3 Pin The pin is an open drain output used to indicate that switching regulator 3 has reached its final voltage RST3 LIC3555 LTC3555 X remains low impedance until regulator 3 reaches 92 of its regulation value A 230ms delay is included to allow a system microcontroller ample time to reset itself RST3 may be used as a
49. l P channel MOSFET should be connected to and the drain should be connected to BAT Capable of driving a 1nF load the GATE pin can control an external P channel MOSFET transistor having an on resistance of 4000 or lower Suspend LDO If the LTC3555 family is configured for USB suspend mode the switching regulator is disabled and the suspend LDO provides power to the Voyr pin presuming there is power available to Vgus This LDO will prevent the bat tery from running down when the portable product has access to a suspended USB port Regulating at 4 6V this LDO only becomes active when the switching converter is disabled suspended To remain compliant with the USB specification the input to the LDO is current limited so that it will not exceed the 500 low power suspend TO USB OR WALL ADAPTER IswitcH hcLPR0G CONSTANT CURRENT CONSTANT VOLTAGE BATTERY CHARGER AVERAGE INPUT CURRENT LIMIT CONTROLLER AVERAGE OUTPUT VOLTAGE LIMIT CONTROLLER 3 54 TO BAT 0 3V TO SYSTEM LOAD OPTIONAL EXTERNAL IDEAL DIODE PMOS 3555 F03 Figure 3 PowerPath Block Diagram 355514 AL Ure OPERATION specification If the load exceeds the suspend current limit the additional current will come from the battery via the ideal diode 3 3V Always On LDO Supply The LTC3555 family includes a low quiescent current low dropout regulator that is always powered This
50. le SCL is high When the master has finished com municating with the slave it issues a STOP condition by transitioning SDA from low to high while SCL is high Byte Format Each byte sent to the T3555 family must be eight bits long followed by an extra clock cycle for the acknowledge bitto be returned by the 3555 family The data should be sent to the 1703555 family most significant bit MSB first 355514 19 LIC3555 LIC3555 X Table 2 126 Serial Port Mapping A7 A6 A5 4 2 1 0 7 6 5 4 B3 B2 B1 B0 Switching Regulator 2 Switching Regulator 3 Disable Switching Enable Enable Enable Input Current Voltage See Table 4 Voltage See Table 4 Battery Regulator Regulator Regulator Regulator Limit Charger Modes 1 2 3 See Table 3 See Table 5 Table 3 USB Current Limit Settings Acknowledge B1 BO lum limo USB SETTING The acknowledge signal is used for handshaking between 0 0 1x Mode USB 100 Limit the master and the slave An acknowledge active low 0 1 10x Mode Wall 1A Limit generated by the slave LTC3555 family lets the master 1 0 Suspend know that the latest byte of information was received 1 1 5x Mode USB 500mA Limit The acknowledge related clock pulse is generated by the Table 4 Switching Regulator Servo Voltage AG A5 Switching Regulator 2 Servo Voltage
51. mode the inductor current may reach zero on each pulse which will turn off the N channel MOSFET synchronous rectifier In this case the switch node SW goes high impedance and the switch node voltage will ring This is discontinuous mode operation and is normal behavior for a switching regulator At very light loads in pulse skip mode the switching regulators will automatically skip pulses as needed to maintain output regulation At high duty cycles gt Vinx 2 it is possible for the inductor currentto reverse causing the regulatorto operate continuously at light loads This is normaland regulation is maintained but the supply current will increase to several milliamperes due to continuous switching In forced Burst Mode operation the switching regulators use a constant current algorithm to control the inductor current By controlling the inductor current directly and using a hysteretic control loop both noise and switching losses are minimized Inthis mode output power is limited While in forced Burst Mode operation the output capacitor is charged to a voltage slightly higher than the regulation point Thestep down converter then goes into sleep mode during which the output capacitor provides the load cur rent In sleep mode most of the regulators circuitry is powered down helping conserve battery power When the Output voltage drops below a pre determined value the switching regulator circuitry is powered on and ano
52. n current limit is reached To ensure stability the capacitor on CLPROG should be 0 47uF or larger Alternatively faster transient response may be achieved with 0 1pF in series with 8 20 Choosing the PowerPath Inductor Becausethe average input current circuit does not measure reverse current i e current from SW to Vpus current reversal in the inductor at light loads will contribute an error to the average Vgus current measurement The error is conservative in that if the current reverses the voltage at CLPROG will be higher than what would represent the actual average input current drawn The current available for battery charging plus system load is thus reduced but the USB specification will not be violated This reduction in available Vpus current will happen when the peak peak inductor ripple is greater than twice the average current limit setting For example if the average current limit is set to 100mA the peak peak ripple should not exceed 200mA If the input currentis less than 100mA the measurement accuracy may be reduced However this will not affect the average current loop since it will not be in regulation The LTC3555 family includes acurrent reversal comparator which monitors inductor current and disables the synchro nous rectifieras current approaches zero This comparator will minimize the effect of current reversal on the average input current measurement For some low inductance values however the inductor
53. nditions rather LIC 3555 LIC3555 X than worst case conditions with the assurance that the battery charger will automatically reduce the current in worst case conditions 26 Interface The LTC3555 family may receive commands from a host master using the standard 2C 2 wire interface The Timing Diagram shows the timing relationship of the signals on the bus The two bus lines SDA and SCL must be high when the bus is not in use External pull up resistors or current sources such as the LTC1694 12C accelerator are required on these lines The LTC3555 family is a receive only slave device The 126 control signals SDA and SCL are scaled internally to the DVcc supply DVcc should be connectedtothe same power supply as the microcontroller generating the 12 signals The I C port has an undervoltage lockout on the pin When DV c is below approximately 1V the 126 serial port is cleared and switching regulators 2 and 3 are set to full scale Bus Speed The 120 port is designed to be operated at speeds of up to 400kHz It has built in timing delays to ensure correct operation when addressed from an 120 compliant master device It also contains input filters designed to suppress glitches should the bus become corrupted Start and Stop Conditions A bus master signals the beginning of a communication to a slave device by transmitting a START condition A START condition is generated by transitioning SDA from high to low whi
54. or on the switch pins SW1 SW3 when in shutdown General Purpose Switching Regulator Dropout Operation It is possible for a switching regulators input voltage Vinx to approach its programmed output voltage e g a battery voltage of 3 4V with a programmed output voltage of 3 3V When this happens the PMOS switch duty cycle increases until itis turned on continuously at 10090 In this dropout condition the respective output voltage equals the regulators input voltage minus the voltage drops across the internal P channel MOSFET and the inductor Step Down Switching Regulator Soft Start Operation Soft start is accomplished by gradually increasing the peak inductor current for each switching regulator over a 500ys period This allows each output to rise slowly helping minimize the battery surge current A soft start cycle occurs whenever a given switching regulator is enabled or after a fault condition has occurred thermal shutdown or UVLO A soft start cycle is not triggered by changing operating modes This allows seamless output operation when transitioning between forced Burst Mode Burst Mode pulse skip mode or LDO operation Step Down Switching Regulator Switching Slew Rate Control The step down switching regulators contain new patent pending circuitry to limit the slew rate of the switch nodes SWx This new circuitry is designed to transition the switch nodes over a period of a couple of nanoseconds significantly redu
55. ort both Designed specifically for USB applications the PowerPath controller incorporates a precision average input current step down switching regulator to make maximum use of the allowable USB power Because power is conserved the 763555 family allows the load current on Vourto exceed the current drawn by the USB port without exceeding the USB load specifications The PowerPath switching regulator and battery charger communicate to ensure thatthe input current never violates the USB specifications The ideal diode from BAT to Voyr guarantees that ample power is always available to even if there is insuf ficient or absent power at Vpys An always on LDO provides a regulated 3 3V from available power at Vour Drawing very little quiescent current this LDO will be on at all times and can be used to supply up to 25mA The three general purpose switching regulators can be independently enabled via either direct digital control or by operating the 12 serial port Under I C control two of the three switching regulators have adjustable set points so that voltages can be reduced when high processor performance is not needed Along with constant frequency PWM mode all three switching regulators have a low power burst only mode setting as well as automatic Burst Mode operation and LDO modes for significantly reduced quiescent current under light load conditions High Efficiency Switching PowerPath Controller Whenever
56. os designed in the IC Consider an example where a 60 C hot trip point is desired Fromthe Vishay Curve 1 characteristics aporis 0 2488 at 60 C Using the above equation RNoM should be set to 4 64k With this value of Ryoy the cold trip point is about 16 C Notice thatthe span is now 44 C rather than the previ ous 40 C This is due tothe decrease in temperature gain of the thermistor as absolute temperature increases The upper and lower temperature trip points can be inde pendently programmed by using an additional bias resistor as shown in Figure 5b The following formulas can be used to compute the values of Ryom and 194 Rwom HOT R25 1 0 536 R25 For example to set the trip points to 0 C 45 C with a Vishay Curve 1 thermistor choose 3 266 0 4368 2714 10k 2 10 42k the nearest 1 value is 10 5k R1 0 536 10 5k 0 4368 10k 1 26k the nearest 190 value is 1 27k The final circuit is shown in Figure 5b and results in an upper trip point of 45 C and a lower trip point of 0 C USB Inrush Limiting When a USB cable is plugged into a portable product the inductance of the cable and the high Q ceramic input capacitor form an L C resonant circuit If the cable does not have adequate mutual coupling or if there is not much impedance in the cable it is possible for the voltage at the input of the product to reach as high as twice th
57. ossibly resulting in instability Ceramic capacitors up to 22uF may be used in parallel with a battery butlarger ceramics should be decoupled with 0 2010 10 of series resistance In constant current mode the PROG pin is in the feed back loop rather than the battery voltage Because of the additional pole created by any PROG pin capacitance capacitance on this pin must be kept to a minimum With no additional capacitance on the PROG pin the battery charger is stable with program resistor values as high as 25k However additional capacitance on this node reduces the maximum allowed program resistor The pole frequency at the PROG pin should be kept above 100kHz Therefore if the PROG pin has a parasitic capacitance CpRoc the following equation should be used to calculate the maximum resistance value for 1 Bonos PROG 2m 100kHz Cprog 3555fd LIEN 29 LIC3555 LIC3555 X TYPICAL APPLICATION Watchdog Microcontroller Operation L1 V OTHER d 201 LOADS usa 4 54 5 5V NTC PROG CLPROG MEMORY LDO3V3 LTC3555 1103555 V PUSH BUTTON MICROCONTROLLER f 1 61 33 SW2 m MICROPROCESSOR C1 MURATA GRM21BR61A106KE19 C2 TDK C2012X5R0J226M L1 COILCRAFT LPS4018 332LM L2 L3 TOKO 1098AS 4R7M L4 TOKO 1098AS 2ROM MP1 SILICONIX Si2333 16 7 28 3555 TA02 355514 30 AL Ure 3555
58. parameters such as regulator control loop stability and input voltage ripple Because the LTC3555 family uses a step down switching power supply from Vpus to Vour its input current wave form contains high frequency components It is strongly recommended that alow equivalent series resistance ESR multilayer ceramic capacitor be used to bypass Vpys Tantalum and aluminum capacitors are not recommended because of their high ESR The value of the capacitor on Vpus directly controls the amount of input ripple for a given load current Increasing the size of this capacitor will reduce the input ripple To prevent large Vour voltage steps during transient load conditions it is also recommended that a ceramic capaci tor be used to bypass Vour The output capacitor is used in the compensation of the switching regulator At least of actual capacitance with low ESR are required on Vour Additional capacitance will improve load transient performance and stability Multilayer ceramic chip capacitors typically have excep tional ESR performance MLCCs combined with a tight board layout and an unbroken ground plane will yield very good performance and low EMI emissions There are several types of ceramic capacitors available each having considerably different characteristics For example X7R ceramic capacitors have the best voltage and temperature stability ceramic capacitors have apparently higher packing density but poorer performance
59. ponsibility is assumed for its use Linear Technology Corporation makes no representa TECHNOLOGY tion that the interconnection of its circuits as described herein will not infringe on existing patent rights LIC3555 LIC3555 X TYPICAL APPLICATION Push Button Start with Automatic Sequencing Reverse Input Voltage Protection and 10 Second Push and Hold Hard Shutdown CONNECTOR MN1 2N7002 MP1 SILICONIX Si2333DS USB 25 I 8 SW1 MEMORY VBUS FB1 DVcc RST3 iu SW3 LTC3555 LTC3555 X 14 FB3 SDA 9 10 9 21 21 SCL CORE SEND 120 CODE 12 4 ONCE POWER IS DETECTED 3555 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3455 Dual DC DC Converter with USB Seamless Transition Between Input Power Sources Li lon Battery USB and 5V Wall Adapter Power Manager and Li lon Battery Two High Efficiency DC DC Converters Up to 96 Full Featured Li lon Battery Charger with Charger Accurate USB Current Limiting 500 100 Pin Selectable Burst Mode Operation Hot Swap Output for SDIO and Memory Cards 24 Lead 4mm x 4mm QFN Package 1163456 2 Cell Multi Output DC DC Seamless Transition Between 2 Cell Battery USB and AC Wall Adapter Input Power Sources Converter with USB Power Main Output Fixed 3 3V Output Core Output Adjustable from 0 8V to Hot Swap Manager Output for Memory Cards Power Supply Sequencing Main and Hot Swap Accurate USB Cur
60. power on reset to the microprocessor powered by regulator 3 or may be used to enable regulators 1 and or 2 for supply sequencing RST3 is an open drain output and requires a pull up resistor to the output voltage of regulator 3 or another appropriate power source General Purpose Step Down Switching Regulators The 1103555 family contains three general purpose 2 25MHz step down constant frequency current mode switching regulators Two regulators provide up to 400mA and a third switching regulator can produce up to 1A All three switching regulators can be programmed for a minimum output voltage of 0 8V and can be used to power a microcontroller core microcontroller 1 0 memory disk drive or other logic circuitry Two ofthe switching regulators have 12C programmable set points for on the fly power savings All three converters support 100 duty cycle Operation low dropout mode when their input voltage drops very close to their output voltage To suit a variety of applications selectable mode functions can be used to trade off noise for efficiency Four modes are available to control the operation of the LTC3555 family s general purpose switching regulators At moderate to heavy loads the pulse skip mode provides the least noise switching solution At lighter loads either Burst Mode operation forced Burst Mode operation or 00 mode may be selected The switching regulators include soft start to limit inrush current when powering on short cir
61. re that the battery is always topped off a charge cycle will auto matically begin when the battery voltage falls below the recharge threshold which is typically 100mV less than the charger s float voltage In the event that the safety timer is running when the battery voltage falls below the recharge threshold it will reset back to zero To prevent brief excursions below the recharge threshold from reset ting the safety timer the battery voltage must be below the recharge threshold for more than 1 3ms The charge cycle and safety timer will also restart if the UVLO cycles low and then high 6 0 Vays is removed and then replaced or if the battery charger is cycled on and off by the 120 port Charge Current The charge current is programmed using a single resis tor from PROG to ground 1 1022th of the battery charge current is sent to PROG which will attempt to servo to 1 000V Thus the battery charge current will try to reach 355514 AL 17 LIC3555 LIC3555 X OPERATION 1022 times the current in the PROG pin The program resistor and the charge current are calculated using the following equations 1022V 1022V RpnoG AUR Rprog In either the constant current or constant voltage charging modes the voltage at the PROG pin will be proportional to the actual charge current delivered to the battery There fore the actual charge current can be determined at any time by monitoring the PROG pin
62. rent Limiting High Frequency Operation 1MHz High Efficiency Up to 9296 24 Lead 4mm x 4mm QFN Package 1163552 Standalone Linear Li lon Battery Synchronous Buck Converter Efficiency gt 90 Adjustable Outputs at 800mA and 400 Charger with Adjustable Output Dual Synchronous Buck Converter Charge Current Programmable up to 950mA USB Compatible 16 Lead 5mm x 3mm DFN Package LTC3557 LTC3557 1 USB Power Manager with Li lon Polymer Charger Triple Synchronous Buck Converter plus LDO Complete Multi Function PMIC Linear Power Manager and Three Buck Regulators Charge Current Programmable up to 1 5A from Wall Adapter Input Thermal Regulation Synchronous Buck Converters Efficiency gt 95 ADJ Outputs 0 8V to 3 6V at 400mA 400mA 600mA Bat Track Adaptive Output Control 200mQ Ideal Diode 4mm x 4mm QFN 28 Package LTC4085 USB Power Manager with Ideal Diode Controller and Li lon Charger Charges Single Cell Li Ion Batteries Directly from a USB Port Thermal Regulation 200m Ideal Diode with lt 50mQ option 4mm x 3mm DFN14 Package LTC4088 LTC4088 1 LTC4088 2 High Efficiency USB Power Manager and Battery Charger Maximizes Available Power from USB Port Bat Track Instant On Operation 1 5 Max Charge Current 180mQ Ideal Diode with lt 50mQ Option 3 3V 25mA Always On LDO 4mm x 3mm DFN14 Package Hot Swap and Bat Track are trademarks of Linear Technology Corporation 3 Linear Technology
63. rst Mode Operation 600 800 1100 mA loUT2 Available Output Current Pulse Skip Burst Mode Operation Note 7 400 mA Forced Burst Mode Operation Note 7 60 mA LDO Mode Note 7 50 mA Burst Mode is a registered trademark of Linear Technology Corporation 355514 5 11 3555 11 3555 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range otherwise specifications are at 25 C Vpus 5V BAT 3 8V DVcc 3 3V Rpnog 1k Rei pnoc unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VEBHIGH2 Maximum Servo Voltage Full Scale 1 1 1 1 Note 8 e 0 78 0 80 0 82 V VFBLOW2 Minimum Servo Voltage Zero Scale 0 0 0 0 Note 8 045 0 425 0 445 V Vi sB2 VFB2 Servo Voltage Step Size 25 Rp2 PMOS Rps oN 0 6 Q NMOS Rps oN 0 7 Q Ripo 12 100 Mode Closed Loop Royt 0 25 Q Ripo 012 LDO Mode Rout Note 9 25 General Purpose Switching Regulator 3 VIN3 Pulse Skip Mode Input Current loyra Note 6 225 Burst Mode Input Current loura Note 6 35 60 Forced Burst Mode Input Current loyra Note 6 20 35 LDO Mode Input Current loyra Note 6 20 35 Shutdown Input Current loura 1 lLimsw3 PMOS Switch Current Limit Pulse Skip Burst Mode Operation 1500 2
64. s matches that of the 1103555 family the LTC3555 family returns an acknowl edge The master should then deliver the most significant data byte Again the LTC3555 family acknowledges and the cycle is repeated for a total of one address byte and two data bytes Each data byte is transferred to an internal holding latch upon the return of an acknowledge After both data bytes have been transferred to the LTC3555 family the master may terminate the communication witha STOP condition Alternatively aREPEAT START condition can be initiated by the master and another chip on the 126 bus can be addressed This cycle can continue indefinitely and 355514 20 AL Ure OPERATION the LTC3555 family will remember the last input of valid data that it received Once all chips on the bus have been addressed and sent valid data a global STOP condition can be sent and the LTC3555 family will update its command latch with the data that it had received In certain circumstances the data on the 12C bus may become corrupted In these cases the LTC3555 family responds appropriately by preserving only the last set of complete data that it has received For example assume the LTC3555 family has been successfully addressed and is receiving data when a STOP condition mistakenly occurs The LTC3555 family willignore this STOP condition and will not respond until a new START condition correct address new set of data and STOP condition are transmitted Li
65. se of slightly lower efficiency than forced Burst Mode operation At heavy loads the switch ing regulator operates in the same manner as pulse skip operation at high loads For applications that can tolerate some output ripple at low output currents Burst Mode operation provides better efficiency than pulse skip at light loads while still providing the full specified output current of the switching regulator Finally the switching regulators have an LDO mode that gives a DC option for regulating their output voltages In LDO mode the switching regulators are converted to linear regulators and deliver continuous power from their SWx pins through their respective inductors This mode gives the lowest possible output noise as well as low quiescent current at light loads The step down switching regulators allow mode transition on the fly providing seamless transition between modes even under load This allows the user to switch back and forth between modes to reduce output ripple or increase low current efficiency as needed Step Down Switching Regulator in Shutdown The step down switching regulators in shutdown when not enabled for operation In shutdown all circuitry in the step down switching regulator is disconnected from the switching regulator input supply leaving only a few LIC3555 LTC3555 X nanoamperes of leakage current The step down switch ing regulator outputs are individually pulled to ground through a 10k resist
66. t1 2 2 5V 2 3 8V Burst Mode OPERATION LSE SKIP sss 111 1 FORCED Burst Mode OPERATION 100 LOAD CURRENT mA 1000 3555 G36 355514 AL FUNCTIONS 100313 Pin 1 3 3V LDO Output Pin This provides a regulated always on 3 3V supply voltage LDO3V3 gets its power from Voyr It may be used for light loads such as a watchdog microprocessor or real time clock A 1pF capacitor is required from LDO3V3 to ground the LDO3V3 output is not used it should be disabled by connecting it to Vout CLPROG Pin 2 USB Current Limit Program and Moni tor Pin A resistor from CLPROG to ground determines the upper limit of the current drawn from the Vpys pin A fraction of the Vays current is sent to the CLPROG pin when the synchronous switch of the PowerPath switching regulator is on The switching regulator delivers power until the CLPROG pin reaches 1 188V Several Vays current limit settings are available via user input which will typically correspond to the 500mA and 100mA USB specifications A multi layer ceramic averaging capacitor or R C network is required at CLPROG for filtering NTC Pin 3 Inputto the Thermistor Monitoring Circuits The NTC pin connects to a battery s thermistor to deter mine if the battery is too hot or too cold to charge If the battery s
67. ther burst cycle begins The duration for which the regulator Operates in sleep mode depends on the load current The sleep time decreases as the load current increases The maximum output current in forced Burst Mode operation is about 100 for switching regulators 1 and 2 and about 250mAfor switching regulator 3 The step down switching regulators will notenter sleep mode if the maximum output current is exceeded in forced Burst Mode operation and the output will drop out of regulation Forced Burst Mode 22 M OPERATION operation provides a significant improvementin efficiency at light loads at the expense of higher output ripple when compared to pulse skip mode For many noise sensitive systems forced Burst Mode operation might be undesirable at certain times i e during a transmit or receive cycle of a wireless device but highly desirable at others i e when the device is in low power standby mode The 120 port can be used to enable or disable forced Burst Mode Operation at any time offering both low noise and low power operation when they are needed In Burst Mode operation the switching regulator automati cally switches between fixed frequency PWM operation and hysteretic control as a function of the load current At light loads the regulators operate in hysteretic mode in much the same way as described for the forced Burst Mode operation Burst Mode operation provides slightly less output ripple at the expen
68. tors result in higher ripple current and improved transient responsetime To maximize efficiency choose an inductor with a low DC resistance For a 1 2V output efficiency is reduced about 2 for 100 series resistance at 400mA load current and about 2 for 300mQ series resistance at 100mA load current Choose an inductor with a DC current rating at least 1 5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation If output short circuit is a pos sible condition the inductor should be rated to handle the maximum peak current specified for the step down converters Different core materials and shapes will change the size current price current relationship of an inductor Toroid or shielded pot cores in ferrite or Permalloy materials are 355514 2 LTC3555 LTC3555 X APPLICATIONS INFORMATION small and don t radiate much energy but generally cost more than powdered iron core inductors with similar electrical characteristics Inductors that are very thin or have a very small volume typically have much higher and DCR losses and will not give the best efficiency The choice of which style inductor to use often depends more on the price vs size performance and any radiated EMI requirements than on what the LTC3555 family requires to operate The inductor value also has an effect on forced Burst Mode and Burst Mode operations Lower inductor
69. value at a very low frequency The low and high duty cycles are disparate enough to make an LED appear to be on or off thus giving the appearance of blinking Each of the two faults has its own unique blink rate for human recognition as well as two unique duty cycles for machine recognition The CHRG pin does not respond to the C 10 threshold if the LTC3555 family is in Vays current limit This prevents false end of charge indications due to insufficient power available to the battery charger Table 1 illustrates the four possible states of the CHRG pin when the battery charger is active Table 1 CHRG Signal MODULATION STATUS FREQUENCY BLINK FREQUENCY DUTY CYCLES Charging Lo Z 100 Charging 0Hz Hi Z 096 NTC Fault 35kHz 1 5Hz at 50 6 25 to 93 75 Bad Battery 35kHz 6 1Hz at 5096 12 595 to 87 596 An NTC fault is represented by a 35kHz pulse train whose duty cycle varies between 6 25 and 93 75 at a 1 5Hz rate A human will easily recognize the 1 5Hz rate as a slow blinking which indicates the out of range battery temperature while a microprocessor will be able to decode either the 6 25 or 93 75 duty cycles as an NTC fault If a battery is found to be unresponsive to charging i e its voltage remains below 2 85V for 1 2 hour the CHRG pin gives the battery fault indication Forthis fault would easily recognize the frantic 6 1Hz fast blink of the L
70. voltage and using the following equation Ibar Vero 1022 PROG In many cases the actual battery charge current will belowerthan due to limited input power available and prioritization with the system load drawn from Charge Status Indication The CHRG pin indicates the status of the battery charger Four possible states are represented by CHRG which in clude charging not charging unresponsive battery and battery temperature out of range The signal at the CHRG pin can be easily recognized as one of the above four states by either a human or a mi croprocessor An open drain output the CHRG pin can drive an indicator LED through a current limiting resistor for human interfacing or simply a pull up resistor for microprocessor interfacing To make the CHRG pin easily recognized by both humans and microprocessors the pin is either low for charging high for not charging or it is switched at high frequency 35kHz to indicate the two possible faults unresponsive battery and battery temperature out of range When charging begins CHRG is pulled low and remains low for the duration of a normal charge cycle When charging is complete i e the BAT pin reaches the float voltage and the charge current has dropped to one tenth ofthe programmed value the CHRG pin is released Hi Z If a fault occurs the pin is switched at 35kHz While switching its duty cycle is modulated between a low and high

LINEAR TECHNOLOGY - LTC3555/LTC3555-X High Ef ciency USB Power Manager + Triple Step-Down DC/DC handbook

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