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LINEAR TECHNOLOGY LT1767/LT1767-1.8/ LT1767-2.5/LT1767-3.3/LT1767-5 Manual

1. E Case Size ESR Max Ripple Current A AVX TPS Sprague 593D 0 1 to 0 3 0 7 to 1 1 AVX TAJ 0 7 to 0 9 0 4 D Case Size AVX TPS Sprague 593D 0 1 to 0 3 0 7 to 1 1 C Case Size AVX TPS 0 2 typ 0 5 typ Figure 3 shows a comparison of output ripple fora ceramic and tantalum capacitor at 200mA ripple current Vour USING 47 F 0 10 TANTALUM CAPACITOR 10mV DIV L Vour USING 2 2uF CERAMIC CAPACITOR 10mV DIV Nee eMe SV DIV 0 2us DIV 1767 F03 Figure 3 Output Ripple Voltage Waveform INDUCTOR CHOICE AND MAXIMUM OUTPUT CURRENT Maximum output current for a buck converter is equal to the maximum switch rating Ip minus one half peak to peak inductor current In past designs the maximum switch current has been reduced by the introduction of slope compensation Slope compensation is required at duty cycles above 50 to prevent an affect called subharmonic oscillation see Application Note 19 for details The LT1767 has a new circuit technique that maintains a constant switch current rating at all duty cycles Patent Pending For most applications the output inductor will be in the 1uHto 10uH range Lower values are chosen to reduce the physical size of the inductor higher values allow higher outputcurrents dueto reduced peakto peak ripple current and reduces the current at which discontinuous operation occurs The following formula gives maximum output current for continuous mode
2. MS8E 0102 MOLD FLASH PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0 152mm 006 PER SIDE 0256 4 DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS BCS INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0 152mm 006 PER SIDE 5 LEAD COPLANARITY BOTTOM OF LEADS AFTER FORMING SHALL BE 0 102mm 004 MAX PART NUMBER DESCRIPTION COMMENTS LT1370 High Efficiency DC DC Converter 42V 6A 500kHz Switch LT1371 High Efficiency DC DC Converter 35V 3A 500kHz Switch LT1372 LT1377 500 2 and 1MHz High Efficiency 1 5A Switching Regulators Boost Topology LT1374 High Efficiency Step Down Switching Regulator 25V 4 5A 500kHz Switch LT1375 LT1376 1 5A Step Down Switching Regulators 500kHz Synchronizable 50 8 Package LT1507 1 5A Step Down Switching Regulator 500kHz 4V to 16V Input 60 8 Package LT1576 1 5A Step Down Switching Regulator 200kHz Reduced EMI Generation LT1578 1 5A Step Down Switching Regulator 200kHz Reduced EMI Generation LT1616 600mA Step Down Switching Regulator 1 4MHz 4V to 25V Input SOT 23 Package LT1676 LT1776 Wide Input Range Step Down Switching Regulators 60V Input 700mA Internal Switches LTC1765 1 25MHz 3A Wide Input Range Step Down DC DC 3V to 25V 50 8 and TSSOP 16E Packages LTC1877 High Efficiency Monolithic Step Down Regulator 550kHz MS8 Vin Up to 10V Ig 10uA lour to 600mA at Viy 5V LTC1878 High Efficiency Monolithic Step Down Regulator 550kHz MS8 Viy Up to 6V lq 10pA lour to 600mA a
3. TO GROUND PLANE KE VIN SENSE 1767 F06 Figure 6 Typical Application and Suggested Layout Topside Only Shown Total power dissipation is 0 34 0 05 0 01 0 4W When estimating ambient remember the nearby catch Thermal resistance for LT1767 package is influenced by diode and inductor will also be dissipating power the presence of internal or backside planes With a full plane under the package thermal resistance for the _ Ve V Vour J ILoap exposed pad package will be about 40 C W No plane will oe Vn increase resistance to about 150 C W To calculate die temperature use the appropriate thermal resistance Vr Forward voltage of diode assume 0 5V at 1A number and add in worst case ambient temperature Ppiopr 0 29 sn1767 1767fas 12 LI APPLICATIONS INFORMATION Notice that the catch diode s forward voltage contributes a significant loss in the overall system efficiency A larger lower Vr diode can improve efficiency by several percent Pinpuctor Ioab LpcR Lpcg Inductor DC resistance assume 0 10 Pinpuctor 1 0 1 0 1W Typical thermal resistance of the board is 35 C W At an ambient temperature of 65 C Tj 65 40 0 4 35 0 39 95 C If a true die temperature is required a measurement of the SYNC to GND pin resistance can be used The SYNC pin resistance across temperature must first be calibrated with no
4. e 80 Minimum Boost Voltage Above Switch 1 5A 0 C lt Ta lt 125 C and 1 3A Ta lt 0 C e 1 8 2 7 V Boost Current Isw 0 5A Note 4 e 10 15 mA Igy 1 5A 0 C lt Ta lt 125 C and 1 3 TA lt 0 C Note 4 e 30 45 mA SHDN Threshold Voltage e 1 27 1 33 1 40 V SHDN Input Current Shutting Down SHDN 60mV Above Threshold 7 10 13 uA SHDN Threshold Current Hysteresis SHDN 100mV Below Threshold e 4 7 10 uA SYNC Threshold Voltage 1 5 2 2 V SYNC Input Frequency 1 5 2 MHz SYNC Pin Resistance 1mA 20 Vote 1 Absolute Maximum Ratings are those values beyond which the life of a device may be impaired Note 2 The LT1767E is guaranteed to meet performance specifications from 0 C to 125 C Specifications over the 40 to 125 C operating junction temperature range are assured by design characterization and correlation with statistical process controls Note 3 Minimum input voltage is defined as the voltage where the internal regulator enters lockout Actual minimum input voltage to maintain a Applications Information switch cycle regulated output will depend on output voltage and load current See Note 4 Current flows into the BOOST pin only during the on period of the TYPICAL PERFORMANCE CHARACTERISTICS FB vs Temperature Adj 1 22 Switch On Voltage Drop 125 C V Q N FB VOLTAGE V
5. TECHNOLOGY LT1767 LT1767 1 8 AD LT1767 2 5 LT1767 3 3 LT1767 5 Monolithic 1 5A 1 25MHz step Down Switching Regulators FERTURES 1 5A Switch in a Small MSOP Package Constant 1 25MHz Switching Frequency High Power Exposed Pad MS8E Package Wide Operating Voltage Range 3V to 25V m High Efficiency 0 220 Switch 1 2V Feedback Reference Voltage Fixed Output Voltages of 1 8V 2 5V 3 3V 5V 2 Overall Output Tolerance Uses Low Profile Surface Mount Components m Low Shutdown Current 6uA Synchronizable to 2MHz Current Mode Loop Control Constant Maximum Switch Current Rating at All Duty Cycles APPLICATIONS DSL Modems Portable Computers Wall Adapters Battery Powered Systems Distributed Power DESCRIPTION LT 1767 is a 1 25MHz monolithic buck switching regulator A high efficiency 1 5A 0 22Q switch is included on the die together with all the control circuitry required to complete a high frequency current mode switching regu lator Current mode control provides fast transient re sponse and excellent loop stability New design techniques achieve high efficiency at high switching frequencies over a wide operating range A low dropout internal regulator maintains consistent perfor mance over a wide range of inputs from 24V systems to Li lon batteries An operating supply current of 1mA im proves efficiency especially at lower output currents Shutdown reduces quiescent
6. A switching regulator draws constant power from the source so source current increases as source voltage drops This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions UVLO prevents the regulator from operating at source voltages where these problems might occur OUTPUT Figure 4 Undervoltage Lockout An internal comparator will force the part into shutdown below the minimum Vix of 2 6V This feature be used to prevent excessive discharge of battery operated sys tems If an adjustable UVLO threshold is required the shutdown pin can be used The threshold voltage of the shutdown pin comparator is 1 33V 3uA internal current source defaults the open pin condition to be operating see Typical Performance Graphs Current hysteresis is added above the SHDN threshold This be used to set voltage hysteresis of the UVLO using the following TuA R1 _ 1 33V 133 R1 Vu Turn on threshold V Turn off threshold Example switching should not start until the input is above 4 75V and is to stop if the input falls below 3 75V 4 75V 3 75V _ 4 751 3 751 7 E 1 33V 475v 1 33V 143k R1 143 49 4k Keep the connections from the resistors to the SHDN short and make sure that the interplane or surface capaci tance to the
7. Unlike the input capacitor RMS ripple current in the output capacitor is normally low enough that ripple current rating is not an issue The current waveform is triangular with an RMS value given by 0 29 Vour Vour The 171767 will operate with both ceramic and tantalum output capacitors Ceramic capacitors are generally chosen for their small size very low ESR effective series resis tance and good high frequency operation reducing out put ripple voltage Their low ESR removes a useful zero in the loop frequency response common to tantalum capaci tors To compensate for this the Vc loop compensation pole frequency must typically be reduced by a factor of 10 Typical ceramic output capacitors in the 1uF to 10uF range Since the absolute value of capacitance defines the pole frequency of the output stage an X7R or X5R type ceramic which have good temperature stability is recom mended IRIPPLE RMS Tantalum capacitors are usually chosen for their bulk capacitance properties useful in high transient load appli cations ESR rather than capacitive value defines output ripple at 1 25MHz Typical LT1767 applications require a tantalum capacitor with less than 0 30 ESR at 22uF to 500uF see Table 2 sn1767 1767fas neve 7 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 APPLICATIONS INFORMATION Table 2 Surface Mount Solid Tantalum Capacitor ESR and Ripple Current
8. 1767 G08 Maximum Load Current Vout 9V 15 13 amp 14 e 5 09 a 5 a 0 7 0 5 0 5 10 15 20 25 INPUT VOLTAGE V 1767 611 SHDN Ip Current vs Temperature 12 10 een pe SHUTTING DOWN 8 5 6 Q 4 STARTING UP 2 0 50 25 0 25 50 75 100 125 TEMPERATURE 1767 G06 Input Supply Current 1200 1000 EN MINIMUM 800 INPUT 5 VOLTAGE ce 600 2 c 400 200 0 0 5 10 15 2 25 30 INPUT VOLTAGE V 1767 G09 Maximum Load Current Vout 2 5V 15 13 amp za 1 c aa E 9 09 07 0 5 10 15 20 25 INPUT VOLTAGE V 1767 G12 sn1767 1767fas LI MYR FUNCTIONS FB The feedback pin is used to set output voltage using an external voltage divider that generates 1 2V atthe pin with the desired output voltage The fixed voltage 1 8V 2 5V 3 3V and 5V versions have the divider network included internally and the FB pin is connected directly to the output If required the current limit can be reduced during start up or short circuit when the FB pin is below 0 5V see the Current Limit Foldback graph in the Typical Perfor mance Characteristics section An impedance of less than 5kQ adjustable part only at the FB pin is needed for this feature to operate BOOST The BOOST pin is used to provide a drive volta
9. 850umho OUTPUT 1767 F07 Vout 5 Cour 100uF 0 10 60 Co 330pF 150 Ro Cr N C 40 500 420 _ mtt Es 24 PHASE E z 20 90 5 m 0 60 GAIN 20 30 40 0 10 100 1k 10k 100k 1M FREQUENCY Hz 1767 F10 Figure 8 Overall Loop Response Error amplifier DC gain set by gm and 850 500k 425 Pole set by Cr and 2x 500k 330p 965Hz Unity gain set by Ce and gm 2x 330p 85017 410kHz Power stage DC gain set by gm assume 100 2 5 10 25 Pole set by Cour and 2x 100 10 159Hz Unity gain set by Cour and gm 2x 1000 2 5717 3 98kHz Tantalum output capacitor Zero set by Cout and Cesp 2x 1001 9 0 1 1 15 9kHz sn1767 1767fas 13 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 APPLICATIONS INFORMATION The zero produced by the ESR of the tantalum output capacitor is very useful in maintaining stability Ceramic output capacitors do not have a zero due to very low ESR but are dominated by their ESL They form a notch in the 1MHzto 10MHz range Without this zero the Vc pole must be made dominant A typical value of 2 2nF will achieve this If better transient response is required a zero can be added to the loop using a resistor in series with the compensation capacitor As the value of Rc is increased transient response will general
10. e 247 2 6 2 73 V Vin Supply Current Veg 17 e 1 1 3 mA Shutdown Supply Current OV Vin 25V Vow OV 6 20 e 45 Feedback Voltage 3V lt Vin lt 25V 0 4V lt Vc lt 0 9V LT1767 Adj 1 182 12 1 218 V Note 3 e 1 176 1 224 V LT1767 1 8 e 1 764 1 8 1 836 V LT1767 2 5 e 245 2 5 2 55 V LT1767 3 3 e 3234 3 3 3 366 V LT1767 5 e 49 5 5 1 V FB Input Current LT1767 Adj e 0 25 0 5 sn1767 1767fas 2 LI Ure LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 ELECTRICAL CHARACTERISTICS The e denotes the specifications which apply over the full operating temperature range otherwise specifications are at TA 25 C Vin 15V Ve 0 8V Boost Viy 5V SHDN SYNC and switch open unless otherwise noted PARAMETER CONDITION MIN TYP MAX UNITS FB Input Resistance LT1767 1 8 e 105 15 21 kQ LT1767 2 5 e 147 21 30 kQ LT1767 3 3 19 27 5 39 LT1767 5 29 42 60 kQ Error Amp Voltage Gain 0 4V lt Vg lt 0 9V 150 350 Error Amp Transconductance Alyc 10 500 850 1300 uMho Vc Pin Source Current Veg VoM 17 e 80 120 160 Vc Pin Sink Current 17 e 70 110 180 Pin to Switch Current Transconductance 2 5 AN Vc Pin Minimum Switching Threshold Duty Cycle 0 0 35 V Vc Pin 1 5A law Threshold 0 9 V Maximum Switch Duty Cycle Vc 12V Isw 400mA 85 90
11. is recommended that an alternate boost supply is used The boost diode can be connected to the input although care must be taken to prevent the 2x Vin boost voltage from exceeding the BOOST pin absolute maximum rating The additional voltage across the switch driver also increases power loss reducing efficiency If available an independent supply can be used with a local bypass capacitor A 0 1pF boost capacitor is recommended for most appli cations Almost any type of film or ceramic capacitor is sn1767 1767fas 9 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 APPLICATIONS INFORMATION Suitable but the ESR should be lt 1Q to ensure it can be fully recharged during the off time of the switch The capacitor value is derived from worst case conditions of 700ns on time 50mA boost current and 0 7V discharge ripple This value is then guard banded by 2x for secondary factors such as capacitor tolerance ESR and temperature effects The boost capacitor value could be reduced under less demanding conditions but this will not improve circuit operation or efficiency Under low input voltage and low load conditions a higher value capacitor will reduce discharge ripple and improve start up operation SHUTDOWN AND UNDERVOLTAGE LOCKOUT Figure 4 shows how to add undervoltage lockout UVLO to the LT1767 Typically UVLO is used in situations where the input supply is current limited or has a relatively high source resistance
12. 0 080 3 5 CDRH4D18 2R2 2 2 1 32 0 058 1 8 CDRH5D18 6R2 6 2 1 4 0 071 1 8 CDRH5D28 100 10 1 3 0 048 2 8 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 4 After making an initial choice consider the secondary things like output voltage ripple second sourcing etc Use the experts in the Linear Technology s applica tions department if you feel uncertain about the final choice They have experience with a wide range of inductor types and can tell you about the latest devel opments in low profile surface mounting etc CATCH DIODE The suggested catch diode D1 is a UPS120 Schottky or its Motorola equivalent MBRM120LTI MBRM130LTI It is rated at 2A average forward current and 20V 30V reverse voltage Typical forward voltage is 0 5V at 1A The diode conducts current only during switch off time Peak reverse voltage is equalto regulator input voltage Average forward current in normal operation can be calculated from lour Vin Vour VIN Ip ave BOOST PIN For most applications the boost components are a 0 1 uF capacitor and a CMDSH 3 diode The anode is typically connected to the regulated output voltage to generate a voltage approximately Voyy above to drive the output stage The output driver requires at least 2 7V of head room throughout the on period to keep the switch fully saturated However the output stage discharges the boost capacitor during the on time If the output voltage is less than 3 3V it
13. 3 3 LT1767 5 BLOCK DIAGRAM The LT1767 is a constant frequency current mode buck converter This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch In addition to the normal error amplifier there is a current sense amplifier that monitors switch current on a cycle by cycle basis A switch cycle starts with an oscilla tor pulse which sets the Rs flip flop to turn the switch on When switch current reaches a level set by the inverting input of the comparator the flip flop is reset and the switch turns off Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point This technique means that the error amplifier commands current to be delivered to the output rather than voltage A voltage fed system will have low phase shift up to the resonant frequency of the inductor CURRENT SENSE AMPLIFIER INTERNAL Voc 2 5V BIAS REGULATOR 0 35V 1 25MHz SYNC 8 OSCILLATOR FURENT COMPARATOR SHUTDOWN COMPARATOR C c 7A E pev SHDN 0 VOLTAGE GAIN 40 and output capacitor then an abrupt 180 shift will occur The current fed system will have 90 phase shift ata much lower frequency but will not have the additional 90 shift until well beyond the LC resonant frequency This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response Hig
14. 596 to 150 C Pin VUE 6V Lead Temperature Soldering 10 sec 300 C Pin Current Seen en IRR RR ene eer 1mA PACKAGC ORDER INFORMATION ORDER PART NUMBER ORDER PART NUMBER TOP VIEW LT1767EMS8 TOP VIEW LT1767EMS8E BoosT 1 8 SYNC LT1767EMS8 1 8 BOOST 1 8 SYNC LT1767EMS8E 1 8 SW 3 68 _ LT1767EMS8 2 5 SW 3 T LT1767EMS8E 2 5 LT1767EMS8 3 3 SDN LT1767EMS8E 3 3 8 LEAD PLASTIC MSOP LT1767EMS8 5 LEAD PLASTIC MSOP LT1767EMS8E 5 Tumax 125 C 1105074 MS8 PART MARKING Tumax 125 C CAN MS8E PART MARKING GROUND PIN CONNECTED LTLS EXPOSED GND PAD LTZG TO LARGE COPPER AREA LTWG 52 LTZH LTWD LTZJ LTWE LTZK LTWF LTZL Consult LTC Marketing for parts specified with wider operating temperature ranges ELECTRICAL CHARACTERISTICS The e denotes the specifications which apply over the full operating temperature range otherwise specifications are at TA 25 C Vin 15V Ve 0 81 Boost Viy 5V SHDN SYNC and switch open unless otherwise noted PARAMETER CONDITION MIN TYP MAX UNITS Maximum Switch Current Limit Ta 0 C to 125 C 1 5 2 3 A Ta lt 0 1 3 3 Oscillator Frequency 3 3V lt Vin lt 25V 14 1 25 1 4 MHz 11 1 5 MHz Switch On Voltage Drop Igy 1 5A 0 C lt Ta lt 125 C and 1 3A Ta lt 0 C 330 400 mV e 500 mV Vin Undervoltage Lockout Note 3
15. 7fas Une APPLICATIONS INFORMATION saturation of the inductor In these applications the soft start circuit shown in Figure 10 should be used 2 Calculate peak inductor current at full load current to ensure that the inductor will not saturate Peak current can be significantly higher than output current especially with smaller inductors and lighter loads so don t omit this step Powdered iron cores are forgiving because they saturate softly whereas ferrite cores saturate abruptly Other core materials fall somewhere in between Vout Mw Vour Vin Maximum input voltage f Switching frequency 1 25MHz Ipeak lout 3 Decide if the design can tolerate an open core geom etry like a rod or barrel which have high magnetic field radiation or whether it needs a closed core like a toroid to prevent EMI problems This is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem Table 3 PART NUMBER VALUE uH Isar Amps DCR HEIGHT mm Coiltronics TP1 2R2 2 2 1 3 0 188 1 8 TP2 2R2 2 2 1 5 0 111 2 2 TP3 4R7 47 1 5 0 181 2 2 TP4 100 10 1 5 0 146 3 0 Murata LQH1C1ROM04 1 0 0 51 0 28 1 8 LQH3C1ROM24 1 0 1 0 0 06 2 0 LQH3C2R2M24 2 2 0 79 0 1 2 0 LQHA4C1R5M04 1 5 1 0 0 09 2 6 Sumida CD73 100 10 1 44
16. Q SWITCH VOLTAGE m FREQUENCY MHz 1 18 50 25 0 25 50 75 TEMPERATURE 100 125 0 0 1767 601 SW TCH CURRENT A 1767 602 1 50 1 45 1 40 1 35 1 30 1 25 1 20 1 15 1 10 50 25 0 Oscillator Frequency 25 50 75 TEMPERATURE C 100 125 1767 603 sn1767 1767fas 3 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 TYPICAL PERFORMANCE CHARACTERISTICS SHDN Threshold vs Temperature 1 40 1 38 d z 1 36 I tB 1 34 a I 72 1 32 1 30 50 25 0 25 50 75 100 125 TEMPERATURE C 1767 G04 Minimum Input Voltage for 2 5V Out 3 5 3 3 e di 5 e gt 5 29 a 27 25 0 001 0 01 0 1 1 LOAD CURRENT A 1767 G07 Current Limit Foldback 2 0 40 T Z 1 5 30 a c SWITCH CURRENT 3 x 10 20 a t I ce E zm 0 5 10 FB CURRENT 0 0 0 0 2 0 4 0 6 0 8 1 1 2 FEEDBACK VOLTAGE V 1767 G10 INJHYND LNdNI 4 Vin CURRENT A Vy CURRENT uA SHDN Supply Current vs Viy 7 SHDN 0V 6 5 4 3 2 1 0 0 5 10 15 20 25 30 Vin V 1767 G05 SHDN Supply Current 300 Vin 15 250 200 150 100 50 0 0 02 04 06 08 1 12 14 SHUTDOWN VOLTAGE V
17. current to 6uA Maximum switch current remains constant at all duty cycles Syn chronization allows an external logic level signal to in crease the internal oscillator from 1 4MHz to 2MHz The LT1767 is available in an 8 pin MSOP fused leadframe package and a low thermal resistance exposed pad pack age Full cycle by cycle short circuit protection and ther mal shutdown are provided High frequency operation allows the reduction of input and output filtering compo nents and permits the use of chip inductors 4J LTC and LT are registered trademarks of Linear Technology Corporation Patent Pending TYPICAL APPLICATION 12V to 3 3V Step Down Converter D2 CMDSH 3 VIN 12V c3 OPEN LT1767 3 3 2 2uF an CERAMIC L gu SHON FB ON SYNC GND Vc 10 Efficiency vs Load Current Vin 10V Vout 5 lt EFFICIENCY 96 0 02 04 06 08 1 LOAD CURRENT A 12 14 1767 01 1767 TAO1a sn1767 1767fas 1 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 ABSOLUTE MAXIMUM RATINGS note 1 input NR TN 25V SY ING PI CUTTEN ui aei 1mA BOOST Pin Above SW 24 2 2 20V Operating Junction Temperature Range Note 2 BOOST Pin Voltage 22245 2 mrt 35V EIFE 2a 4096 to 125 C TO A PUM acti a adu Arts Leda 25V Storage Temperature Range 6
18. device power inan oven The same measurement can then be used in operation to indicate the die tempera ture FREQUENCY COMPENSATION Before starting on the theoretical analysis of frequency response the following should be remembered the worse the board layout the more difficult the circuit will be to stabilize This is true of almost all high frequency analog circuits read the LAYOUT CONSIDERATIONS section first Common layout errors that appear as stability prob lems are distant placement of input decoupling capacitor and or catch diode and connecting the V compensation to a ground track carrying significant switch current In addition the theoretical analysis considers only first order non ideal component behavior For these reasons it is important that a final stability check is made with produc tion layout and components The LT1767 uses current mode control This alleviates many of the phase shift problems associated with the inductor The basic regulator loop is shown in Figure 7 with both tantalum and ceramic capacitor equivalent cir cuits The LT 1767 can be considered as two gm blocks the error amplifier and the power stage Figure 8 shows the overall loop response with a 330pF Vc capacitor and a typical 100uF tantalum output capacitor The response is set by the following terms LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 CURRENT MODE POWER STAGE 2 5mho ERROR AMPLIFIER FB
19. e accurate and reliable y CAR However no responsibility is assumed for its use Linear Technology Corporation makes no represen 1 5 TECHNOLOGY tation thatthe interconnection of its circuits as described herein will not infringe on existing patent rights LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 PACKAGE DESCRIPTION MS8E Package 8 Lead Plastic MSOP Reference LTC DWG 05 08 1662 BOTTOM VIEW OF 3 00 0 102 EXPOSED PAD OPTION 2 794 0 102 0 889 0 127 1185 00 052 2 06 0 102 110 1004 035 005 NOTE 3 ee 206 iP 080 004 r t REF 1 83 0 102 Y I L4 072 004 5 23 206 2 083 0 102 _3 2 3 45 u 3 00 0 102 MIN 082 004 dar 0254 DETAIL 192 004 118 004 c7 010 0 6 TYP 042 0 04 0 65 GAUGE PLANE 2 m 0165 0015 0256 A 1284 8 TYP BSC E 0 53 0 015 110 RECOMMENDED SOLDER PAD LAYOUT 021 006 043 034 DETAIL REF 0 18 endi SEATING 1 DIMENSIONS MILLIMETER INCH PLANE 022 038 Ja 9135005 2 DRAWING NOT TO SCALE 009 015 4 6g 005 002 3 DIMENSION DOES NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS
20. ge higher than the input voltage to the internal bipolar NPN power switch Without this added voltage the typical switch voltage loss would be about 1 5V The additional boost voltage allows the switch to saturate and voltage loss approximates that of a 0 220 FET structure Vin This is the collector of the on chip power NPN switch This pin powers the internal circuitry and internal regula tor At NPN switch on and off high dl dt edges occur on this pin Keep the external bypass capacitor and catch diode close to this pin All trace inductance in this path will create a voltage spike at switch off adding to the Vcr voltage across the internal NPN GND The GND pin acts as the reference for the regulated output so load regulation will suffer if the ground end of the load is not at the same voltage as the GND pin of the IC This condition will occur when load current or other currents flow through metal paths between the GND pin and the load ground point Keep the ground path short between the GND pin and the load and use a ground plane LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 when possible Keep the path between the input bypass and the GND pin short The GND pin of the MS8 package is directly attached to the internal tab This pin should be attached to a large copper area to improve thermal resistance The exposed pad of the MS8E package is also connected to GND This should be soldered to a large copper area to improve i
21. h switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage allowing switch to be saturated This boosted voltage is generated with an external capaci tor and diode A comparator connected to the shutdown pin disables the internal regulator reducing supply current S Rs FLIP FLOP R Q1 POWER SWITCH DRIVER CIRCUITRY Vsw PARASITIC DIODES T FORWARD BIAS 16 FB ERROR AMPLIFIER 850uMho ad GND 1767 01 Figure 1 Block Diagram sn1767 1767fas MN APPLICATIONS INFORMATION FB RESISTOR NETWORK If an output voltage of 1 8V 2 5V 3 3V or 5V is required the respective fixed option part 1 8 2 5 3 3 or 5 should be used The FB pin is tied directly to the output the necessary resistive divider is already included on the part For other voltage outputs the adjustable part should be used and an external resistor divider added The suggested resistor R2 from FB to ground is 10k This reduces the contribution of FB input bias current to output voltage to less than 0 25 The formula for the resistor R1 from Vour to FB is R2 Vour 1 2 1 2 R2 0 25uA LT1767 OUTPUT ERROR AMPLIFIER Figure 2 Feedback Network INPUT CAPACITOR Step down regulators draw current from the input supply in pulses The rise and fall times of these pulses are very fast The input capacitor is required t
22. he pad to a ground plane will reduce die temperature and in crease the power capacity of the LT1767 For the nonexposed package Pin 4 is connected directly to the pad inside the package Similar treatment of this pin will result in lower die temperatures THERMAL CALCULATIONS Power dissipation in the LT1767 chip comes from four sources switch DC loss switch AC loss boost circuit current and input quiescent current The following formulas show how to calculate each of these losses These formulas assume continuous mode operation so they should not be used for calculating efficiency at light load currents Switch loss _ Selon Vour 1 7ns lour Vw t Boost current loss for Vagos Vour 2 Vout lour 50 VN Quiescent current loss Psw Po Vin 0 001 Rew Switch resistance 0 27Q when hot 17ns Equivalent switch current voltage overlap time f Switch frequency Example with Viy 10V Voyt 5V and lour 1A Pew 17109 1 1 oj 25 108 2 Pa 10 0 001 0 01 sn1767 1767fas 11 LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 APPLICATIONS INFORMATION D2 CMDSH 3 OUTPUT OPEN LT1767 2 5 2 2uF OR CERAMIC IL HIGH SHDN 7 ZON SYNC GND Vc PLACE FEEDTHROUGHS AROUND GROUND PIN AND UNDER GROUND PAD FOR GOOD THERMAL MINIMIZE LT1767 C3 01100 CONDUCTIVITY KEEP FB AND Vc COMPONENTS AWAY FROM HIGH INPUT COMPONENTS
23. igure 9 Dual Source Supply with 64A Reverse Leakage D2 CMDSH 3 D2 CMDSH 3 ViN OUTPUT 6V TO 15V 5V LT1767 5 SHDN FB ei SYNC GND Vin L 100uF UV TR 22uF 10V TANT 16V CERAMIC GND 4 c5 L1 1S A SINGLE WITH TWO WINDINGS 2 2uF L1B 100uF BH ELECTRONICS 511 1013 16V 10V TANT L 1767 F10 T IF LOAD CAN GO TO ZERO CERAMIC AN OPTIONAL PRELOAD OF 1k TO 5k at D1 UPS120 MAY BE USED TO IMPROVE LOAD REGULATION D3 5 01 2 3904 D1 D3 UPS120 1767 FH Figure 10 Buck Converter with Adjustable Soft Start Figure 11 Dual Output SEPIC Converter PACKAGE DESCRIPTION MS8 Package 8 Lead Plastic MSOP Reference LTC DWG 05 08 1660 0 118 0 004 0 043 0 034 3 00 0 102 i 1 10 0 86 8765 MAX REF TE 0 6 TYP 11 _ SEATING EN 0 193 0 006 0 118 0 004 X ee 6 Nee 0 021 0 006 4 PLANE 9009 0015 a A 0 005 0 002 49050115 8 00 0 102 0 53 0 015 022 038 Nu 0 13 0 05 0 65 BSC 123 4 MSOP 58 1100 DIMENSION DOES NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS MOLD FLASH PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0 006 0 152mm PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0 006 0 152mm PER SIDE sn1767 1767fas Information furnished by Linear Technology Corporation is believed to b
24. ly improve but two effects limit its value First the combination of output capacitor ESR and a large Rc may stop loop gain rolling off alto gether Second if the loop gain is not rolled sufficiently at the switching frequency output ripple will perturb the Vc pin enough to cause unstable duty cycle switching similar to subharmonic oscillation This may not be apparent at the output Small signal analysis will not show this since a continuous time system is assumed If needed an additional capacitor can be added to form a pole at typically one fifth the switching frequency If Rc 5k Cr 100pF When checking loop stability the circuit should be oper ated over the application s full voltage current and tem perature range Any transient loads should be applied and the output voltage monitored for a well damped behavior See Application Note 76 for more details CONVERTER WITH BACKUP OUTPUT REGULATOR In systems with a primary and backup supply for ex ample a battery powered device with a wall adapter input the output of the LT1767 can be held up by the backup supply with its input disconnected In this condition the SW pin will source current into the Vi pin Ifthe SHDN pin is held at ground only the shut down current of 6uA will be pulled via the SW pin from the second supply With the SHDN pin floating the LT1767 will consume its quiescent operating current of 1mA The Viy pin will also source current to any othe
25. o reduce the voltage ripple this causes at the input of LT1767 and force the switching current into a tight local loop thereby minimizing EMI The RMS ripple current can be calculated from 2 IRIPPLE RMS lour Vin Higher value lower cost ceramic capacitors are now avail able in smaller case sizes These are ideal for input bypass ing since their high frequency capacitive nature removes most ripple current rating and turn on surge problems At higher switching frequency the energy storage require ment of the input capacitor is reduced so values in the range of 1uF to 4 7uF are suitable for most applications Y5V similar type ceramics can be used since the absolute value LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 of capacitance is less important and has no significant effect on loop stability If operation is required close to the minimum input required by the output of the LT1767 a larger value may be required This is to prevent excessive ripple causing dips below the minimum operating voltage resulting in erratic operation If tantalum capacitors are used values in the 22uF to 470uF rangeare generally needed to minimize ESR and meet ripple current and surge ratings Care should be taken to ensure the ripple and surge ratings are not exceeded The AVX TPS and Kemet T495 series are surge rated AVX recommends derating capacitor operating voltage by 2 1 for high surge applications OUTPUT CAPACITOR
26. operation implying that the peak to peak ripple 2x the term on the right is less than the maximum switch current Continuous Mode Vour Mu our AUN Discontinuous operation occurs when loUT DIS o For Vin 8V 5V and L 3 3uH 5 8 5 23 3 10 5 1 25 10 8 1 5 023 1 27A Note that the worst case minimum output current avail able condition is at the maximum input voltage For the same circuit at 15V maximum output current would be only 1 1A When choosing an inductor consider maximum load current core and copper losses allowable component height output voltage ripple EMI fault current in the inductor saturation and of course cost The following procedure is suggested as a way of handling these some what complicated and conflicting requirements lour MAX lp lour wax 1 5 1 Choose a value in microhenries from the graphs of maximum load current Choosing a small inductor with lighter loads may result in discontinuous mode of operation but the LT1767 is designed to work well in either mode Assume that the average inductor current is equal to load current and decide whether or not the inductor must withstand continuous fault conditions If maxi mum load currentis 0 5A for instance a 0 5A inductor may not survive a continuous 2A overload condition Also the instantaneous application of input or release from shutdown at high input voltages may cause sn1767 176
27. r components connected to the input line If this load is greater than 10mA or the input could be shorted to ground a series Schottky diode must be added as shown in Figure 9 With these safeguards the output can be held at voltages up to the Viy absolute maximum rating BUCK CONVERTER WITH ADJUSTABLE SOFT START Large capacitive loads or high input voltages can cause high input currents at start up Figure 10 shows a circuit that limits the dv dt of the output at start up controlling the capacitor charge rate The buck converter is a typical configuration with the addition of R3 R4 Css and Q1 As the output starts to rise Q1 turns on regulating switch current via the Vc pin to maintain a constant dv dt at the output Output rise time is controlled by the current through Css defined by R4 and 0175 Var Once the output is in regulation Q1 turns off and the circuit operates normally R3 is transient protection for the base of Q1 RiseTime PA Css Vour VBE Using the values shown in Figure 10 47 108 15 10 9 5 0 7 The ramp is linear and rise times in the order of 100ms are possible Since the circuit is voltage controlled the ramp rate is unaffected by load characteristics and maximum output current is unchanged Variants of this circuit can be used for sequencing multiple regulator outputs RiseTime 5ms Dual Output SEPIC Converter The circuit in Figure 11 generates both positive and negative 5V output
28. s with a single piece of magnetics The two inductors shown are actually just two windings ona standard B Electronics inductor The topology for the 5V output is a standard buck converter The 5V topology would be a simple flyback winding coupled to the buck converter if C4 were not present C4 creates a SEPIC single ended primary inductance converter topology which improves regulation and reduces ripple current in L1 Without C4 the voltage swing on L1B compared to L1A would vary due to relative loading and coupling losses C4 provides a low impedance path to maintain an equal voltage swing in L1B improving regulation In a flybackconverter during switch ontime allthe converter s energy is stored in L1A only since no current flows in L 1B At switch off energy is transferred by magnetic coupling into L1B powering the 5V rail C4 pulls L1B positive sn1767 1767fas 14 AL Une LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 APPLICATIONS INFORMATION during switch on time causing currentto flow energy current L1A and changes L1B current waveform from to build in L1B and C4 At switch off the energy storedin square to triangular For details on this circuit including both L1B and C4 supply the 5V rail This reduces the maximum output currents see Design Note 100 CMDSH 3 UPS120 REMOVABLE INPUT LT1767 3 3 SHDN FB SYNC GND Vc 1767 F09 ONLY REQUIRED IF INPUT CAN SINK 10mA F
29. switching nodes are minimized If high resis tor values are used the SHDN pin should be bypassed with 1nF capacitor to prevent coupling problems from the switch node SYNCHRONIZATION The SYNC pin is used to synchronize the internal oscilla tor to an external signal The SYNC input must pass from a logic level low through the maximum synchronization threshold with a duty cycle between 20 and 80 The input can be driven directly from a logic level output The synchronizing range is equal to initial operating frequency up to 2MHz This means that minimum practical sync frequency is equal to the worst case high self oscillating frequency 1 5MHz not the typical operating frequency of 1 25MHz Caution should be used when synchronizing above 1 6MHz because at higher sync frequencies the amplitude of the internal slope compensation used to sn1767 1767fas 10 Une APPLICATIONS INFORMATION prevent subharmonic switching is reduced This type of subharmonic switching only occurs at input voltages less than twice output voltage Higher inductor values will tend to eliminate this problem See Frequency Compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensation Application Note 19 has more details on the theory of slope compensation LAYOUT CONSIDERATIONS As with all high frequency switchers when considering layout care m
30. t Vin 3 3V LTC3401 Single Cell High Current 1A Micropower Synchronous 3MHz 0 5V to 5V Up to 97 Efficiency Synchronizable Step Up DC DC Converter Oscillator from 100kHz to 3MHz LTC3402 Single Cell High Current 2A Micropower Synchronous 3MHz 0 7V to 5V Up to 95 Efficiency Synchronizable Step Up DC DC Converter Oscillator from 100kHz to 3MHz LTC3404 1 4MHz High Efficiency Monolithic Synchronous Step Down Up to 95 Efficiency 100 Duty Cycle IQ 10 Regulator Vin 2 65V to 6V Burst Mode is a trademark of Linear Technology Corporation Linear Technology Corporation 1630 McCarthy Blvd Milpitas CA 95035 7417 408 432 1900 FAX 408 434 0507 www linear com sn1767 1767fas LT TP 0302 REV A 2K PRINTED IN USA LY LIP OLINEAR TECHNOLOGY CORPORATION 1999
31. ts thermal resistance Vsw The switch pin is the emitter of the on chip power NPN switch This pin is driven up to the input pin voltage during switch on time Inductor current drives the switch pin negative during switch off time Negative voltage must be clamped with an external catch diode with a Vgg 0 8V SYNC The sync pin is used to synchronize the internal oscillator to an external signal It is directly logic compat ible and can be driven with any signal between 20 and 80 duty cycle The synchronizing range is equal to initial operating frequency up to 2MHz See Synchronization section in Applications Information for details When not in use this pin should be grounded SHDN The shutdown pin is used to turn off the regulator and to reduce input drain current to a few microamperes The 1 33V threshold can function as an accurate under voltage lockout UVLO preventing the regulator from operating until the input voltage has reached a predeter mined level Float or pull high to put the regulator in the operating mode Vc The Vc pin is the output of the error amplifier and the input of the peak switch current comparator It is normally used for frequency compensation but can do double duty as a current clamp or control loop override This pin sits at about 0 35V for very light loads and 0 9V at maximum load It can be driven to ground to shut off the output sn1767 1767fas 5 LT1767 LT1767 1 8 LT1767 2 5 LT1767
32. ust be taken in order to achieve optimal electrical thermal and noise performance For maximum efficiency switch rise and fall times are typically in the nanosecond range To prevent noise both radiated and conducted the high speed switching current path shown in Figure 5 must be kept as short as possible This is implemented in the suggested layout of Figure 6 Shorten ing this path will also reduce the parasitic trace inductance of approximately 25nH inch At switch off this parasitic inductance produces a flyback spike across the LT1767 switch When operating at higher currents and input voltages with poor layout this spike can generate volt ages across the LT1767 that may exceed its absolute maximum rating A ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise 5V FREQUENCY CIRCULATING 1767 F05 Figure 5 High Speed Switching Path The Vc and FB components should be kept as far away as possible from the switch and boost nodes The LT1767 pinout has been designed to aid in this The ground for these components should be separated from the switch current path Failure to do so will result in poor stability or subharmonic like oscillation LT1767 LT1767 1 8 LT1767 2 5 LT1767 3 3 LT1767 5 Board layout also has a significant effect on thermal resistance Soldering the exposed pad to as large a copper area as possible and placing feedthroughs under t

LINEAR TECHNOLOGY LT1767/LT1767-1.8/ LT1767-2.5/LT1767-3.3/LT1767-5 Manual

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