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Agilent HSMP-382x 482x Surface Mount RF PIN Switch Limiter Diodes Data Sheet

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1. 2 to appear as part of a low pass filter reducing the shunt parasitic inductance and increasing the maximum available attenuation The 0 3 nH of shunt inductance external to the diode is created by the via holes and is a good estimate for 0 032 thick material Y OHM MICROSTRIP a A PAD CONNECTED TO GROUND BY TWO VIA HOLES Figure 15 Circuit Layout HSMP 482x Limiter Figure 16 Equivalent Circuit Co Planar Waveguide Shunt Connection for HSMP 482x Series Co Planar waveguide with ground on the top side of the printed circuit board is shown in Figure 17 Since it eliminates the need for via holes to ground it offers lower shunt parasitic inductance and higher maximum attenuation when compared to a microstrip circuit See AN1050 for details Co Planar Waveguide Pa Groundplane Center Conductor A Groundplane Figure 17 Circuit Layout Figure 18 Equivalent Circuit Assembly Information SOT 323 PCB Footprint A recommended PCB pad layout for the miniature SOT 323 SC 70 package is shown in Figure 19 dimensions are in inches This layout provides ample allowance for package placement by auto mated assembly equipment without adding parasitics that could impair the performance 0 026 D i 7 0 039 j i pa pe 0 022 Dimensions in inches Figure 19 Recommended PCB Pad Layout for Agilent s SC70 3L SOT 323 Products SOT 23 PCB Footprint 0
2. 039 1 Dimensions in nches Figure 20 Recommended PCB Pad Layout for Agilent s SOT 23 Products SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material process and equipment factors including method of heating e g IR or vapor phase reflow wave soldering etc circuit board material conductor thickness and pattern type of solder alloy and the thermal conductivity and thermal mass of components Components with a low mass such as the SOT 323 23 package will reach solder reflow temperatures faster than those with a greater mass Agilent s diodes have been qualified to the time temperature profile shown in Figure 21 This profile is representative of an IR reflow type of surface mount assembly process After ramping up from room temperature the circuit board with components attached to it held in place with solder paste passes through one or more preheat zones The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporat ing solvents from the solder paste The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder The rates of change of tempera ture for the ramp up and cool down zones are chosen to be low enough to not cause deformation of the board or damage to compo nents due to thermal shock The maximum temperature in the reflow zone Tma
3. 69 0 004 CARRIERTAPE WIDTH 8 00 0 30 0 10 0 315 0 012 0 004 THICKNESS 0 229 0 013 0 009 0 0005 DISTANCE CAVITY TO PERFORATION F 3 50 0 05 0 138 0 002 BETWEEN WIDTH DIRECTION CENTERLINE CAVITY TO PERFORATION P3 2 00 0 05 0 079 0 002 LENGTH DIRECTION Tape Dimensions and Product Orientation For Outline SOT 323 i i p D Po m Py n w 1 Dy ty CARRIER TAPE THICKNESS Te COVER TAPE THICKNESS F An P DESCRIPTION SYMBOL SIZE mm SIZE INCHES CAVITY LENGTH Ag 2 40 0 10 0 094 0 004 WIDTH Bo 2 40 0 10 0 094 0 004 DEPTH Ko 1 20 0 10 0 047 0 004 PITCH P 4 00 0 10 0 157 0 004 BOTTOM HOLE DIAMETER D 1 00 0 25 0 039 0 010 PERFORATION DIAMETER D 1 55 0 05 0 061 0 002 PITCH Po 4 00 0 10 0 157 0 004 POSITION E 1 75 0 10 0 069 0 004 CARRIERTAPE WIDTH w 8 00 0 30 0 315 0 012 THICKNESS t 0 254 0 02 0 0100 0 0008 COVER TAPE WIDTH c 5 4 0 10 0 205 0 004 TAPE THICKNESS Te 0 062 0 001 0 0025 0 00004 DISTANCE CAVITY TO PERFORATION F 3 50 0 05 0 138 0 002 WIDTH DIRECTION CAVITY TO PERFORATION Py 2 00 0 05 0 079 0 002 LENGTH DIRECTION ANGLE FOR SOT 323 SC70 3 LEAD An 8 C MAX FOR SOT 363 SC70 6 LEAD 10 C MAX www agilent com semiconductors For pro
4. Description Applications The HSMP 382x series is optimized for switching applica tions where ultra low resistance is required The HSMP 482x diode is ideal for limiting and low induc tance switching applications up to 1 5 GHz A SPICE model is not available for PIN diodes as SPICE does not provide for a key PIN diode characteristic carrier lifetime Package Lead Code Identification SOT 23 Top View SINGLE SERIES 0 2 COMMON COMMON ANODE CATHODE 3 4 DUAL ANODE HSMP 4820 Agilent HSMP 382x 482x Surface Mount RF PIN Switch and Limiter Diodes Data Sheet Package Lead Code Identification SOT 323 Top View DUAL ANODE Es HSMP 482B Features e Diodes Optimized for Low Current Switching Low Distortion Attenuating e Power Limiting Circuit Protection e Surface Mount SOT 23 and SOT 323 Packages Single and Dual Versions Tape and Reel Options Available e Low Failure in Time FIT Rate e Lead free Option Available Note 1 For more information see the Surface Mount PIN Reliability Data Sheet Absolute Maximum Ratings To 25 C Symbol Parameter Unit SOT 23 SOT 323 I Forward Current 1 us Pulse Amp 1 1 Pw Peak Inverse Voltage V 50 50 T Junction Temper
5. ature C 150 150 Totg Storage Temperature C 65 to 150 65 to 150 0 Thermal Resistance C W 500 150 Notes 1 Operation in excess of any one of these conditions may result in permanent damage to the device 2 Tc 25 C where Tg is defined to be the temperature at the package pins where contact is made to the circuit board e i a Agilent Technologies Electrical Specifications To 25 C Package Minimum Maximum Maximum Part Number Marking Lead Breakdown Series Resistance Total Capacitance HSMP Codel4 Code Configuration Voltage Vgg V Rg Q Cr pF 3820 FO 0 Single 50 0 6 0 8 3822 F2 2 Series 3823 F3 3 Common Anode 3824 F4 4 Common Cathode Test Conditions Vr Ver f 100 MHz f 1 MHz Measure Ir 10 mA Vg 20V Ik lt 10 uA High Frequency Low Inductance 500 MHz 3 GHz PIN Diodes Minimum Maximum Typical Maximum Typical Part Package Breakdown Series Total Total Total Number Marking Lead Voltage Resistance Capacitance Capacitance Inductance HSMP Code Code Configuration Ver V Rg Q Cr PF Cr PF Ly nH 4820 FA A Dual Anode 50 0 6 0 75 1 0 1 0 482B FA A Dual Anode Test Conditions Ve Ver Ip 10mA f 1 MHz f 1MHz f 500 MHz Measure Vp 20V Vp 0V 3 GHz Ip lt 10 pA Note 1 Package marking code is white except for HSMP 482B which is laser marked Typical Parameters at Tc 25 C Par
6. duct information and a complete list of distributors please go to our web site For technical assistance call Americas Canada 1 800 235 0312 or 916 788 6763 Europe 49 0 6441 92460 China 10800 650 0017 Hong Kong 65 6756 2394 India Australia New Zealand 65 6755 1939 Japan 81 3 3335 8152 Domestic International or 0120 61 1280 Domestic Only Korea 65 6755 1989 Singapore Malaysia Vietnam Thailand Philippines Indonesia 65 6755 2044 Taiwan 65 6755 1843 Data subject to change Copyright 2005 Agilent Technologies Inc Obsoletes 5989 0483EN May 17 2005 5989 2498EN 7 Agilent Technologies
7. gnal Transfer Curve of the HSMP 482x Limiter Figure 5 2nd Harmonic Input Intercept Point vs Forward Bias Current Typical Applications for Multiple Diode Products RF COMMON RF COMMON RF1 i HH Figure 7 Simple SPDT Switch Using Only Positive Current BIAS L BIAS i Figure 8 High Isolation SPDT Switch Dual Bias Typical Applications for Multiple Diode Products continued RF COMMON RF COMMON BIAS Lo RF 2 RF 1 RF 2 Figure 9 Switch Using Both Positive and Negative Figure 10 Very High Isolation SPDT Switch Bias Current Dual Bias BIAS Figure 11 High Isolation SPST Switch Repeat Cells Figure 12 Power Limiter Using HSMP 3822 Diode as Required Pair See Application Note 1050 for details Typical Applications for HSMP 482x Low Inductance Series Microstrip Series Connection for HSMP 482x Series In order to take full advantage of the low inductance of the HSMP 482x series when using them in series applications both lead 1 and lead 2 should be connected together as shown in Figure 14 1 2 HSMP 482x Figure 13 Internal Connections Figure 14 Circuit Layout Microstrip Shunt Connections for HSMP 482x Series In Figure 15 the center conductor of the microstrip line is inter rupted and leads 1 and 2 of the HSMP 482x diode are placed across the resulting gap This forces the 0 5 nH lead inductance of leads 1 and
8. option For example HSMP 382x XXX Bulk or Tape and Reel Option Part Number x Lead Code Surface Mount PIN Option Descriptions BLK Bulk 100 pcs per antistatic bag TR1 Tape and Reel 3000 devices per 7 reel TR2 Tape and Reel 10 000 devices per 13 reel Tape and Reeling conforms to Electronic Industries RS 481 Taping of Surface Mounted Components for Automated Placement For lead free option the part number will have the character G at the end eg TR2G for a 10K pc lead free reel L gt DIMENSIONS mm SYMBOL MIN MAX A 0 79 1 20 Al 0 000 0 100 B 0 37 0 54 c 0 086 0 152 D 2 73 3 13 E1 1 15 1 50 e 0 89 1 02 el 1 78 2 04 e2 0 45 0 60 E 2 10 2 70 L 0 45 0 69 Device Orientation For Outlines SOT 23 323 TOP VIEW END VIEW REEL USER FEED DIRECTION Note AB represents package marking code C represents date code COVER TAPE Tape Dimensions and Product Orientation For Outline SOT 23 p D Py Ko 8 Max Ansen MAX Bo L J DESCRIPTION SYMBOL SIZE mm SIZE INCHES LENGTH 3 15 0 10 0 124 0 004 WIDTH 2 77 0 10 0 109 0 004 DEPTH 1 224 0 10 0 048 0 004 PITCH 4 00 0 10 0 157 0 004 BOTTOM HOLE DIAMETER 1 00 0 05 0 039 0 002 PERFORATION DIAMETER 1 50 0 10 0 059 0 004 PITCH 4 00 0 10 0 157 0 004 POSITION 1 754 0 10 0 0
9. t Number Series Resistance Carrier Lifetime Reverse Recovery Time Total Capacitance HSMP Rs Q t ns Tr ms Cr pF 382x 1 5 70 T 0 60 20 V Test Conditions f 100 MHz Ip 10 mA Vp 10V I 10mA Ip 20 mA 90 Recovery Typical Parameters at T 25 C unless otherwise noted Single Diode o o 100 100 10 0 1 RF RESISTANCE OHMS 7 i lp FORWARD CURRENT mA Tir REVERSE RECOVERY TIME ns 0 01 l l 1 0 1 0 2 04 06 08 10 1 2 10 20 30 0 01 0 1 1 10 100 Vp FORWARD VOLTAGE mA FORWARD CURRENT mA lp FORWARD BIAS CURRENT mA Figure 1 Forward Current vs Figure 2 Reverse Recovery Time vs Figure 3 RF Resistance at 25 C vs o Forward Voltage Forward Current for Various Reverse Forward Bias Current Voltages F 12 1a s Diode Mounted as a i amp 415 Series Attenuator in a icrostri 2 z 50 Ohm Microstrip and E T E oO 5 1 2 E 110 Tested at 123 MHz S 0 fe b a 5 2 E 105 fo 1 0 ui 15 O O 2 100 lt wi 0 08 E Fs gt amp 90 3 i z Measured with external bias return 0 6 85 0 1 f fi fi 0 10 20 30 40 50 1 10 30 0 5 10 15 20 25 30 35 40 Vr REVERSE VOLTAGE V lp FORWARD BIAS CURRENT mA CW POWER IN dBm Figure 4 Capacitance vs Reverse Voltage Figure 6 Large Si
10. x should not exceed 235 C These parameters are typical for a surface mount assembly process for Agilent diodes As a general guideline the circuit board and components should be exposed only to the minimum tempera tures and times necessary to achieve a uniform reflow of solder 250 Tmax 200 TEMPERATURE C Cool Down Zone 0 60 120 180 240 300 TIME seconds Figure 21 Surface Mount Assembly Profile Package Dimensions Outline SOT 323 SC 70 Outline 23 SOT 23 el w e2 e Ao yamg R B Cc B D DIMENSIONS mm SYMBOL MIN MAX fi A 0 80 1 00 A Al 0 00 1 00 m D B 0 15 0 40 c 0 10 0 20 A1 1 1 D 1 80 2 25 A E1 1 10 1 40 A e 0 65 typical Notes el 1 30 typical A 1 XXX package marking E 1 80 2 40 Drawings are not to scale L 0 425 typical Notes XXX package marking Drawings are not to scale Package Characteristics Lead Materials icsi dies Copper SOT 323 Alloy 42 SOT 23 Lead Finish yiosi Tin Lead 85 15 Non lead free option or Tin 100 Lead free option Maximum Soldering Temperature sceseeeeeeee 260 C for 5 seconds Minimum Lead Stre fttttt 2 pounds pull Typical Package duecageeee vans ERER 2nH Typical Package Capacitance eceeeeeeeeeeees 0 08 pF opposite leads Ordering Information Specify part number followed by

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