Home

Burr-Brown BUF01900/BUF01901 handbook

1. 0 15 NOM i 1 casera a E Seating Plane tL EA 20 MAX 0 15 1j Z 0 0 0 05 PINS DIM A MAX A MIN 4040064 F 01 97 NOTES A Alllinear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusion not to exceed 0 15 Falls within JEDEC MO 153 35 TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 MECHANICAL DATA DRC S PDSO N10 PLASTIC SMALL OUTLINE PIN 1 INDEX AREA TOP AND BOTTOM 1 0 0 0 80 sa 0 20 REF SEATING PLANE EXPOSED THERMAL PAD A ZE EXPOSED METALIZED FEATURE 4x 4204102 F 06 06 NOTES A All linear dimensions are in millimeters Dimensioning and tolerancing per ASME Y14 5M 1994 B This drawing is subject to change without notice C Small Outline No Lead SON package configuration The package thermal pad must be soldered to the board for thermal and mechanical performance See the Product Data Sheet for details regarding the exposed thermal pad dimensions Metalized features are supplier options and may not be on the package 35 TEXAS INSTRUMENTS www ti com THER
2. The address of the BUF0190x in the DFN 10 package is 11101yx where x is the state of the AO pin and y is the state of the A1 pin When the AO and A1 pins are both LOW the device acknowledges on address 74h If the AO is HIGH and A1 is LOW the device acknowledges on address 75h When the AO is LOW and A1 is HIGH the device acknowl edges on address 76h If the AO and A1 pins are both HIGH the device address is 77h Other addresses are possible through a simple mask change Contact your TI representative for ordering infor mation and availability BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 DATA RATES The two wire bus operates in one of three speed modes Standard allows a clock frequency of up to 100kHz Fast allows a clock frequency of up to 400kHz and High speed mode or Hs mode allows a clock frequency of up to 3 4MHz The BUFO0190x is fully compatible with all three modes No Special action is required to use the device in Standard or Fast modes but High speed mode must be activated To activate High speed mode send a special address byte of 00001xxx with SCL x 400kHz following the START condi tion xxx are bits unique to the Hs capable master which can be any value This byte is called the Hs master code Note that this is different from normal address bytes the low bit does not indicate read write status The BUFO190x will respond to the High speed command regardless of
3. LCD panel manufacturing process The 10 bit adjustment resolution of the BUF0190x ex ceeds the typical adjustment resolution of existing Vcom calibrators significantly As with a traditional Vcom adjust ment which uses a mechanical potentiometer and a volt age divider for adjustment see Figure 21 the BUFO190x uses an external voltage divider that is used to set the ini tial Vcom voltage as well as the adjustment range Figure 21 Traditional Vcom Adjustment As Figure 22 shows the 10 bit DAC acts as a Rail to Rail output voltage source with a nominal 250kQ of output im pedance For example at Code 000h the lowest Vcom voltage is achieved since the 250kQ impedance is now in parallel with Ro which lowers the impedance of the lower side of the voltage divider Consequently code 3FFh re sults in the highest adjustable Vcoy voltage Once the desired output level is obtained the part can store the final setting using the non volatile on chip memory See Programming section for detailed informa tion 14 M TEXAS INSTRUMENTS www ti com a Code 00h equivalent circuit Vs R 1 1 OV R3 b Code 3FFh equivalent circuit BUF0190x BUF0190x Vs Vs 250 NOTE 1 Integrated into BUF01900 or external Figure 22 Simplified Block Diagram for Vcom Adjustment using BUF0190x SELECTING THE ADJUSTMENT STEP SIZE A maximum of 1024 adjustment steps can be reali
4. ueeq seu 41 seuin 8811 peuuureJ6o4d ueeq seu 41 20m peuuureJDoJd ueeq seu 11 aouo peuiueJoJd ueeq seu 41 peuure J amp o Jd ueaq jou seu 11 snes Butuumi6oid d1O wpy ON 4 gt lt KDM gt mo SX s gt za woy ST ord TINIE OS VION SIT vs H ov IV ino eoweg od Ig ea va sa 9d 1a 8d ed Hua eia vid sid uv s Z ov ui vas Tos eqs19va ureboid eui ous ZLA 514 eqs Ova uy Sseuppe uomeJedo peau 1 Ova peeu jueujoui siy u perepdn s OQ 6q 1918 69 emue 911 ta za ta va sa 9a 4a AON 8a 6a ora Hua eia ino eoweg wey od Ig ea ta vd sa 9 Za upy 8d 6a old eia ui vas P dup Ga ta dier e 2 di s ow Bujueeui ou owe QLQ ZLQ 000 10 511 eqs Ovd uy SSeJppe 9 uonesado ey Ova IHM Figure 18 Timing Diagram for Read DAC Register Figure 17 Timing Diagram for Write DAC Register 12 BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 200
5. See QFN SON PCB Attachment Application Note SLUA271 available at www ti com The thermal resistance junction to ambient Rosa of the DFN package depends on the PCB layout Using thermal vias and wide PCB traces improves thermal resistance The thermal pad must be soldered to the PCB The thermal pad on the bottom of the package should be connected to GND Soldering the exposed thermal pad significantly improves board level reliability during temperature cycling key push package shear and similar board level tests Even with applications that have low power dissipation the ex posed pad must be soldered to the PCB to provide struc tural integrity and long term reliability K TEXAS PACKAGE OPTION ADDENDUM INSTRUMENTS www ti com 26 Sep 2007 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead Ball Finish MSL Peak Temp 3 Type Drawing Qty BUF01900AIDRCR ACTIVE SON DRC 10 3000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIDRCRG4 ACTIVE SON DRC 10 3000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIDRCT ACTIVE SON DRC 10 250 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIDRCTG4 ACTIVE SON DRC 10 250 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIPW ACTIVE TSSOP PW 8 150 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIPWG4 ACTIVE TSS
6. damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifically designated by TI as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as military grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Clocks and Timers www ti com clocks Digital Control www ti com digitalcontrol Interface interface ti com Medical www ti com medical Logic logic ti com Military www
7. ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security RFID www ti rfid com Telephony www ti com telephony RF IF and ZigBee Solutions www ti com Iprf Video amp Imaging www ti com video Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2008 Texas Instruments Incorporated
8. vs INPUT CODE vs INPUT CODE INL Error LSB DNL Error LSB 10 Typical Units Shown 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 Input Code Input Decimal Code Figure 5 Figure 6 l BUF01900 3 Texas BUF01901 INSTRUMENTS www ti com SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 TYPICAL CHARACTERISTICS cont At TA 25 C Vs 18V Vsp 5V RL 1 5kQ connected to ground and 200pF unless otherwise noted Vcom BUFFER SLEW RATE BUFFER LARGE SIGNAL STEP RESPONSE 5V div Time 1us div Time 1us div Figure 7 Figure 8 LOAD REGULATION vs CAPACITANCE LOAD REGULATION vs CAPACITANCE B 3 lt lt E E 8 8 3 s 2 4 gt E E S S o to Time 1us div Time 1us div Figure 9 Figure 10 LOAD REGULATION WITH 100uF CAPACITOR LOAD REGULATION WITH 104F CAPACITOR E gt ke lt lt e e e e E S s gt 1 1 a i Time 1us div Time 1us div Figure 11 Figure 12 BUF01900 wis T BUF01901 INSTRUMENTS www ti com SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 TYPICAL CHARACTERISTICS cont At TA 25 C Vs 18V Vsp 5V RL 1 5kQ connected to ground and 200pF unless otherwise noted LOAD REGU
9. 5 0 4 V Input Leakage 0 01 10 uA Clock Frequency fcLK Standard Fast Mode 400 kHz High Speed Mode 3 4 MHz DIGITAL POWER SUPPLY Operating Voltage Range Digital Supply Current 2 over Temperature TEMPERATURE Specified Temperature Range Operating Temperature Range Junction Temperature 125 C Storage Temperature Range Thermal Resistance TSSOP 8 DFN 10 1 BUF01900 only 2 Minimum analog supply voltage is 8 5V when programming OTP memory BUF01900 BUF01901 We Texas e www ti com SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 TYPICAL CHARACTERISTICS At TA 25 C Vs 18V Vsp 5V RL 1 5kQ connected to ground and 200pF unless otherwise noted ANALOG SUPPLY CURRENT vs TEMPERATURE DIGITAL SUPPLY CURRENT vs TEMPERATURE x E t t o D 5 5 o o gt gt o Q a 7 a S 8 o a 40 20 0 20 40 60 80 100 40 20 0 20 40 60 80 100 Temperature C Temperature C Figure 1 Figure 2 BUFFER OFFSET VOLTAGE vs TEMPERATURE Vs 18V Vsp 5V OUTPUT VOLTAGE vs OUTPUT CURRENT PDS limits are 25mV 15 Sourcing Code 3FFh 10 Ss E 9 gt 5 10 15 20 Sinking Code 000h 25 40 20 0 20 40 60 80 100 Temperature C lour mA Figure 3 Figure 4 DIFFERENTIAL NONLINEARITY ERROR INTEGRAL NONLINEARITY ERROR
10. 6 INSTRUMENTS www ti com 3 TEXAS SWZ wnuxew stigo turtuutu 4 pojo jo eDpe Due eojeq stigg lt h queuioui sy ur perepdn si 0q 6042181894 410 eur ed va sa 9d Za 8d 6d old Lid eid jo eoveq ca gt lt ET pd gt lt SO gt lt 90 ZT ed gt lt 6d gt lt gt lt IIa eld ui vas TOS aas TVA Bujueeui ou Srey o LQ 010 Q Snu Ld7 SEG Sas Ova 3561008 0 4 4 enge jeuBis IUM uoneedo NOWSW d1O Ajddns IUM lt jueuioui siy ui perepdn siindino ovq ino ut vas TOS buiueaui ou y gq ZIG 7 100 eq ELG Std ux SSeJppe eonedq uoesado 1 pueuiuioo e1nboy 13 Figure 20 Timing Diagram for Write OTP Register Figure 19 Timing Diagram for Acquire Command BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 Vcom CALIBRATION The BUF0190x provides a simple time and cost efficient means to adjust the flicker performance of LCD panels ei ther manually or automatically during the final stages of the
11. Burr Brown Products from Texas Instruments BUFO1900 5 of BUFO1901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 Programmable Voltage Source with Memory FEATURES 10 BIT RESOLUTION RAIL TO RAIL OUTPUT ONBOARD NONVOLATILE MEMORY lout 100mA LOW SUPPLY CURRENT 9004A SUPPLY VOLTAGE 7V to 18V DIGITAL SUPPLY 2 0V to 5 5V INDUSTRY STANDARD TWO WIRE INTERFACE HIGH ESD RATING 2kV HBM 500V CDM APPLICATIONS LCD PANEL Vcom CALIBRATION LCD PANEL BRIGHTNESS AND CONTRAST CONTROL POTENTIOMETER REPLACEMENT MOTOR DRIVE PROGRAMMABLE POWER SUPPLY PROGRAMMABLE OFFSET ADJUSTMENT ACTUATOR CONTROL BUF01900 BUF01901 RELATED PRODUCTS FEATURES PRODUCT 22N High Supply Voltage Gamma Buffers 12 Channel Programmable Buffer 10 Bit Vcom 20 Channel Programmable Buffer 10 Bit Vcom 16 Channel Programmable Buffer with Memory 20 Channel Programmable Buffer with Memory A BUF11705 BUF 12800 BUF20800 BUF16820 BUF20820 DESCRIPTION The BUF01900 and BUF01901 provide a programmable voltage output with 10 bit resolution Programming of the output occurs through an industry standard two wire serial interface Once the correct Vcow voltage is established it can easily be stored into the integrated nonvolatile memory An initial output voltage and adjustment range can be set by an external resistor divider With its large output current capability up to 100mA the BUF01900 and BUF01901 are ideal
12. CTOBER 2006 y This integrated circuit can be damaged by ESD Texas Instruments recommends that all integrated circuits be handled with appropriate t 4 precautions Failure to observe proper handling and installation procedures can cause damage ESD damage can range from subtle performance degradation to complete device failure Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications ABSOLUTE MAXIMUM RATINGS Supply Voltage Vs Supply Voltage Vsp Signal Input Terminals BIAS Voltage 0 5V to Vs 0 5V SCL SDA AQ A1 0 5V to 6V SUI UEM 10mA Output Short Circuit 2 Continuous Operating Temperature 40 C to 95 C Storage Temperature 65 C to 150 C Junction Temperature ESD Rating Human Body Model HBM Charged Device Model CDM 1 Stresses above these ratings may cause permanent damage Exposure to absolute maximum conditions for extended periods may degrade device reliability These are stress ratings only and functional operation of the device at these or any other conditions beyond those specified is not supported 2 Short circuit to ground ORDERING INFORMATION 1 1 For the most current package and ordering information see the Package Option Addendum at the end of this document or see the TI web site at www ti com PIN CONFIGURATIONS BUF01900 BUFO01901 Exposed Thermal Die Pad
13. Controller 0 1uF NOTES 1 Optional may be needed for stability 2 Optional see application text for component selection Figure 14 Typical Application Diagram Digital Analog 2V to 5 5V 7V to 18V BUF01900 E S 5 o E S o ao Switch ROM Control Input Control Logic Figure 15 BUF01900 Typical Configuration BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 BUF01901 USING EXTERNAL Vcom BUFFER Many LCD panel modules use gamma buffers such as Tl s BUFxx704 BUFxx703 BUF11702 and the new BUF 11705 that already include an integrated Vcom driver Some other LCD modules use more complicated com pensation schemes that require an external high speed Vcom op amp BUF01901 is optimized for lowest cost and is intended to be used with an external Vcom buffer or op amp Figure 16 illustrates a typical configuration of the BUFO01901 with the BUF11705 ON CHIP NONVOLATILE MEMORY The BUF0190x is optimized for the smallest die size avail able and consequently the lowest cost to support high vol Digital Analog 2V to 5 5V 7V to 18V BUFO01901 3 TEXAS INSTRUMENTS www ti com ume production The on chip OTP one time program mable memory helps to achieve significant die size reduction over EEPROM memory technology This reduc tion is partly because of the smaller area of the OTP memory cell but also a result of t
14. In addition the adjustment range is usually not much larger than 1V in either direction of the nominal Vcom voltage In applica tions requiring a wider output swing the output voltage to the buffer should be limited to approximately 0 8V above the negative power supply to keep the buffer input stage in its linear operating region For lower input voltages the output results might not be valid however they will also not lead to damage of the device The Rail to Rail output stage is designed to drive large peak currents greater than 100mA TWO WIRE BUS OVERVIEW The BUF0190x communicates through an industry stan dard two wire interface to receive data in slave mode This standard uses a two wire open drain interface that sup ports multiple devices on a single bus Bus lines are driven to a logic low level only The device that initiates the com munication is called a master and the devices controlled by the master are s aves The master generates the serial clock on the clock signal line SCL controls the bus ac cess and generates START and STOP conditions To address a specific device the master initiates a START condition by pulling the data signal line SDA from a HIGH to LOW logic level while SCL is HIGH All slaves on the bus shift in the slave address byte with the last bit indicating whether a read or write operation is intended During the ninth clock pulse the slave being addressed responds to the master by generatin
15. LATION WITH 1uF CAPACITOR C 1 Rg 0 100mV Res 100mA div 100mV div Time 1us div Figure 13 35 TEXAS INSTRUMENTS www ti com APPLICATIONS INFORMATION OVERVIEW The BUF0190x family of products consists of a 10 bit digi tal to analog converter DAC that is programmed through an industry standard two wire interface It contains on chip nonvolatile memory that stores a specific DAC value that is read at power up The BUF0190x family consists of two devices The BUF01900 contains a voltage buffer that is capable of driving high current the BUF01901 is a low er cost version without the buffer The BUFO190x is espe cially well suited for Vcom calibration in LCD panels how ever it can also be used in many other applications Figure 14 shows the BUF01900 in a typical configuration BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 BUF01900 ON CHIP BUFFER Unlike many programmable Vcom calibrators on the mar ket the BUF01900 offers an integrated Vcom buffer with high current output drive capability The output is capable of delivering peak currents over 100mA to within 4V from the positive supply and to within 2V from the negative sup ply Using this option is very cost effective and convenient in systems that do not use multi channel gamma buffers with integrated Vcow drive Figure 15 shows the BUF01900 in a typical configuration Timing
16. MAL PAD MECHANICAL DATA INSTRUMENTS www ti com DRC S PVSON N10 HERMAL INFORMATION This package incorporates an exposed thermal pad that is designed to be attached directly to an external heatsink The thermal pad must be soldered directly to the printed circuit board PCB After soldering the PCB can be used as a heatsink In addition through the use of thermal vias the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device or alternatively can be attached to a special heatsink structure designed into the PCB This design optimizes the heat transfer from the integrated circuit IC For information on the Quad Flatpack No Lead QFN package and its advantages refer to Application Report Quad Flatpack No Lead Logic Packages Texas Instruments Literature No 5 7 This document is available at www ti com The exposed thermal pad dimensions for this package are shown in the following illustration JUW UU Wat 1ngnr Bottom View NOTE All linear dimensions are in millimeters Exposed Thermal Pad Dimensions 4206565 2 F 03 08 LAND PATTERN DRC S PDSO N10 Example Board Layout Example Stencil Design Note E 72 solder coverage on center pad Non Solder Mask Exposed Pad Geometry Defined Pad Solder Mask Opening Not
17. MENTS FOR PIN 1 ORIENTATION IN TAPE Sprocket Holes User Direction of Feed Reg Pocket Quadrants All dimensions are nominal Device Package Package Pins SPQ Reel Reel mm mm KO mm P1 w Pin1 Type Drawing Diameter Width mm mm Quadrant mm W1 mm BUF01900AIDRCR SON DRC 10 3000 330 0 12 4 3 3 3 3 1 1 8 0 12 0 Q2 BUF01900AIDRCT SON DRC 10 250 180 0 12 4 3 3 3 3 1 1 8 0 12 0 Q2 BUF01900AIPWR TSSOP PW 8 2000 330 0 12 4 7 0 3 6 1 6 8 0 12 0 Q1 BUF01901AIDRCR SON DRC 10 3000 330 0 12 4 3 3 3 3 1 1 8 0 12 0 Q2 BUF01901AIDRCT SON DRC 10 250 180 0 12 4 3 3 3 3 1 1 8 0 12 0 Q2 BUF01901AIPWR TSSOP PW 8 2000 330 0 12 4 7 0 3 6 1 6 8 0 12 0 Q1 Pack Materials Page 1 X3 Texas PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 11 Mar 2008 TAPE AND REEL BOX DIMENSIONS All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length mm Width mm Height mm BUF01900AIDRCR SON DRC 10 3000 346 0 346 0 29 0 BUF01900AIDRCT SON DRC 10 250 190 5 212 7 31 8 BUF01900AIPWR TSSOP PW 8 2000 346 0 346 0 29 0 BUF01901AIDRCR SON DRC 10 3000 346 0 346 0 29 0 BUF01901AIDRCT SON DRC 10 250 190 5 212 7 31 8 BUF01901AIPWR TSSOP PW 8 2000 346 0 346 0 29 0 Pack Materials Page 2 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 PW R PDSO G PLASTIC SMALL OUTLINE PACKAGE 14 PINS SHOWN
18. OP PW 8 150 Green RoHS amp CUNIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIPWR ACTIVE TSSOP PW 8 2000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01900AIPWRG4 ACTIVE TSSOP PW 8 2000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIDRCR ACTIVE SON DRC 10 3000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIDRCRG4 ACTIVE SON DRC 10 3000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIDRCT ACTIVE SON DRC 10 250 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIDRCTG4 ACTIVE SON DRC 10 250 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIPW ACTIVE TSSOP PW 8 150 Green RoHS amp CUNIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIPWG4 ACTIVE TSSOP PW 8 150 Green RoHS amp CUNIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIPWR ACTIVE TSSOP PW 8 2000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br BUF01901AIPWRG4 ACTIVE TSSOP PW 8 2000 Green RoHS amp CU NIPDAU Level 2 260C 1 YEAR no Sb Br The marketing status values are defined as follows ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in pro
19. dates the DAC output to the most recently written OTP memory value When programming the OTP memory the analog supply voltage must be between 8 5V and 18V BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 Write commands are performed by setting the read write bit LOW To write to OTP memory 1 Send a START condition on the bus 2 Send the device address and read write bit LOW The BUF0190x acknowledges this byte 3 Send two bytes of data for the OTP memory Begin by sending the most significant byte first bits D15 D8 of which only bits D9 and D8 are data bits and bits D15 D13 must be 010 followed by the least significant byte bits D7 D0 The register updates after receiving the second byte 4 Senda STOP condition on the bus The BUF0190x acknowledges each data byte If the mas ter terminates communication early by sending a STOP or START condition on the bus the specified OTP register will not be updated Writing an OTP register updates the DAC output voltage Programming timing is taken from the two wire bus Therefore the master must provide correct timing on the bus to ensure data is successfully written into OTP memory Figure 20 shows the timing requirements for tim ing when the OTP write supply and OTP write signal are active 11 INSTRUMENTS www ti com 3 TEXAS SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 BUF01900 BUF01901 seu moj
20. duction Samples may or may not be available OBSOLETE TI has discontinued the production of the device 2 Eco Plan The planned eco friendly classification Pb Free RoHS Pb Free RoHS Exempt or Green RoHS amp no Sb Br please check http Avww ti com productcontent for the latest availability information and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS TI s terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 196 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Pb Free RoHS Exempt This component has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS amp no Sb Br TI defines Green to mean Pb Free RoHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 196 by weight in homogeneous material Addendum Page 1 K TEXAS PACKAGE OPTION ADDENDUM INSTRUMENTS www ti com 26 Sep 2007 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC indu
21. e F Pad Geometry Note C 4206987 2 A 09 05 NOTES All linear dimensions are in millimeters This drawing is subject to change without notice Publication IPC 7351 is recommended for alternate designs This package is designed to be soldered to a thermal pad on the board Refer to Application Note Quad Flat Pack Packages Texas Instruments Literature No SCBAO17 SLUA271 and also the Product Data Sheets for specific thermal information via requirements and recommended board layout These documents are available at www ti com http www ti com gt E Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release Customers should contact their board assembly site for stencil design recommendations Refer to IPC 7525 for stencil design considerations F Customers should contact their board fabrication site for minimum solder mask web tolerances between signal pads como 35 TEXAS INSTRUMENTS www ti com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditio
22. g an Acknowledge and pulling SDA LOW Data transfer is then initiated and eight bits of data are sent followed by an Acknowledge bit During data trans fer SDA must remain stable while SCL is HIGH Any change in SDA while SCL is HIGH will be interpreted as a START or STOP condition Once all data has been transferred the master generates a STOP condition indicated by pulling SDA from LOW to HIGH while SCL is HIGH BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 The BUFO0190x can act only as a slave device therefore it never drives SCL The SCL is only an input for the BUF0190x ADDRESSING THE BUF01900 AND BUFO01901 The address of the BUF0190x in the TSSOP 8 package is 111011x where x is the state of the AO pin When the AO pin is LOW the device acknowledges on address 76h If the AO pin is HIGH the device acknowledges on address 77h Table 1 summarizes device addresses Table 1 Quick Reference Table of Addresses TSSOP Package AO pin is LOW device will acknowledge on address 76h a AO pin is HIGH device will acknowledge on address 77h DFN Package pin is LOW A1 is LOW device will acknowledge on address 74h pin is HIGH A1 is LOW device will acknowledge on address 75h AO pin is LOW A1 is HIGH device will acknowledge on address 76h AO pin is HIGH A1 is HIGH device will acknowledge on address 77h 1110111 1110100 1110101 1110110 1110111
23. h is determined to be 32 This value leads to a step size of 32 codes between adjustment points which translates into approximately 31mV voltage difference between steps MOTOR DRIVE CIRCUIT The BUF01900 can be used to drive small motors directly because of the large output drive capability gt 100mA as illustrated in Figure 23 dH H T gt D BUF01900 Figure 23 Motor Drive Circuit 15 BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 PROGRAMMABLE POWER SUPPLY The BUFO0190x integrated buffer amplifier can drive large capacitive loads see Typical Characteristics and greater than 100mA of output current making it well suited for pro grammable power supplies Note that the BUF01900 integrated buffer has an input range that only extends to about 0 8V above GND there fore the programmable power supply is not able to output voltages less than approximately 0 8V NOTE 1 Optional see Typical Characteristic curves Figure 10 through Figure 14 for load regulation performance Figure 24 Programmable Power Supply 16 ki TEXAS INSTRUMENTS www ti com QFN DFN THERMALLY ENHANCED PACKAGE The BUFO0190x uses the 10 lead DFN package a thin thermally enhanced package designed to eliminate the use of bulky heat sinks and slugs traditionally used in ther mal packages The DFN package can be easily mounted using standard printed circuit board PCB assembly tech niques
24. he fact that an EEPROM requires a high programming voltage typically generated with an onboard charge pump OTP memory technology does not require the higher programming voltage conse quently no charge pump is needed resulting in a smaller and lower cost solution During production the Vcom voltage is typically adjusted only once However to allow for programming errors and rework the BUFO190x supports a total of four write cycles to the OTP memory This capacity means that the pre viously programmed code in the OTP can be overwritten a total of three times BUF11704 Gamma References Program Command O O SDA SCL AO Figure 16 BUF01901 Typical Configuration 4i TEXAS INSTRUMENTS www ti com POWER SUPPLY VOLTAGE The BUF0190x can be powered using an analog supply voltage from 7V to 18V and a digital supply from 2V to 5 5V The digital supply must be applied prior to the analog supply to avoid excessive current and power consumption During programming of the OTP the analog power supply must be at least 8 5V BUFFER INPUT AND OUTPUT RANGE The integrated buffer has a single p channel input stage The input range includes the positive supply and extends down to typically 0 8V above the negative supply GND In a typical LCD application this is normally sufficient be cause the nominal Vcom level is often close to V2 2 and therefore fairly far away from either supply rail
25. he least significant byte bits D7 D0 Acknowledge after receiving the first byte only 5 Do not acknowledge the second byte of data or send a STOP condition on the bus Communication may be terminated by the master by sending a premature STOP or START condition on the bus or by not sending the Acknowledge Table 3 OTP Memory Status CODE Bits D15 D12 OTP PROGRAMMING STATUS 0000 OTP has not been programmed 0001 OPT has been programmed once 0011 OTP has programmed twice 0111 OPT has programmed three times 1111 OTP has programmed all four times ki TEXAS INSTRUMENTS www ti com ACQUIRE OF OTP MEMORY An acquire command updates the DAC output to the value stored in OTP memory If the OTP memory has not been programmed the DAC output code is 0000000000 Figure 19 shows the timing diagram for the acquire command Acquire Command 1 Send a START condition on the bus 2 Sendthe device address and read write bit LOW The device will acknowledge this byte 3 Send the acquire command Bits D7 D5 must be set to 001 Bits DA DO do not have meaning This byte will be acknowledged 4 Senda STOP condition on the bus Writing OTP Memory The BUFO0190x is able to write to the OTP memory a maxi mum of four times Writing to the OTP memory a fourth time uses all available memory and disables the ability to perform additional writes see table 3 A reset or acquire command up
26. his byte is called the Hs master code General Call Reset High Speed Mode 10 ki TEXAS INSTRUMENTS www ti com READ WRITE OPERATIONS Read commands are performed by setting the read write bit HIGH Setting the read write bit LOW performs a write transaction Figure 17 and Figure 18 show the timing diagrams for read and write operations Writing To write to the DAC register 1 Senda START condition on the bus 2 Send the device address and read write bit LOW The BUF01900 BUF01901 will acknowledge this byte 3 Send two bytes of data for the DAC register Begin by sending the most significant byte bits D15 D8 only bits D9 and D8 are used and D15 D13 must not be 010 or 001 followed by the least significant byte bits D7 D0 The register is updated after receiving the second byte 4 Senda STOP condition on the bus The BUF0190x acknowledges each data byte If the mas ter terminates communication early by sending a STOP or START condition on the bus the DAC output will not up date Reading To read the register of the DAC 1 Senda START condition on the bus 2 Send the device address and read write bit HIGH The BUFO0190x will acknowledge this byte 3 Receive two bytes of data The first received byte is the most significant byte bits D15 D8 only bits D9 and D8 have meaning and bits D15 D12 will show the programming status of the OTP memory See Table 3 The next byte is t
27. ly suited as programmable Vcom calibrators in LCD panels The BUF01901 has the digital to analog converter DAC output brought out directly It has a slightly lower cost than the BUF01900 and works very well with the integrated Vcom in traditional gamma buffers such as the BUFxx702 BUFxx703 BUFxx704 and BUF11705 The BUF01900 and BUFO01901 are both available in TSSOP 8 and 3mm x 3mm DFN 10 packages The DFN 10 package only 0 9mm in height is especially well suited for notebook computers Both devices are specified from 40 C to 85 C Digital Analog 2N to 5 5V 7V to 18V BIAS O O O BUF01900 Voltage Regulator Q o 5 E E o E S D 8 a Input Control Logic Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet PowerPAD is a registered trademark of Texas Instruments All other trademarks are the property of their respective owners PRODUCTION DATA information is current as of publication date Products df Copyright 2006 Texas Instruments Incorporated conform to specifications per the terms of Texas Instruments standard warranty TEXAS Production processing does not necessarily include testing of all parameters I NSTRUMENTS www ti com BUF01900 BUF01901 X9 Texas INSTRUMENTS www ti com SBOS337A OCTOBER 2006 REVISED O
28. ns of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using Tl components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from under the patents or other intellectual property of Reproduction of TI information in TI data books or data sheets is
29. on Underside eN lai Exposed Thermal Die Pad on Underside Se Nae he NI N 1N I I XZ Ma W X W N jo lol lal lol Inl Lal Voy lal Vest nl Val Ma oN DFN 10 DFN 10 BUF01900 BUF01901 NC No connection 351 BUFO1900 INSTRUMENTS BUF01901 www ti com SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range TA 40 C to 85 C At TA 25 C Vs 18V Vsp 5V RL 1 5kQ connected to ground and Cj 200pF unless otherwise noted BUFO1900 BUFO1901 BUFO1901 PARAMETER CONDITIONS UNIT ANALOG Vcom Output Swing 1 Sourcing 10mA Code 1023 Sinking 10mA Code 00 Sourcing 100mA Code 1023 Sinking 100mA Code 00 Vcom Output Reset and Power Up Value 1 OTP not programmed Code 512 Nominal VpjAs Output Impedance No Load on Vgias Vcom Program to Out Delay Output Accuracy 1V lt Vcom lt 17 7 Load Regulation Vout Vs 2 lout 50mA to 50mA Step Vcom Offset Offset Drift 2550 to 100 C Common Mode Range Common Mode Rejection 0 8V lt Vin lt 17 9V Slew Rate VBIAS No Load on VpiAs Integral Nonlinearity Differential Nonlinearity Gain Error Accuracy ANALOG POWER SUPPLY Operating Range Total Analog Supply Current Output at Reset Values No Load over Temperature DIGITAL Logic 1 Input Voltage Logic 0 Input Voltage Logic 0 Output Voltage VoL 3mA 0 1
30. permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any
31. stry standard classifications and peak solder temperature Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided TI bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals TI and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis Addendum Page 2 X3 Texas PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 11 Mar 2008 TAPE AND REEL INFORMATION REEL DIMENSIONS TAPE DIMENSIONS Reel Diameter Dimension designed to accommodate the component width Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Y Overall width of the carrier tape Pitch between successive cavity centers t Reel Width W1 QUADRANT ASSIGN
32. the value of these last three bits The BUF0190x does not ac knowledge this byte the communication protocol prohibits acknowledgment of the Hs master code On receiving a master code the BUF0190x switches on its Hs mode fil ters and communicates at up to 3 4MHz Additional high speed transfers may be initiated without resending the Hs mode byte by generating a repeat START without a STOP The BUF0190x switches out of Hs mode with the next STOP condition GENERAL CALL RESET AND POWER UP The BUF0190x responds to a General Call Reset which is an address byte of 00h 0000 0000 followed by a data byte of 06 0000 0110 The BUF0190x acknowl edges both bytes Upon receiving a General Call Reset the BUF0190x performs a full internal reset as though it had been powered off and then on It always acknowl edges the General Call address byte 00h 0000 0000 but does not acknowledge any General Call data bytes other than 06h 0000 0110 The BUFO0190x automatically performs a reset upon pow er up As part of the reset the BUF0190x is configured for the output to change to the programmed OTP memory val ue or to mid scale 1000000000 if the OTP value has not been programmed Table 2 provides a summary of com mand codes Table 2 Quick Reference Table of Command Codes COMMAND CODE Address byte of 00h followed by a data byte of 06h 00001xxx with SCL x 400kHz where xxx are bits unique to the Hs capable master T
33. voltage Step 4 Calculate the resistors based on the following for mulas or simply download the Microsoft Excel calculator located in the product folder of BUFO190x available at www ti com 250kQ Adj range Vcom 0 5 Adj range 1 R y s dv 23 Voom Ry 500k2 R 2 0 2 CALCULATING THE Vcom OUTPUT VOLTAGE With R4 and R gt properly set or Vcom output voltage can be calculated for any digital code with the following for mula 250kQ R Vg Ry R Vg Code 1023 Vcom m R 250kQ Ry R3 8 CALCULATING THE ADJUSTMENT RESOLUTION The resolution of the adjustment is a function of the step size The resolution can be calculated by simply dividing the chosen adjustment range by the number of steps Resolution Adj range steps example 32 steps be tween code Oh and code SFFh BUF01900 BUF01901 SBOS337A OCTOBER 2006 REVISED OCTOBER 2006 DESIGN EXAMPLE Step 1 Supply Voltage is 10V Step 2 Nominal Vcoy is determined to be 4V Step 3 The desired total adjustment range is 1V In the case of using the default power up DAC code midscale the adjustment range for the Vcom voltage will be from 3 5V to 4 5V Step 4 Calculation of R and Re R4 71 4kQ gt choose closest 1 resistor 71 5kQ R gt 45 5kQ gt choose closest 1 resistor 45 3kQ Step 5 Appropriate number of adjustment steps between code 00h and code 3FF
34. zed with the BUF0190x leading to very high adjustment resolution and very small step sizes This flexibility can be advanta geous during the panel development phase In a practical production setting however this capability might lead to adjustment times that can be too long A simple solution is to increase the step size between settings to more practi cal values for mass production Limiting the number of ad justment steps between code 000h and code 3FFh to be tween 16 and 128 has been shown to typically yield acceptable adjustment results in the smallest amount of adjustment time 35 TEXAS INSTRUMENTS www ti com EXTERNAL VOLTAGE DIVIDER RESISTOR SELECTION The external resistive voltage divider consisting of R and R see Figure 16 Figure 17 and Figure 18 sets both the maximum value of the Vcom adjustment range and the ini tial Vcom voltage Follow the steps below to calculate the correct values for R and Ro Step 1 Choose the supply voltage Vs Step 2 Set the nominal Vcom voltage This voltage is the Vcom voltage at which the unadjusted panel should be at power on The default power up DAC code is midscale Step 3 Choose the Vcom adjustment range The adjust ment range is the difference between the lowest and the highest desired Vcom voltage If the default power up code is not overwritten by software at the beginning of the ad justment cycle the adjustment range is symmetrical around the chosen nominal Vcoy

Burr-Brown BUF01900/BUF01901 handbook

Contents

Download Pdf Manuals

Related Search

Related Contents