MAXIM MAX6966/MAX6967 Manual
Contents
1. O xJ I J J x x KL x x lt x 4 O lt x I lt lt amp lt X 20 0X 0X lt lt lt 0C OUTPUT CURRENT IOUT98 l x lt Output P8 is set to half constant current Output P8 is set to full constant current Output P9 is set to half constant current Output P9 is set to full constant current AVLAZCLAVI X px oxpxIolx X lt x 17 Z969XVW 9969XVIWN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Table 8 Global Current Register Format ADDRESS CODE HEX REGISTER REGISTER DATA D3 D2 D1 DO GLOBAL CURRENT is 2 5mA half current is is 5mA half current is 2 5mA is 7 5mA half current is is 10mA half current is 5mA is 12 5mA half current is is 15mA half current is 7 5mA is 17 5mA half current is is 20mA half current is 10mA Global Current Register The global current register sets the full maximum con stant current sunk into an I O port Table 8 Each out put port s individual constant current sink can be set to be either half or full global current by the output current registers Table 7 By default maximum current is 20mA so the default half current is 10mA Ramp Up and Ramp Down Controls The MAX6966 MAX6967 provide automatic controls that allow the currents outputs2. Any register data within the MAX6966 MAX6967 can be read by sending a logic high to bit D15 The sequence is 1 Take SCLK low 2 Take CS low This enables the internal 16 bit shift register 3 Clock 16 bits of data into DIN D15 first to DO last D15 is high indicating a read command and bits D14 through D8 contain the address of the register to read Bits D7 to DO contain dummy data which is discarded Take CS high either while SCLK is still high after clocking in the last data bit or after taking SCLK low Positions D7 through DO in the shift register are now loaded with the register data addressed by bits D15 through D8 Take SCLK low if not already low Issue another read or write command and examine the bit stream at DOUT the second 8 bits are the contents of the register addressed by bits D14 through D8 in step 3 A OQ oO a Fa w ee uim XX0900000000000000000900000000000909 X KARR A A A A A A A he Figure 11 16 Bit Write Transmission to the MAX6966 MAX6967 FA S actu Gee ee XX06xp60 9000000000000090000000000090009009 n UN OSS a a Se ee e Figure 12 Transmission of More than 16 Bits to the MAX6966 MAX6967 MAKIM 23 Z969XVW 9969XVIW MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Applications Information Hot Insertion The I O ports PO P9 remain h
3. BINARY D5 D4 D3 D2 D1 DO MSB OUTPUT PO LEVEL AND PWM LSB Port P1 level or PWM 0x01 MSB Port P2 level or PWM Port P1 level or PWM Port P2 level or PWM LSB LSB Port P3 level or PWM Port P3 level or PWM LSB Port P4 level or PWM Port P5 level or PWM Port P4 level or PWM Port P5 level or PWM LSB LSB Port P6 level or PWM Port P6 level or PWM LSB Port P7 level or PWM Ox07 MSB Port P8 level or PWM MSB Port P8 level or PWM LSB Port P9 level or PWM X 0x09 MSB Port P7 level or PWM Port P9 level or PWM LSB LSB Writes ports PO through P9 with same level or PWM Reads port PO level or PWM MSB Ports PO through P9 level or PWM Port PO level or PWM LSB LSB Writes ports PO through P3 with same level or PWM Reads port PO level or PWM Writes ports P4 through P7 with same level or PWM Ports PO through P3 level or PWM Port PO level or PWM Ports P4 through P7 level or PWM LSB LSB LSB Reads port P4 level or PWM Write ports P8 and P9 with same level or PWM Port P4 level or PWM Ports P8 P9 level or PWM LSB LSB Reads port P8 level or PWM 16 Port P8 level or PWM LSB MAALM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Output Current Registers Each output port s individual constant current sink can be set to be either half or full global curr
4. CS run disabled Put or keep device in shutdown disable CS run Shutdown mode CS run enabled Put or keep device in shutdown enable CS run Run mode device is currently in run mode Run exit shutdown without ramp up device is currently in shutdown bring device out of shutdown instantly ignoring fade register setting Run exit shutdown with ramp up device is currently in shutdown bring device out of shutdown using ade register ramp up setting Run abort shutdown sequence device is currently in hold off fade off sequence to shutdown bring device out of shutdown 1 i instantly ignoring fade register setting Status in fade off sequence to 0 shutdown mode Status in hold off sequence to shutdown mode Status run mode Stagger Status in ramp up sequence to run mode PWM outputs stagger phase DOUT OSC is DOUT output PWM clock source is internal oscillator DOUT OSC is OSC input PWM clock source is OSC Current read status of this bit Stagger Stagger Stagger MAXUM 13 Z969XVW 9969XVIWN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control The stagger bit is ideally set or cleared when the MAX6966 MAX6967 are in shutdown If not there may be a perceived transient flicker in any PWM controlled LEDs because the fundamental PWM timing is being changed Configuration Register The configurati
5. Decide whether the DOUT OSC pin will be used as SPI data output or PWM clock input and choose the MAX6966 or MAX6967 accordingly If Serial Data Input Data from DIN loads into the internal 16 bit shift register on SCLK s rising V Positive Supply Voltage Bypass V to GND with a 0 1uF ceramic capacitor Exposed Pad on Package Underside Connect to GND any ports are used as logic input or if the applica tion needs read after write validation then DOUT OSC needs to be configured as DOUT Note that both the MAX6966 and MAX6967 can configure DOUT OSC as either DOUT output or OSC clock input the only difference is the power up default Allocate port functionality for the 10 I O ports All ports have the same features so allocate ports for either software convenience or board routing rea sons Any port can be constant current LED drivers static or PWM an open drain logic output or a logic input If fewer than 10 ports are used as con stant current drivers see the Applications Information section for details on how to optimize the PWM phasing to minimize load supply current mod ulation Decide how to implement LED intensity control The MAX6966 MAX6967 provide e Individual 8 bit PWM control per constant current output Individual 1 bit analog control half full per constant current output e Global 3 bit analog control which applies to all constant current outputs MAXIA 10 Port Constant Cur
6. charge 3 4V to 3 7V most of the time and down to 3V when discharged In this scenario the LED supply falls significantly below the brownout point when the battery is at end of life voltage AVLAZXL VI 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Figure 13 shows the typical current sunk by a LITEON LTST C170TBKT 3 0V blue LED as the LED supply volt age is varied from 2 5V to 7V The LED currents shown are for ports programmed for 10mA and 20mA constant current swept over a 2 5V to 7V LED supply voltage range It can be seen that the LED forward voltage falls with current allowing the LED current to fall gracefully not abruptly in brownout In practice the LED current drops to 6mA to 7mA at a 3V LED supply voltage which is an acceptable performance at end of life in many backlight applications Output Level Translation The open drain output architecture allows the ports to level translate the outputs to higher or lower voltages than the MAX6966 MAX6967 supply An external pullup resistor can be used on any output to convert the high impedance logic high condition to a positive voltage level The resistor can be connected to any voltage up to 7V When using a pullup on a constant current out put select the resistor value to sink no more than a few hundred pA in logic low condition This ensures that the current sink output saturates close to GND For inter facing CMOS inputs a pullup
7. when enabled is 255 periods of the PWM clock For the internal oscillator this time is 255 45000 5 66ms Since a transmission on the serial interface comprises 16 clocks with CS low a minimum 2 83kHz SCLK frequency ensures that CS run is not triggered For the external PWM clock this time is 255 OSC and has a shortest time of 2 55ms when OSC is set to the maximum allowed frequency of 100kHz The SPI serial interface circuitry is independent of the CS run circuitry Activity on SCLK and DIN is ignored by the CS run circuitry A slow SPI transmission to the MAX6966 MAX6967 can therefore be used as both a valid data transmission read or write and as a means for exiting shutdown The CS run action i e setting the run bit in the configuration register occurs before any coincident data transmission is processed This means that a slow transmission containing a write command to the configuration register clearing the run bit would work since the write command is implemented internal ly after the CS run action that sets the run bit The slow transmission cut off data rate is expected to be lower than the SPI interface speed in the majority of applications If this is not the case the CS run option can still be used Consider the situation when the MAX6966 MAX6967 have been put into shutdown with the CS run option enabled The application uses the MAX6966 MAX6967 with some ports configured as logic inputs or outputs which need to
8. PLANE SIDE VIEW DRAWING NOT TO SCALE 12L 3x3 161 3x3 EXPOSED PAD VARIATIONS EBG PINID JEDEC CODES MIN NoM MAX MIN NOM MAX TQ833 1 025 070 125 025 o70 125 o35x4 WEEC T1233 1 095 110 125 o95 110 125 o35x45 T1233 3 095 110 125 095 110 125 05x45 T12334 095 110 125 o95 110 125 o35x45 WEED 1 WEED 1 65 BSC 0 50 BSC WEED 1 055 0 75 0 45 0 55 0 65 T16332 095 110 125 0o95 110 125 o35x45 WEED 2 T1633F 3 0 65 080 0 95 oss 080 0 95 0 225x45 T1633FH 3 0 65 0 80 0 95 0 65 0 80 095 0 225x 45 WEED 2 WEED 2 T1633 4 095 110 125 095 110 125 o35x45 WEED 2 0 05 20REF 0 20 REF 1633 5 095 110 125 095 110 125 0 35x45 WEED 2 NOTES 1 DIMENSIONING amp TOLERANCING CONFORM TO ASME Y14 5M 1994 2 ALL DIMENSIONS ARE IN MILLIMETERS ANGLES ARE IN DEGREES 3 NIS THE TOTAL NUMBER OF TERMINALS THE TERMINAL 1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95 1 SPP 012 DETAILS OF TERMINAL 1 IDENTIFIER ARE OPTIONAL BUT MUST BE LOCATED WITHIN THE ZONE INDICATED THE TERMINAL 1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE AX DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0 20 mm AND 0 25 mm FROM TERMINAL TIP ND AND NE REFER TO THE NUMB
9. PWM PERIOD NEXT PWM PERIOD 32 64 96 128 160 192 224 256 OUTPUTS PO 08 IN PHASE PWM PERIOD 9 OUTPUTS PO 08 IN PHASE PWM PERIOD lt OUTPUTS PO 08 IN PHASE PWM PERIOD 4 OUTPUT P1 09 STAGGERED PWM PERIOD lt t OUTPUT P1 09 STAGGERED PWM PERIOD 3 OUTPUT P1 09 STAGGERED PWM PERIOD OUTPUT P2 STAGGERED PWM PERIOD gt lt 4 OUTPUT P4 STAGGERED PWM PERIOD 4 OUTPUT P5 STAGGERED PWM PERIOD Figure 3 Staggered PWM Waveform 12 OUTPUT P2 STAGGERED PWM PERIOD 4 OUTPUT P3 STAGGERED PWM PERIOD lt t OUTPUT P3 STAGGERED PWM PERIOD 4 4 OUTPUT P6 STAGGERED PWM PERIOD gt lt 4 OUTPUT P7 STAGGERED PWM PERIOD gt lt P OUTPUT P4 STAGGERED PWM PERIOD OUTPUT P5 STAGGERED PWM PERIOD OUTPUT P6 STAGGERED PWM PERIOD OUTPUT P7 STAGGERED PWM PERIOD 3 4 MAKII 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Table 4 Configuration Register ADDRESS REGISTER CODE HEX D5 D4 D3 D2 pwm Hold Fade id CONFIGURATION off off P stagger enable status status status Ramp Write device configuration up enable Ramp Read back device configuration up status REGISTER DATA X Stagger Shutdown mode
10. REGISTER VALUE r 7 8125ms NOMINAL PWM PERIOD 0 OUTPUT STATIC HIGH LOGIC DRIVE OUTPUT STATIC LOW LOGIC DRIVE WITH INPUT BUFFER ENABLED GPI H INPUT BUFFER ENABLED GPI that if for example all outputs are set to 128 256 duty cycle the current draw would be zero all loads off for half the time and full all loads on for the other half When the stagger bit is set the PWM timing of the 10 port outputs is staggered by 32 counts of the 256 count PWM period i e 1 8 distributing the port output switching points across the PWM period Figure 3 The staggering reduces the di dt output switching transient on the supply and also reduces the peak mean current requirement emi Lew 2f 28 TPUT STATIC LOW CONSTANT CURRENT WITI LOW 3 256 DUTY CONSTANT CURREN LOW 4 256 DUTY CONSTANT CURREN bd e DE OUTPUT LOW 252 256 DUTY CONSTANT CURRENT WITH INPU LED PWM LED D X OUTPUT LOW 253 256 DUTY CONSTANT CURRENT WITH INPU OxFD OxFE OUTPUT LOW 254 256 DUTY CONSTANT CURRENT WITH INPU DISABLED PWM LED DRIVE OxFF UTPUT STATIC HIGH IMPEDANCE WITH INPUT BUFF UFFER DISABLED STATIC LED DRIVE ON 29729 LED PWM LED D 9 LED PWM LED D R DISABLED STATIC LED DRIVE OFF Figure 2 Static and PWM Constant Current Waveforms 7 8125ms NOMINAL PWM PERIOD NEXT
11. be accessed in shutdown The SPI interface speed is slow so any transmission brings the MAX6966 MAX6967 out of shut down So how are the I O ports accessed in shut down The solution is to write the configuration register disabling CS run bit D1 0 and invoking shutdown bit DO 0 as the first command Now any other regis ters can be accessed while the MAX6966 MAX6967 remain in shutdown Finally write the configuration reg ister reenabling CS run bit D1 1 and invoking shut down bit DO 0 to restore the original status Z969XVW 9969XVIW MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Register Structure The MAX6966 MAX6967 contain 16 internal registers addressed as 0x00 0x09 and 0x10 0x15 which con figure and control the peripheral Table 2 Two addresses OxOE and OxOF do not store data but return the port input status when read Four virtual addresses Table 2 Register Address Map REGISTER OxOA OxOD allow more than one register to be written with the same data to simplify software The no op address 0x20 causes no action when written or read and is used as a dummy register when accessing one MAX6966 MAX6967 out of multiple cascaded devices COMMAND ADDRESS or PWM D11 D10 eo Write ports PO through P9 with same output level or PW Read port PO output level or PWM O oj oj o oj oj o o o O o2lj o
12. extended periods may affect device reliability ELECTRICAL CHARACTERISTICS Typical Operating Circuit V 2 25V to 3 6V Ta TMiN to Tmax unless otherwise noted Typical values are at V 3 3V TA 25 C Note 1 PARAMETER SYMBOL CONDITIONS Operating Supply Voltage V Output Load External Supply Voltage PO P9 Standby Current TA 25 C Interface Idle CS Run Disabled CS at V other digital PWM Disabled All Ports High inputs at V or GND Impedance Ta TMIN to TMAX N to 85 C TA 425 Supply Current Interface Only fSCLK 26MHz other A 5 C CS Run Enabled PWM digital inputs at V or TA TMIN to 85 C Disabled All Ports High gano SM mpedance GND DOUT unloaded Te a Delta Supply Current per 10mA Port Interface Idle Global TA 25 C Current Register Set to 0x07 One Port s Output Register Set to Digital inputs at V or 0x02 and Its Output Current GND Register Bit Cleared All Other Ports Output Registers Set to 0x00 0x01 or OxFF TA TMIN to 85 C TA TMIN to TMAX Delta Supply Current per 20mA Port TA 25 C Interface Idle Global Current Register Set to 0x07 One Port s Digital inputs at V or Output Register Set to 0x02 and Its GND Output Current Register Bit Set All Other Ports Output Registers Set to TA TMIN to TMAX 0x00 0x01 or OxFF TA Tmin to 85 C 2 AVLAXL VI 10 Port Constant Curren
13. stant current set by the output current registers Table 7 and the global current registers Table 8 This current may be PWM with a duty cycle ranging from 3 256 to 254 256 to reduce the average current or remain static The 10 registers 0x00 through 0x09 control an I O port each Table 6 Five pseudo register addresses OxOB through OxOF allow groups of outputs to be set to the same value with a single command by writing the same data to multiple output registers PWM timing for LED intensity control is generated using either the internal 32kHz oscillator or an external clock on DOUT OSC The PWM clock source is selected by configuration register bit D7 Table 4 The MAX6966 powers up configured to use the internal 32kHz oscilla tor by default The MAX6967 powers up configured to use the external clock source by default REGISTER DATA HEX D7 D6 D5 D4 D3 D2 D1 DO Read input ports P7 PO 0x0 Port P7 Port P6 Port P5 Port PA Port P3 Port P2 Port P1 Port PO Read input ports P9 P8 0x0 0 0 14 0 0 0 0 Port P9 Port P8 MAAKLM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Table 6 Output Registers Format REGISTER idi ADDRESS CODE HEX REGISTER DATA BINARY PORT PO LEVEL OR PWM Port PO is static low logic level logic port with logic input buffer enabled reading this port returns O Still active i
14. 3 6V TA TMiN to Tmax unless otherwise noted Typical values are at V 3 3V Ta 25 C Note 1 PARAMETER SYMBOL CONDITIONS Internal PWM Clock Frequency fINT External PWM Clock Frequency fosc SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time put Data Propagation Delay UT Output Rise and Fall es MAX6966 MAX6967 CLOAD 20pF inimum CS Pulse High tcsw CS Pulse Low to Not Activate CS Run CS Pulse Width to Activate CS Run tCSRUN CS run enabled tcsRUN CS run enabled Note 1 All parameters tested at Ta 25 C Specifications over temperature are guaranteed by design Note 2 Guaranteed by design Note 3 Port current is factory trimmed to meet a median sink current of 20mA and 10mA over all 10 ports The Alour specification guarantees current matching between ports 4 MAALM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Typical Operating Characteristics TA 25 C unless otherwise noted STANDBY CURRENT IstBy1 SUPPLY CURRENT I OUTPUT SINKING CURRENT eg vs TEMPERATURE vs TEMPERATURE vs Vexr Vie
15. ER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY 7 DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION AX COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS 9 DRAWING CONFORMS TO JEDEC MO220 REVISION C MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY 11 NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY 12 WARPAGE NOT TO EXCEED 0 10mm PALLAS AVLALXL VI TME PACKAGE OUTLINE 8 12 16L THIN QFN 3x3x0 8mm APPROVAL DOCUMENT CONTROL NO DRAWING NOT TO SCALE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 29 2005 Maxim Integrated Products Printed USA MAXIM is a registered trademark of Maxim Integrated Products Inc Z969XVW 9969XVMW
16. FN 3mm x 38mm x ACF 0 8mm MAX6966ATE T1633 4 MAX6966AE 16 QSOP 16 Thin QFN 3mm x 3mm x 0 8mm MAX6967ATE MAX6967AEE 16 QSOP Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Dallas Direct at 1 888 629 4642 or visit Maxim s website at www maxim ic com Z969XVIN 9969XVIN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control ABSOLUTE MAXIMUM RATINGS Voltage with respect to GND Continuous Power Dissipation VEE taste ETE 0 3V to 4V 16 Pin QSOP derate 8 3mW C over TA 70 C 667mW SCLK DIN CS DOUT OSC 0 3V to V 0 3V 16 Pin QFN derate 14 7mW C over TA 70 C 1176mW Bisnes esa nasci Dep ated contd ede ise dt ea 0 3V to 8V Operating Temperature Range Tmin to TMAX 40 C to 125 C DC Current into PL Junction Temperature ns i e op eee he ead DC Current into DOUT Storage Temperature Range Total GND Gutrent eere eret Lead Temperature soldering 10s Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for
17. Fade Behavior 20 MAAKIM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Serial Interface The MAX6966 MAX6967 communicate through an SPI compatible 4 wire serial interface The interface has three inputs clock SCLK chip select CS and data in DIN and one output data out DOUT CS must be low to clock data into or out of the device and DIN must be stable when sampled on the rising edge of SCLK DOUT is stable on the rising edge of SCLK Note that the SPI protocol expects DOUT to be high impedance when the MAX6966 MAX6967 are not being accessed DOUT on the MAX6966 MAX6967 is never high impedance Go to www maxim ic com an1879 for ways to convert the MAX6966 MAX6967 to tri state if required SCLK and DIN can be used to transmit data to other peripherals The MAX6966 MAX6967 ignore all activity on SCLK and DIN except when CS is low Table 11 Serial Data Format D15 D14 D13 D12 Dii Dio D9 D8 Control and Operation Using the 4 Wire Interface Controlling the MAX6966 MAX6967 requires sending a 16 bit word The first byte D15 through D8 is the com mand and the second byte D7 through DO is the data byte Table 11 Connecting Multiple MAX6966 MAX6967s to the 4 Wire Bus Multiple MAX6966 MAX6967s can be interfaced to a common SPI bus by connecting DIN inputs together connecting SCLK inputs together and providing an individual CS per MAX6966 MAX6967 device
18. Figure 8 This connection works regardless of the configura tion of DOUT OSC but does not allow the MAX6966 MAX6967s to be read _ MAXIM CS MAX6966 oy MAXG067 L 632 MAXIM _ MAXIM MAX6966 CS3 MAX6966 MAX6967 py MAX6967 SCLK Figure 8 MAX6966 MAX6967 Multiple CS Connection MAKIM 21 Z969XVW 9969XVIN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Alternatively the MAX6966 MAX6967s can be daisy chained by connecting the DOUT of one device to the DIN of the next and driving SCLK and CS lines in paral lel Figure 9 This connection allows the MAX6966 MAX6967s to be read Data at DIN propagates through the internal shift registers and appears at DOUT 15 5 clock cycles later clocked out on the falling edge of SCLK When sending commands to daisy chained MAX6966 MAX6967s all devices are accessed at the same time An access requires 16 x n clock cycles where n is the number of MAX6966 MAX6967s connect DOUT ts AAAXIM MAX6966 SCLK MAX6967 ed together For daisy chaining to work DOUT OSC must be configured as DOUT by clearing configuration register bit D7 to zero Table 4 Note that the MAX6966 powers up with DOUT OSC configured as DOUT output by default while the MAX6967 powers up with DOUT OSC configured as OSC input by default The serial interface speed maximum SCLK is limited to 17 5MHz when multiple devices are da
19. IT DO 0 APPLICATION NOTES Low logic 0x00 output High logic output Logic input Constant urrent static ink output Constant urrent PWM utput Ox03 OxFE Logic low output not constant current Logic high output with external pullup resistor otherwise high impedance Lowest supply current unaffected by shutdown CMOS logic input Static constant current sink output PWM constant current sink output Full constant current drive with no PWM noise High impedance Adjustable constant current ED off MAKINI Logic high output with external pullup resistor otherwise high impedance LED off Z969XVW 9969XVYN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control POSITION POSITION 1 0 PORT A 0x00 0x01 E di B 0x02 OXFF CLOSE SWITCH 0x02 0xFE 0x00 TO FROM SERIAL INTERFACE 4 BIT DAC GLOBAL CUR REGIS READIO e PWM GENERATOR ENABLE PORT COMMAND Figure 1 Simplified Schematic of I O Ports Figure 1 shows the I O port structure of the MAX6966 MAX6967 I O ports PO to P9 default to high impedance on power up so LED or other port loads connected draw no current and ports used as inputs do not load their source signals Standby Mode and Operating Current When all the ports are configured as logic inputs or out puts all output reg
20. In most applications the software can be written so that either MAX6966 or MAX6967 can be fitted and DOUT OSC is configured appropriately on power up If DOUT OSC is used as OSC fit a series resistor between the PWM clock source and DOUT OSC pin A resistor value of 2 2kQ is recommended as a starting point but other values may be more suitable depend ing on the serial interface speed and clock source drive capability This limits the loading on the PWM clock source on power up when a MAX6966 is fitted because DOUT OSC initializes as an output If DOUT OSC is used as DOUT remember that a MAX6967 cannot be read after power up until DOUT OSC has been reconfigured from OSC to DOUT Driving LEDs into Brownout The MAX6966 MAX6967 correctly regulate the con stant current outputs provided there is a minimum volt age drop across the port output This port output voltage is the difference between the load typically LED supply and the load voltage drop LED forward voltage If the LED supply drops so that the minimum port output voltage is not maintained the driver output stages brownout and the load current falls The mini mum port voltage is approximately 0 5V at 10mA sink current and approximately 1V at 20mA sink current In battery applications it may be important to operate the LEDs directly from a battery supply For example the LED supply voltage could be a single rechargeable Li battery with a maximum terminal voltage of 4 2V on
21. NA E NN NILABU ME d TS MAKII 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control General Description The MAX6966 MAX6967 serial interfaced peripherals provide microprocessors with 10 I O ports rated to 7V Each port can be individually configured as either A 20mA constant current LED driver static or pulse width modulated PWM e A10mA constant current LED driver static or PWM e An open drain logic output e An overvoltage protected Schmitt logic input Analog and switching LED intensity control is built in e Individual 8 bit PWM control per output e Individual 1 bit analog control half full per output e Global 3 bit analog control applies to all LED outputs PWM timing of the 10 port outputs may be optionally staggered consecutively phased in 45 increments This spreads the PWM load currents over time in eight steps helping to even out the power supply current and reduce the RMS current The MAX6966 MAX6967 can be configured to awake from shutdown on receipt of a minimum 3ms pulse on the CS input This hardware wakeup feature allows a power management controller or similar ASIC to enable the MAX6966 MAX6967 with preconfigured LED intensi ty settings Shutdown can be programmed to wait up to 4s fade down the sink currents to zero for a period of 1 16s to 4s and then shut down A similar ramp up from shut down can be programmed for 1 16s to 4s The MAX6966 MAX6967 suppo
22. ations For the latest package outline information go to www maxim ic com packages QSOP EPS A1 004 i zl d AZ 049 065 2 008 018 cT m i ES 196 0070 B44 MILLIMETERS MIN Max N 480 498 16 aB 0 05 018 856 874 80 AD 1 270 1 397 PESA 56 pon 74 e4 E 0635 635 0 762 762 NOTES 1 D amp E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS e MOLD FLASH OR PROTRUSIONS NOT TO EXCEED 006 PER SIDE ip DALLAS SA AXLZVI 3 CONTROLLING DIMENSIONS INCHES L7 seucorateTen 4 MEETS JEDEC M0137 mue PACKAGE OUTLINE QSOP 150 025 LEAD PITCH APPROVAL DOCUMENT CONTROL NO REV i A 21 0055 28 AVLAZCLAI 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Package Information continued The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages 12x16L QFN THIN EPS AN INDEX AREA D 2 X E 2 zx esposte BOTTOM VIEW Ay Zr ep EIE R IS OPTIONAL A2 Al H TERMINAL TIP A H d DETAIL A BDALAS AMAL AIXI T PACKAGE OUTLINE 8 12 16L THIN QFN 3x3x0 8mm DOCUMENT CONTROL NO CI SEATING
23. d be provided until the end of the sequence If the same rate even if their different intensity settings are internal oscillator is selected it always runs during a totally different Figure 6 shows output fade DAC fade sequence even if none of the ports are using PWM The maximum port output current set by the global cur The ramp up and ramp down circuit operates a 3 bit rent register Table 8 also sets the point during ramp DAC The DAC adjusts the internal current reference down that the current starts falling and the point during used to set the constant current outputs in a similar ramp up that the current stops rising Figure 7 shows manner to the global current register Table 8 the ramp waveforms that occur with different global Because it is the master current reference that is current register settings scaled all output constant current and PWM settings CURRENT GLi 20mA CURRENT PORT CURRENT FULL 20mA 17 5mA 17 5mA 4 15mA 12 5mA PORT CURRENT HALF 2 8 18 ZERO CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT re FADE UP FULL 7 18 6 8 5 8 4 8 3 8 2 8 1 8 7ERO CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT FADE OFF gt F FADE UP FADE OFF gt Figure 6 Output Fade DAC Global Current 0x07 Figure 7 Global Current Modifies
24. e is desired The clock is fed into the dual use DOUT OSC pin which is switched between a port output and a clock input using the OSC bit in the configuration register Table 4 REGISTER DATA PO outpu or PWM Port O high impedance 0x00 P1 outpu or PWM 1 high impedance impedance 0x01 impedance impedance impedance impedance impedance impedance Port P9 output level or PWM 9 high impedance Shutdown mode CS run disabled DOUT OSC is DOUT output Configuration MAX6966 only Shutdown mode CS run disabled DOUT OSC is OSC input Configuration MAX6967 only Ramp down Fade disabled Ramp up Output current ISET70 IPEAK 10mA for ports P7 PO 11 AVLAZCLAVI Z969XVW 9969XVIW MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control PWM Timing and Phasing A PWM period comprises 256 cycles of the nominal 32kHz PWM clock Figure 2 Ports can be set individu ally to a PWM duty between 3 256 and 254 256 PWM timing can be configured one of two ways by the setting of the stagger bit in the configuration register Table 4 When the stagger bit is clear all outputs using PWM switch at the same time use the timing shown in Figure 2 All outputs therefore draw load current at exact ly the same time for the same PWM setting This means OUTPUT
25. ent The indi vidual currents are set by the output current registers Table 7 The global current is set by the global current register Table 8 Table 7 Output Current Register Format ADDRESS REGISTER RW CODE HEX OUTPUT CURRENT IOUT70 x lt PO is se Output PO is se Output P1 is se Output P1 is se constant curren Output P2 is se constant curren Output P3 is se Output P3 is se Output P4 is se Output P4 is se Output P5 is se Output P5 is se Output P6 is se Output P6 is se Output P7 is se Output P7 is se constant curren constant curren constant curren ojojojoj jo zF constant curren constant curren 0x13 joo constant curren constant curren constant curren constant curren e 5 constant curren constant curren ed e constant curren lt gt lt OK LX X X X DX 0E 0E XE Oj O O O O O O O VO O O S constant curren Each output current can be set individually to best suit the maximum operating current of an LED load or even adjusted on the fly to double the effective intensity con trol range of each output When the global current reg ister is set to maximum the individual current selection is 10mA half or 20mA full D5 N o REGISTER DATA D4 D3 x lt gt lt gt lt gt lt gt lt X o xpx
26. ic constant current mode Table 6 Program the port s output current register to half current Table 7 to minimize operating current Fit a 220kQ pullup resistor to this port ILED vs VLED SUPPLY 0 25 30 35 40 45 50 55 60 65 70 VLED SUPPL Figure 13 LED Brownout MAKIM 25 30 35 40 45 50 55 60 65 70 VLED SUPPL 25 Z969XVW 9969XVIW MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control In run mode the output port goes low approaching OV as the port s static constant current saturates trying to sink a higher current than the 220k pullup resistor can source In shutdown mode the output goes high impedance together with any other constant current outputs This output remains low during ramp up and fade down sequences because the current drawn by the 220kQ pullup resistor is much smaller than the available output constant current even at the lowest fade current step Driving Load Currents Higher than 20mA The MAX6966 MAX6967 can be used to drive loads needing more than 20mA like high current white LEDs by paralleling outputs For example consider a white LED that needs to be driven with 70mA This LED can be driven using ports PO P1 P2 and P3 connected in parallel shorted together Three of the ports should be configured for full current 20mA and the last port sho
27. ic logic high 0x01 in shutdown mode then that output is instantly set to that value as a GPIO output When shut down mode is exited the new GPIO output is unaffect ed just like any other GPIO outputs CS Run Option The MAX6966 MAX6967 can be configured so that a relatively long pulse on the CS input brings the driver out of shutdown as an alternative method to the normal method of writing the configuration register through the serial interface When the CS run option is enabled a minimum pulse on CS sets the run bit in the configura tion register bringing the driver out of shutdown and activating any preconfigured ramp up Also the SPI interface must be operated at a minimum data rate to ensure that a normal active low CS pulse during a 16 bit regular data transmission is not mistaken for a CS run command The CS run timing uses the PWM clock which is either the internal nominal 32kHz oscillator or a user provided clock fed into the dual use DOUT OSC pin see the PWM Clock section for details on configuring the PWM clock The minimum pulse on CS to trigger CS run and bring the driver out of shutdown is 256 to 257 periods of the PWM clock For the internal oscillator this time is 257 27000 9 52ms For the external PWM clock this time is 257 OSC and has a shortest possible time of 2 57ms when OSC is set to the maximum allowed 100kHz frequency AVLAZCLAVI The maximum pulse on CS to ensure that CS run is not triggered
28. igh impedance with up to 8V asserted on them when the MAX6966 MAX6967 are powered down V OV The MAX6966 MAX6967 can therefore be used in hot swap applications SPI Routing Considerations The MAX6966 MAX6967s SPI interface is guaranteed to operate at 26Mbps on a 2 5V supply and on a 3 3V sup ply typically operate at 35Mbps This means that trans mission line issues should be considered when the interface connections are longer than 100mm particular ly with higher supply voltages Avoid running long adja cent tracks for SCLK DIN and CS without interleaving GND traces otherwise the signals may cross couple giving false clock or chip select transitions Ringing may manifest itself as communication issues often intermit tent typically due to double clocking due to ringing at the SCLK input Fit a 1k to 10kQ parallel termination resistor to either GND or V at the DIN SCLK and CS inputs to damp ringing for moderately long interface runs Use line impedance matching terminations when making connections between boards Differences Between the MAX6966 and MAX6967 The MAX6966 powers up with DOUT OSC configured as DOUT output by default The MAX6967 powers up with DOUT OSC configured as OSC input by default Both parts allow the DOUT OSC pin function to be changed through the configuration register Table 4 If any port is used as a logic input then configure DOUT OSC as DOUT to allow the MAX6966 MAX6967 to be read 24
29. isters set to value 0x00 or 0x01 or LED off output register set to value OxFF the MAX6966 MAX6967 operate at their lowest supply cur rent called standby mode When PWM intensity control is used one or more out put registers set to a value between 0x03 and OxFE the operating current increases because the internal PWM circuitry is running The operating current also increases whenever a port that is set is active low as a constant current output output register set to a value between 0x02 and OxFE even if a load is not applied to the port This current increase is due to an internal current mirror being enabled for that port output to provide the accurate constant current sink There is a gated mirror for each output and each mirror is only enabled when required When PWM is used a current mirror is only turned on for the output s on time This means that operating cur rent varies as constant current outputs are turned on and off through the serial interface as well as by the PWM intensity control Shutdown Mode In shutdown mode all ports configured as constant cur rent outputs output register set to a value between 0x02 and OxFE are switched off and these outputs go high impedance as if their registers were set to value OxFF Ports configured as logic inputs or outputs output regis ters set to value 0x00 or 0x01 are unaffected Table 1 This means that any ports used for GPIOs are still fully operational in shutdow
30. isy chained due to the DOUT propagation delay and DIN setup time Figure 10 is the timing diagram DIN DOUT DIN DOUT cs MAXIM ts MAXIM MAX6966 MAX6966 SCLK MAX6967 SCLK MAX6967 Figure 9 MAX6966 MAX6967 Daisy Chain Connection eis i boH t tcsw MEL or ics lt M4 tcp X000 AXXO ONG QA 22 mt lt Figure 10 Timing Diagram MAKLM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control The MAX6966 MAX6967 are written to using the follow ing sequence Figure 11 1 Take SCLK low 2 Take CS low This enables the internal 16 bit shift reg ister 3 Clock 16 bits of data into DIN D15 first to DO last observing the setup and hold times Bit D15 is low indicating a write command 4 Take CS high either while SCLK is still high after clocking in the last data bit or after taking SCLK low 5 Take SCLK low if not already low If fewer or greater than 16 bits are clocked into the MAX6966 MAX6967 between taking CS low and taking CS high again the MAX6966 MAX6967 store the last 16 bits received including the previous transmission s The general case is when n bits where n gt 16 are transmitted to the MAX6966 MAX6967 The last bits comprising bits n 15 to n are retained and are par allel loaded into the 16 bit latch as bits D15 to DO respectively Figure 12 N Reading Device Registers
31. n X xXx xX px x lt KK KIX xX KE x Xx X lt DX gt lt XK xX lt x alalalalololojo a alolo ajlalo o 2j ol2lo 2ajo 2 o x KL XK xX x lt XxX lt lt KL KX xX KLE x xX lt KL gt lt XK xX lt x As hold off delay before fade off going into shutdown MAKINI 19 Z969XVW 9969XVIN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Table 10 Ramp Up Register Format ADDRESS REGISTER DATA REGISTER CODE HEX Write ramp up Read ramp up Ramp up Ramp up time fpwm 32768Hz Instant full current coming out from shutdown X X X 0 0 0 1 16s ramp up to full current coming out from shutdown X X X 0 0 1 1 8s ramp up to full current coming out from shutdown X X X 0 1 0 1 4s ramp up to full current coming out from shutdown X X X 0 1 1 1 2s ramp up to full current coming out from shutdown X X X 1 0 0 1s ramp up to full current coming out from shutdown X X X 1 0 1 2s ramp up to full current coming out from shutdown X X X 1 1 0 4s ramp up to full current coming out from shutdown X X X 1 1 1 Ramp up and ramp down use the PWM clock for timing are adjusted at the same ratio with respect to each If the external oscillator is selected then this clock other This means that LEDs are always faded at the shoul
32. n mode and port inputs can be read and output ports can be toggled at any time using the serial interface The MAX6966 MAX6967 can there fore be used for a mix of logic inputs logic outputs and PWM LED drivers and only the LED drivers are turned off automatically in shutdown The MAX6966 MAX6967 are put into shutdown mode by clearing the run bit bit DO in the configuration reg ister Table 4 Shutdown is exited by setting the run bit through the serial interface or by using the CS run option discussed below The MAX6966 MAX6967 can be configured and controlled in the normal way through the serial interface in shutdown mode All registers are accessible in shutdown mode and no register is changed by shutdown mode When shutdown mode is exited ports configured as constant current outputs at that time start instantly with their current PWM values MAKII 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control If a port is changed from static logic low 0x00 or static logic high 0x01 to a constant current value 0x02 OxFE in shutdown mode then that output is automatically turned off logic high or high impedance like any other constant current outputs that are dis abled in shutdown When shutdown mode is exited the new constant current output starts just like any other constant current outputs If a port is changed from a constant current value 0x02 OxFE to static logic low 0x00 or stat
33. n shutdown Port PO is static high logic level logic port high impedance without external pullup or logic input with logic input buffer enabled reading this por returns O or 1 depending on external conditions Still active in shutdown Port PO is static low constant current sink PWM disabled Logic input buffer is disabled reading this port always returns 0 High impedance in shutdown Port PO duty cycle is 3 256 current sink GPI logic input buffer is disabled reading this port always returns 0 High impedance in shutdown Port PO duty cycle is 4 256 current sink GPI logic input buffer is disabled reading this port always returns 0 High impedance in shutdown Port PO duty cycle is 253 256 current sink GPI logic input buffer is disabled reading this port always returns 0 High impedance in shutdown Port PO duty cycle is 254 256 current sink GPI logic input buffer is disabled reading this port always returns 0 High impedance in shutdown Port PO is static high impedance PWM disabled GPI logic input buffer is disabled reading this port always returns 0 High impedance in shutdown MAKINI OUTPUT PO LEVEL AND PWM 15 Z969XVW 9969XVIWN MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Table 6 Output Registers Format continued REGISTER DATA ADDRESS REGISTER CODE HEX D7 D6
34. nables or disables ramp up One write to the configura tion register can put the MAX6966 MAX6967 into shut down using hold off and fade off settings in the fade Table 9 Ramp Down Register Format ADDRESS REGISTER DATA REGISTER CODE HEX D D6 D5 D4 D3 D2 D1 DO Write ramp down Hold off Fade off Read ramp down Fade off time fpwm 32768Hz Instant going into shutdown after hold off delay 1 16s ramp down from full current before shutdown after hold off delay 1 8s ramp down from full current before shutdown after hold off delay 1 4s ramp down from full current before shutdown after hold off delay 1 2s ramp down from full current before shutdown after hold off delay 1s ramp down from full current before shutdown after hold off delay 2s ramp down from full current before shutdown after hold off delay 4s ramp down from full current before shutdown after hold off delay Hold off time fpwm 32768Hz Zero hold off delay before fade off going into shutdown 1 16s hold off delay before fade off going into shutdown 1 8s hold off delay before fade off going into shutdown 1 4s hold off delay before fade off going into shutdown 1 2s hold off delay before fade off going into shutdown 1s hold off delay before fade off going into shutdown 2s hold off delay before fade off going into shutdow
35. o j2 o Write ports PO through P3 with same output level or PW Read port PO output level or PWM Write ports P4 through P7 with same output level or PW Read port P4 output level or PWM Write ports P8 or P9 with same output level or PWM Read port P8 output level or PWM Read ports P7 through PO inputs Read ports P9 and P8 inputs Configuration Ramp down Ramp up OoO o oj o Output current ISET70 Output current ISET98 Global current No op Factory reserved do not write to this register 10 ojojojojo MAAKLM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Initial Power Up On power up all control registers are reset Table 3 Power up status sets I O ports PO to P9 high imped ance and puts the device into shutdown mode This means that any LED or other loads are effectively turned off and the MAX6966 MAX6967 start in its low est power condition PWM Clock An internal 32kHz oscillator generates PWM timing If all output ports are set to static levels the internal oscil Table 3 Initial Power Up Register Status REGISTER POWER UP CONDITION ADDRESS CODE HEX lator and PWM logic are disabled automatically and the MAX6966 MAX6967 operating current is lowest The internal 32kHz oscillator can be replaced by a user clock up to 100kHz if a precise or synchronized PWM frequency sourc
36. on register is used to select PWM phas ing between outputs test fade status enable hardware startup from shutdown and select shutdown or run mode Table 4 GPIO Port Direction Configuration The 10 I O ports PO through P9 can be configured to any combination of logic inputs logic outputs and con stant current outputs Configure any port as a logic input by setting its output register to 0x01 which sets the port output high impedance Table 6 Input Ports Registers Reading an input port register returns the logic levels at the I O port pins for ports that have been configured as a logic input Table 5 A port is configured as a logic input by writing OxO1 to the port s output register Table 5 An input ports register returns logic O in the appropriate bit position for a port not configured as a logic input The input ports registers are read only A write to an input ports register is ignored Table 5 Input Ports Register ADDRESS CODE REGISTER Output Registers and PWM Intensity Control The MAX6966 MAX6967 use one 8 bit register to control each output port Table 6 Each port may be configured as a logic input open drain logic output or constant cur rent sink with programmable current and PWM duty cycle Ports withstand 7V independent of the MAX6966 s or MAX6967 s supply voltage whether used as logic inputs logic outputs or constant current sinks Ports configured as constant current outputs sink a con
37. p AT 10mA lg 8 0 5 8 14 8 t z V 3 6V z O 8 V 3 3V lt g T I ig 9 G E 10 t E 09 E as ES amp go 8 3 08 5 V 2 7V g m gt e x 2 2 6 2 o B z gt lt 5 A V 225V 5 i 01 1 ENS s c 0 5 2 04 0 0 o 40 25 10 5 20 35 50 65 80 95 110 125 40 25 10 5 20 35 50 65 80 95 110 125 0 1 2 3 4 5 m TEMPERATURE C TEMPERATURE C Met OUTPUT SINKING CURRENT INTERNAL OSCILLATOR FREQUENCY vs Vext VLEp AT 20mA vs TEMPERATURE 24 3 45 E 43 z g i i V 3 6V V 3 3V amp 16 S 39 es o E 2 1 a E a s C g E 33 Ve 2 Nyce day S 31 4 29 0 27 0 1 2 3 4 5 40 25 10 5 20 35 50 65 80 95 110125 Vext Vuen V TEMPERATURE C STAGGER PWM PORT WAVEFORMS SAMPLE PWM WAVEFORMS OUTPUT REGISTERS SET TO 0x80 MAX6966 67 toc06 MAX6966 67 tocO7 MAXIM 5 MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Pin Description FUNCTION Serial Clock Input On SCLK s rising edge data shifts into the internal shift register On SCLK s falling edge data is clocked out of DOUT SCLK is active only while CS is low Chip Select Input Serial data is loaded into the shift register while CS is low The most recent 16 bits of data latch on CS s rising edge I O Ports PO to P9 can be configured as open drain current sink outputs rated at 20mA maximum or as CMOS logic inputs or as open drain logic outputs Load
38. rent LED Drivers and I O Expanders with PWM Intensity Control The tradeoff for LED intensity control is between depth of current control resolution noise constraints and software complexity e For high LED resolution where each LED needs individual intensity settings use the 8 bit PWM control plus the 1 bit analog control to get 9 bits of individual LED intensity control e For absolute maximum LED resolution where the LED uses the same intensity settings use the 8 bit PWM control plus the 1 bit analog control plus the global 3 bit analog control to get 12 bits of LED intensity control e For lowest noise applications where PWM cannot be used 1 bit of individual analog control is available If all LEDs use the same intensity set tings the 1 bit analog control plus the global 3 bit analog control provide 4 bits of static LED intensity control e f the standard half full constant current settings of 10mA 20mA are not acceptable then the global 3 bit analog control can be used to reduce the currents for all the constant current outputs 6 Take care with PC board layout The MAX6966 MAX6967 are switching moderate currents in PWM applications so the MAX6966 MAX6967 and the load supplies need careful decoupling to minimize conducted noise Also the serial interface is fast so Table 1 Port Configuration Options OUTPUT BEHAVIOR OUT OF REGISTER CODE PORT TYPE REGISTER BIT D0 1 SHUTDOWN CONFIGURATION
39. resistor value of 220kQ is a good starting point Use a lower resistance to improve noise immunity in applications where power consumption is less critical or where a faster rise time is needed for a given capacitive load VLED vs VLED SUPPLY Using Stagger with Fewer Ports The stagger option when selected applies to all ports configured as constant current outputs The 10 ports PWM cycles are separated to eight evenly spaced start positions Figure 3 This phasing can be optimized if fewer than 10 ports are used as constant current out puts by allocating the ports with the most appropriate start positions If eight constant current outputs are needed choose PO P7 because these all have differ ent PWM start positions If four constant current outputs are needed choose PO P2 P4 P6 or P1 P3 P5 P7 because the PWM start positions are evenly spaced In general choose the ports that spread the PWM start positions as evenly as possible This optimally spreads out the current demand from the ports load supply Generating a Shutdown Run Output An I O port can be used to automatically generate a shutdown run output from the MAX6966 MAX6967 The shutdown run output is active low when the MAX6966 MAX6967 are in run mode hold off fade off or ramp up and go high automatically when the MAX6966 MAX6967 finally enter shutdown after fade off Program the port s output register to value 0x00 which puts the output into stat
40. rt hot insertion All port pins remain high impedance in power down V OV with up to 8V asserted on them The DOUT OSC pin can be configured as either the serial interface data output or optional PWM clock input The MAX6966 powers up defaulting as DOUT output The MAX6967 defaults as OSC input For a similar part without the constant current controls refer to the MAX7317 data sheet Applications RGB LED Drivers Portable Equipment LCD Backlights Keypad Backlights LED Status Indication Cellular Phones SPI and QSPI are trademarks of Motorola Inc MICROWIRE is a trademark of National Semiconductor Corp MAKIM Features High Speed 26MHz SPI QSPI MICROWIRE Compatible Serial Interface 2 25V to 3 6V Operation VO Ports Default to High Z LEDs Off on Power Up I O Port Inputs Are Overvoltage Protected to 7V I O Port Outputs Are 7V Rated Open Drain I O Port Outputs Are 10mA or 20mA Constant Current Static PWM LED Drivers or Open Drain Logic Outputs VO Ports Support Hot Insertion Individual 8 Bit PWM Intensity Control for Each LED Any Output May Use or Not Use PWM Control Exit Shutdown Warm Start with Simple CS Pulse Auto Ramp Down into Shutdown Auto Ramp Up Out from Shutdown 0 8pA typ 2UA max Shutdown Current Tiny 3mm x 3mm 0 8mm High Thin QFN Package 40 C to 125 C Temperature Range Ordering Information PIN TOP PACKAGE PKG MARK CODE 16 Thin Q
41. s should be connected to a supply voltage no higher than 7V Ground DOUT OSC Serial Data Output The data into DIN is valid at DOUT 15 5 clock cycles later Use this pin to daisy chain several devices or allow data readback Output is push pull OSC Input Apply a square wave CMOS clock up to 100KkHz as alternate PWM clock source The MAX6966 powers up with DOUT OSC defaulting as DOUT output The MAX6967 powers up with DOUT OSC defaulting as OSC input edge Exposed pad Quick Start Guide This section describes how to configure a MAX6966 or MAX6967 on power up Software engineers can use this section as a plain text guide to the device s initialization routine Hardware engineers can use this section to get a quick overview of the device s capabilities and feature tradeoffs 1 Before power up all 10 I O ports PO to P9 are high impedance They may be connected to inputs up to 7V or loads connected to independent rails up to 7V The SPI bus inputs SCLK CS DIN are not overvoltage protected and must not be driven from a voltage higher than V After power up all 10 I O ports PO to P9 remain high impedance They may be connected to inputs up to 7V or loads connected to V or independent rails up to 7V The ports are not configured as logic inputs even though the ports are high impedance The device is in shutdown mode and draws mini mum supply current regardless of I O ports connec tions
42. simple overshoot damping terminations may be required if the tracks are long Detailed Description The MAX6966 MAX6967 are general purpose input out put GPIO peripherals that provide 10 I O ports PO to P9 controlled through a high speed SPI compatible serial interface The 10 I O ports can be used as logic inputs open drain logic outputs or constant current sinks in any combination Ports withstand 7V indepen dent of the MAX6966 s or MAX6967 s supply voltage whether used as logic inputs logic outputs or con stant current sinks Ports configured as constant current outputs can be set to sink either a constant current of either 10mA or 20mA The static port current may be PWM with a duty cycle ranging from 3 256 to 254 256 to reduce the average current or remain static Ports configured as open drain logic outputs have a relatively weak sink capability which should still be adequate for normal logic level outputs Open drain logic outputs typically require external pullup resistors to the appropriate positive supply to provide the logic high reference The weak drive means that the short circuit current is low enough that inadvertently driving an LED from a port configured as a logic output is unlikely to damage the LED The MAX6966 MAX6967 are rated for all 10 outputs to carry their maximum 20mA loads at the same time The port configuration options are shown in Table 1 BEHAVIOR IN SHUTDOWN CONFIGURATION REGISTER B
43. t LED Drivers and I O Expanders with PWM Intensity Control ELECTRICAL CHARACTERISTICS continued Typical Operating Circuit V 2 25V to 3 6V TA TMiN to Tmax unless otherwise noted Typical values are at V 3 3V Ta 25 C Note 1 PARAMETER SYMBOL CONDITIONS nput High Voltage PO P9 DIN SCLK CS OSC VIH PO P9 output register set to OxO1 nput Low Voltage PO P9 DIN SCLK CS OSC PO P9 output register set to OxO1 nput Leakage Current PO P9 DIN SCLK CS OSC nput Capacitance PO P9 DIN SCLK CS OSC Note 2 Port Nominal Sink Constant Output register set Current 0x02 PO P9 Global Current Register V 33V VEXT VL Set to 0x07 1V to 2 5V Note 3 Port Logic Output Low Voltage Output register set to OxOO PO P9 A ISINK 0 5mA Port Logic Output Low Short Output register set to 0x00 Circuit Current PO P9 VoLP_ 5V Port Slew Time From 20 current to 80 current TA 25 C V 3 3V Vext VLED 1 4V Port Sink Constant Current OUT 20mA atching TA 25 C V 3 3V VExT VLED 1 4V louT 10mA Output High Voltage E DOUT VOHDOUT ISOURCE 6mA Output Low Voltage V 6mA DOUT OLDOUT SINK m MAKINI 3 Z969XVW 9969XVN 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control TIMING CHARACTERISTICS Typical Operating Circuit V 2 25V to
44. to be ramped down into automatic shutdown ramp down and ramped up again out of shutdown ramp up without further inter action Figures 4 and 5 Ramp down comprises a pro grammable hold off delay which also maintains the outputs at full current for a time before the programmed X ISET2 ISET1 ISETO ISET2 ISET1 ISETO 0 0 T RAMP UP AFTER CS RUN 111 45 1 25 1s 2s 4s L EXIT SHUTDOWN COMMAND Figure 4 Ramp Up Behavior fade off time during which the currents outputs are ramped down ZERO TO 8s CURRENT RAMP DOWN ZERO TO 4s HOLD OFF DELAY BEFORE FADE OFF mE ZERO TO 4s CURRENT FADE OFF AFTER HOLD OFF DELAY mm 1 4s 1 2s Figure 5 Ramp Down Hold Off and Fade Off Behavior 18 4s 1 4s 1 2s 1s MAKIN 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control The ramp down register sets the hold off and fade off register and determine whether CS run is enabled for times and allows hold off and fade off to be disabled restart and whether ramp up is to be used for restart zero delay if desired Table 9 The ramp up register sets the ramp up time and allows ramp up to be dis abled zero delay if desired Table 10 The configura tion register contains 3 status bits that identify whether the MAX6966 MAX6967 are in hold off fade off or ramp up condition Table 4 The configuration register also e
45. uld be configured for half current 10mA to meet the 70mA requirement The four ports can be controlled simultaneously with one write access using register OxOB Table 6 Note that because the output ports have current limiting they do not have to be switched simultaneously to ensure safe current sharing Power Supply Considerations The MAX6966 MAX6967 operate with a power supply voltage of 2 25V to 3 6V Bypass the power supply to GND with a O 1pF ceramic capacitor as close to the device as possible For the TQFN version connect the underside exposed pad to GND Typical Application Circuit TOP VIEW MAXIM MAX6966ATE MAX6967ATE THIN QFN 26 LOGIC INPUT Pin Configurations MAXIM DOUT OSC MAX6966ATE MAX6967ATE MAALM 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Block Diagram CURRENT REFERENCE M o lh Leer CONTROLS Ld INTERNAL PWM CONTROLLER OSCILLATOR 1 0 PORTS EXTERNAL CLOCK INPUT CONFIGURATION REGISTER 1 0 REGISTER 4 WIRE SERIAL INTERFACE Chip Information TRANSISTOR COUNT 14 865 PROCESS BiCMOS MAKIM 27 Z969XVW 9969XVIW MAX6966 MAX6967 10 Port Constant Current LED Drivers and I O Expanders with PWM Intensity Control Package Information The package drawing s in this data sheet may not reflect the most current specific
Download Pdf Manuals
Related Search
MAXIM MAX6966/MAX6967 Manual