MAXIM MAX13170E Manual
Contents
1. ERATURE C TEMPERATURE C Test Circuits Figure 3 V 35 Transmitter Receiver Test Circuit MAXUM 30Z LELXVIWN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Test Circuits continued Figure 4 V 28 Transmitter Test Circuit Figure 5 V 28 Receiver Test Circuit Timing Diagrams f 1MHz tp tr Ins f 1MHz fg tF lt Ins tr te lt 10 5 SRF 6 t 7 d oc lg tr lt 1015 Mon trl 90 A 10 2 Vee ip Figure 9 V 28 Receiver Propagation Delays 8 MAAIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Pin Description FUNCTION Vpp Charge Pump Flying Capacitor Negative Terminal Connect a 1yuF ceramic capacitor between C1 and C1 as close as possible to the device Vpp Charge Pump Flying Capacitor Positive Terminal Connect 1uF ceramic capacitor between C1 and C1 as close as possible to the device Charge Pump Positive Supply Output Connect a 4 7uF ceramic capacitor Vpp to ground as close as possible to the device Device Supply Voltage Bypass Vcc with a 4 7uF capacitor to ground as close as possible to the device Transmitter 1 Logic Input 5 6 Transmitter 2 Logic Input 7 Transmitter 3 Logic Input Receiver 1 Logic Output Internally pull up to Vcc Receiver 2 Logic Output Intern2. DTE LL DCE LL MAXIM MAX13172E 0 INVERT M2 DCE DTE DCE DTE M2 1 0 Figure 20 Multiprotocol DCE DTE Port MAXIM 17 AOZLLELXVIN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver MAXIM MAX13174E SERIAL CONTROLLER TXD MAXIM MAX13174E SERIAL CONTROLLER TXD MAXIM MAX13172E MAXIMA MAX13172E Figure 21 DCE to DTE X 21 Interface Complete Multiprotocol X 21 Interface A complete DTE to DCE interface operating in X 21 mode is shown in Figure 21 The MAX13170E is used to generate the clock and data signals and the MAX13172E generates the control signals and local loopback LL The MAX13174E is used to terminate the clock and data signals to support the V 11 protocol for cable termination The control signals do not need external termination 18 Compliance Testing A European Standard EN 45001 test report is pending for the MAX13170E MAX13172E MAX13174E chipset A copy of the test report will be available from Maxim upon completion MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Pin Configuration Chip Information TRANSISTOR COUNT 2619 TOP VIEW PROCESS BiCMOS MAXIM MAX13170E B TA RTINA B R1INB U MO A B Package Information For the latest package outline informa
3. 2V lt VoM s 2V Input Hysteresis 2V lt Vom s 2V Receiver Input Current Receiver Input Resistance RIN 10V lt VA B 10V 10V lt VA B 10V Rise or Fall Time ig tF Figures 3 7 Receiver Input to Output Delay Data Skew Output to Output Skew tPLH tSKEWR Figures 3 7 Note 3 Figures 3 7 Note 3 Notes 3 5 V 28 TRANSMITTER Output Voltage Swing Short Circuit Current Output Slew Rate Open circuit output high Open circuit output low Ou RL 3kQ Ou L CL 2500pF F 6 8 5 85 30 mA Transmitter Input to Output Delay from Low to High L 3kQ CL 2500pF F 2 Transmitter Input to Output Delay from High to Low L 3kQ CL 2500pF F V 28 RECEIVER Input Threshold Low Input Threshold High Input Hysteresis Input Resistance Rise or Fall Time Receiver Input to Output Delay IR tF tPHL tPLH 15V lt Vin lt 15V Figures 5 9 Figures 5 9 MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver ELECTRICAL CHARACTERISTICS continued es 2 to 5 5V C4 Gs 4 7UF Cy Co Ta 0 Tmax Typical values are at Vcc 5V and TA 25 C ote PARAMETER SYMBOL CONDITIONS ESD PROTECTION T_OUT_ T_OUT_ R_OUT_ R_IN_ to GND Contact Discharge IEC61000 4 2 ESD Protect
4. wu MA AKI IVI 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver General Description Features The MAX13170E isa three driver three receiver multipro MAX13170E MAX13172E MAX13174E Chipset tocol transceiver that operates from a 5V single supply is a Pin for Pin Upgrade to the MXL1544 MAX3175 MAX13174E form a complete software selectable data terminal equipment DTE or data communication equip Supports RS 232 RS 449 EIA 530 EIA 530A ment DCE interface port that supports the V 28 RS 232 V 35 V 36 and X 21 V 10 V 11 RS 449 V 36 EIA 530 EIA 530A X 21 and 2 ina V 35 protocols The MAX13170E transceivers carry the o twareSelectabie Cable Termination Using ehe high speed clock and data signals while the MAX13172E MAX13174E carry the control signals The MAX13170E can be termi Complete DCE Port with the nated by the MAX13174E software selectable resistor MAX13172E MAX13174E termination network or by discrete termination networks The MAX13170E has an internal charge pump and a proprietary low dropout transmitter output stage that allows V 11 V 28 and V 35 compliant operation from 5V single supply The MAX13170E features a no cable mode that reduces supply current to 0 5uA and disables all high impedance transmitter and receiver Fail Safe Receivers 5V Single Supply Operation 0 5pA No Cable Mode TUV Certified NET1 NET2 and TBR1 TBR2 Compliant Pendi
5. In this mode the multiproto col drivers and receivers are disabled and the supply current drops to 5 The receivers outputs enter a high impedance state in no cable mode allowing these output lines to be shared with other receivers outputs the receivers outputs have internal pullup resistors to pull the outputs high if not driven Also in no cable mode the transmitter outputs enter a high impedance state so that these output lines can be shared with other devices Dual Charge Pump Voltage Converter The MAX13170E internal power supply consists of a reg ulated dual charge pump that provides positive and negative output voltages from a 5V supply The charge pump operates in discontinuous mode If the output volt age is less than the regulated voltage the charge pump is enabled If the output voltage exceeds the regulated voltage the charge pump is disabled Each charge pump requires a flying capacitor C1 C2 and a reser voir capacitor C3 C5 to generate the and VEE supplies Figure 10 shows charge pump connections Not Used Default V 11 RS 530A j ojojo o RS 449 V 36 V 28 RS 232 No Cable Not Used Default V 11 RS 530A RS 530 X 21 RS 449 V 36 V 28 RS 232 No Cable 10 MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver MAXIM MAX13170E C2 Figure 10 Char
6. 0 50 0 0 01 1 10 00 1 000 10 000 100 000 0 50 100 150 200 250 01 1 10 100 1 000 10 000 100 000 DATA RATE kbps DATA RATE kbps DATA RATE kbps V 11 DRIVER DIFFERENTIAL OUTPUT VOLTAGE V 28 OUTPUT VOLTAGE V 35 OUTPUT VOLTAGE vs TEMPERATURE vs TEMPERATURE vs TEMPERATURE 5 s 10 8 8 DCE MODE R E 557 A 8 e Vout 8 5 3 e VouT Q 2 4 5 a 2 S 2 DCE MODE R 500 DCE MODE VCM 0 FULL LOAD e 5 2 E E E 2 4 2 a Vout V 6 OUT 4 8 5 10 0 10 20 30 40 50 60 70 0 1 20 30 40 50 60 70 0 1 20 30 40 50 60 70 TEMPERATURE C TEMPERATURE C TEMPERATURE C MAXIM 5 30Z LELXVIW MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Vcc 5 0V C1 C2 C4 1uF C5 V 35 LOADED DIFFERENTIAL OUTPUT VOLTAGE vs COMMON MODE VOLTAGE Typical Operating Characteristics continued 4 7yF Figure 10 TA 25 C unless otherwise noted V 11 V 35 RECEIVER INPUT CURRENT vs INPUT VOLTAGE V 28 RECEIVER INPUT CURRENT vs INPUT VOLTAGE 560 5 500 2 25 8 DTE MODE DTE MODE 8 400 20 m 55 E E 5 300 9 RIIN_ E E 200 550 s g 10 z 100 5 05 5
7. 45 00 R2IN_ R3IN_ amp 0 m 40 5 05 a 200 2 40 535 9 15 400 2 0 530 500 25 4 3 2 4 0 1 2 3 4 10 8 6 4 2 0 2 4 6 8 10 10 8 6 4 2 0 2 10 COMMON MODE VOLTAGE V NPUT VOLTAGE V NPUT VOLTAGE V V 11 LOOPBACK OPERATION V 28 LOOPBACK OPERATION MAX13170E toc10 MAX13170E toc11 RL 3kQ C 2500pF 5V div TN 5V div Tour Rin 5V div Tour RiN 4 SV div Rout 5V div Rout 5V div 10ns div 1us div V 28 SLEW RATE V 35 LOOPBACK OPERATION vs LOAD CAPACITANCE MAX13170E toc12 FULL LOAD UT UV 5V div El 5V div E 5V div 10ns div Q 500 1K 1 5K 2K 25K 3K 35K 4K 45K 5K LOAD CAPACITANCE pF MAKII 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Typical Operating Characteristics continued Vcc 5 0V C1 C2 C4 1yF C5 4 7uF Figure 10 TA 25 C unless otherwise noted V 11 TRANSMITTER PROPAGATION DELAY V 11 V 35 RECEIVER PROPAGATION DELAY V 35 TRANSMITTER PROPAGATION DELAY vs TEMPERATURE 20 13170 toc14 D N vs TEMPERATURE vs TEMPERATURE MAX13170E toc15 MAX13170E toc16 PROPAGATION DELAY ns gt PROPAGATION DELAY ns PROPAGATION DELAY ns 0 10 20 30 40 50 6 70 TEMPERATURE C Figure 1 V 11 DC Test Circuit 10 20 30 40 50 6 70 10 20 30 40 5 60 70 TEMP
8. 51 7 using a 4 layer board For detailed information on package thermal considerations refer to www maxim ic com thermal tutorial Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS Vcc 4 5V to 5 5V C4 Gs Cy Co 1pF TA to Tmax Typical values at Voc 5V and TA 25 Note 2 PARAMETER SYMBOL CONDITIONS Vcc Operating Range ode no load ode oad Vcc Supply Current DCE Mode oad Digital Inputs GND or Vcc oad Transmitter Outputs Static oad oad No cable mo Internal Power Dissipation DCE Mode V 35 mode oad V 28 mode oad V 28 V 35 modes no load Positive Charge Pump Output V 28 V 35 modes with load Ipp 10mA Voltage Note 3 V 11 mode u d V 11 mode full load u u V 11 mode Vpp variation IDD OMA to 25mA V 28 V 35 modes no load V 28 V 35 modes with load 10mA Negative Charge Pump Output Note 3 Voltage V 11 mode Note 3 V 11 mode Vee variation IEE to 25mA Time it takes for both Vpp and VEE to r
9. CE_DCD E_DSR DCE_DTR E_CTS DCE_RTS MAXIM MAX13172E 0 2 DCE DTE INVERT Figure 12 Cable Selectable Multiprotocol DTE DCE Port MAXIM 13 30Z LELXVIWN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver BALANCED INTERCONNECTING GENERATOR CABLE LOAD CABLE TER d RECEIVER os Figure 13 Typical V 11 Interface Applications Information Capacitor Selection The capacitors used for the charge pumps as well as for supply bypassing should have a low equivalent series resistance ESR and low temperature coeffi cient Multilayer ceramic capacitors with an X7R dielec tric offer the best combination of performance size and cost The flying capacitors C1 C2 should have a value of while the reservoir capacitors C5 and the bypass capacitor C4 should have a minimum value of 4 7uF Figure 10 To reduce the ripple present on the transmitter outputs capacitors C3 C4 and C5 can be increased The values of C1 and C2 should not be increased Bypassing For best performance of the charge pumps connect C3 C4 and C5 closer the device than C1 and C2 Cable Termination The MAX13174E software selectable resistor network is designed to be used with the MAX13170E The MAX13174E multiprotocol termination network provides V 11 and V 35 complian
10. SISTANCE DEVICE Cs STORAGE UNDER 5 150pF CAPACITOR TEST Figure 11 IEC 61000 4 2 ESD Test Model 12 The major difference between tests done using the Human Body Model and IEC 61000 4 2 is higher peak current in IEC 61000 4 2 because series resistance is lower in the IEC 61000 4 2 model Hence the ESD withstand voltage measured to IEC 61000 4 2 is gener ally lower than that measured using the Human Body Model Figure 11c shows the IEC 61000 4 2 model and Figure 11d shows the current waveform for the IEC 61000 4 2 ESD Contact Discharge test 10 ig 0 7 5 TO 1ns Figure 11d IEC 61000 4 2 ESD Generator Current Waveform MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver 6 7 C8 100pF 100pF 100pF 11 MAXIM 13174 LATCH 5 5 9 10 19 20 DTE TXD DTE SCTE TXCA TXCB RXCA SCTEA RXCB SCTE RXDA TXDA RXDB MAXIM SG MAX13170E 0 2 DCE DTE DTE TXC DCE TXC DTE RXC DCE SCTE DTE RXD DCE TXD SHIELD DB 25 CONNECTOR DCE DTE S DCE CTS R DCE_DSR DTE_DCD D
11. ally pull up to Vcc Receiver 3 Logic Output Internally pull up to Vcc Mode Select 0 Input Internally pull up Mode Select 1 Input Internally pull up Mode Select 2 Input Internally pull up DCE DTE Mode Select Input Internally pull up to Vcc Receiver 3 Noninverting Input Receiver 3 Inverting Input Receiver 2 Noninverting Input Receiver 2 Inverting Input Transmitter 3 Noninverting Output Receiver 1 Noninverting Input Transmitter 3 Inverting Output Receiver 1 Inverting Input Transmitter 2 Noninverting Output Transmitter 2 Inverting Output Transmitter 1 Noninverting Output Transmitter 1 Inverting Output Ground Charge Pump Negative Supply Output Connect 4 7uF ceramic capacitor from VEE to ground as close as possible to the device Vee Charge Pump Flying Capacitor Negative Terminal Connect a 1uF ceramic capacitor between C2 and C2 as close as possible to the device Vee Charge Pump Flying Capacitor Positive Terminal Connect a 1uF ceramic capacitor between C2 and C2 as close as possible to the device MAXIM 9 AOZLLELXVIN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver Detailed Description The MAX13170E is a three driver three receiver multi protocol transceiver that operates from a single 5V supply The MAX13170E along with the 13172 and MAX13174E form a comple
12. at 1 888 629 4642 or visit Maxim s website at www maxim ic com AOZLLELXVIN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver ABSOLUTE MAXIMUM RATINGS All voltages referenced to GND unless otherwise noted Receiver Inputs Supply Voltages RUIN JRA rccte 15V to 15V cem 0 3V to 6V R_INA to R_INB to Charge Pump Output Voltages 2 15V to 15V G wama pan E 0 3V to 7 1V Continuous Power Dissipation TA 70 C 0 3V to 7 1V 28 Pin SSOP derate 9 5mW C above 70 C 762mW MC asss asa qipi amas sa dini pipu IRE 0 6 to 6V Junction to Case Thermal Resistance Note 1 Logic Input Voltages 28 Pin SSOP ucciso 25 C W MO M1 M2 DCE DTE T IN 0 3V to 6V Junction to Ambient Thermal Resistance Note 1 Logic Output Voltages SSOP ROUT Less 0 3V to Vcc 0 3V Operating Temperature Range Transmitter Outputs Junction Temperature T_OUT_ TSOUT R1IN No Cable Mode Storage Temperature Range Or W 28 cte cie os eire 15V to 4 15V 5 Duration to Continuous u qa Note 1 Package thermal resistances were obtained using the method described in JESD
13. each specified range Charge Pump Enable Time Thermal Shutdown Protection 2 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver ELECTRICAL CHARACTERISTICS continued Voc 4 5V to 5 5V Gs Cy Co 1pF TA to Tmax Typical values are at Voc 5V and TA 25 Note 2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX LOGIC INPUTS MO M1 M2 DCE DTE 1 21 Input High Voltage Input Low Voltage 0 66 x Vcc 0 33 x Vcc Logic Input Current TAIN T2IN 1 Pullup Resistor Output High Voltage MO M1 M2 DC ISOURCE 4mA 170 0 66 x Vcc Output Low Voltage ISINK 4mA 0 33 x Vcc Output Pullup Resistor Transmitter Output Leakage Current V 11 TRANSMITTER No cable mode to Vcc 0 25V lt VouT lt 0 25V Vcc 0 or no cable mode 71 4 Open Circuit Differential Output Voltage Open circuit R 1 95kQ Figure 1 Loaded Differential Output Voltage Note 4 Change in Magnitude of Output Differential Voltage Common Mode Output Voltage Change in Magnitude of Common Mode Output Voltage Short Circuit Current R 50Q F R 509 F Vout GND Rise Time Figures 2 6 Fall Time Transmitter Input to Output Prop Delay Data Skew tPHL tPLH Figu
14. eceiver has a single ended input To aid in rejecting system noise the MAX13170E s V 28 receiver has a typical hysteresis of 0 05V 16 Figure 19 shows the MAX13174E s termination network disabled by opening S1 and S2 The MAX13170E s internal 5kQ V 28 termination is enabled by closing S3 DTE vs DCE Operation Figure 20 shows a DCE or DTE controller selectable interface DCE DTE pin 14 switches the port s mode of operation See Table 1 This application requires only one DB 25 connector but separate cables for DCE or DTE signal routing See Figure 20 for complete signal routing in DCE and DTE modes MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver C6 C8 100pF 100pF 100 11 12 MAXIM dd 10 19 20 P uil al DTE DCE DTE_TXD DCE_RXD TXDA RXDA TXDB RXDB SCTEA RXCA SCTEB RXCB 5 DTE_SCTE DCE_RXC DTE_TXC DC TXCB RXCA SCTEA RXCB SCTEB RXDA TXDA RXDB TXDB MAXIM SG MAX13170E 0 SHIELD M2 DCE DTE DTE RXC DCE DTE RXD DC DB 25 CONNECTOR DTE DCD DCE DCD DTE DSR DCE DTR DTE CTS DCE RTS
15. ge Pump Fail Safe Receivers The MAX13170E guarantees a logic high receiver out put when the receiver inputs are shorted or when they are connected to a terminated transmission line with all the drivers disabled This is done by setting the receivers threshold between 50mV and 200 in the V 11 and V 35 modes If the differential receiver input voltage B A is gt 50mV OUT is logic high If B is 200mV R_OUT is logic low In the case of a termi nated bus with all transmitters disabled the receiver s differential input voltage is pulled to zero by the termina tion With the receiver thresholds of the MAX13170E this results in a logic high with a 50mV minimum noise margin ESD Protection As with all Maxim devices a minimum of 2kV to GND ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly The driver outputs and receiver inputs of the MAX13170E have extra protection against static electricity Maxim s engineers have devel oped state of the art structures to protect these pins against ESD of 13kV without damage HBM The ESD structures withstand high ESD in all states normal operation shutdown and powered down After an ESD event the MAX13170E keeps working without latchup or damage ESD protection can be tested in various ways The transmitter outputs and receiver inputs of the MAX13170E are characterized for protecti
16. ion Air Gap Discharge 61000 4 2 Human Body Model Note 2 All devices are 100 production tested at TA 70 C and are guaranteed by design for Ta 0 to 70 C as specified Note 3 Guaranteed by design not production tested Note 4 Vop_ is guaranteed at both 0 5 x Vopo and 12 Note 5 Ouput to output skews are evaluated as a difference of propagation delays between different channels in the same condtion and for the same polarity LH or HL Typical Operating Characteristics Vcc 5 0V C1 C2 1yuF C4 C5 4 7pF Figure 10 TA Twin to Tmax TA 25 C unless otherwise noted V 11 SUPPLY CURRENT V 28 SUPPLY CURRENT V 35 SUPPLY CURRENT vs DATA RATE vs DATA RATE vs DATA RATE 5 100 350 2 DCE MODE ALL TRANSMITTERS OPERATING AT THE SPECIFIED E 300 5 DATA RATE RL C 2500pF 250 o 200 a gt gt A gt 150 amp ZB 100 2
17. ng 9 9 outputs Short circuit current limiting and thermal shut Extended ESD Protection for All the Transmitter down circuitry protect the receiver and transmitter out Outputs and Receivers Inputs to GND puts against excessive power dissipation The 13kV Using the Human Body Model MAX13170E has extended ESD protection for all the 8kV Using the Contact Method Specified in transmitter outputs and receivers inputs IEC 61000 4 2 The MAX13170E is available in a 5 3mm x 10 2mm 5kV Using the Air Gap Discharge Method 28 pin SSOP package and operates over the O C to Specified in IEC 61000 4 2 70 C commercial temperature range Applications Ordering Information Data Networking PCI Cards PART TEMP RANGE PIN PACKAGE CSU and DSU Telecommunications MAX13170ECAI 0 C to 70 C 28 SSOP Data Routers Eaman Denotes a lead free package Pin Configuration appears at end of data sheet Typical Operating Circuit LL CTIS DSR DCD RIS TXC SCTE TXD MAXIM MAXIMA VAN MAXISITOENTS 2 Vil 12 T MAXIM s MAX13174E Ino gt 851 LI v OXL 83108 j 80 1 ELI v 3198 DB 25 CONNECTOR MIAXAIL AVI Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Direct
18. on to the fol lowing limits e 13kV using the Human Body Model e 8kV using the Contact Method specified in IEC 61000 4 2 e 5kV using the Air Gap Discharge Method speci fied in IEC 61000 4 2 MAXI DISCHARGE RESISTANCE CHARGE CURRENT LIMIT RESISTOR DEVICE Cs L STORAGE UNDER CAPACITOR TEST Figure 11a Human Body ESD Test Model ESD Test Conditions ESD performance depends on a variety of conditions Contact Maxim for a reliability report that documents test setup test methodology and test results Human Body Model Figure 11a shows the Human Body Model and Figure 11b shows the current waveform it generates when dis charged into a low impedance This model consists of a 100pF capacitor charged to the ESD voltage of interest which is then discharged into the test device through a 1 5kQ resistor PEAK TO PEAK RINGING NOT DRAWN TO SCALE TIME 6 CURRENT WAVEFORM Figure 11b Human Body Current Waveform 30Z LELXVIWN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver IEC 61000 4 2 The IEC 61000 4 2 standard covers ESD testing and performance of finished equipment However it does not specifically refer to integrated circuits The MAX13170E help equipment designs to meet IEC 61000 4 2 without the need for additional ESD protec tion components Rc Rp 50 TO 100MQ 330Q CHARGE CURRENT DISCHARGE LIMIT RESISTOR RE
19. res 2 6 Figures 2 6 Figures 2 6 Note 3 Output to Output Skew tSKEWT Figures 2 6 Notes 3 5 V 11 RECEIVER Differential Threshold Voltage Input Hysteresis 7V lt VcM V 7V lt VcM s V Receiver Input Current 10V lt VA B lt 10V Receiver Input Resistance Rise or Fall Time tR tF 10V lt VA B 10V Figures 2 7 Receiver Input to Output Delay PLH Figures 2 7 Data Skew Output to Output Skew MAXIM ItPHL tPLHI tSKEWR Figures 2 7 Note 3 Notes 3 5 30Z LELXVIN MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver ELECTRICAL CHARACTERISTICS continued Voc 4 5V to 5 5V Gs Cy Co 1pF TA Tmn to Tmax Typical values at 5V and T4 25 C Note 2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX V 35 TRANSMITTER Differential Output Voltage Output High Current VOD With load 4V lt Vom lt 4V Figure VAB 0 0 44 0 55 0 66 13 11 9 Output Low Current 0 9 11 13 Rise or Fall Time Figures 3 6 Transmitter Input to Output Delay tPLH tPHL Figures 3 6 5 ns 9 35 ns 3 ns Data Skew tPHL Figures 3 6 Note 3 Output to Output Skew tSKEWT Figures 3 6 Notes 3 5 3 ns V 35 RECEIVER Differential Threshold Voltage
20. sistance Networks BALANCED 3 GENERATOR INTERCONNECTING CABLE CABLE TERMINATION 4 RECEIVER 500 1250 500 GND Figure 16 Typical V 35 Interface MAXIM MAXIM MAX13174E MAX13170E RECEIVER Figure 17 V 35 Termination and Internal Resistance Networks MAXUM 30Z LELXVIW MAX13170E 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver UNBALANCED a GENERATOR gt INTERCONNECTING gt CABLE Figure 18 Typical V 28 Interface LOAD n RECEIVER gt CABLE TERMINATION MAXIM MAXIM MAX13174E MAX13170E RECEIVER Figure 19 V 28 Termination and Internal Resistance Networks In Figure 17 the MAX13174E is used to implement the resistive T network that is needed to properly terminate the V 35 driver and receiver Internal to the MAX13174E 1 and S2 are closed to connect the T network resistors to the circuit The V 28 termination resistor internal to the MAX13170E is disabled by opening S3 to avoid interference with the T network impedance V 28 Interface The V 28 interface is an unbalanced single ended inter face Figure 18 The V 28 driver generates a minimum of 5V across a 3kQ load impedance between A and C The V 28 r
21. t termination while V 28 receiv er termination is internal to the MAX13170E These cable termination networks provide compatibility with V 11 V 28 and V 35 protocols Using the MAX13174E termination networks provide the advantage of not hav ing to build expensive termination networks out of resis tors and relays manually changing termination modules or building custom termination networks Cable Selectable Mode A cable selectable multiprotocol interface is shown in Figure 12 The mode control lines MO M1 and DCE DTE are wired to the DB 25 connector To select the serial interface mode the appropriate combination of MO M1 and DCE DTE are grounded within the cable wiring The control lines that are not grounded are 14 Figure 14 Receiver Input Impedance pulled high by the internal pullups on the MAX13170E The serial interface protocol of the MAX13170E MAX13172E and MAX13174E is selected based on the cable that is connected to the DB 25 interface V 11 Interface As shown in Figure 13 the V 11 protocol is a fully bal anced differential interface The V 11 driver generates a minimum of 2V between nodes A and B when a 1000 min resistance is presented at the load The V 11 receiver is sensitive to x200mV differential signals at receiver inputs A and B The V 11 receiver rejects common mode signals developed across the cable referenced from C to C of up to 7V allowing for error free reception in noisy environmen
22. te software selectable DTE or DCE interface port that supports the V 28 RS 232 V 10 V 11 RS 449 V 36 EIA 530 EIA 530A X 21 and V 35 protocols The MAX13170E trans ceivers carry the high speed clock and data signals while the MAX13172E transceivers carry serial interface control signaling The MAX13170E can be terminated by the MAX13174E software selectable resistor termi nation network or by a discrete termination network The MAX13170E features a 0 5uA no cable mode fail safe operation and thermal shutdown circuitry Thermal shutdown protects the drivers against excessive power dissipation When activated the thermal shutdown cir cuitry places the receiver and transmitter outputs into a high impedance state Mode Selection The state of the mode select inputs MO M1 and M2 determines which serial interface protocol is selected Table 1 The state of the DCE DTE input determines whether the transceiver is configured as a DTE or DCE serial port When the DCE DTE input is logic high dri ver T3 is activated and receiver H1 is disabled When the DCE DTE input is logic low driver T3 is disabled Table 1 Mode Selection MAX13170E MODE NAME N and receiver R1 is activated Table 1 M0 M1 M2 and DCE DTE are internally pulled up to Vcc to ensure a logic high if left unconnected No Cable Mode The MAX13170E enters no cable mode when the mode select inputs are left unconnected or connected high MO M1 M2 1
23. tion go to www maxim ic com packages PACKAGE TYPE PACKAGE CODE DOCUMENT NO M2 DCE DTE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 19 2008 Maxim Integrated Products MAXIMA is a registered trademark of Maxim Integrated Products Inc AOZLLELXVIN
24. ts The receiv er inputs must comply with the impedance curve shown in Figure 14 For high speed data transmission the V 11 specifica tion recommends terminating the cable at the receiver with a 1000 resistor This resistor although not required prevents reflections from corrupting transmit ted data In Figure 15 the MAX13174E is used to termi nate the V 11 receiver Internal to the MAX13174E S1 is closed and S2 is open to present 1000 minimum differential resistance The MAX13170E s internal V 28 termination is disabled by opening S3 V 35 Interface Figure 16 shows a fully balanced differential standard V 35 interface The generator and the load must both present 1000 100 differential impedance and a 1500 150 common mode impedance as shown by the resistive T networks in Figure 15 The V 35 driver generates a current output 11mA typ that develops an output voltage of x550mV across the generator and load termination networks The V 35 receiver is sensi tive to x200mvV differential signals at receiver inputs A and B The V 35 receiver rejects common mode sig nals developed across the cable referenced from C to C of up to 4V allowing for error free reception in noisy environments MAXIM 5V Multiprotocol 3Tx 3Rx Software Selectable Clock Data Transceiver MAXI MI MAXIM 5 RI MAX13174E 520 MAX13170E RECEIVER Figure 15 V 11 Termination and Internal Re
Download Pdf Manuals
Related Search
MAXIM MAX13170E Manual