MAXIM MAX13485E/MAX13486E handbook
Contents
1. RECEIVER OUTPUT HIGH RECEIVER OUTPUT LOW DIFFERENTIAL OUPUT CURRENT VOLTAGE vs TEMPERATURE VOLTAGE vs TEMPERATURE vs DIFFERENTIAL OUTPUT VOLTAGE 54 5 2 80 lo im im E e E ES 4 wy 50 er 2 9 c5 amp 5 EH 2 2 E 5 40 ce 5 46 2 zZ 5 44 5 8 20 42 d up 40 55 10 35 60 85 40 15 10 35 60 85 0 1 2 3 4 5 TEMPERATURE C TEMPERATURE C OUTPUT VOLTAGE V DRIVER DIFFERENTIAL OUTPUT OUTPUT CURRENT vs TRANSMITTER OUTPUT CURRENT vs TRANSMITTER VOLTAGE vs TEMPERATURE OUTPUT HIGH VOLTAGE OUTPUT LOW VOLTAGE 3 0 s 120 2 120 z 25 100 5 10 5 E 3 3 S 20 8 80 Es a a a cc 5 15 5 60 5 6 7 5 5 E 10 40 4 BC 8 a 05 20 20 0 0 0 45 10 85 60 85 7654321012345 0 2 4 6 8 10 12 TEMPERATURE C OUTPUT HIGH VOLTAGE V OUTPUT LOW VOLTAGE V SHUTDOWN CURRENT DRIVER PROPAGATION DRIVER PROPAGATION DELAY vs TEMPERATURE vs TEMPERATURE MAX13485E vs TEMPERATURE MAX13486E 10 600 30 a ET E 550 E 5 S os 2 X E z 500 toPHL a 20 6 S 5 gt S Ub 5 450 5 5 4 a 400 10 2 8 8 1 0 300 0 40 15 1 35 60 85 40 5 10 35 60 85 40 5 10 35 60 85 TEMPERATURE C TEMPERATURE C TEMPERATURE C 62. RECEIVING OUTPUT A B X gt 50mV X lt 200mV X 1 OPEN SHORT X HIGH IMPEDANCE 1 0 X SHUTDOWN X Don t care shutdown mode driver and receiver outputs are in high impedance AVLAZCLAI Half Duplex RS 485 RS 422 Transceivers in DFN GENERATOR 51 OPEN 52 CLOSED 3 1V 51 OPEN 52 CLOSED 53 Figure 8 Receiver Enable and Disable Times AVLAZCLA Test Circuits and Waveforms continued 51 CLOSED S2 OPEN S3 1V 51 CLOSED S2 OPEN S3 1V MAXIM J398b LXVW JSS8TE LXVIW MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in Detailed Description The MAX13485E MAX13486E half duplex high speed transceivers for RS 485 RS 422 communication contain one driver and one receiver These devices feature fail safe circuitry that guarantees a logic high receiver out put when receiver inputs are open or shorted or when they are connected to a terminated transmission line with all drivers disabled see the Fail Safe section The MAX13485E MAX13486E also feature a hot swap bility allowing line insertion without erroneous data transfer see the Hot Swap Capability section The MAX13485E features reduced slew rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables allowing error free trans mission up to 500kbps The MAX13486E driver slew rate is not limited making transmit
3. MAXIM Features 5V Operation True Fail Safe Receiver While Maintaining EIA TIA 485 Compatibility Hot Swappable for Telecom Applications Enhanced Slew Rate Limiting Facilitates Error Free Data Transmission MAX13485E High Speed Version MAX13486E Allows for Transmission Speeds Up to 16Mbps Extended ESD Protection for RS 485 RS 422 l O Pins 15kV Using Human Body Model 1 4 Unit Load Allowing Up to 128 Transceivers on the Bus Available in Space Saving 8 Pin or Industry Standard 8 Pin SO Packages Ordering Information Selector Guide PIN SLEW RATE PKG PART PACKAGE LIMITED CODE MAX13485EELA T 8 uDEN Yes L822 1 MAX13485EESA 8 SO MAX13486EELA T 8 13486 850 Denotes lead free package Note All devices are specified over the 40 C to 85 C operating temperature range Pin Configurations Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Dallas Direct at 1 888 629 4642 or visit Maxim s website at www maxim ic com J398b LXVW JS8TE LXVIN Half Duplex RS 485 RS 422 Transceivers in DFN ABSOLUTE MAXIMUM RATINGS All voltages referenced to GND Operating Temperature Melo Junction Temperature DE RE DI Storage Temperature Range Ba Lead Temperature so
4. LIMIT RESISTOR DEVICE Cs STORAGE UNDER 150pF T CAPACITOR TEST Figure 10c IEC 61000 4 2 ESD Test Model 1090 tr 0 7ns tns Figure 10d IEC 61000 4 2 ESD Generator Current Waveform ESD Test Conditions ESD performance depends on a variety of conditions Contact Maxim for a reliability report that documents test setup test methodology and test results Human Body Model Figure 10a shows the Human Body Model and Figure 10b shows the current waveform it generates when dis charged into a low impedance This model consists of a 100pF capacitor charged to the ESD voltage of inter est which is then discharged into the test device through a 1 5kQ resistor IEC 61000 4 2 The IEC 61000 4 2 standard covers ESD testing and performance of finished equipment However it does not specifically refer to integrated circuits The MAX13485E MAX13486E help equipment designs to meet IEC 61000 4 2 without the need for additional ESD protection components The major difference between tests done using the Human Body Model and IEC 61000 4 2 is higher peak current in IEC 61000 4 2 because series resistance is lower in the IEC 61000 4 2 model Hence the ESD 13 J398bP LXVW JSS8TE LXVIW MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in MAXIM MAX13485E MAX13486E Figure 11 Typical Half Duplex RS 485 Network withstand voltage measured to IEC 61000 4 2 is gene
5. bringing both RE high and DE low In shutdown the devices draw a maximum of of supply current RE and DE can be driven simultaneously The devices are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns If the inputs are in this state for at least 700ns the devices are guaranteed to enter shutdown Enable times tzH and 121 see the Switching Character istics assume the devices were not in a low power shut down state Enable times tZH SHDN and tzL SHDN assume the devices were in shutdown state It takes dri vers and receivers longer to become enabled from low power shutdown mode tZH SHDN tZL SHDN than from driver receiver disable mode tzH tzL Line Length The RS 485 RS 422 standard covers line lengths up to 4000ft Typical Applications The MAX13485E MAX13486E transceivers are designed for half duplex bidirectional data communi cations on multipoint bus transmission lines Figure 11 shows typical network applications circuits To mini mize reflections terminate the line at both ends in its characteristic impedance and keep stub lengths off the main line as short as possible The slew rate limited MAX13485E is more tolerant of imperfect termination Chip Information PROCESS BiCMOS MAKLM Half Duplex RS 485 RS 422 Transceivers in DFN Package Information The package drawing s in this data sheet may not reflect the most current specifications For the latest package
6. circuit employing two pMOS devices pulling RE to Vcc MAKLM Half Duplex RS 485 RS 422 Transceivers in DFN DISCHARGE RESISTANCE CHARGE CURRENT LIMIT RESISTOR HIGH DEVICE VOLTAGE L_ STORAGE UNDER CAPACITOR TEST Figure 10a Human Body ESD Test Model 5 RINGING NOT DRAWN SCALE TIME r to CURRENT WAVEFORM Figure 10b Human Body Current Waveform 15 ESD Protection As with all Maxim devices ESD protection structures are incorporated on all pins to protect against electro static discharges encountered during handling and assembly The driver outputs and receiver inputs of the MAX13485E MAX13486E have extra protection against static electricity Maxim s engineers have developed state of the art structures to protect these pins against ESD of 15kV without damage The ESD structures withstand high ESD in all states normal operation shut down and powered down After an ESD event the MAX13485E MAX13486E keep working without latchup or damage ESD protection can be tested in various ways The trans mitter outputs and receiver inputs of the MAX13485E MAX13486E are characterized for protection to the follow ing limits 15kV using the Human Body Model 15kV using the Air Gap Discharge Method specified in IEC 61000 4 2 MAX13485E only AVLAZCLA Rc Rp 50MQ TO 100 3300 DISCHARGE RESISTANCE CHARGE CURRENT
7. 19 0742 Rev 0 1 07 MAKI Half Duplex RS 485 RS 422 Transceivers in DFN General Description The MAX13485E MAX13486E 5V half duplex 15kV ESD protected RS 485 transceivers feature one driver and one receiver These devices include fail safe circuitry guaranteeing a logic high receiver output when receiver inputs are open or shorted The receiver outputs a logic high if all transmitters on a terminated bus are disabled high impedance The MAX13485E MAX13486E include a hot swap capability to eliminate false transitions on the bus during power up or live insertion The MAX13485E features reduced slew rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables allowing error free trans mission up to 500kbps The MAX13486E driver slew rate is not limited allowing transmit speeds up to 16Mbps The MAX13485E MAX13486E feature a 1 4 unit load receiver input impedance allowing up to 128 transceivers on the bus These devices are intended for half duplex communications All driver outputs are protected to 15kV ESD using the Human Body Model The MAX13485E MAX13486E are available in 8 pin SO and space saving 8 pin packages The devices operate over the extended 40 C to 85 C temperature range Applications Utility Meters Industrial Controls Industrial Motor Drives Automated HVAC Systems TOP VIEW MAXIM MAX13485E MAX13486E MAX13485E MAX13486E
8. CA 94086 408 737 7600 2007 Maxim Integrated Products MAXIM is registered trademark of Maxim Integrated Products Inc
9. ECEIVER Input Current A and B Receiver Differential Threshold Voltage DE GND Vcc VIN 12V or 5V 7V lt x 12V Receiver Input Hysteresis Output High Voltage VB OV lo 1 6mA Va VB gt VTH MAXIM Half Duplex RS 485 RS 422 Transceivers in uDFN ELECTRICAL CHARACTERISTICS continued Voc 5V 5 TA to Tmax unless otherwise noted Typical values are at Vcc 5V and TA 25 C Notes 1 2 PARAMETER SYMBOL CONDITIONS Output Low Voltage lo 1mA VA VB lt Tri State Output Current at Receiver OV lt Vo lt Vcc iver Input Resistance 7V lt x 12V Receiver Output Short Circuit Current POWER SUPPLY Supply Voltage Supply Current Shutdown Supply Current ESD PROTECTION OV lt VRO lt Vcc ir Gap Discharge IEC61000 4 2 ESD Protection A B MAX13485E uman Body Model ESD Protection All Other Pins uman Body Model SWITCHING CHARACTERISTICS MAX13485E Vcc 5V 5 TA to Tmax unless otherwise noted Typical values are at 5V and TA 25 C Note 1 PARAMETER SYMBOL CONDITIONS DRIVER iver Propagation Delay RpiFF 540 CL 50pF Figures 2 and 3 iver Differential Output Rise or tHL Fall Time tLH Rpirr 540 50pF Figures 2 and 3 iver Differential Output Skew PLH aximum Data Rate t
10. ERMINAL ODD TERMINAL DALLAS AVLAXL VI TT PACKAGE OUTLINE 6 8 10L uDFN 2x2x0 80 mm APPROVAL DOGUNENT CONTROLS 21 0164 a F SIDE VIEW gt DRAWING NOT TO SCALE COMMON DIMENSIONS SYMBOL MIN NOM MAX A 0 70 0 75 0 80 D 1 95 2 00 2 05 E 1 95 2 00 2 05 L 0 30 0 40 0 50 L1 0 10 REF PACKAGE VARIATIONS PKG CODE N 2 1 xe 1 30 REF 0 65BSC 0 30 0 05 0 50BSC 0 25 0 05 1 50 REF 0 40BSC 0 20 0 03 1 60 REF ES ALL DIMENSIONS ARE IN mm ANGLES IN DEGREES COPLANARITY SHALL NOT EXCEED 0 08mm WARPAGE SHALL NOT EXCEED 0 10mm PACKAGE LENGTH PACKAGE WIDTH ARE CONSIDERED AS SPECIAL CHARACTERISTIC S PC DALLA D 5 IS THE TOTAL NUMBER OF LEADS DALLAS AVLAXL VI NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY PACKAGE OUTLINE MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY 6 8 10L uDFN 2x2x0 80 mm TEPRON DOCUMENT CONTROL NG 21 A 0164 A E DRAWING NOT TO SCALE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time 16 Maxim Integrated Products 120 San Gabriel Drive Sunnyvale
11. MAXIM Half Duplex RS 485 RS 422 Transceivers in uDFN Typical Operating Characteristics continued Vcc 5V TA 25 C unless otherwise noted RECEIVER PROPAGATION vs TEMPERATURE MAX13485E 40 MAX13485 86E toc13 30 tRPHL 20 PROPAGATION DELAY ns gt RECEIVER PROPAGATION ns tRPLH i 40 15 10 35 60 85 TEMPERATURE C DRIVER PROPAGATION 16Mbps MAX13486E MAX13485 86E toc16 10ns div MAAKLM RECEIVER PROPAGATION vs TEMPERATURE MAX13486E DRIVER PROPAGATION 500kbps MAX13485E MAX13485 86E toc15 DI 2V div MAX13485 86E toc14 A B 40 15 DI 2V div A B 5V div 10 35 TEMPERATURE C 5V div 400ns div RECEIVER PROPAGATION 16Mbps MAX13486E MAX13485 86E toc17 B 2V div A 2V div RO 2V div 10ns div J398b LXVW JS8TE LXVIN MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in DFN Test Circuits and Waveforms Figure 1 Driver DC Test Load Figure 2 Driver Timing Test Circuit f 1MHz 3ns tuj lt 3ns tpskew Figure 3 Driver Propagation Delays 8 AVLAZCLAI Half Duplex RS 485 RS 422 Transceivers in DFN Test Circuits and Waveforms continued K 2 3V Vo 0 5V OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH 2 3V 4 DZH SHDN DZH OUTPUT RECEIVER UNDER TES
12. T OUTPUT Figure 5 Driver Enable and Disable Timing Test Load Figure 6 Receiver Propagation Delay Test Circuit f 1MHz lt 3ns tHL lt 3ns ItRPHL Figure 7 Receiver Propagation Delays MAKINI 9 J398bP LXVW JSS8TE LXVIW MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in DFN Receiver Output Pin Description FUNCTION Receiver Output Enable Drive RE low to enable RO RO is high impedance when RE is high Drive RE high and Capability se DE low to enter low power shutdown mode RE is a hot swap input see the Hot Swap ction for more details Driver Output Enable when D see the Hot E is low Drive Drive DE high to enable the driver outputs These outputs are high impedance E high and DE low to enter low power shutdown mode DE is a hot swap input Swap Capability section for more details Driver Input Drive DI low to force noninverting output low and inverting output high Drive DI high to force noninverting output high and inverting output low see the Function Tables Ground Noninverting Receiver Input and Noninverting Driver Output Inverting Receiver Input and Inverting Driver Output AVLAZCLAW 10 Positive Supply Vcc 5V 5 Bypass Vcc to GND with a O 1uF capacitor Function Tables TRANSMITTING OUTPUT HIGH IMPEDANCE HIGH IMP SHUTDOWN
13. er Propagation Delay 540 CL 50pF Figures 2 and 3 tDPHL iver Differential Output Rise or tHL Fall Time tLH 540 CL 50pF Figures 2 and 3 Differential Driver Output Skew tOPLH tpPHLI aximum Data Rate Driver Enable to Output High tDZH igures 4 and 5 tpskEW RpiFF 540 CL 50pF Figures 2 and 3 iver Enable to Output Low igures 4 and 5 Driver Disable Time from High tDHZ igures 4 and 5 Driver Disable Time from Low tDLZ igures 4 and 5 Driver Enable from Shutdown to Output High tDZH SHDN Figures 4 and 5 Driver Enable from Shutdown to Output Low tDZL SHDN ures 4 and 5 Time to Shutdown RECEIVER Receiver Propagation Delay m CL 15pF Figures 6 and 7 Receiver Output Skew tRSkEW CL 15pF Figure 7 Maximum Data Rate 4 MAXIM Half Duplex RS 485 RS 422 Transceivers uDFN SWITCHING CHARACTERISTICS MAX13486E continued Voc 5V 5 TA to Tmax unless otherwise noted Typical values are at Vcc 5V and TA 25 C Note 1 PARAMETER SYMBOL CONDITIONS Receiver Enable to Output High tRZH g Receiver Enable to Output Low tRZL ig g Receiver Disable Time from High tRHZ Figure 8 50 ns iver Disable Time from Low tRLZ iver Enable from Shutdown tput High tRZH SHDN Receiver Enable from Shutdown t to Output Low RZL SHDN Time to Shutdow
14. ldering 10s Continuous Power Dissipation TA 70 C 8 Pin SO derate 5 9mW C above 70 471mW 8 Pin UDFN derate 4 8mW C above 70 C 380 6mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability MAX13485E MAX13486E ELECTRICAL CHARACTERISTICS Vcc 5V x596 TA to Tmax unless otherwise noted Typical values are at Vcc 5V and TA 25 C Notes 1 2 PARAMETER DRIVER Differential Driver Output Change in Magnitude of Differential Output Voltage SYMBOL CONDITIONS 000 Figure 1 1 F 54Q Figure 1 F 100Q or 54Q Figure 1 Note 3 Driver Common Mode Output Voltage 1000 or 54Q Figure 1 Change in Magnitude of Common Mode Voltage Rpirr 1000 or 540 Figure 1 Note 3 nput High Voltage DE nput Low Voltage DE nput Current Driver Short Circuit Output Current Note 4 DE RE OV lt lt 12V 7V lt lt OV Driver Short Circuit Foldback Output Current Note 3 Vcc 1V lt Vour lt 12V 7V lt x OV R
15. n tSHDN Note 1 uDFN devices production tested at 25 C Overtemperature limits are generated by design Note 2 All currents into the device are positive All currents out of the device are negative All voltages referred to device ground unless otherwise noted Note 3 AVop and AVoc are the changes in Vop and Voc when the DI input changes states Note 4 The short circuit output current applied to peak current just prior to foldback current limiting The short circuit foldback output current applies during current limiting to allow a recovery from bus contention Typical Operating Characteristics Vcc 5V TA 25 C unless otherwise noted OUTPUT CURRENT vs RECEIVER OUTPUT CURRENT vs RECEIVER SUPPLY CURRENT vs TEMPERATURE OUTPUT HIGH VOLTAGE OUTPUT LOW VOLTAGE 40 35 5 60 3 NO LOAD 2 5 38 5 28 E 2 E EI z Z c 4 amp 36 amp 21 Z ec cc ES 2 539 3 o o gt E g 34 a 14 m 25 5 5 20 a 32 7 10 3 0 0 0 40 15 10 35 60 85 0 1 2 3 4 5 0 1 2 3 4 5 TEMPERATURE C OUTPUT HIGH VOLTAGE V OUTPUT LOW VOLTAGE V AVLAZCLAVI 5 J398bP LXVW JSS8TE LXVIW MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in DFN Typical Operating Characteristics continued Vcc 5V TA 25 C unless otherwise noted
16. outline information go to www maxim ic com packages INCHES MILLIMETERS 0 069 1 35 0 010 0 10 SOICN EPS 0 019 0 35 0 010 0 19 0 050 BSC 1 27 BSC VARIATIONS INCHES MILLIMETERS TOP VIEW DIM MIN MAX N MS012 D 4 80 5 00 8 AA D 8 55 8 75 14 AB D 9 80 10 00 16 4 1f A e eth 1 0 8 _ FRONT VIEW SIDE VIEW DDALLAS AMI ALXL VI PROPRIETARY INFORMATION TITLE PACKAGE OUTLINE 150 SOIC APPROVAL 1 2 MOLD FLASH OR PROTRUSIONS NOT TO EXCEED 0 15mm 006 3 LEADS TO BE COPLANAR WITHIN 0 10mm 004 4 CONTROLLING DIMENSION MILLIMETERS 5 6 MEETS JEDEC 5012 N NUMBER OF PINS DOCUMENT CONTROL NO 21 0041 AVLAZCLA 15 J398bP LXVW JSSTE LXVIW MAX13485E MAX13486E Half Duplex RS 485 RS 422 Transceivers in Package Information continued The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages a ses 6 8 10L UDFN EPS SOLDER MASK COVERAGE PIN1 SAMPLE INDEX AREA MARKING NI2 1 VIEW SIDE VIEW BOTTOM VIEW DETAIL A mi L m re 4 gj SECTION A A EVEN T
17. pskEW 540 CL 50pF Figures 2 and 3 Driver Enable to Output High igures 4 and 5 Driver Enable to Output Low igures 4 and 5 Driver Disable Time from High tDHZ Figures 4 and 5 Driver Disable Time from Low tDLZ igures 4 and 5 Driver Enable from Shutdown to Output High tDZH SHDN Figures 4 and 5 Driver Enable from Shutdown to Output Low tDZL SHDN Figures 4 and 5 Time to Shutdown tSHDN RECEIVER Receiver Propagation Delay CL 15pF Figures 6 and 7 Receiver Output Skew tRSKkEW CL 15pF Figure 7 Maximum Data Rate MAKINI 3 J398bP LXVW JSSTE LXVIW Half Duplex RS 485 RS 422 Transceivers DFN SWITCHING CHARACTERISTICS MAX13485E continued Vcc 5V 5 TA to Tmax unless otherwise noted Typical values are at Vcc 5V and TA 25 C Note 1 PARAMETER SYMBOL CONDITIONS Receiver Enable to Output High tRZH Receiver Enable to Output Low tRZL iver Disable Time from High iver Disable Time from Low tRLZ iver Enable from Shutdown tput High tRZH SHDN Receiver Enable from Shutdown to Output Low tRZL SHDN Time to Shutdown tSHDN SWITCHING CHARACTERISTICS MAX13486E Voc 5V 5 TA TMIN to Tmax unless otherwise noted Typical values are at Vcc 5V and TA 25 C Note 1 PARAMETER SYMBOL CONDITIONS MAX13485E MAX13486E DRIVER t iv
18. r ally lower than that measured using the Human Body Model Figure 10c shows the IEC 61000 4 2 model and Figure 10d shows the current waveform for the IEC 61000 4 2 ESD Contact Discharge test Machine Model The machine model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance The objective is to emulate the stress caused when O pins are contacted by handling equipment during test and assembly Of course all pins require this protec tion not just RS 485 inputs and outputs The air gap test involves approaching the device with a charged probe The contact discharge method connects the probe to the device before the probe is energized Applications Information 128 Transceivers on the Bus The standard RS 485 receiver input impedance is 12kQ 1 unit load and the standard driver can drive up to 32 unit loads The MAX13485E MAX13486E have a 1 4 unit load receiver input impedance 48kQ allowing up to 128 transceivers to be connected in parallel on one communication line Any combination of these devices as well as other RS 485 transceivers with a total of 32 unit loads or fewer can be connected to the line Reduced EMI and Reflections The MAX13485E features reduced slew rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables allowing error free data transmission up to 500kbps 14 Low Power Shutdown Mode Low power shutdown mode is initiated by
19. r to drift to an incorrect logic level Additionally parasitic circuit board capacitance could cause coupling of Vcc or GND to the enable inputs Without the hot swap capability these factors could improperly enable the transceiver s driver or receiver 12 DE HOT SWAP Figure 9 Simplified Structure of the Driver Enable Pin DE When Vcc rises an internal pulldown circuit holds DE low and RE high After the initial power up sequence the pulldown circuit becomes transparent resetting the hot swap tolerable input Hot Swap Input Circuitry The enable inputs feature hot swap capability At the input there are two nMOS devices M1 and M2 Figure 9 When Vcc ramps from zero an internal 7us timer turns on M2 and sets the SR latch which also turns on M1 Transistors M2 a 1 5mA current sink and M1 current sink pull DE to GND through a 5kQ resistor M2 is designed to pull DE to the disabled state against an external parasitic capacitance up to 100pF that can drive DE high After 7us the timer deactivates M2 while M1 remains on holding DE low against tri state leakages that can drive DE high M1 remains on until an external source overcomes the required input current At this time the SR latch resets and M1 turns off When M1 turns off DE reverts to a standard high impedance CMOS input Whenever Vcc drops below 1V the hot swap input is reset For RE there is a complementary
20. speeds up to 16Mbps possible Fail Safe The MAX13485E MAX13486E guarantee a logic high receiver output when the receiver inputs are shorted or open or when they are connected to a terminated transmission line with all drivers disabled This is done by setting the receiver input threshold between 50mV and 200mv If the differential receiver input voltage A B is greater than or equal to 50mV RO is logic high If A B is less than or equal to 200mV RO is logic low In the case of a terminated bus with all transmitters disabled the receiver s differential input voltage is pulled to OV by the termination With the receiver thresholds of the MAX13485E MAX13486E this results is a logic high with e h a 50mV minimum noise margin Unlike previous fail saf devices the 50mV to 200mV threshold complies wit the 200mV EIA TIA 485 standard Hot Swap Capability Hot Swap Inputs When circuit boards are inserted into a hot or powered backplane differential disturbances to the data bus can lead to data errors Upon initial circuit board inser tion the data communication processor undergoes its own power up sequence During this period the processor s logic output drivers are high impedance and are unable to drive the DE and RE inputs of these devices to a defined logic level Leakage currents up to 10uA from the high impedance state of the proces sor s logic drivers could cause standard CMOS enable inputs of a transceive
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MAXIM MAX13485E/MAX13486E handbook