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BURR-BROWN DAC7621 Manual

1. 0 200 400 600 800 1000 1200 Hours of Operation at 150 C FULL SCALE VOLTAGE vs TEMPERATURE No Load m Avg 30 Sample Size 300 Avg Avg 30 50 25 0 25 50 75 100 125 Temperature C Noise uV NHz 10 000 1 000 0 100 Number of Units Zero Scale mV OUTPUT VOLTAGE NOISE vs FREQUENCY Data FFF 10 100 1k 10k 100k Frequency Hz TOTAL UNADJUSTED ERROR HISTOGRAM ZERO SCALE VOLTAGE vs TEMPERATURE 25 0 25 50 75 100 125 Temperature C BURR BROWN DAC7621 TYPICAL PERFORMANCE CURVES cont At T4 25 and Vpp 5V unless otherwise specified LINEARITY ERROR vs DIGITAL CODE at 25 C Linearity Error LSBs 0 512 1024 1536 2048 2560 3072 3584 4096 Code LINEARITY ERROR vs DIGITAL CODE at 85 C Linearity Error LSBs 0 512 1024 1536 2048 2560 3072 3584 4096 Code LINEARITY ERROR vs DIGITAL CODE at 40 C Linearity Error LSBs 0 512 1024 1536 2048 2560 3072 3584 4096 Code BURR BROWN DAC7621 Differential Linearity Error LSBs Differential Linearity Error LSBs Differential Linearity Error LSBs 0 5 1 0 0 5
2. At T4 25 and Vpp 5V unless otherwise specified SHORT CIRCUIT CURRENT vs OUTPUT VOLTAGE Output tied to Isqurce Output Current mA Negative Current Limit 0 05 10 15 20 25 30 35 40 45 50 Output Voltage V MID SCALE GLITCH PERFORMANCE LOADDAC Vour 2mV div 7FF to 800 Time 500ns div LARGE SIGNAL SETTLING TIME C 110pF R No Load 1V div Vour Time 20us div BURR BROWN DAC7621 SUPPLY CURRENT vs TEMPERATURE Vioaic 3 5V Data FFF No Load Supply Current mA 40 30 20 10 0 10 20 30 40 50 60 70 80 90 Temperature C MID SCALE GLITCH PERFORMANCE LOADDAC Vou 2mV div Time 500ns div RISE TIME DETAIL Output Voltage 1mV div Time 10us div TYPICAL PERFORMANCE CURVES cont At T4 25 and Vpp 5V unless otherwise specified Full Scale Output V Output Voltage 1mV div Output Voltage Change mV 4 115 4 110 4 105 4 100 4 095 4 090 4 085 4 080 4 075 FALL TIME DETAIL Time 10us div LONG TERM DRIFT ACCELERATED BY BURN IN 144 Units
3. DIFFERENTIAL LINEARITY ERROR vs DIGITAL CODE at 25 C eo 512 1024 1536 2048 2560 3072 3584 4096 Code DIFFERENTIAL LINEARITY ERROR vs DIGITAL CODE at 85 C e 512 1024 1536 2048 2560 3072 3584 4096 Code DIFFERENTIAL LINEARITY ERROR vs DIGITAL CODE at 40 C eo 512 1024 1536 2048 2560 3072 3584 4096 Code OPERATION The DAC7621 is a 12 bit digital to analog converter DAC complete with an input shift register DAC register laser trimmed 12 bit DAC on board reference and a rail to rail output amplifier Figure 1 shows the basic operation of the DAC7621 INTERFACE Figure 1 shows the basic connection between a microcontroller and the DAC7621 The interface consists of a Read Write R W data and a load DAC signal LOADDAC In addition a chip select CS input is avail able to enable the DAC7621 when there are multiple de vices The data format is Straight Binary An asynchronous clear input CLR is provided to simplify start up or periodic resets Table I shows the relationship between input code and output voltage DAC7621 Full Scale Range 4 095V Least Significant Bit 1mV DIGITAL INPUT CODE ANALOG OUTPUT STRAIGHT OFFSET BINARY V DESCRIPTION Full Scale Midscale 1 LSB Midscale Midscale 1 LSB Zero Scale TABLE I Digital Input Code and Corresponding Ideal Analog
4. BURR BROWN DAC7621 4 TYPICAL PERFORMANCE CURVES At T4 25 and Vpp 5V unless otherwise specified Output Voltage V PSR dB Noise Voltage 1mV div 70 60 OUTPUT SWING vs LOAD 100 1k Load Resistance Q BROADBAND NOISE 10k 100k Time 2us div POWER SUPPLY REJECTION vs FREQUENCY Data FFF Vpp 5V 200mV AC 10 100 1k 10k Frequency Hz 100k 1M PULL DOWN VOLTAGE vs OUTPUT SINK CURRENT 0 001 0 01 0 1 1 10 100 Current mA SUPPLY CURRENT vs LOGIC INPUT VOLTAGE Supply Current mA Vpp Minimum V c 45 40 35 30 25 20 15 10 05 Logic Voltage V MINIMUM SUPPLY VOLTAGE vs LOAD AVps 1 LSB Data FFF 0 010 0 100 1 000 10 000 Output Load Current mA BURR BROWN DAC7621 TYPICAL PERFORMANCE CURVES cont
5. e N Channel ia A e FIGURE 3 Simplified Driver Section of Output Amplifier BURR BROWN DAC7621 R 2R DAC Output Amplifier POWER SUPPLY A BiCMOS process and careful design of the bipolar and CMOS sections of the DAC7621 result in a very low power device Bipolar transistors are used where tight matching and low noise are needed to achieve analog accuracy and CMOS transistors are used for logic switching functions and for other low power stages If power consumption is critical it is important to keep the logic levels on the digital inputs R W CLK CS LOADDAC CLR as close as possible to either Vpp or ground This will keep the CMOS inputs see Supply Current vs Logic Input Voltages in the Typical Performance Curves from shunt ing current between Vpp and ground The DAC7621 power supply should be bypassed as shown in Figure 1 The bypass capacitors should be placed as close to the device as possible with the 0 1uF capacitor taking priority in this regard The Power Supply Rejection vs Frequency graph in the Typical Performance Curves sec tion shows the PSRR performance of the DAC7621 This should be taken into account when using switching power supplies or DC DC converters In addition to offering guaranteed performance with Vpp in the 4 75V to 5 25V range the DAC7621 will operate with reduced performance down to 4 5V Operation between 4 5V and 4 75V will
6. Output Clear 5 OV to Oo 4 095V Data Bus FIGURE 1 Basic Operation of the DAC7621 The digital data into the DAC7621 is double buffered This means that new data can be entered into the DAC without disturbing the old data and the analog output of the con verter At some point after the data has been entered into the serial shift register this data can be transferred into the DAC register This transfer is accomplished with a HIGH to LOW transition of the LOADDAC pin However the LOADDAC pin makes the DAC register transparent If new data be comes available on the bus register while LOADDAC is LOW the DAC output voltage will change as the data changes To prevent this CS must be returned HIGH prior to changing data on the bus At any time the contents of the DAC register can be set to 000 analog output equals OV by taking the CLR input LOW The DAC register will remain at this value until CLR is returned HIGH and LOADDAC is taken LOW to allow the contents of the input register to be transferred to the DAC register If LOADDAC is LOW when CLR is taken LOW the DAC register will be set to 000 and the analog output driven to OV When CLR is returned HIGH the DAC register and the analog output will respond accordingly DIGITAL TO ANALOG CONVERTER The internal DAC section is a 12 bit voltage output device that swings between ground and the internal ref erence voltage The DAC is realized
7. Vi OV No Load Power Supply Sensitivity AVpp 5 TEMPERATURE RANGE Specified Performance To 1 LSB of Final Value x Same specification as for DAC7621E NOTES 1 This term is sometimes referred to as Linearity Error or Integral Nonlinearity INL 2 Specification does not apply to negative going transitions where the final output voltage will be within 3 LSBs of ground In this region settling time may be double the value indicated The information provided herein is believed to be reliable however BURR BROWN assumes no responsibility for inaccuracies or omissions BURR BROWN assumes no responsibility for the use of this information and all use of such information shall be entirely at the user s own risk Prices and specifications are subject to change without notice No patent rights or licenses to any of the circuits described herein are implied or granted to any third party BURR BROWN does not authorize or warrant any BURR BROWN product for use in life support devices and or systems BURR BROWN DAC7621 2 PIN CONFIGURATION Top View LOADDAC cs R W Vout AGND DBO LSB POND DAC7621E DBI DB11 MSB DB2 DB10 DB3 DB9 DB4 DB8 DB5 DB7 DB6 ABSOLUTE MAXIMUM RATINGS Vpp to GND Digital Inputs to GND Vour to GND Power Dissipation Thermal Resistance 0 Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperatu
8. result in longer settling time reduced performance and current sourcing capability Consult the Vpp vs Load Current graph in the Typical Performance Curves section for more information APPLICATIONS POWER AND GROUNDING The DAC7621 can be used in a wide variety of situations from low power battery operated systems to large scale industrial process control systems In addition some appli cations require better performance than others or are par ticularly sensitive to one or two specific parameters This diversity makes it difficult to define definite rules to follow concerning the power supply bypassing and grounding The following discussion must be considered in relation to the desired performance and needs of the particular system A precision analog component requires careful layout ad equate bypassing and a clean well regulated power supply As the DAC7621 is a single supply 5 V component it will often be used in conjunction with digital logic microcontrollers microprocessors and digital signal proces sors The more digital logic present in the design and the higher the switching speed the more difficult it will be to achieve good performance The DAC7621 has separate analog ground and digital ground pins The current through DGND is mostly switching tran sients and are up to 4mA peak in amplitude The current through AGND is typically 0 5mA For best performance separate analog and digital ground planes
9. the industrial temperature range of 40 C to 85 C Voo 12 Bit DAC 12 CLR O m DAC Register LOADDAC O Input Register p Jerpg rI I r r p DO Di D2 D3 D4 D5 D6 D7 D8 DY D10 D11 DGND International Airport Industrial Park Mailing Address PO Box 11400 Tucson AZ 85734 Street Address 6730 S Tucson Blvd Tucson AZ 85706 Tel 520 746 1111 Twx 910 952 1111 Internet http www burr brown com Cable BBRCORP Telex 066 6491 FAX 520 889 1510 Immediate Product Info 800 548 6132 1998 Burr Brown Corporation PDS 1502B Printed in U S A March 1999 SPECIFICATIONS ELECTRICAL At T4 40 C to 85 C and Vpp 5V unless otherwise noted PARAMETER RESOLUTION CONDITIONS DAC7621E DAC7621EB TYP TYP ACCURACY Relative Accuracy t Differential Nonlinearity Zero Scale Error Full Scale Voltage Guaranteed Monotonic Code 000 Code FFF 1 2 1 2 1 4 095 ANALOG OUTPUT Output Current Load Regulation Capacitive Load Code 800 Rioap 2 402 Code 8004 No Oscillation zy 1 500 Short Circuit Current 20 Short Circuit Duration GND or Vpp Indefinite DIGITAL INPUT Data Format Parallel Data Coding Straight Binal Logic Family CMOS Logic Levels 0 7 Vpp DYNAMIC PERFORMANCE Settling Time ts DAC Glitch Digital Feedthrough POWER SUPPLY Vop lop Vin 5V Vi OV No Load at Code 0004 Power Dissipation Vin 5V
10. 4 ACTIVE SSOP DB 20 68 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br The marketing status values are defined as follows ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available OBSOLETE TI has discontinued the production of the device 2 Eco Plan The planned eco friendly classification Pb Free RoHS Pb Free RoHS Exempt or Green RoHS amp no Sb Br please check http Awww ti com productcontent for the latest availability information and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS TI s terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 196 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Pb Free RoHS Exempt This component has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used bet
11. Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security Low Power Wireless www ti com Ipw Telephony www ti com telephony Video amp Imaging www ti com video Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2007 Texas Instruments Incorporated
12. SBAS107 BURR BROWN For most current data sheet and other product information visit www burr brown com DAC7621 12 Bit Parallel Input DIGITAL TO ANALOG CONVERTER FEATURES LOW POWER 2 5mW FAST SETTLING 7us to 1 LSB 1mV LSB WITH 4 095V FULL SCALE RANGE COMPLETE WITH REFERENCE 12 BIT LINEARITY AND MONOTONICITY OVER INDUSTRIAL TEMP RANGE ASYNCHRONOUS RESET TO 0V APPLICATIONS PROCESS CONTROL DATA ACQUISITION SYSTEMS CLOSED LOOP SERVO CONTROL PC PERIPHERALS PORTABLE INSTRUMENTATION DESCRIPTION The DAC7621 is a 12 bit digital to analog converter DAC with guaranteed 12 bit monotonicity perfor mance over the industrial temperature range It re quires a single 5V supply and contains an input register latch 2 435V reference DAC and high speed rail to rail output amplifier For a full scale step the output will settle to 1 LSB within 7us The device consumes 2 5mW 0 5mA at 5V The parallel interface is compatible with a wide variety of microcontrollers The DAC7621 accepts a 12 bit parallel word has a double buffered input logic struc ture and provides data readback In addition two control pins provide a chip select CS function and asynchronous clear CLR input The CLR input can be used to ensure that the DAC7621 output is OV on power up or as required by the application The DAC7621 is available in a 20 lead SSOP package and is fully specified over
13. by a laser trimmed R 2R ladder network which is switched by N channel MOSFETs The DAC output is internally connected to the rail to rail output operational amplifier DAC7621E LOADDAC m Load DAC CS 19 Chip Select IX Read Write gt Data Bus BURR BROWN DAC7621 Buffer Bandgap Reference FIGURE 2 Simplified Schematic of Analog Portion OUTPUT AMPLIFIER A precision low power amplifier buffers the output of the DAC section and provides additional gain to achieve a OV to 4 095V range The amplifier has low offset voltage low noise and a set gain of 1 682V V 4 095 2 435 See Figure 2 for an equivalent circuit schematic of the analog portion of the DAC7621 The output amplifier has a 7us typical settling time to 1 LSB of the final value Note that there are differences in the settling time for negative going signals versus positive going signals The rail to rail output stage of the amplifier provides the full scale range of OV to 4 095V while operating on a supply voltage as low as 4 75V In addition to its ability to drive resistive loads the amplifier will remain stable while driving capacitive loads of up to 500pF See Figure 3 for an equivalent circuit schematic of the amplifiers output driver and the Typical Performance Curves section for more infor mation regarding settling time load driving capability and output noise P Channel B A e Vout
14. ce failure Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications PACKAGE DRAWING NUMBER ORDERING TRANSPORT PACKAGE NUMBERO MEDIA DAC7621E Rails DAC7621EAK Tape and Reel DAC7621EB Rails DAC7621EB 1K Tape and Reel NOTES 1 For detailed drawing and dimension table please see end of data sheet or Appendix C of Burr Brown IC Data Book 2 Models with a slash are available only in Tape and Reel in the quantities indicated e g 1K indicates 1000 devices per reel Ordering 1000 pieces of DAC7621E 1K will get a single 1000 piece Tape and Reel For detailed Tape and Reel mechanical information refer to Appendix B of Burr Brown IC Data Book BURR BROWN DAC7621 TIMING DIAGRAMS l tiwo LOADDAC j tpa _ gt toy Data Out Data Valid Data In teso Data Output Timing Digital Input Timing TIMING SPECIFICATIONS LOGIC TRUTH TABLE R W LOADDA REGISTER REGISTER SYMBOL DESCRIPTION MIN TYP MAX UNITS Q GIS SE ns L E Write Write CS LOW for Read i R W HIGH to CS LOW Hold Write Input R W HIGH after CS HIGH CS HIGH to Data Bus in High Impedance CS LOW to Data Bus Valid Hold Read Input Update Update Hold Hold X Don t Care CS LOW for Write R W LOW to CS LOW R W LOW after CS HIGH Data Valid to CS LOW Data Valid after CS HIGH LOADDAC LOW
15. diaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party p
16. nstalled as close to Vpp and ground as possible In some situations additional bypassing may be required such as a 100uF electrolytic capacitor or even a Pi filter made up of inductors and capacitors all designed to essen tially lowpass filter the 5V supply removing the high frequency noise see Figure 4 DAC7621 Optional Other Analog Components FIGURE 4 Suggested Power and Ground Connections for a DAC7621 Sharing a 5V Supply with a Digital System with a Single Ground Plane BURR BROWN DAC7621 K Texas PACKAGE OPTION ADDENDUM INSTRUMENTS www ti com 16 Mar 2007 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead Ball Finish MSL Peak Temp Type Drawing Qty DAC7621E ACTIVE SSOP DB 20 68 Green RoHS amp CUNIPDAU Level 3 260C 168 HR no Sb Br DAC7621E 1K ACTIVE SSOP DB 20 1000 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621E 1KG4 ACTIVE SSOP DB 20 1000 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621EB ACTIVE SSOP DB 20 68 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621EB 1K ACTIVE SSOP DB 20 1000 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621EB 1KG4 ACTIVE SSOP DB 20 1000 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621EBG4 ACTIVE SSOP DB 20 68 Green RoHS amp CU NIPDAU Level 3 260C 168 HR no Sb Br DAC7621EG
17. re soldering 10s 0 3V to 6V 0 3V to Vpp 0 3V 0 3V to Vpp 0 3V 40 C to 85 C 65 C to 150 C NOTE 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device Exposure to absolute maximum conditions for extended periods may affect device reliability PACKAGE ORDERING INFORMATION MINIMUM RELATIVE DIFFERENTIAL ACCURACY NONLINEARITY PRODUCT RANGE DAC7621E DAC7621EB SPECIFICATION TEMPERATURE 40 C to 85 C 20 Lead SSOP 40 C to 85 C 20 Lead SSOP PIN DESCRIPTIONS Em uer oson U Reset Resets the DAC register to zero Active LOW Asynchronous input Postive Power Supply DAC Output Voltage Analog Ground Digital Ground Data Bit 11 MSB Data Bit 10 Data Bit 9 Data Bit 8 Data Bit 7 Data Bit 6 Data Bit 5 Data Bit 4 Data Bit 3 Data Bit 2 Data Bit 1 Data Bit 0 LSB Read and Write Control Chip Select Active LOW LOADDAC Loads the internal DAC register The DAC register is a transparent latch and is transparent when LOADDAC is LOW regardless of the state of CS or CLK ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD Burr Brown recommends that all integrated circuits be handled with appropriate precautions Failure to observe proper handling and installation procedures can cause damage ESD damage can range from subtle performance degrada tion to complete devi
18. roducts or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice Tl is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com
19. ween the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS amp no Sb Br TI defines Green to mean Pb Free RoHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 196 by weight in homogeneous material 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications and peak solder temperature Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided TI bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals Tl and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis Addendum Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsi
20. with a single interconnection point to minimize ground loops The analog pins are located adjacent to each other to help isolate analog from digital signals Analog signals should be routed as far as possible from digital Digital Circuits signals and should cross them at right angles A solid analog ground plane around the D A package as well as under it in the vicinity of the analog and power supply pins will isolate the D A from switching currents It is recommended that DGND and AGND be connected directly to the ground planes under the package If several DAC7621s are used or if sharing supplies with other components connecting the AGND and DGND lines together at the power supplies once rather than at each chip may produce better results The power applied to Vpp should be well regulated and low noise Switching power supplies and DC DC converters will often have high frequency glitches or spikes riding on the output voltage In addition digital components can create similar high frequency spikes as their internal logic switches states This noise can easily couple into the DAC output voltage through various paths between Vpp and Voyr As with the GND connection Vpp should be connected to a 5V power supply plane or trace that is separate from the connection for digital logic until they are connected at the power entry point In addition the 10uF and O 1uF capaci tors shown in Figure 4 are strongly recommended and should be i

BURR-BROWN DAC7621 Manual

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