lnternational IOR Rectifier IRS2153(1)D(S)PbF handbook
Contents
1. 300 300 250 IsinkHO 250 Isink LO lt lt 200 200 5 150 5 150 5 IsourceHO IsourceLO 6 Oo 2 100 O 100 50 50 0 r 1 0 r 25 0 25 50 75 100 125 25 0 25 50 75 100 125 Temperature C Temperature C IsourceHO IsinkHO vs Temp IsourceLO IsinkLO vs Temp Fig 9 Fig 10 80 R VOH_HO vs Frequency Z 60 IB CAP 4 With External BS diode No external BS diode E 8 50 16 a 40 14 lt 30 3 a 20 IBS_10V 10 I 8 10 o 6 0 gt 25 0 25 50 75 100 125 4 Temperature C 2 0 7 7 T T 0 50 100 150 200 250 300 350 400 IBCAP IBS10V vs TEMP Frequency kHz T 25 C VS 0V CHO 1nF Fig 11 Fig 12 VOH HO vs Frequency vs Temp VCC 14V CHO 1nF VS 0V 8 EEE EA Frequency kHz ON ho e T 25c T 25c A T 75c gt lt T 125c Fig 13 International IRS2153 1 D TOR Rectifier 10 92 430 8 84 348 JIMENSIONING de TOLERANCING PER ANSI Y14 5M 1982 CONTROLLING DIMENSION INCH DIMENSIONS ARE SHOWN IN MILLIMETERS INCHES TLINE CONFORMS TO JEDEC OUTLINE MS 001AB 1 77 970 T INCLUDE MOLD SIONS MOLD 1 15 045 g eo CEED 0 25 01 2 54 100 ll 6x MILLIMETERS MAX FOOTPRINT E 175 8X 0 72 028 10 25 010 AM 6 46 255 andes2. Symbol Definition Min Typ Max Units Test Conditions Low Voltage Supply Characteristics Floating Supply Characteristics Quiescent Ves supply current NN Ves supply undervoltage positive going threshold Ves supply undervoltage negative going threshold Ro Offset supply leakage current RES Oscillator O Characteristics Oscillator frequency o mman C High level Rr output voltage Vcc Vrt Low level Rr output voltage UV mode Rr output voltage 184 E TER VRT VRT VRTUV VRTSD SD mode Rr output voltage Vcc Vrt 100 Vs Vs 600 V 100 Rr 7 15kQ kQ 50 IrT 100 uA 300 50 300 E 1 mA 100 Vec lt Vocu lt Vecuv IRT LA IRT 1 mA International IRS2153 1 D TOR Rectifier Electrical Characteristics Veias Vcc Ves 14 V CT 1 nF Vs 0 V and Ta 25 C unless otherwise specified The output voltage and curre parameters are referenced to COM and are applicable to the respective output leads HO or LO CLO CHO 1 nF nt Vo and lo Symbol Definition Min Typ Max Units Test Conditions Gate Driver Output Characteristics E a Out eja Shutdown propagation delay Output deadtime HO or LO IRS2153D Output deadtime HO or LO IRS21531D 0 35 06 0 85 us Output source current 180 A m Output sink current Vg when the bootstrap FET is on lo 0A Vec lt Vecuv
3. 3X 1 27 050 8X 1 78 070 Ant L Ac A i O 0 10 004 BX b A1 o 0 25 010 MW C A B NOTES 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 1 DIMENSIONING amp TOLERANC NG PER ASME Y14 5M 1994 MOLD PROTRUSIONS NOT TO EXCEED 0 15 006 2 CONTROLLING DIMENSION MILLMETER DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 3 DIMENSIONS ARE SHOWN IN MILLMETERS INCHES MOLD PROTRUSIONS NOT TO EXCEED 0 25 010 A O T NE EE NE HS IR TD DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO j A SUBSTRATE 01 6027 8 Lead SOIC 01 0021 11 MS 012AA IRS2153 1 DSPbF 12 International IRS2153 1 D TER Rectifier LOADED TAPE FEED DIRECTION gt e e e D Oat mini NOTE CONTROLLING DIMENSION IN MM E CARRIER TAPE DIMENSION FOR 8SOICN imperial Min Max 0 311 0 153 0 46 0 214 lt D x 0 248 0 200 0 059 1 60 0 059 0 062 o 0 m Si o REEL DIMENSIONS FOR 8SOICN Imperial T 12 976 0 824 0 503 0767 3 858 n a 0 570 0 488 iB D 13 International IRS2153 1 D TER Rectifier PART MARKING INFORMATION Pin 1 Identifier MARKING CODE P Lead Free Released Non Lead Free Relased ode Prod mode 4 digit SPN code Assembly site code Per SCOP 200 002 ORDER INFORMATION 8 Lead PDIP IRS2153DPbF 8 L
4. Vp source current when FET is on Ve source current when FET is on Cps 0 1 uF Vp 10 V International IRS2153 1 D TER Rectifier Lead Definitions A o L N 0 x Lead International TOR Rectifier Functional Block Diagram IRS2153 1 D FILTER BOOTSTRAP DRIVE International IRS2153 1 D TER Rectifier Timing Diagram Operating Mode VCCUV VCC Fault Mode 2 3 VCC CT lt 1 6 VCC VCT 1 3 VCC 1 6 VCC Switching Time Waveform Deadtime Waveform International TOR Rectifier IRS2153 1 D Functional Description Under voltage Lock Out Mode UVLO The under voltage lockout mode UVLO is defined as the state the IC is in when Vcc is below the turn on threshold of the IC The IRS2153 1 D under voltage lock out is designed to maintain an ultra low supply current of less than 170 uA and to guarantee the IC is fully functional before the high and low side output drivers are activated During under voltage lock out mode the high and low side driver outputs HO and LO are both low Supply voltage AC Rectified Line e RV
5. determination of the output frequency the frequency characteristic curves should be used RT vs Frequency page 3 Shut down If CT is pulled down below VcTsp approximately 1 6 of Vcc by an external circuit CT doesn t charge up and oscillation stops LO is held low and the bootstrap FET is off Oscillation will resume once CT is able to charge up again to Vcr International IRS2153 1 D TER Rectifier 19 100 18 8 98 K F N ae 186 96 o 3 g gt 94 amp 18 4 g Ww Wwe 92 18 2 90 18 25 0 25 50 75 100 125 11 12 13 14 15 16 Tampetature C VCC V FREG vs VCC FREQ vs TEMP Fig 3 Fig 4 14 1 25 13 1 15 4 2 1 05 3 3 F E YA 0 95 4 0 85 0 9 0 75 14 12 13 14 15 16 25 0 25 50 75 100 125 VCC V Temperature C DT vs VCC DT vs TEMP Fig 5 IRS2153D Fig 6 IRS2153D 17 90 80 70 60 2 a g 350 a 8 gt 3 40 5 30 20 10 15 0 25 0 25 50 75 100 125 20 70 120 x Frequency kHz Temperature C VCC CLAMP vs TEMP Tj vs Frequency SOIC Fig 7 Fig 8 10 International IRS2153 1 D TER Rectifier
6. supply current is available over all operating conditions Once the capacitor voltage on Vcc reaches the start up threshold Vecuv the IC turns on and HO and LO begin to oscillate Bootstrap MOSFET The internal bootstrap FET and supply capacitor Cgoor comprise the supply voltage for the high side driver circuitry The internal boostrap FET only turns on when LO is high To guarantee that the high side supply is charged up before the first pulse on pin HO the first pulse from the output drivers comes from the LO pin Normal operating mode Once the Vecuv threshold is passed the MOSFET M1 opens RT increases to approximately Vcc Vcc Vrt and the external CT capacitor starts charging Once the CT voltage reaches Vert about 1 3 of Vcc established by an internal resistor ladder LO turns on with a delay equivalent to the deadtime ty Once the CT voltage reaches Ver approximately 2 3 of Vcc LO goes low RT goes down to approximately ground Vrr the CT capacitor discharges and the deadtime circuit is activated At the end of the deadtime HO goes high Once the CT voltage reaches Vcr HO goes low RT goes high again the deadtime is activated At the end of the deadtime LO goes high and the cycle starts over again The following equation provides the oscillator frequency 1 1 453x RT x CT This equation can vary slightly from actual measurements due to internal comparator over and under shoot delays For a more accurate
7. CC vec NA vB p 8 1 9 cBooT RT HO me gt E pa z RT la I cr vs t 3 Y 6 4 VV cvcc N ALET 0 RL MLS com LO H z 4 x 5 e e AC Rectified Line Fig 1 Typical Connection Diagram Fig 1 shows an example of supply voltage The start up capacitor Cvcc is charged by current through supply resistor Rvcc minus the start up current drawn by the IC This resistor is chosen to provide sufficient current to supply the IRS2153 1 D from the DC bus Cvcc should be large enough to hold the voltage at Vcc above the UVLO threshold for one half cycle of the line voltage as it will only be charged at the peak typically 0 1 uF It will be necessary for Rvcc to dissipate around 1 W The use of a two diode charge pump made of DC1 DC2 and CVS Fig 2 from the half bridge Vs is also possible however the above approach is simplest and the dissipation in Rycc should not be unacceptably high AC Rectified Line RVCC vec N Z ve 1 O 8 csoor A MHS RT Ho H 2 7 t H pc2 RT mM cT LO vs 3 er 4 4 cvec Sasa N cvs RL COM LO H ms z 4 YK 5 te pet H AC Rectified Line Fig 2 Charge pump circuit The supply resistor Rvcc must be selected such that enough
8. International TOR Rectifier Data Sheet No PD60238 revE IRS2153 1 D S PbF SELF OSCILLATING HALF BRIDGE DRIVER IC Features Integrated 600 V half bridge gate driver Cr Ry programmable oscillator 15 4 V Zener clamp on Vcc Micropower startup Non latched shutdown on Cr pin 1 6th Vcc Internal bootstrap FET Excellent latch immunity on all inputs and outputs 50 V ns dV dt immunity ESD protection on all pins 8 lead SOIC or PDIP package Internal deadtime Description The IRS2153 1 D is based on the popular IR2153 self oscillating half bridge gate driver IC using a more advanced silicon platform and incorporates a high voltage half bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer HVIC and latch immune CMOS technologies enable rugged monolithic construction The output driver features a high pulse current buffer stage designed for minimum driver cross conduction Noise immunity is achieved with low di dt peak of the gate drivers Product Summary VorrseT 600 V Max Duty cycle 50 Driver source sink 180 mA 260 mA typ current Veiamp 15 4 V typ Deadtime 1 1 us typ IRS2153D 0 6 us typ IRS21531D Package JN PDIP8 IRS2153 1 DPbF sos IRS2153 1 DSPbF Typical Connection Diagram AC Rectified Line IRS2153 1 D AC Rectified Line International IRS2153 1 D TER Rectifier Absolute Maximum Ratings Abso
9. ady state side floating supply offset voltage 3 0 Note 2 600 V s Supply voltage Vecuv 0 1 V Note 2 It is recommended to avoid output switching conditions where the negative going spikes at the Vs node would decrease Vs below ground by more than 5 V Note 3 Enough current should be supplied to the Vcc pin of the IC to keep the internal 15 6 V zener diode clamping the voltage at this pin Recommended Component Values Parameter Symbol Component Units Veias Vcc Vas 14 V Vs 0 V and T 25 C CLO CHO 1 nF Frequency vs RT 1 000 000 gi CT Values 100 000 e 330pf 10 000 ji e E nF 2 2nF 1 000 t t t T t Secs 4 7nF LL cH 100 e 10nF H EEH 10 NANANG EA 1 000 10 000 100 000 1 000 000 RT Ohm For further information see Fig 12 International TOR Rectifier Electrical Characteristics IRS2153 1 D Veias Vcc Vas 14 V Cr 1 nF Vs 0 V and T 25 C unless otherwise specified The output voltage and current Vo and lo parameters are referenced to COM and are applicable to the respective output leads HO or LO CLO CHO 1 nF
10. ead PDIP IRS21531DPbF 8 Lead SOIC IRS2153DSPbF 8 Lead SOIC IRS21531DSPbF 8 Lead SOIC Tape amp Reel IRS2153DSTRPbF 8 Lead SOIC Tape amp Reel IRS21531DSTRPbF International IGR Rectifier The SOIC 8 is MSL2 qualified This product has been designed and qualified for the industrial level Qualification standards can be found at www irf com lt http www irf com gt IR WORLD HEADQUARTERS 233 Kansas St El Segundo California 90245 Tel 310 252 7105 Data and specifications subject to change without notice 6 27 2006 14
11. lute maximum ratings indicate sustained limits beyond which damage to the device may occur All voltage parameters are absolute voltages referenced to COM all currents are defined positive into any lead The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions Parameter Symbol Definition Units D CT a Ls Tm 7 Supply current Note Supply current Note 1 Maximum allowable current at LO and HO due to external 500 OMAX power transistor Miller effect dVs dt Allowable Allowable offset voltage slew rate Allowable offset voltage slew rate slew rate Po Maximum power dissipation Ta lt 25 C 8 Pin DIP Maximum power dissipation Ta lt 25 C 8 Pin SOIC Thermal resistance junction to ambient 8 Pin DIP Thermal resistance junction to ambient 8 Pin SOIC Junction temperature Storage temperature aussi Lead temperature soldering 10 seconds Note 1 This IC contains a zener clamp structure between the chip Vcc and COM which has a nominal breakdown voltage of 15 4 V Please note that this supply pin should not be driven by a DC low impedance power source greater than the VcLamr specified in the Electrical Characteristics section International IRS2153 1 D ISR Rectifier Recommended Operating Conditions For proper operation the device should be used within the recommended conditions Definition Units High side floating supply voltage Ste
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lnternational IOR Rectifier IRS2153(1)D(S)PbF handbook