MAXIM MAX3372E MAX3379E/MAX3390E MAX3393E handbook
Contents
1. Vcc lt 3 3V Vcc Rise Time Note 4 tRVCC O Vcc Fall Time Note 5 tFVCC VL Rise Time Note 4 tRVL O VL_ Fall Time Note 5 Propagation Delay l OvL vcc Driving VL_ l OvcC vL Driving I O VcC Channel to Channel Skew tSKEW Each translator equally loaded Propagation Delay aximum Data Rate 41 8V lt VL lt Vec lt 2 5V O Vcc Rise Time Note 4 O Vcc Fall Time Note 5 tFvcC VL Rise Time Note 4 tRVL O Fall Time Note 5 tEVL l OvL vcc Driving l Ovcc vL Driving I O Vcc Propagation Delay Channel to Channel Skew tsKEW Each translator equally loaded aximum Data Rate Note 1 All units are 100 production tested at Ta 25 C Limits over the operating temperature range are guaranteed by design and not production tested Note 2 For normal operation ensure VL lt Vcc 0 3V During power up VL gt Vcc 0 3V will not damage the device Note 3 To ensure maximum ESD protection place capacitor between Vcc and GND See Applications Circuits Note 4 10 to 90 Note 5 90 to 10 MAXIM 5 J 6 XVW 3OGEEXVW 3626E XVW 3cZE E XVIWN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Typical Operating Characteristics RL 1MQ TA 25 C unless otherwise noted All2. J3 6 XVW 3OGEEXVW 36Z2 6E EXVW 3cZEEXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Chip Information TRANSISTOR COUNT MAX3372E MAX3376E 189 MAX3377E MAX3379E MAX3390E MAX3393E 295 PROCESS BiCMOS Package Information The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages SYMBOL MIN MAX SOT23 8L EPS PIN 4 I D DOT SEE NOTE 6 L2 P SEATING PLANE C M 7 1 ALL DIMENSIONS ARE MILLIMETERS AFOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF HEEL OF THE LEAD PARALLEL TO SEATING PLANE C 3 PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH amp METAL BURR 4 PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING 5 COPLANARITY 4 MILS MAX 6 PIN 1 I D DOT IS 0 3 MM MIN LOCATED ABOVE PIN 1 7 SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD BETWEEN 0 08mm AND 0 15mm FROM LEAD TIP 8 MEETS JEDEC MO178 DETAIL A DDALLAS AVLAXL VI PROPRIETARY INFORMATION TITLE PACKAGE OUTLINE SOT 23 8L BODY APPROVAL DOCUMENT CONTROL NO REV 1 21 0078 41 24 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Package Information con
3. THREE STATE GND Supply Current Three State Output Mode Leakage Current ITHREE STATE LKG TA 25 C T E STATE GND and I O Vec_ THREE STATE Pin Input Leakage TA 25 ESD PROTECTION IEC 1000 4 2 Air Gap Discharge Vcc Note 3 IEC 1000 4 2 Contact Discharge Human Body Model LOGIC LEVEL THRESHOLDS MAX3372E MAX3377E Input Voltage High VL_ Input Voltage Low 2 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP ELECTRICAL CHARACTERISTICS continued 1 65V to 5 5V VL 1 2V to Vcc 0 3V GND 0 I O Vi and I O unconnected TA TMIN to Tmax unless other wise noted Typical values are at Vcc 3 3V VL 1 8V TA 25 C Notes 1 2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS O Vcc Input Voltage High VIHC Vcc Input Voltage Low VL source current 20 Vcc Vcc 0 4V VL sink current 20pA Vec_ lt 0 15V O VL_ Output Voltage High 0 67 X VL O VL_ Output Voltage Low O Vcc_ source current 20 VL 0 2V 0 67 Vcc Output Voltage High VOHC Vcc sink current 20 Vcc Output Voltage Low VOLC lt 0 15V THREE STATE Input Voltage High EE STATE Input Voltage VIL THREE STATE VIL THREE STATE LOGIC LEVEL THRESHOLDS MAX3373E MAX3376E MAX337
4. 230kbps TOCs apply to MAX3372E MAX3377E only All 8Mbps 500kbps TOCs apply to MAX3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAX3393E only Vi SUPPLY CURRENT vs SUPPLY VOLTAGE SUPPLY CURRENT vs SUPPLY VOLTAGE Vi SUPPLY CURRENT vs TEMPERATURE DRIVING 1 0 VL Vec 3 3V 1 8V DRIVING 1 0 VL Vec 3 3V Vi 1 8V DRIVING 1 0 Vec Vec 3 3V 1 8V 600 35 500 E 3 0 E E bps CLoap 15pF p 500kbps OPEN DRAIN 1 _ E E 400 25 E 8Mbps CLoap 5 5 300 5 15 500kbps OPEN DRAIN Cio gt gt gt 25 200 _500kbps OPEN DRAIN CL oap 1 a amp wn gt wn 230kbps 100 0 165 220 275 330 385 440 495 550 155 220 275 330 385 440 495 550 E 85 Voc V Voc V TEMPERATURE C Vec SUPPLY CURRENT vs TEMPERATURE Vi SUPPLY CURRENT vs CAPACITIVE LOAD Vcc SUPPLY CURRENT vs CAPACITIVE LOAD DRIVING 1 0 Voc Vcc 3 3V 1 8V DRIVING 1 0 Vi Vcc 3 3V Vi 1 8V DRIVING 1 0 VL Vec 3 3V 1 8V 1600 0 2500 g 1400 E 6 E m 2000 3 g 1000 1500 5 800 500kbps OPEN DRAIN C
5. CONTROLLER MAXIM MAX3379E MAXIM 17 J3 6 XVHW 3OGEEXVW 36Z2 6E EXVW 3cZEEXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP 1 8V CONTROLLER Applications Circuits continued Vec THREE STATE MAXIM MAX3390E 1 8V SYSTEM CONTROLLER VL Vec THREE STATE 3 3V SYSTEM MAXIM MAX3391E MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Applications Circuits continued Vee THREE STATE 3 3V SYSTEM SYSTEM CONTROLLER MAXIM MAX3392E VL Vee THREE STATE 1 8V 3 3V SYSTEM SYSTEM CONTROLLER MAXIM MAX3393E MAXIM 19 AFECGEEXVIN JOGEEXVWN AGLEEXVIN ACZLEEXVN 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Selector Guide Ordering Information continued AX3372EEKA T PART NUMBER LEVEL TRANS LATION Y Bi TX 2 2 AX3372EEBL T Y Bi 2 2 DATA RATE 230kbps PIN PART NUMBER TEMP RANGE PACKAGE AX3372EEBL T 85 C MAX3373EEKA T 85 C AX3373EEBL T 85 C AX3373EEKA T Y Bi 2 2 AX3373EEBL T Y Bi 2 2 AX3374EEKA 1 AX3374EE AX3375EE Uni Uni Uni AX3375EE AX3376EE AX3376EE MAX3374E
6. MAX3393E ESD protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system Externally applied voltages Vcc and VI set the logic lev els on either side of the device A low voltage logic signal present on the VL side of the device appears as a high voltage logic signal on the Vcc side of the device and vice versa The MAX3374E MAX3375E MAX3376E MAX3379E and unidirectional level translators level shift data in one direction VL gt Vcc or Vcc VL on any single data line The MAX3372E MAX3373E and MAX3377E MAX3378E bidi rectional level translators utilize a transmission gate based design see Figure 2 to allow data translation in either direction VL lt Vcc on any single data line The MAX3372bE MAX3379E and accept VL from 1 2V to 5 5V and Vcc from 1 65V to 5 5V making them ideal for data transfer between low voltage ASICs PLDs and higher voltage systems VL Voc VL Vec MAXIM MAX3372E MAX3379E AND MAX3390E MAX3393E Vo V 1 0 RLOAD T CLoAD VO Vi RISE teat lt 10ns PD VCC LH tPD VCC HL re 9 4 1 1 1 Figure Rail to Rail Driving I O VL Rail to Rail is a registered trademark of Nippon Motorola Ltd 10 All devices in the MAX3372E MAX3379E 90 family feature a three state output
7. Short Circuit Protection Ordering Information PIN PACKAGE 8 SOT23 8 PART NUMBER TEMP RANGE MAX3372EEKA T 40 C to 85 C Ordering Information continued at end of data sheet Selector Guide appears at end of data sheet UCSP is a trademark of Maxim Integrated Products Inc SPI is a trademark of Motorola Inc is a trademark of Phillips Corp MICROWIRE is a trademark of National Semiconductor Corp Pin Configurations 1 0 Vcc2 MAXIM MAX3372E MAX3373E 1 0 1 Voc THREE STATE 1 0 Vi2 10 V11 SOT23 8 TOP VIEW Pin Configurations continued at end of data sheet Maxim Integrated Products 1 For pricing delivery and ordering information please contact Maxim Dallas Direct at 1 888 629 4642 or visit Maxim s website at www maxim ic com JEGEEXVNW JOGEEXVW I6LEEXVN IZZLEEXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP ABSOLUTE MAXIMUM RATINGS All Voltages Referenced to GND Continuous Power Dissipation Ta 70 C 0 3V to 6V 8 SOT23 derate 8 9mW C above 70 C 714mW 0 3V to Vcc 0 3V 3 x UCSP derate 4 7mW C above 70 379mW anu ML C MER ILIA T 0 3V to VL 0 3V 3 x 4 UCSP derate 6 5mW C above 70 C 579mW 0 3V to VL 0 3V 14 P
8. mode that reduces supply current to less than 1 thermal short circuit protection and 15kV ESD protection on the Vcc side for greater protection in applications that route sig nals externally The MAX3372E MAX3377E operate at a guaranteed data rate of 230kbps Slew rate limiting reduces EMI emissions in all 230kbps devices The MAXS3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAX3393E operate at a guaranteed data rate of 8Mbps over the entire specified operating voltage range Within specific voltage domains higher data rates are possible See Timing Characteristics Level Translation For proper operation ensure that 1 65V lt Vcc lt 5 5V 1 2V lt VL 5 5V and VL lt Vcc 0 3V During power up sequencing VL Vcc 0 3V will not damage the device During power supply sequencing when Vcc is floating and VL is powering up a current may be sourced yet the device will not latch up The speed up VL Voc MAXIM MAX3372E MAX3379E AND MAX3390E MAX3393E 1 0 _ 1 0 Vcc rise trALL lt 10ns Figure 1b Rail to Rail Driving O Vcc MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP circuitry limits the maximum data rate for devices in the 372 379 MAX3390E MAX3393E family to 16Mbps The maximum data rate also depends heavily on the load capacitance see Typical Operating Characteristics output impedance of the drive
9. 25 78 M 3372EEBL TH hv fS 19 2328 Rev 3 9 03 M AALS 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP General Description The 72 379 MAX3390E MAX3393E 15kV ESD protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system Externally applied voltages Vcc and set the logic levels on either side of the device A low voltage logic signal present on the VL side of the device appears as a high voltage logic signal on the Vcc side of the device and vice versa The MAX3374E MAX3375E MAX3376E MAX3379E and MAX3390E MAX3393E unidi rectional level translators level shift data in one direction VL Vcc or Vcc VL on any single data line The MAX3372E MAX3373E and MAX3377E MAX3378E bidi rectional level translators utilize a transmission gate based design Figure 2 to allow data translation in either direction VL lt Vcc on any single data line The MAXS3372bE MAX3379E accept VL from 1 2V to 5 5V and Vcc from 1 65V to 5 5V making them ideal for data transfer between low voltage ASICs PLDs and higher voltage systems All devices in the MAX3372E MAX3379E MAX3390E MAX3393E family feature a three state output mode that reduces supply current to less than 1pA thermal short circuit protection and 15kV ESD protection on the Vcc side for greater protection in applic
10. 390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP 50 to 100MQ Rp3300 CHARGE CURRENT DISCHARGE LIMIT RESISTOR RESISTANCE HIGH VOLTAGE DEVICE STORAGE UNDER CAPACITOR TEST DC SOURCE Figure 4a IEC 1000 4 2 ESD Test Model Applications Information Power Supply Decoupling To reduce ripple and the chance of transmitting incor rect data bypass VL and Vcc to ground with a capacitor See Typical Operating Circuit To ensure full 15kV ESD protection bypass Vcc to ground with a uF capacitor Place all capacitors as close to the power supply inputs as possible I C Level Translation The MAX3373E MAX3376E MAX3378bE MAX3379E and MAX3390E MAX3393E level shift the data present on the I O lines between 1 2V and 5 5V making them ideal for level translation between a low voltage VL 41 8V SYSTEM CONTROLLER yov THREE STATE MAXIM MAX3378E MAX3383E 10 tr 0 7ns to 1ns Figure 4b IEC 1000 4 2 ESD Generator Current Waveform ASIC and an 2 device A typical application involves interfacing a low voltage microprocessor to a 3V or 5V D A converter such as the MAX517 Push Pull vs Open Drain Driving All devices in the MAX3372bE MAX3379E and MAX3390E MAX3393E family may be driven push pull configuration The MAX3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAX3393E
11. 3V V 1 8V 50 MAX3372E toc28 Gd Eom x d 2V div 1 0 Vcc menos m DEIN D be ode ege M akan ts ere 1V div 2us div Pin Description FUNCTION nput Output 1 Referenced to VL Note 6 VL2 V 3 nput Output 2 Referenced to VL Note 6 nput Output 3 Referenced to VL Note 6 VA nput Output 4 Referenced to VL Note 6 Vcc Input Voltage 1 65V lt Vcc lt 5 5V Logic Input Voltage 1 2V lt VL Vcc 0 3V Three State Output Mode Enable Pull THREE STATE low to place device in three state output mode I O Vcc_ and VL_ are high impedance in three state output mode OTE Logic referenced to VL for logic thresholds see Electrical Characteristics Ground nput Output 1 Referenced to Vcc ut 2 Referenced to Vcc nput Output 3 Referenced to Vcc Note 6 nput Output 4 Referenced to Vcc Note 6 No Connection Not internally connected Note 6 For unidirectional devices MAX3374E MAX3375E MAX3376E MAX3379E and MAX3390E MAX3393E see Pin Configurations for input output configurations AVLAZCLAVI J 6 XVW 3OGEEXVW 36Z26E XVW 3cZE EXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Detailed Description The MAX3372E MAX3379E and MAX3390E
12. 5 600 z 500kbps OPEN DRAIN Z 4000 f 500kbps OPEN DRA A 5 5 ap 230kbps 230kbps 5 500 200 NL pE L u Jm s i 40 15 10 35 60 85 100 10 2 40 55 70 85 100 TEMPERATURE C CAPACITIVE LOAD pF CAPACITIVE LOAD pF RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD DRIVING 1 0 VL 3 3V Vi 1 8V DRIVING 1 0 VL Vcc 3 3V VL 1 8V DRIVING 1 0 VL Vcc 3 3V VL 1 8V 2500 5 250 2000 3 ii 5 1500 z DATA RATE 15 1000 5 m 100 OPEN 2 DATA RATE 230kbps HL at DATA RATE 50 0 0 20 30 40 50 60 70 80 90 100 50 10 15 20 25 30 35 40 45 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF 6 AVLAZCLAVI 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Typical Operating Characteristics continued RL 1MQ TA 25 C unless otherwise noted All 230kbps TOCs apply to MAX3372E MAX3377E only All 8Mbps and 500kbps TOCs apply to MAX3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAX3393E only P
13. 76E N C GND SOT23 8 3x3 UCSP MAKIM 21 AFEGEEXVIN JOGEEXVWN AGLEEXVIN ACZLEEXVN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP 22 0 1 O 0 Vcc2 O 0 Vec3 0 Vcc4 V A Vcc Vcci 2 VL 0 2 O THREE STATE 0 Vcc3 O 4 GND 0 Vcc4 3x4 UCSP VL MAXIM y MAX3377E MAX3376E 10 Vi OVE N C G MAXIM MAX3379E MAXIM MAX3390E n E TSSOP 14 TSSOP 14 Pin Configurations continued Vcc 0 0 2 0 Vcc3 0 Vcc4 N C THREE STATE 0 Vccl 0 Vcc2 0 Vcc3 0 Vcc4 N C THREE STATE Voc Vccl 0 Vcc2 0 Vcc3 0 Vcc4 N C THREE STATE MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Pin Configurations continued VL 0 1 MAXIM 0 1 Voc MAX3391E Voc O O 0V2 VL Vcc2 L Vcc3 L gt 4 IV3 THREE STATE 0 Vcc3 IG N C Q Q Q HREE STATE IV4 GND 0 3x4 UCSP ovi MAXIM MAX3392E O 0 2 0 4 0413 iC N C THREE STATE IVA Vcc MAXIM Ov Veci MAX3393E OVL Vcc3 Vcc4 L3 THREE STATE N C N C G THREE STATE GND TSSOP 14 3x4UCSP MAXIM 23
14. 8E MAX3379E and MAX3390E MAXS3393E VL Input Voltage High HL VL 0 2 O VL_Input Voltage Low V V Vcc Input Voltage High HC Vcc 0 4 V V Vcc Input Voltage Low VL source current 20 Vcc 2 Vcc 0 4V O VL sink current 1mA 0 15V VL_ Output Voltage High V O V4 Output Voltage Low Vcc_ source current 20 Output Voltage High JO V 2 VL 02V 0 67 X Vcc O Vcc sink current 1mA JO VL 0 15V O Vcc Output Voltage Low THREE STATE Input Voltage High THREE STATE Input Voltage Low ViH THREE STATE VIL THREE STATE MAXIM 3 J 6 XVHW 3OGEEXVW 36Z2 6E XVW 3cCZE EXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP TIMING CHARACTERISTICS Vcc 1 65V to 5 5V VL 1 2V to Vcc 0 3 GND 0 RLOAD 1MQ I O test signal of Figure 1 TA TMIN to Tmax unless otherwise noted Typical values are at Vcc 3 3V VL 1 8V TA 25 C unless otherwise noted Notes 1 2 PARAMETER SYMBOL CONDITIONS MAX3372E MAX3377E 50pF Vec_ Rise Time Note 4 Vcc Fall Time Note 5 VL_ Rise Time Note 4 tRVL ns Fall Time Note 5 tFVL ns l OvL vcc Driving I O 1 6 Propagation Delay HS l Ovcc vL Driving I O Vcc 1 6 Channel to Chann
15. E vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD DRIVING 1 0 Vec Vec 2 5V Vi 1 8V DRIVING 1 0 Vec Vec 2 5V Vi 1 8V DRIVING 1 0 Vec Vec 2 5V Vi 1 8V 2500 3 12 350 DATA 8 B 2000 E 10 IE 3 x 250 8 1500 20 3 g 500kbps Z OPEN DRAI 15 1000 oo 2 4 100 500 2 50 0 0 0 20 30 40 50 60 70 80 90 100 10 20 30 40 50 10 20 30 40 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF RAIL TO RAIL DRIVING RAIL TO RAIL DRIVING DRIVING 1 0 Vi Vec 3 3V V 1 8V DRIVING 1 0 VL Vec 3 3V 1 8V 50pF DATA RATE 230kbps 15pF DATA RATE 8Mbps MAX3372E toc25 MAX3372E toc26 1V div 1V div 1 0 Voc 2V div VO Veo 2V div 1us div 200ns div 8 AVLAZCLAVI 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Typical Operating Characteristics continued 1MQ TA 25 C unless otherwise noted All 230kbps TOCs apply to MAX3372E MAX3377E only All 8Mbps and 500kbps TOCs apply to MAX3373E MAX3376E MAX3378E MAX3379E and MAX3390 OPEN DRAIN DRIVING DRIVING 1 0 Vi Vec 3 3V Vi 1 8V CL 15pF DATA RATE 500kbps MAX3372E toc27 1 0 _ 2V div 200ns div PIN SOT23 8 THREE STATE Vi 1 E MAX3393E only EXITING THREE STATE OUTPUT MODE Vec 3
16. EKA 85 C MAX3375EEKA 85 C AX3375EEBL 1 85 C MAX3376EEKA 85 C AX3376EEBL 1 85 AX3377EE AX3377EEBC 1 230kbps MAX3377EEU 85 C 85 C MAX3378EEUD 85 C AX3378EEBC T 85 C AX3378EEUD AX3378EEBC 1 AX3379EE AX3379EE AX3390EE AX3390EE AX3391EE AX3391EE AX3392EE AX3392EE AX3393EE AX3393EE MAX3379EEUD 85 C AX3379EEBC T 85 C MAX3390EEUD 85 C AX3390EEBC T 85 C MAX3391EEUD 85 C AX3391EEBC T 85 C MAX3392EEUD 85 C AX3392EEBC T 85 C MAX3393EEUD 85 C AX3393EEBC T 85 C Future product contact factory for availability MAX3372E MAX33 79E MAX3390E MAX3393E Vi gt Voc Rx gt VL Higher data rates are possible see Timing Characteristics 20 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Pin Configurations continued Vcc THREE STATE MAXIM MAX3372E MAX3373E 1 0 Vcc1 1 0 Vcc2 SOT23 8 3 x 3 UCSP TOP VIEW B 0 Tom evum MAXIM THREE STATE MAX3374E GND VL SOT23 8 TOP VIEW 3x3 UCSP B 0 2 MAXI MI THREE STATE MAX3375E GND Vec THREE STATE SOT23 8 TOP VIEW 3x3 UCSP Vcc2 MAXIM THREE STATE MAX33
17. FORMATION TITLE PACKAGE OUTLINE TSSOP 4 40mm BODY APPROVAL DATUM C 1 THE OTHER PLANE IS AT THE SPECIFIED DISTANCE FROM C IN THE DIRECTION INDICATED DOCUMENT CONTROL ND 21 0066 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product No circuit patent licenses are implied Maxim reserves the right to change the circuitry and specifications without notice at any time Maxim Integrated Products 120 San Gabriel Drive Sunnyvale CA 94086 408 737 7600 25 2003 Maxim Integrated Products Printed USA MAXIM is registered trademark of Maxim Integrated Products J3 6 XVHW 3OGEEXVW 36Z2 XVW 3cZEEXVIW
18. ROPAGATION DELAY vs CAPACITIVE LOAD PROPAGATION DELAY vs CAPACITIVE LOAD PROPAGATION DELAY vs CAPACITIVE LOAD DRIVING 1 0 Vi Vec 3 3V Vi 1 8V DRIVING 1 0 Vi Vcc 3 3V 1 8V DRIVING 1 0 Vi Vec 3 3V 1 8V 700 15 300 x E DATA RATE 8Mbps B i 0m Ea 250 E m t 200 PHL 400 a 9 a NL So DATA RATE 500kbps E 300 E E OPEN DRAIN S zt z 100 amp 200 z E RATE 230kbps 3 20 30 40 50 60 70 80 90 100 10 15 20 25 30 35 40 45 50 10 15 20 25 30 35 40 45 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD DRIVING 1 0 VL Vcc 2 5V VL 1 8V DRIVING 1 0 VL Vcc 2 5V VL 1 8V DRIVING 1 0 Vcc 2 5V 1 8V 2500 300 2 E ATA RATE 8Mbps S E 2000 E 3 250 E 2 2 200 1500 Eds DATA RATE 500kbps OPEN DRAIN ua 1000 a a DATA RATE 230kbps 500 5i 0 0 0 30 40 50 60 70 80 90 100 50 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD RISE FALL TIME vs CAPACITIVE LOAD DRIVING 1 0 Vcc Vee 3 3V 1 8V DRIVING 1 0 Vcc Vece 3 3V 1 8V DRIVING 1 0 Vcc Vee 3 3V 1 8V 2500 12 s 300 DATA 8Mbps S 2000 2 10 3 250 2 a 2 2 20 1500 Ee DATA RA
19. TE 500 OPEN DRAIN 5 1000 a a 4 100 500 0 0 0 20 30 40 50 60 70 80 90 100 50 10 15 20 25 30 35 40 45 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF MAXIM 7 J 6 XVHW 3OGE EXVW 36Z2 6E XVW 3cCZE E XVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Typical Operating Characteristics continued RL 1MQ TA 25 C unless otherwise noted All 230kbps TOCs apply to MAX3372E MAX3377E only All 8Mbps and 500kbps TOCs apply to MAX3373E MAX3376E MAX3378E MAX3379E and only PROPAGATION DELAY vs CAPACITIVE LOAD PROPAGATION DELAY vs CAPACITIVE LOAD PROPAGATION DELAY vs CAPACITIVE LOAD DRIVING 1 0 Vec Vee 3 3V VL 1 8V DRIVING 1 0 Vec Vee 3 3V 1 8V DRIVING 1 0 Vec Vece 3 3V Vi 1 8V 700 6 300 5 E 230kbps DATA RATE 8Mbps 2 600 2 5 E 250 2 E pu E 500 4 200 400 DATA RATE 500kbps 5 S 3 OPEN DRAIN 3 300 25 5 5 x E am S 2 TT E 100 100 1 50 0 0 0 20 30 40 50 60 70 80 90 100 10 15 20 25 30 35 40 45 50 50 CAPACITIVE LOAD pF CAPACITIVE LOAD pF CAPACITIVE LOAD pF RISE FALL TIM
20. The MAX3372E MAX3379E and help to design equipment that meets Level 3 of IEC 1000 4 2 without the need for additional ESD protection components The major difference between tests done using the Human Body Model and IEC 1000 4 2 is higher peak cur rent IEC 1000 4 2 because series resistance is lower in the IEC 1000 4 2 model Hence the ESD withstand voltage measured to IEC 1000 4 2 is generally lower than that measured using the Human Body Model Figure 4a shows the IEC 1000 4 2 model and Figure 4b shows the current waveform for the 8kV IEC 1000 4 2 Level 4 ESD contact discharge test The air gap test involves approaching the device with a charged probe The contact discharge method connects the probe to the device before the probe is energized Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis tance Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing Of course all pins require this protec tion during manufacturing not just inputs and outputs Therefore after PC board assembly the Machine Model is less relevant to I O ports lp 100 PEAK TO PEAK RINGING 90 NOT DRAWN TO SCALE AMPERES 36 8 10 0 DL CURRENT WAVEFORM Figure 3b Human Body Current Waveform 13 J3 6 XVHW 3OGEEXVW 362 6E EXVW 3cCZEEXVIWN MAX3372E MAX33 79E MAX3
21. Voc to exceed Vcc 0 3V Thermal Short Circuit Protection Thermal overload detection protects the MAX3372E MAX8379E and MAX3390E MAXS3S393E from short circuit fault conditions In the event of a short circuit fault when the junction temperature TJ reaches 152 C a thermal sensor signals the three state output mode logic to force the device into three state output mode When Ty has cooled to 142 C normal operation resumes Vec MAXIM MAX3373E MAX3376E MAX3378E MAX3379E AND MAX3390E MAX3393E yov 0 Voc 1 0 Vcc_ i 1 1 tPD VL HL 1 Figure 1 Open Drain Driving I O VL 11 J3 6 XVHW 3OGEEXVW 36Z2 6E XVW 3cCZE EXVIN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP vovec Figure 2a Functional Diagram MAX3372E MAX3377E 11 0 line yov Figure 2b Functional Diagram MAX3373E MAX3378E 1 line 12 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP 15kV ESD Protection As with all Maxim devices ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly The I O Vcc lines have extra protection against static electricity Maxim s engineers have developed state of the art structures to protect these pins against ESD of 15kV without damage The ESD
22. ations that route sig nals externally The MAX3372E MAX3377E operate at a guaranteed data rate of 230kbps Slew rate limiting reduces EMI emissions in all 230kbps devices The MAXS3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAX3393E operate at a guaranteed data rate of 8Mbps over the entire specified operating voltage range Within specific voltage domains higher data rates are possible See Timing Characteristics MAX3372bE MAX3376E are dual level shifters available in 3 x 3 UCSP and 8 pin SOT23 8 pack ages The MAX3377E MAX3378E MAX3379E are quad level shifters avail able in 3 x 4 UCSP and 14 pin TSSOP packages Applications SPI MICROWIRE and 2 Level Translation Low Voltage ASIC Level Translation Smart Card Readers Cell Phone Cradles Portable POS Systems Portable Communication Devices Low Cost Serial Interfaces Cell Phones GPS Telecommunications Equipment MAXIM Features Guaranteed Data Rate Options 230kbps 8Mbps 1 2V lt VL lt Vcc lt 5 5V 10Mbps 1 2V lt VL lt Vcc lt 3 3V 16Mbps 1 8V lt VL x Vcc lt 2 5V 2 5V lt VL lt Vcc lt 3 3V Bidirectional Level Translation MAX3372E MAX3373E and MAX3377E MAX3378E Operation Down to 1 2V on VL 15kV ESD Protection on I O Vcc Lines Ultra Low 1 Supply Current in Three State Output Mode Low Quiescent Current 130p A typ UCSP SOT and TSSOP Packages Thermal
23. el Skew tSKEW Each translator equally loaded 500 ns MAX3373E MAX3376E MAX3378E MAX3379E and MAX3390E MAXS3393E 15pF Driver Output Impedance lt 500 1 2V lt VL Vcc lt 5 5V Vcc Rise Time Note 4 drain drivi Vcc Fall Time Note 5 rai rit drain driv VL_ Rise Time Note 4 drain drii Time Note 5 drain drivi I OvL Driving Vi PM 3 i Open drain driving 210 1000 4 30 Open drain driving 190 1000 Propagation Delay l Ovcc vL Driving I O Each translator equally loaded Open drain driving Channel to Channel Skew tSKEW Maximum Data Rate Open drain driving 4 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP TIMING CHARACTERISTICS continued Vcc 1 65V to 5 5V VL 1 2V to Vcc 0 3 GND 0 RLOAD 1MQ 1 0 test signal of Figure 1 TA to Tmax unless otherwise noted Typical values are at Vcc 3 3V VL 1 8V TA 25 C unless otherwise noted Notes 1 2 PARAMETER SYMBOL CONDITIONS 1 2V lt VL lt Vcc lt 3 3V Vcc Rise Time Note 4 tRVCC Fall Time Note 5 tFVCC VL Rise Time Note 4 tRVL _ Fall Time Note 5 tFVL Driving l Ovcc vL Driving I O Vcc Channel to Channel Skew tSKEW Each translator equally loaded aximum Data Rate 2 5V lt VL
24. in TSSOP derate 9 1mW C above 70 C 727mW Short Circuit Duration I O VL I O Vcc to GND Continuous Operating Temperature Range 40 C to 85 C Short Circuit Duration I O VL or I O Vcc to GND Storage Temperature Range 65 C to 150 C Driven from 40mA Source Lead Temperature soldering 105 300 C except MAX3372E and 7 7 Continuous Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability ELECTRICAL CHARACTERISTICS Vcc 1 65V to 5 5V VL 1 2V to Vcc 0 3V GND 0 I O Vj and I O unconnected TA to Tmax unless other wise noted Typical values are at Vcc 3 3V VL 1 8V TA 25 C Notes 1 2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES cc Supply Range upply Current from Vi S Supply Current from VL Vcc Three State Output Mode S VI M TA 25 C E STATE GND Current THREE STATE VCC TA 25 C 5 G L Three State Output Mode ITHREE STATEVL Ta 25 C
25. include internal 10kQ resistors that pull up I O Vi and Vcc to their respective power supplies allowing operation of the I O lines with open drain devices See Timing Characteristics for maximum data rates when using open drain drivers Typical Operating Circuit Vcc 1 0 Vec_ 14 MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Applications Circuits VL Voc THREE STATE 3 3V SYSTEM SYSTEM CONTROLLER MAXIM MAX3372E MAX3373E 1 0 Vi1 VL Vec THREE STATE 1 8V 3 3V SYSTEM SYSTEM CONTROLLER MAXIM MAX3374E MAXIM 15 AFEGEEXVIN JOGEEXVWN AGLEEXVIN ACLEEXVN MAX3372E MAX33 79E MAX3390E MAX3393E 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP 1 8V YSTEM CONTROLLER VL Vec THREE STATE MAKI M MAX3375E Applications Circuits continued 3 3V SYSTEM 1 8V SYSTEM CONTROLLER VL Vec THREE STATE MAXIM MAX3376E 3 3V SYSTEM MAXIM 15kV ESD Protected 1A 16Mbps Dual Quad Low Voltage Level Translators in UCSP Applications Circuits continued VL Vec THREE STATE 1 8V 3 3V SYSTEM SYSTEM CONTROLLER MAXKIM MAX3377E MAX3378E 1 0 Vi1 1 0 Vcc1 1 0 Vio 1 0 Vcc2 1 0 Vis 1 0 Vcca 1 0 Vcc4 VL Vec THREE STATE 1 8V 3 3V SYSTEM SYSTEM
26. r and the operational voltage range see Timing Characteristics Speed Up Circuitry The MAX3373E MAX3376E MAX3378E MAX3379E and feature a one shot generator that decreases the rise time of the output When triggered MOSFETs PU1 and PU turn on for a short time to pull up and Vcc_ to their respective supplies see Figure 2b This greatly reduces the rise time and propa gation delay for the low to high transition The scope photo of Rail to Rail Driving for 8Mbps Operation in the Typical Operating Characteristics shows the speed up circuitry in operation Three State Output Mode Pull THREE STATE low to place the MAX3372E MAX3379E and in three state out VL Vec MAXIM MAX3372E MAX3379E AND MAX3390E MAX3393E 10 Vec_ tPD VCC HL tPD VCC LH r t Le IRVCC 1 Figure 1c Open Drain Driving I O Vcc MAXIM put mode Connect THREE STATE to VL logic high for normal operation Activating the three state output mode disconnects the internal 10kQ pullup resistors on the I O Vcc and VL lines This forces the I O lines to a high impedance state and decreases the supply current to less than 1 The high impedance O lines in three state output mode allow for use in a multidrop network When in three state output mode do not allow the voltage at I O Vi to exceed VL 0 3V or the voltage at I O
27. structures withstand high ESD in all states normal operation three state out put mode and powered down After an ESD event Maxim s E versions keep working without latchup whereas competing products can latch and must be powered down to remove latchup ESD protection can be tested in various ways The I O Vcc lines of this product family are characterized for protection to the following limits 1 15kV using the Human Body Model 2 8kV using the Contact Discharge method specified in IEC 1000 4 2 3 x 10kV using IEC 1000 4 2 s Air Gap Discharge method ESD Test Conditions ESD performance depends on a variety of conditions Contact Maxim for a reliability report that documents test setup test methodology and test results Human Body Model Figure 3a shows the Human Body Model and Figure 3b shows the current waveform it generates when dis charged into a low impedance This model consists of a 100pF capacitor charged to the ESD voltage of inter est which is then discharged into the test device through a 1 5kQ resistor Rc MQ oa CHARGE CURRENT LIMIT RESISTOR Rp 15000 VW DISCHARGE RESISTANCE HIGH DEVICE VOLTAGE Cs L STORAGE UNDER DC 100 T CAPACITOR TEST SOURCE Figure 3a Human Body ESD Test Model AVLAZCLAVI IEC 1000 4 2 The IEC 1000 4 2 standard covers ESD testing and performance of finished equipment it does not specifi cally refer to integrated circuits
28. tinued The package drawing s in this data sheet may not reflect the most current specifications For the latest package outline information go to www maxim ic com packages e th 321 E s COMMON DIMENSIONS 5 MILLIMETERS INCHES 5 MIN MIN MAX amp 110 043 A 005 045 002 006 H Ae 085 0 95 033 037 b 019 030 007 012 019 025 007 010 009 020 004 008 ci 009 014 004 006 D SEE VARIATIONS 5 VARIATIONS IDP VIEV VIEM 430 450 169 177 0 65 BSC 026 BSC 625 655 246 258 SEE DETAIL N L 0 50 0 70 020 028 C es SEE VARIATIONS VARIATIONS exci SEATING PLANE SIDE VIEV VARIATIUNS A MILLIMETERS INCHES b MIN MAX MIN MAX bl 14160 490 510 193 201 1 WITH PLATING i BASE METAL DETAIL LEAD TIP DETAIL NOTES 1 DIMENSIONS D AND E DO NOT INCLUDE FLASH 2 MOLD FLASH OR PROTRUSIONS NOT EXCEED 015mm PER SIDE 3 CONTROLLING DIMENSION MILLIMETER 4 MEETS OUTLINE 153 SEE VARIATIONS TABLE REFERS TO NUMBER OF LEADS THE LEAD TIPS MUST LIE WITHIN A SPECIFIED ZONE THIS TOLERANCE ZONE IS DEFINED BY TWO PARALLEL PLANES ONE PLANE IS THE SEATING PLANE IRALLAS PROPRIETARY IN
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