DENSITRON DD-128128FC-5B handbook
Contents
1. 0x07 0x09 Ox0B 0x0C 0x0D Ox0E OxOF 0x10 0x11 0x12 0x13 0x16 Ox1E 0x21 0x22 0x25 0x2D 0x30 0x32 0x37 0x41 0x43 Ox4C 0x51 0x56 0x62 0x69 0x70 0x77 Ox7F Function Selection OxB3 0x03 Command Lock OxFD 0x12 High Power Protection OxD6 0x07 Sleep In 0x10 Set Display Clock Divide Ratto Oscillator Frequency Set Contrast for Color A 0xD2 0x10 OxBA 0x43 Set Multiplex Ratio Set Contrast for Color B OxCA Ox7F OxBB 0x55 Set Display Offset Set Contrast for Color C Low Gray Scale Enhancement OxC8 0x00 OxBC 0x87 OxE3 0x02 Memory Access Control Contrast Compensation Set Phase Length 0x36 0x88 0x01 OxD1 0x00 0x00 OxCD 0x32 Interface Pixel Format Write Luminance Set First Pre Charge Voltage Ox3A 0x05 0x51 OxFO OxBD 0x09 sar Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data First Pre Charge Compensation OxDO 0x04 Ox3F Set Second Pre Charge Period OxCE 0x0B Set Second Pre Charge Speed OxCF 0x03 Set VCOMH 0xD3 0x04 Disable All Pixels On Off 0x29 Display Inversion Off 0x20 DENSI TRON DISPLAYS Normal Display Mode On 0x13 Sleep Out 0x11 If the noise is accidentally occurred at the displaying window during the operation please reset the display in order to recover the display function DD 128128FC 5B REV C Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSIT2. DENSITRON DISPLAYS OLED DISPLAY MODULE Product Specification PRODUCT NUMBER DD 128128FC 5B CUSTOMER APPROVAL INTERNAL APPROVALS Product Mgr Doc Control Electr Eng Bazile Anthony Rekha Peter Perkins Mani Date 30 09 08 Date 30 09 08 Date 30 09 08 Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS TABLE OF CONTENTS EL NLAIN EPA CURE Scanner tii 4 2 MECHANICAL SPECIFICATION scsi ina 5 2 1 MECHANICAL CHARACTERISTIICS 5 S MECHANICAL DRA WIN E 6 3 ELECTRICAL SPECIFICATION eege Eeer 7 3 1 ABSOLUTE MAXIMUM RATINGS sse 7 ae PLECTRICAL CHARACTERISTICS conri 8 3 3 INIERFACE PINASSIGNMEN atrasada dia 9 3 4 SEE 9 REE era ias ee nee 12 3 5 TIMING CHARACIERDS IIC Susanna iros 13 A DPTICALSPECIFICA TIO Nossa 17 4 1 Ee 17 5 FUNCTIONAL SPECIFICATION ccsccccscccscscccsescccsesccesesccesescccsescccsssccsescsesescsese 18 5 1 COMIVTAN DSi odias 18 5 2 POWER UP DOW NSE OUP INGE cta dida 18 5 3 EE CU RBT T 18 5 4 ACTUAL APPLICATION EE 19 6 PACKAGING AND LABELLING SPECIFICATION o occccncoccncccnsoconccconocconoccnnoconoss 21 6 1 LXBEELING SS MARKING arrastrada ains 21 7 QUALITY ASSURANCE SPECIFICATION sss sss sss ssssssssssssssssssssss sss sassa aasan 22 7 1 CONF ORY stare ea 22 Se DELIVERY A URAN E 22 7 3 DEALING WITH CUSTOMER COMPLAINTS sse 26 8 RELIABILITY SPECIFICATION sssssssssssssssssssssssssssssssssssssssasss sassa asas as aaas saa san
3. LE r CLKL SCLK R W WR 8 NG E ke mee SDIN Valid Data y DHW DO CS N Y SCLK R W QWR Dy EK KBE DKS DK BH DK BB DK L ER DO a Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 4 OPTICAL SPECIFICATION 4 1 OPTICAL CHARACTERISTICS C LE White With Polarizer C LE Red With Polarizer Y C I E Green NN With Polarizer Y 0 10 0 14 0 18 With Polarizer EE Dark Room Viewing Angle C LE Blue Optical measurement taken at Ve 2 8V Vcc 15V eee Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data 9 FUNCTIONAL SPECIFICATION 5 1 COMMANDS Please refer to the Technical Manual for the SSD1355 5 2 POWER UP DOWN SEQUENCE DENSITRON DISPLAYS To protect panel and extend the panel lifetime the driver IC power up down routine should include a delay period between high voltage and low voltage power sources during turn on off It gives the panel enough time to complete the action of charge and before after the operation 5 2 1 POWER UP SEQUENCE Vop ON 1 Power up Va amp VppI0 x 3 Initialization 4 Clear Screen 5 Power up Vcc l 2 Send Display off command Vece e SE l l l 6 Delay 100ms Va Vppio When Vcc is stable 7 Send Display on command Vss Ground 9 2 2 POWER DOWN SEQUENCE Display off 1 Send Display off command 1 2 Power down
4. MPIC PUISLIO IB Y waq wa S9 0N TOFES LC 5867 1 01 IPIS due u Va TEPA XEN 08 TOFS HE EOOFEO ec OM SO OFS 61 1 0H XOS USIS9 pana again 0 OFOE OM ss 6I 1 0F sr a D LA r l mua 91 LLE BS 2 Tse de E gree OUT ST A b i 5 Yio de a in 2 E 09 E S e N or E O T s Wi to rO So Pza S sz aa SS o Sm BE g Z oy aa AN 7 soy CO uowwop s 5 p Homo i Y A ect moy A ia e 271 soy 0 HOO i z CD Og uowwop hb i E Wi puunjoo i P oY w of OV Wa Ss T y Sor UC O 8 uumjop i a i gt T S G Kl LC LTIO Waas ES A EE s 5 2 5 A 5 oO l 06 L BAY 9ANIY ae ks lt N 1 i PTS IND IN i ES Che Ge IOI 1 z E ON Lz A of da G S Y 3 om d SK i z SE ma JL GE W V 558 97 SZ0 0 A EX8ZI XLO 0d i TLb in 7 O gt yo O E a Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 ELECTRICAL SPECIFICATION 3 1 ABSOLUTE MAXIMUM RATINGS VSS 0 V Ta 25 C seme va 43 v senet we as as v orrae e o os an eia o a o e serr e o o e Static Electricity Be sure that you are grounded when handling displays Note 1 All the above voltages are on the basis of VSS 0V Note 2 When this module is used beyond above absolute maximum ratings permanent damage to the module may occur Also for normal operations i
5. OGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 9 HANDLING PRECAUTIONS Safety If the panel breaks be careful not to get the organic substance in your mouth or in your eyes If the organic substance touches your skin or clothes wash it off immediately using soap and plenty of water Mounting and Design Place a transparent plate e g acrylic polycarbonate or glass on the display surface to protect the display from external pressure Leave a small gap between the transparent plate and the display surface Design the system so that no input signal is given unless the power supply voltage is applied Caution during OLED cleaning Lightly wipe the display surface with a soft cloth soaked with Isopropyl alcohol Ethyl alcohol or Trichlorotriflorothane Do not wipe the display surface with dry or hard materials that will damage the polariser surface Do not use aromatic solvents toluene and xylene or ketonic solvents ketone and acetone Caution against static charge As the display uses C MOS LSI drivers connect any unused input terminal to Vpp or Vss Do not input any signals before power is turned on Also ground your body work assembly table and assembly equipment to protect against static electricity Packaging Displays use OLED elements and must be treated as such Avoid strong shock and drop from a height To prevent displays from degradation do not operate or store them exposed directly to s
6. RON DISPLAYS 6 PACKAGING AND LABELLING SPECIFICATION 6 1 LABELLING amp MARKING EPE COVER FOAM 351x212x1 ANTISTATICx 1 Pos 16 Pos Tray Vacuum packing SIA e eer GE E dm x 15 pos Gaggered Stacking 2 y Exsiocator x 2 pes Brimery Box 4 SET F Nrapped with adhesive tape x 16 pcs Vacuum packing bag CARTON BOX Primary L450rmx W296 x H110 B wave x 4Pos Label DENSITRON DD 128128FC 5B TW YY MM Carton Box L464mm x W313nm x H472nm AB wave are Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 7 QUALITY ASSURANCE SPECIFICATION 7 1 CONFORMITY The performance function and reliability of the shipped products conform to the Product Specification 7 2 DELIVERY ASSURANCE 7 2 1 DELIVERY INSPECTION STANDARDS IPC AA610 class 2 electronic assemblies standard 7 2 2 Zone definition A Active B Outside Active 7 2 3 Visual inspection Test and measurement to be conducted under following conditions Temperature 23550 Humidity 55415 RH Fluorescent lamp 30 W Distance between the Panel amp Eyes of the Inspector 230cm Distance between the Panel amp the lamp 250cm 7 2 4 Standard of appearance inspection Units mm one Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS Packing amp Outside amp inside package Presence of product no lot no qu
7. Vcc Vec 3 Delay 100ms When Vcc is reach 0 and panel is completely discharges NY CU V DDIO 4 Power down Va amp N nto Vss Ground _ 5 3 RESET CIRCUIT discharge Vcc ON Display On Vcc off Vop off When RES input is low the chip is initialized with the following status 1 Display is off 2 128 RGB x160 Display Mode 3 Normal segment and display data column and row address mapping SEGO mapped to column address 00h and COMO mapped to row address 00h 4 Display start line 1s set at display RAM address 0 5 Column address counter is set at 0 6 Normal scan direction of the COM outputs 7 Individual contrast control registers of colour A B C are set at 80h DD 128128FC 5B REV C Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 5 4 ACTUAL APPLICATION EXAMPLE Command usage and explanation of an actual example Software Reset 0x01 Tearing Effect Line On 0x35 0x00 Gamma Look up Table OxBE 0x01 0x04 0x07 0x09 Ox0B 0x0C 0x0D Ox0E OxOF 0x10 0x11 0x12 0x13 0x16 0x1D 0x21 0x23 0x24 0x2E 0x31 0x32 0x37 0x41 0x43 Ox4C 0x51 0x54 0x61 0x68 Ox6F 0x75 Ox7F Command Lock nna External VSL 0x01 0x08 OxOE 0x13 OxFD 0xB3 USLC OxB0 0x17 Ox1A 0x1C Ox1E Ox1F 0x20 0x21 0x22 0x23 0x25 0x2B 0x30 0x31 0x33 0x37 0x39 0x41 0x43 0x47 0x50 0x52 0x55 0x61 0x63 Ox6A 0x70 0x74 0x7F 0x01 0x04
8. YS Read Write Select or Write This pin is MCU interface input When interfacing to a 68XX series microprocessor this pin will be used as Read Write R W selection input Pull this pin to High for read mode and pull it Low for write mode When 80XX interface mode is selected this pin will be the Write WR input Data write operation is initiated when this pin is pulled low and the CS 1s pulled low When serial mode is selected this pin will be the serial clock input SCLK Data Command Control This pin is Data Command control pin When the pin is pulled high the input at D17 D0 is treated as display data When the pin is pulled low the input at D17 D0 will be transferred to the command register For detail relationship to MCU signals please refer to the Timing Characteristics Diagrams Power Reset for Controller and Driver This pin is reset signal input When the pin is low initialization of the chip is executed Chip Select This pin is the chip select input The chip is enabled for MCU communication only when CS is pulled low Tearing Effect SYNC Output To synchronize the MCU to the frame display writing Do not connect if not used Communicating Protocol Select These pins are MCU interface selection input See the following table po BO BS 3 wire SPI Cu wire BPL 0 S O 68XX parallel 8 16 18 bit 80XX parallel 8 16 18 bit 0 1 Set the command 36h for the MCU bus interface as SPI 8 b
9. a 27 8 1 RELIABILITY TESIS serieen A EE E EE 2i 8 2 CEE TINIE caia 2l Y HANDLING PRECAUIION Sonica iaa iia 28 Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS REVISI N RECORD Rev Page Chapt Comment 28 August 08 D e Modified DO D17 and R W September 9 10 STE 08 description SE Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 1 MAIN FEATURES Display Mode Passive Matrix 1 50 Miss Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 2 MECHANICAL SPECIFICATION 2 1 MECHANICAL CHARACTERISTICS pana Rg ve g Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DISPLAYS 00 N fm NO XEN S6 1 20 PINOYS Speru 34008 YIM SSIUNDIU 810 P9 QUIASSE ene AL ade 2AQUIAJ 29 WY DANDIJOJA JIZLIR Od MOIM SE XBW OL 1 SSIUADIUI 1810 AL 9 oO O OF 30UJAJO pessuay e On IdS SJLM JAJA XX 08 XX89 511Q 8 1 91 8 x 30RJJ9JU fp LASSEIASS 9QUINN JOD E WINS X WNTEZOI 2018 AA 7 SSEICSS OL JOAN DENSI TRON IND ON o 2 2 MECHANICAL DRAWING V A EEN 87 19ZUBIO A Y ZE aas ded 708 A 9AS OUR 4 TOFS EE SLOLLOOT V SUI
10. antity Critical Label Product must not be mixed with others and quantity must not be different from that indicated on the label Major Dimension Product dimensions must be according to specification and drawing Major Electrical Product electrical characteristics must be according to specification Critical OLED Missing lines short circuits or wrong patterns on OLED display are not Display allowed Minor Black spot Round type as per following drawing white spot X Y 2 dust orgo 3 Ala 02 lt 3 lt 0 25 1 025 0 Acceptable A ZoneA ZoneB gt W lt 0 05 L220 want An number 20 o Total acceptable quantity 3 Scratch on protective film is permitted scratch Scratch on polariser same as No 1 Minor Polariser D X Y 2 bubble S05 0 Any number a Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS en Criteria Minor Segment 1b Pin hole on dot matrix display Total acceptable quantity 7 2 Segments dots with different width kA 3 Alignment layer defect a b 2 SERGE 10915 03 15820 2 Total acceptable quantity 7 Minor Panel Chipping X lt 1 6 Panel length Y lt l Z lt T Minor Panel Cracking Cracks not allowed Minor Cupper Not allowed if visible by eye inspection exposed pin or film Minor Film or Not allowed if affect ele
11. ctrical function Trace Damage sis Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS Minor Contact Lead Twist Not allowed a o 2D TWISTED LEAD j A i i 1 H H Q Minor Contact Lead Not allowed Broken Minor Contact Lead Bent Not allowed 1f bent lead causes short circuit Not allowed if bent lead extends horizontally more than 50 of its width Minor Colour Level of sample for approval set as limit sample uniformity Minor ticl particles Gates On display Se Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 7 3 DEALING WITH CUSTOMER COMPLAINTS 7 3 1 Non conforming analysis Purchaser should supply Densitron with detailed data of non conforming sample After accepting it Densitron should complete the analysis in two weeks from receiving the sample If the analysis cannot be completed on time Densitron must inform the purchaser 7 3 2 Handling of non conforming displays If any non conforming displays are found during customer acceptance inspection which Densitron is clearly responsible for return them to Densitron Both Densitron and customer should analyse the reason and discuss the handling of non conforming displays when the reason 1s not clear Equally both sid
12. cuit This is a ground pin It also acts as a reference for the logic pins It must be connected to external ground Host Data Input output Bus These pins are 18 bit bi directional data bus to be connected to the microprocessors data bus When serial mode is selected DO 1 24 D17 D0 VO will be serial data input SDIN In this mode the unused data pins D1 should be left open and pins from D2 to D17 and E can be connected to external ground Power Supply for Core Logic Circuit This is a voltage supply pin It can be supplied externally VDD within the range of 2 4 2 6V or regulated internally from VCI A capacitor should be connected between this pin amp VSS under all circumstances Power Supply for Non Volatile OTP Memory Programming NO GN This is the NVM programming voltage supply pin It must be connected to VDD Read Write Enable or Read This pin is MCU interface input When interfacing to a 68XX series microprocessor this pin will be used as the Enable E signal Read write operation is initiated when this pin is pulled E RD 1 high and the CS is pulled low When connecting to an 8OXX microprocessor this pin receives the Read RD signal Data read operation is initiated when this pin is pulled low and CSF is pulled low When serial mode is selected this pin must be connected to VSS N gem a Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLA
13. es should discuss and come to agreement for issues pertaining to modification of Densitron quality assurance standard SR Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 8 RELIABILITY SPECIFICATION 8 1 RELIABILITY TESTS Test Condition Evaluation and assessment 70 C 2 240 hours No abnormalities in function and appearance 30 C 2 240 hours No abnormalities in function and appearance 80 C 2 240 hours No abnormalities in function and appearance 40 C 2 240 hours No abnormalities in function and appearance 60 C 2 90 RH 120 hours No abnormalities in function and appearance 24 cycle of 40 C 1 Hour No abnormalities in function R T 5 min and appearance 85 C 1 Hour e The samples used for above tests do not include polarizer e No moisture condensation is observed during tests 8 1 1 FAILURE CHECK STANDARD After the completion of the described reliability test the samples were left at room temperature for 2 hrs prior to conducting the failure teat at 23 5 C 55415 RH 8 2 LIFE TIME Description Function performance appearance etc shall be free from remarkable deterioration more than 10 000 hours under ordinary operating conditions of room temperature 25 10 C normal humidity 45 20 RH and in area not exposed to direct sunlight End of lifetime is specified as 50 of initial brightness oes Copyright 2008 DENSITRON TECHNOL
14. it Default or 16 18 bit Power Supply for I O Pin This pin is a power supply pin of 1 O buffer It should be connected to VDD or external source All I O signal should have VIH reference to VDDIO When I O signal pins BSO BS1 DO D17 control signals are pulled high they should be connected to VDDIO NO R W UI O YN LA No el LA LA K OO J O BSI 34 BSO LA LA O m UN Loi 5 VDDIO Power Supply for Operation This is a voltage supply pin It must be connected to external source amp always be equal to or higher than VDD amp VDDIO UI ON lt e Voltage Output Low Level for SEG Signal This is segment voltage reference pin VSL When external VSL is not used this pin should be left open When external VSL is used this pin should connect with resistor and diode to ground Power Supply for OEL Panel 38 VCC I This is the most positive voltage supply pin of the chip It must be connected to external source Ground of Analog Circuit 3 This is an analog ground pin It should be connected to VSS EEN SEN Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS Reserved Pin Supporting Pin N C GND The supporting pins can reduce the influences from stresses on the function pins These pins must be connected to external ground li Copyright 02008 DENSITRON TECHNOLOGIES plc All rights rese
15. r ow o E CPE ow e CATE wm o w mpn hes w o o mese a HH peroni om o CTS a E Read oe Time tPWHR sas sl chip SeectSeupTine e LAT Is E ew A e Chip Select HoldTine 1 e a CMA A A A prime CT nn Fall Time Vpp Vss 2 4V to 2 6V Vooo 1 6V Vci 2 8V Ta 25 C Write cycle Read cycle WR e DMR Ode D 17 0 0 po ZP wm emm A low When 8 bit Used D 7 0 Instead When 16 bit Used D 15 0 Instead When 18 bit Used D 17 0 Instead pale Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 5 4 Serial Interface Timing Characteristics 4 wire SPI rne IE wf IS massen HT is tome HTH is asman n Ja m emma tine a mapan ne A ts maea ow s s warowne H gi HHH HT C HTH H HHT Mon Vss 2 4V to 2 6V Vppio 1 6V Ve 2 8V Ta 25 C t cvel Je e t L F Po EE DEW e 4 e gt csa A ep EE SECH Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 5 5 Serial Interface Timing Characteristics 3 wire SPI rne IE wf IS massen HT is tome HTH is asman n Ja m emma tine a mapan ne ow ts maea ow s s warowne H gi JI nl CEI A O CI is Fall Time Vop Vss 2 4V to 2 6V Wope 1 6V Ve 2 8V Ta 25 C CS CS I LCYC
16. rved Proprietary Data DENSITRON DISPLAYS 3 4 BLOCK DIAGRAM Active Area 1 50 128 RGB x 128 Pixels MCU Interface Selection BSO and BS1 Pins connected to MCU interface D17 DO E RD R W D C RES and CSF C1 C3 C5 0 1uF 2 04 4 7uF C6 10uF C7 luF C8 4 7 uF 25V Tantalum Capacitor RI 680k Q R1 voltage at IREF VSS IREF R2 50 Q 1 4W D1 lt 1 4V 0 5W Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 5 TIMING CHARACTERISTICS 3 5 1 AC CHARACTERISTICS 3 5 2 68XX Series MPU Parallel Interface Timing Characteristics so T m mme Clock Clock Cyele Time Time aae 00 n G HH HH HT anne Te maan Tee macana Re aane Te E EES E A Select Low Pulse Width Read PW 120 Chip Select Low Pulse Width Write Pe 60 Chip Select High Pulse Width Read PW 60 gt 77 Select High Pulse Width Write ES 60 Rise Time Time Fall Time Vpp Vss 2 4V to 2 6V Vppio 1 6V Va WW Ta 25 C R W CS t if thew dE Dm Tp WRITE D 17 0 0 e EE E ton When 8 bit Used D 7 0 Instead When 16 bit Used D 15 0 Instead When 18 bit Used D 17 0 Instead nee Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 5 3 8080 Series MPU Parallel Interface Timing Characteristics ere APPO ss sete a ls masnom w Joo C
17. t s desirable to use this module under the conditions according to Section 3 2 Electrical Characteristics If this module is used beyond these conditions the module may malfunction and the reliability could deteriorate Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 2 ELECTRICAL CHARACTERISTICS Operation pins Supply Voltage for Ta 25 C Display High Level Input EES Low Level Input pve EE IT Mode Current for Vcc Note 1 Vc 2 8V Vcc 15V 50 Display area turned on Note 2 Va 2 8V Vcc 15V 100 Display area turned on Icc SLEEP ee Copyright 2008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data DENSITRON DISPLAYS 3 3 INTERFACE PIN ASSIGNMENT Reserved Pin Supporting Pin The supporting pins can reduce the influences from stresses on the function pins These pins must be connected to external Z NO Power Supply for OEL Panel This is the most positive voltage supply pin of the chip It must be connected to external source Voltage Output High Level for COM Signal This pin is the input pin for the voltage output high level for COM signals A tantalum capacitor should be connected between this pin and VSS Current Reference for Brightness Adjustment This pin is segment current reference pin A resistor should be connected between this pin and VSS Set the current lower than Ground of Logic Cir
18. unshine or high temperature humidity Caution during operation It is indispensable to drive the display within the specified voltage limit since excessive voltage shortens its life Other Precautions When a display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur Nonetheless if the operation is interrupted and left unused for a while normal state can be restored Also there will be no problem in the reliability of the module Storage Store the display in a dark place where the temperature is 25 C 10 C and the humidity below 50 RH Store the display in a clean environment free from dust organic solvents and corrosive gases Do not crash shake or jolt the display including accessories SR Copyright 02008 DENSITRON TECHNOLOGIES plc All rights reserved Proprietary Data
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DENSITRON DD 128128FC 5B handbook